HDMI direct display system of LED splicing screen

Abstract

This utility model discloses an HDMI direct display system for an LED video wall, relating to the field of image communication. It includes a main cabinet and multiple sub-cabinets, each equipped with a first HDMI signal processing circuit board. The main cabinet and the sub-cabinets are cascaded sequentially via HDMI cables. The HDMI video scaling circuit board of the main cabinet is directly connected to a signal source device via an HDMI cable and can perform image scaling processing on the HDMI signal from the signal source device. In another embodiment, the LED video wall is composed of multiple cabinets spliced ​​together. Each cabinet is equipped with a second HDMI signal processing circuit board, and the cabinets are cascaded sequentially. The second HDMI signal processing circuit board in the first cabinet is externally connected to a signal source device through its third HDMI input interface. This utility model enables direct connection between the LED video wall and the signal source device, and allows for image scaling to adapt to the display parameters of the LED video wall, ensuring distortion-free image display without the need for an external splicing processor.

Description

Technical Field

[0001] This utility model relates to the field of image communication, specifically to an HDMI direct display system for LED splicing screens. Background Technology

[0002] like Figure 1 As shown, traditional LED video walls typically require an external video wall processor connected via a network cable to connect to the signal source device. However, this connection method has several problems in practical applications: (1) From the user's perspective, the operation process is rather cumbersome. Users need to turn on multiple devices in sequence, and the system may fail to start quickly due to missing steps, which affects the efficiency of use and results in a poor user experience.

[0003] (2) In terms of operation and maintenance management, the system integration is low. It requires a main control transmitting card, receiving card, power supply, and signal source equipment (such as a computer) to light up the LED display screen, resulting in a large number of devices in the cabinet, messy cable layout, and complicated daily management. In addition, the large number of system nodes also makes fault location difficult. For example, power supply failure, poor network cable contact, or module failure may cause abnormal display of the screen, resulting in low troubleshooting efficiency. During maintenance, due to the lack of automatic correction function, manual correction is required after replacing the module, which is time-consuming and has high maintenance costs.

[0004] (3) During the construction and deployment phase, the installation work is extensive and costly. Mainstream products typically use embedded installation, requiring a minimum of 70mm of clearance. While this is more aesthetically pleasing, it significantly increases the costs of wall modifications, interior design coordination, and construction, thus extending the project cycle. System integration and deployment are also quite complex, requiring not only additional dedicated low-voltage cabinets but also a large number of network cables and complex wiring paths for the large screen, further increasing the overall project implementation difficulty and cost. Utility Model Content

[0005] The purpose of this invention is to provide an HDMI direct display system for LED splicing screens, which aims to overcome the aforementioned problems existing in the prior art.

[0006] To achieve this objective, the present invention provides the following technical solution: An HDMI direct display system for an LED video wall, the LED video wall being composed of a mother box and multiple daughter boxes spliced ​​together; The aforementioned mother box contains an HDMI video scaling circuit board and a first HDMI signal processing circuit board. The first HDMI input interface of the aforementioned HDMI video scaling circuit board is used to connect an external signal source device and to perform image scaling processing on the HDMI signal of the signal source device. Its first HDMI output interface is connected to its first HDMI signal processing circuit board. The aforementioned sub-box contains a first HDMI signal processing circuit board; The first HDMI signal processing circuit board in the mother box and the first HDMI signal processing circuit boards in each daughter box are cascaded sequentially via HDMI cables.

[0007] Furthermore, the aforementioned HDMI video scaling circuit board includes a scaling module, a DP to HDMI converter, a first microcontroller, and the aforementioned first HDMI input interface and first HDMI output interface. The aforementioned first HDMI input interface is connected to the input end of the scaling module, and the output end of the scaling module is sequentially connected to the DP to HDMI converter and the first HDMI output interface; the aforementioned first microcontroller is connected to the scaling module and the DP to HDMI converter.

[0008] Furthermore, the chip model of the aforementioned scaling module is HT7315-QHDH.

[0009] Furthermore, the chip model of the aforementioned DP to HDMI converter is GSV2022D.

[0010] Furthermore, the aforementioned first HDMI signal processing circuit board includes a second HDMI input interface, a mixed signal conversion module, an FPGA scanning control module one, a second HDMI output interface, and a second microcontroller connected in sequence; the aforementioned second HDMI input interface, mixed signal conversion module, and FPGA scanning control module one are connected in sequence, and the FPGA scanning control module one is connected to the LED module in the same box; the aforementioned second microcontroller is connected to the mixed signal conversion module and the FPGA scanning control module one; the aforementioned second HDMI output interface is connected to the mixed signal conversion module and is used to loop out the HDMI signal received by the mixed signal conversion module to the first HDMI signal processing circuit board in the next level sub-box.

[0011] Furthermore, the chip model of the aforementioned mixed-signal conversion module is GSV1127X.

[0012] Furthermore, the chip model of the aforementioned FPGA scanning control module one is EG4S20BG256.

[0013] An HDMI direct display system for an LED video wall is disclosed. The LED video wall is composed of multiple cabinets spliced ​​together, each cabinet housing an LED module. A second HDMI signal processing circuit board is housed within each cabinet, comprising a third HDMI input interface, an HDMI splitter, an RX receiver, an FPGA scaling module, a second FPGA scan control module, a third HDMI output interface, and a third microcontroller. The third HDMI input interface, HDMI splitter, RX receiver, FPGA scaling module, and second FPGA scan control module are sequentially connected, with the second FPGA scan control module connected to the LED modules within the same cabinet. The third microcontroller is connected to the HDMI splitter, RX receiver, and FPGA scaling module. The aforementioned third HDMI output interface is connected to the HDMI splitter and is used to loop out the HDMI signal received by the HDMI splitter to the second HDMI signal processing circuit board in the next level of the aforementioned cabinet, so that the second HDMI signal processing circuit boards in each of the aforementioned cabinets are cascaded in sequence, and the third HDMI input interface of the second HDMI signal processing circuit board in the first of the aforementioned cabinets is used to connect an external signal source device.

[0014] Furthermore, the chip model of the aforementioned HDMI splitter is GSV2502, and the chip model of the RX receiver is GSV1015.

[0015] Furthermore, the chip model of both the FPGA scaling module and the FPGA scanning control module 2 is KC6002FGEG.

[0016] Compared with the prior art, this utility model has the following advantages: Firstly, in Embodiment 1 of this utility model, the LED splicing screen includes a mother box and multiple daughter boxes. Both the mother box and the daughter boxes are equipped with a first HDMI signal processing circuit board, and these circuit boards are cascaded sequentially via HDMI cables. The mother box also includes an HDMI video scaling circuit board, which is directly connected to the signal source device via an HDMI cable. This circuit board performs image scaling and format conversion processing on the HDMI signal from the signal source device to adapt to the display parameters of the LED splicing screen, ensuring signal strength and distortion-free image display. Therefore, Embodiment 1 of this utility model enables direct connection between the LED splicing screen and the signal source device via the HDMI video scaling circuit board in the mother box, eliminating the need for an external splicing processor.

[0017] Secondly, in Embodiment 1 of this utility model, the HDMI video scaling circuit board includes a scaling module and a DP to HDMI converter. During operation, the scaling module performs image scaling and signal format conversion on the HDMI signal, and outputs the resulting DP signal to the DP to HDMI converter for conversion into an HDMI signal. The image scaling process includes resolution conversion and display adaptation, used to adapt the image display to the entire LED splicing screen and ensure distortion-free image display. The signal format conversion converts the scaled HDMI signal to DP format, improving signal integrity through DP relay, reducing long-distance transmission attenuation, and facilitating subsequent transmission and processing.

[0018] Thirdly, in Embodiment 1 of this utility model, the first HDMI signal processing circuit board includes a hybrid signal conversion module and an FPGA scanning control module. During operation, the first HDMI signal processing circuit board in the mother box receives the HDMI signal output from the HDMI video scaling circuit board through the second HDMI input interface. The hybrid signal conversion module splits the HDMI signal into two HDMI signals. One signal is converted into an LVDS signal as a downlink HDMI signal and sent to the FPGA scanning control module. The FPGA scanning control module converts the LVDS signal into an LED driving signal to illuminate the LED pixels of the LED module, completing the image display. The other signal is sent as a loop-out HDMI signal through the second HDMI output interface to the first HDMI signal processing circuit board in the next-level sub-box, realizing cascaded signal distribution.

[0019] Fourthly, in Embodiment 2 of this utility model, an HDMI direct display system for an LED splicing screen is provided. This LED splicing screen is composed of multiple cabinets, each cabinet containing a second HDMI signal processing circuit board, and these second HDMI signal processing circuit boards are cascaded sequentially. The second HDMI signal processing circuit board in the first cabinet is connected to a signal source device via its third HDMI input interface. Therefore, Embodiment 2 of this utility model enables direct connection between the LED splicing screen and the signal source device via the second HDMI signal processing circuit board, eliminating the need for an external splicing processor. Furthermore, the second HDMI signal processing circuit board includes an FPGA scaling module, capable of image scaling to adapt to the display parameters of the LED splicing screen, ensuring distortion-free image display. Attached Figure Description

[0020] Figure 1 This is a diagram of a traditional technology architecture.

[0021] Figure 2 This is the connection architecture of the LED splicing screen in Embodiment 1 of this utility model.

[0022] Figure 3This is a structural block diagram of the HDMI video scaling circuit board of the mother box in Embodiment 1 of this utility model.

[0023] Figure 4 This is a structural block diagram of the first HDMI signal processing circuit board in Embodiment 1 of this utility model.

[0024] Figure 5 This is the connection structure of the LED splicing screen in Embodiment 2 of this utility model.

[0025] Figure 6 This is a structural block diagram of the second HDMI signal processing circuit board in Embodiment 2 of this utility model. Detailed Implementation

[0026] The specific embodiments of this utility model are described below with reference to the accompanying drawings. Many details are described below to provide a comprehensive understanding of this utility model; however, those skilled in the art can implement this utility model without these details.

[0027] Example 1 like Figure 2 , Figure 3 and Figure 4 As shown, an HDMI direct display system for an LED splicing screen is provided. The LED splicing screen is composed of a mother box 1 and multiple daughter boxes 2 spliced ​​together. Both the mother box 1 and the daughter boxes 2 are equipped with LED modules (not shown in the figure). The LED modules are conventional components and belong to the prior art, so their specific structure will not be described in detail here.

[0028] like Figure 2 , Figure 3 and Figure 4 As shown, the mother box 1 also contains an HDMI video scaling circuit board 3 and a first HDMI signal processing circuit board 4. The HDMI video scaling circuit board 3, the first HDMI signal processing circuit board 4, and the LED module of the mother box 1 are connected in sequence. During operation, the HDMI video scaling circuit board 3 receives and processes the HDMI signal from the signal source device, performs image scaling on the HDMI signal, and outputs the processed HDMI signal to the first HDMI signal processing circuit board 4; the first HDMI signal processing circuit board 4 converts the received HDMI signal into an LED driving signal to light up the LED pixels of the LED module, thus completing the image display.

[0029] like Figure 2 , Figure 3 and Figure 4As shown, the sub-box 2 also contains a first HDMI signal processing circuit board 4, which is connected to the LED module of the sub-box 2. Furthermore, the first HDMI signal processing circuit board 4 in the sub-box 2 is identical to the first HDMI signal processing circuit board 4 in the mother box 1. During assembly, the first HDMI signal processing circuit board 4 in the mother box 1 and the first HDMI signal processing circuit boards 4 in each sub-box 2 are cascaded sequentially via HDMI cables.

[0030] like Figure 2 , Figure 3 and Figure 4 As shown, specifically, the HDMI video scaling circuit board 3 mainly includes a first HDMI input interface 31, a scaling module 32, a DP-to-HDMI converter 33, a first microcontroller 34, and a first HDMI output interface 35. The first HDMI input interface 31 is connected to the input terminal of the scaling module 32. The output terminal of the scaling module 32 is sequentially connected to the DP-to-HDMI converter 33 and the first HDMI output interface 35, and its first HDMI output interface 35 is connected to its first HDMI signal processing circuit board 4. In addition, the first microcontroller 34 is connected to the scaling module 32 and the DP-to-HDMI converter 33, and is used to configure and control the cooperative operation of the scaling module 32 and the DP-to-HDMI converter 33.

[0031] During operation, the first HDMI input interface 31 is used to connect an external signal source device, such as a computer. The HDMI video scaling circuit board 3 of the mother box 1 is connected to the signal source device via an HDMI cable to receive HDMI signals. The scaling module 32 performs image scaling and signal format conversion on the HDMI signal and outputs the processed DP signal to the DP to HDMI converter 33 to convert it into an HDMI signal. The HDMI signal is then output to the first HDMI signal processing circuit board 4 via the first HDMI output interface 35.

[0032] Specifically, the above image scaling process is as follows: a) Resolution conversion: converting the source resolution of the input signal to a target resolution that is consistent with the physical total resolution of the LED splicing screen; b) Display adaptation: scaling and resampling the image signal after resolution conversion to adapt to the display parameters of the LED splicing screen and ensure that the image is displayed without distortion. The above signal format conversion is to convert the scaled HDMI signal into DP format, i.e., to obtain a DP signal, in order to improve the signal driving capability and facilitate subsequent transmission and processing.

[0033] like Figure 2 , Figure 3 and Figure 4As shown, preferably, the scaling module 32 uses the HT7315-QHDH chip, which integrates a powerful scaling engine, multi-channel input / output support, image enhancement and other functions, and can process high-resolution signals (such as QHD, i.e., 2K resolution) and achieve high-quality image scaling.

[0034] like Figure 2 , Figure 3 and Figure 4 As shown, preferably, the chip model of the DP to HDMI converter 33 is GSV2022D, which can efficiently and with low latency convert DP signals to HDMI signals, ensuring that the scaled signal can be successfully transmitted to subsequent cascaded systems based on HDMI interfaces.

[0035] like Figure 2 , Figure 3 and Figure 4 As shown, preferably, the HDMI video scaling circuit board 3 also includes an RJ45 interface connected to the first microcontroller 34 and a USB-B interface connected to the scaling module 32, which are used for initial configuration and parameter debugging of the two respectively.

[0036] like Figure 2 , Figure 3 and Figure 4 As shown, preferably, both the first HDMI input interface 31 and the first HDMI output interface 35 have integrated CEC signal lines in their pins for transmitting CEC control signals and realizing consumer electronics control functions between devices.

[0037] In one specific embodiment, the first microcontroller 34 is configured to: read the device address or EDID information through the CEC signal line to indirectly determine the number of cascaded components, such as the number of sub-boxes 2, thereby obtaining the physical size and display parameters of the LED splicing screen, such as the resolution; the first microcontroller 34 then controls the scaling module 32 according to the obtained display parameters, so that it performs image scaling processing on the input signal to adapt to the display parameters.

[0038] like Figure 2 , Figure 3 and Figure 4As shown, specifically, the first HDMI signal processing circuit board 4 includes a second HDMI input interface 41, a mixed signal conversion module 42, an FPGA scanning control module 43, a second HDMI output interface 44, and a second microcontroller 45 connected in sequence. The second HDMI input interface 41, the mixed signal conversion module 42, and the FPGA scanning control module 43 are connected in sequence. The output of the FPGA scanning control module 43 is connected to an LED module within the same enclosure via a floating connector. The second microcontroller 45 is connected to the mixed signal conversion module 42 and the FPGA scanning control module 43, and is used to configure and control the collaborative operation of the mixed signal conversion module 42 and the FPGA scanning control module 43. The second HDMI output interface 44 is connected to the mixed signal conversion module 42, and is used to loop out the HDMI signal received by the mixed signal conversion module 42 to the first HDMI signal processing circuit board 4 in the next-level sub-enclosure 2.

[0039] During operation, the first HDMI signal processing circuit board 4 in the mother box 1 receives the HDMI signal output by the HDMI video scaling circuit board 3 through the second HDMI input interface 41; the mixed signal conversion module 42 is used to split the HDMI signal into two HDMI signals, one of which is converted into an LVDS signal as a downlink HDMI signal and sent to the FPGA scanning control module 43, and the other is sent as a loop-out HDMI signal through the second HDMI output interface 44 to the first HDMI signal processing circuit board 4 in the next level sub-box 2, realizing the cascaded distribution of signals; the FPGA scanning control module 43 converts the LVDS signal into an LED driving signal to light up the LED pixels of the LED module and complete the image display.

[0040] like Figure 2 , Figure 3 and Figure 4 As shown, preferably, the chip model of the mixed signal conversion module 42 is GSV1127X, so as to achieve lossless signal distribution, efficient conversion and stable loop-out, and ensure the integrity of the signal in the cascaded system.

[0041] like Figure 2 , Figure 3 and Figure 4 As shown, preferably, the FPGA scanning control module 43 uses the EG4S20BG256 chip, which features high flexibility and powerful parallel processing capabilities to handle the complex scanning algorithms and high-speed driving timing requirements of LED splicing screens. This model is capable of performing the core task of converting LVDS signals into precise LED driving signals, ensuring the quality and stability of image display.

[0042] like Figure 2 , Figure 3 and Figure 4As shown, preferably, the first HDMI signal processing circuit board 4 also includes an RJ45 interface connected to the FPGA scanning control module 43 for initialization configuration and parameter debugging of the FPGA scanning control module 43.

[0043] like Figure 2 , Figure 3 and Figure 4 As shown, preferably, both the pins of the second HDMI input interface 41 and the second HDMI output interface 44 are integrated with CEC signal lines for transmitting CEC control signals and realizing consumer electronics control functions between devices.

[0044] like Figure 2 , Figure 3 and Figure 4 As shown, preferably, the first HDMI signal processing circuit board 4 also includes a Flash memory, which is connected to the FPGA scanning control module 43 to store scanning configuration parameters (scanning logic and synchronous drive timing) to ensure the refresh synchronization of the entire LED splicing screen system.

[0045] Example 2 like Figure 5 and Figure 6 As shown, an HDMI direct display system for an LED video wall is described. The LED video wall is composed of multiple cabinets 5, each containing LED modules (not shown). Each cabinet 5 also houses a second HDMI signal processing circuit board 6, and these circuit boards are cascaded sequentially within each cabinet 5. The second HDMI signal processing circuit board 6 in the first cabinet 5 is connected to a signal source device, such as a computer, via its third HDMI input interface 61.

[0046] like Figure 5 and Figure 6 As shown, specifically, the second HDMI signal processing circuit board 6 includes a third HDMI input interface 61, an HDMI splitter 62, an RX receiver 63, an FPGA scaling module 64, an FPGA scanning control module 2 65, a third HDMI output interface 66, and a third microcontroller 67. The third HDMI input interface 61, HDMI splitter 62, RX receiver 63, FPGA scaling module 64, and FPGA scanning control module 2 65 are connected sequentially, and the FPGA scanning control module 2 65 is connected to the LED module within the same enclosure. Furthermore, the third microcontroller 67 is connected to the HDMI splitter 62, RX receiver 63, and FPGA scaling module 64, and is used to configure and control their coordinated operation. The third microcontroller 67 communicates with the HDMI splitter 62, RX receiver 63, and FPGA scaling module 64 via... Figure 6 The connection lines marked "UART" and "SPI" are connected to the FPGA scaling module 64 via the FPGA scanning control module 2 65.

[0047] In addition, the third HDMI output interface 66 is connected to the HDMI splitter 62 and is used to loop out the HDMI signal received by the HDMI splitter 62 to the second HDMI signal processing circuit board 6 in the next level of the aforementioned cabinet 5, so that the second HDMI signal processing circuit boards 6 in each cabinet 5 are cascaded in sequence, and the third HDMI input interface 61 of the second HDMI signal processing circuit board 6 in the first cabinet 5 is used to connect an external signal source device.

[0048] During operation, the second HDMI signal processing circuit board 6 inside the first cabinet 5 receives the HDMI signal from the signal source device through the third HDMI input interface 61 and sends it to the HDMI splitter 62. The HDMI splitter 62 splits the HDMI signal into two HDMI signals: one is sent as a downlink HDMI signal to the RX receiver 63, and the other is sent as a loop-out HDMI signal through the third HDMI output interface 66 to the second HDMI signal processing circuit board 6 inside the next cabinet 5, realizing cascaded distribution of signals. The RX receiver 63 converts the HDMI signal into a TTL signal and sends it to the FPGA scaling module 64. The FPGA scaling module 64 performs image scaling processing on the TTL signal to adapt to the resolution of the LED module and sends the scaled TTL signal to the second FPGA scanning control module 65. The second FPGA scanning control module 65 converts the TTL signal into an LED driving signal to light up the LED pixels of the LED module and complete the image display.

[0049] like Figure 5 and Figure 6 As shown, preferably, the HDMI splitter 62 uses a GSV2502 chip, and the RX receiver 63 uses a GSV1015 chip. The GSV2502, a high-performance HDMI 2.0 splitter chip, can stably support lossless signal distribution at 4K@60Hz resolution, possessing strong signal driving capabilities to ensure pure, attenuated signals cascaded to subsequent cabinets. The matching GSV1015 chip is responsible for efficiently completing HDCP decryption and TMDS signal deserialization, providing a stable and reliable digital video stream for subsequent image processing. Together, they form a solid foundation for the system's high-speed, lossless signal distribution and reception.

[0050] like Figure 5 and Figure 6As shown, preferably, both the FPGA scaling module 64 and the FPGA scanning control module 65 use the KC6002FGEG chip. The same high-performance FPGA chip is used to simultaneously implement the two core functions of image scaling and scanning control. Leveraging its powerful parallel processing capabilities and abundant logic unit resources, the KC6002FGEG chip can perform precise pixel scaling and image processing on the input high-resolution video in real time, converting it into scanning drive signals that precisely match the physical layout of the LED module. This integrated design not only simplifies the circuit structure and reduces system complexity and cost, but also ensures ultra-high synchronization and stability between image processing and display control, effectively eliminating problems such as display asynchrony caused by communication delays between different chips.

[0051] like Figure 5 and Figure 6 As shown, preferably, the second HDMI signal processing circuit board 6 also includes an RJ45 interface connected to the second FPGA scanning control module 65 for initialization configuration and parameter debugging of the second FPGA scanning control module 65.

[0052] like Figure 5 and Figure 6 As shown, preferably, both the third HDMI input interface 61 and the third HDMI output interface 66 have integrated CEC signal lines in their pins for transmitting CEC control signals and realizing consumer electronics control functions between devices.

[0053] In one specific embodiment, the third microcontroller 67 is configured to: read the device address or EDID information through the CEC signal line to indirectly determine the number of cascaded components, thereby obtaining the physical size and display parameters of the LED splicing screen, such as the resolution; the third microcontroller 67 then controls the FPGA scaling module 64 according to the obtained display parameters, so that it performs image scaling processing on the input signal to adapt to the display parameters.

[0054] The above are merely specific embodiments of this utility model, but the design concept of this utility model is not limited thereto. Any non-substantial modifications made to this utility model using this concept shall be considered as an infringement of the protection scope of this utility model.

Claims

1. An HDMI direct display system of an LED splicing screen, characterized in that: The LED splicing screen is composed of a mother box (1) and multiple daughter boxes (2) spliced ​​together; The mother box (1) is provided with an HDMI video scaling circuit board (3) and a first HDMI signal processing circuit board (4). The first HDMI input interface (31) of the HDMI video scaling circuit board (3) is used to connect an external signal source device and to perform image scaling processing on the HDMI signal of the signal source device. Its first HDMI output interface (35) is connected to its first HDMI signal processing circuit board (4). The sub-box (2) is equipped with a first HDMI signal processing circuit board (4); The first HDMI signal processing circuit board (4) in the mother box (1) and the first HDMI signal processing circuit board (4) in each daughter box (2) are cascaded in sequence via HDMI cables. 2.The HDMI direct display system of the LED splicing screen according to claim 1, characterized in that: The HDMI video scaling circuit board (3) includes a scaling module (32), a DP to HDMI converter (33), a first microcontroller (34), a first HDMI input interface (31), and a first HDMI output interface (35). The first HDMI input interface (31) is connected to the input end of the scaling module (32), and the output end of the scaling module (32) is connected to the DP to HDMI converter (33) and the first HDMI output interface (35) in sequence. The first microcontroller (34) is connected to the scaling module (32) and the DP to HDMI converter (33). 3.The HDMI direct display system of the LED splicing screen according to claim 2, characterized in that: The scaling module (32) has a chip model of HT7315-QHDH.

4. The HDMI direct display system for an LED splicing screen according to claim 2, characterized in that: The chip model of the DP to HDMI converter (33) is GSV2022D.

5. An HDMI direct display system for an LED splicing screen according to any one of claims 1-4, characterized in that: The first HDMI signal processing circuit board (4) includes a second HDMI input interface (41), a mixed signal conversion module (42), an FPGA scanning control module (43), a second HDMI output interface (44), and a second microcontroller (45) connected in sequence. The second HDMI input interface (41), the mixed signal conversion module (42), and the FPGA scanning control module (43) are connected in sequence, and the FPGA scanning control module (43) is connected to the LED module in the same box. The second microcontroller (45) is connected to the mixed signal conversion module (42) and the FPGA scanning control module (43). The second HDMI output interface (44) is connected to the mixed signal conversion module (42) and is used to loop out the HDMI signal received by the mixed signal conversion module (42) to the first HDMI signal processing circuit board (4) in the next sub-box (2).

6. The HDMI direct display system for an LED splicing screen according to claim 5, characterized in that: The chip model of the mixed signal conversion module (42) is GSV1127X.

7. The HDMI direct display system for an LED splicing screen according to claim 5, characterized in that: The chip model of the FPGA scanning control module (43) is EG4S20BG256.

8. An HDMI direct display system for an LED splicing screen, the LED splicing screen being composed of multiple cabinets (5) spliced ​​together, each cabinet (5) being equipped with an LED module; characterized in that: The enclosure (5) contains a second HDMI signal processing circuit board (6), which includes a third HDMI input interface (61), an HDMI splitter (62), an RX receiver (63), an FPGA scaling module (64), a second FPGA scanning control module (65), a third HDMI output interface (66), and a third microcontroller (67). The third HDMI input interface (61), the HDMI splitter (62), the RX receiver (63), the FPGA scaling module (64), and the second FPGA scanning control module (65) are connected in sequence, and the second FPGA scanning control module (65) is connected to the LED module in the same enclosure. The third microcontroller (67) is connected to the HDMI splitter (62), the RX receiver (63), and the FPGA scaling module (64). The third HDMI output interface (66) is connected to the HDMI splitter (62) and is used to loop out the HDMI signal received by the HDMI splitter (62) to the second HDMI signal processing circuit board (6) in the next level cabinet (5), so that the second HDMI signal processing circuit boards (6) in each cabinet (5) are cascaded in sequence, and the third HDMI input interface (61) of the second HDMI signal processing circuit board (6) in the first cabinet (5) is used to connect an external signal source device.

9. The HDMI direct display system for an LED splicing screen according to claim 8, characterized in that: The HDMI splitter (62) has a chip model of GSV2502, and the RX receiver (63) has a chip model of GSV1015.

10. The HDMI direct display system for an LED splicing screen according to claim 8, characterized in that: The chip model of both the FPGA scaling module (64) and the FPGA scanning control module 2 (65) is KC6002FGEG.

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