REDUCED BANDWIDTH TESSELLING FACTORS
Patent Information
- Application Number
- DE602020048514
- Authority / Receiving Office
- DE · DE
- Patent Type
- Patents
- Current Assignee / Owner
- Priority Date
- 2019-11-14
- Filing Date
- 2020-11-13
- Publication Date
- 2025-03-26
- Estimated Expiration
- 2040-11-13
AI Technical Summary
The limited capacity and high overhead of dedicated GPU memory for storing tessellation factors in graphics processing units (GPUs) lead to inefficiencies in processing three-dimensional graphics, as significant bandwidth is consumed writing and reading these factors, especially when many have the same value.
The graphics pipeline detects threshold percentages of tessellation factors within a thread group and bypasses writing and reading them from memory by sending messages to the patch fetcher, either discarding, passing, or applying a single instance of tessellation factors to reduce memory access, thereby optimizing bandwidth and efficiency.
This approach significantly reduces the bandwidth consumption and improves the efficiency of the graphics processing pipeline by minimizing unnecessary memory operations, especially when multiple tessellation factors are identical or have specific values indicating culling or tessellation.