Abnormality detection device

Abstract

To provide an abnormality detection device capable of determining whether abnormalities occur, based on a plurality of sensing paths using a plurality of sense resistors.SOLUTION: An abnormality detection device 1 comprises differential voltage extraction circuits 6, 7, 8 that extract multiple differential voltages ΔV corresponding to the voltages between the terminals of a plurality of sense resistors 3, 4 connected in series to detect a current flowing through a load. The abnormality detection device 1 comprises an abnormal status detection circuit 10 that determines whether an abnormality has occurred at terminals 15, 16, 17 of the plurality of resistors based on the plurality of differential voltages extracted by the differential voltage extraction circuits 6, 7, 8.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present invention relates to an abnormality detection device. [Background technology]

[0002] This type of abnormality detection device is provided, for example, to detect an abnormality in a terminal connected to an external load (see, for example, Patent Document 1). According to the technology described in Patent Document 1, the device includes a resistance circuit consisting of a plurality of resistors connected in series, a plurality of contacts connected to the plurality of resistors, a movable terminal connecting one of the plurality of contacts to a GND potential, a detection resistor whose voltage across both ends varies according to the value of a current flowing through the resistance circuit, a voltage monitoring means for monitoring the voltage across the detection resistor, and a control means for determining the connection state between the movable terminal and the contact based on the voltage information of the voltage monitoring means. Then, first and second paths are provided for passing a current from one end or the other end of the resistance circuit to the GND potential of the movable terminal. That is, the connection state between the movable terminal and the contact and the short circuit of the contact are detected based on the detection of the voltage value between the plurality of resistors. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] JP 2016-056833 A Summary of the Invention [Problem to be solved by the invention]

[0004] The applicant has developed a load control device, such as a switching power supply device, that uses a switching element. The inventors have been studying how to reliably determine whether an abnormality has occurred in this load control device by using multiple sensing resistors and multiple sensing paths. However, even when using the technology described in Patent Document 1, it is not possible to reliably determine whether an abnormality has occurred.

[0005] An object of the present disclosure is to provide an abnormality detection device that is capable of determining whether an abnormality has occurred based on multiple sensing paths using multiple resistors. [Means for solving the problem]

[0006] According to the invention described in claim 1, the differential voltage extraction unit extracts multiple differential voltages corresponding to the voltages between the terminals of multiple resistors connected in series to detect the current flowing through the load, and the state determination unit determines whether an abnormality has occurred at the terminals of the multiple resistors based on the multiple differential voltages extracted by the differential voltage extraction unit. According to the invention described in claim 1, by determining whether an abnormality has occurred based on the multiple differential voltages extracted by the multiple differential voltage extraction units, it is possible to determine whether an abnormality has occurred based on multiple sensing paths.

[0007] The inventors are also considering maintaining the overcurrent protection function even when an abnormality is detected. However, even if the technology described in Patent Document 1 is applied, the overcurrent protection function cannot be maintained when there is a short circuit between terminals or when one of the terminals is open.

[0008] According to the invention described in claim 2, the voltage conversion unit outputs an average voltage obtained by averaging a plurality of difference voltages or selectively outputs a plurality of difference voltages based on the judgment result of the state judgment unit, and the overcurrent detection unit detects an overcurrent based on the output of the voltage conversion unit. Therefore, even if a short circuit abnormality or an open circuit abnormality occurs, overcurrent detection can be continued. Also, by extracting and averaging the difference voltage, voltage detection errors can be reduced. [Brief description of the drawings]

[0009] [Figure 1] Electrical configuration diagram showing the first embodiment [Diagram 2] FIG. 13 is an explanatory diagram of a determination method performed by a state determination unit according to the first to seventh embodiments. [Diagram 3] FIG. 1 is a schematic diagram showing an electrical configuration of a comparative example. [Figure 4] Electrical configuration diagram showing the second embodiment [Diagram 5] Electrical configuration diagram showing the third embodiment [Figure 6] Electrical configuration diagram showing the fourth embodiment [Figure 7] Electrical configuration diagram showing the fifth embodiment [Figure 8] Electrical configuration diagram showing the sixth embodiment [Figure 9] Electrical configuration diagram showing the seventh embodiment DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0010] Hereinafter, several embodiments of an abnormality detection device for a load control device will be described. In the respective embodiments, parts having the same functions are denoted by the same reference numerals, and the description thereof may be omitted.

[0011] (First embodiment) A first embodiment will be described below with reference to Fig. 1 to Fig. 3. An embodiment in which a load control device is applied to a switching power supply device 100 will be described. The switching power supply device 100 shown in Fig. 1 has a function as an abnormality detection device 1. First, the configuration of the switching power supply device 100 will be described, and then the configuration of the abnormality detection device 1 will be described.

[0012] <Configuration of Switching Power Supply Device 100> The switching power supply device 100 includes a switching power supply control unit 5, switching elements SW1 and SW2, an inductor 101, and a capacitor 102. The switching power supply device 100 is also configured with an abnormality detection device 1 connected thereto.

[0013] The switching elements SW1 and SW2 are each formed of, for example, an n-channel MOSFET, and the switching element SW1 is formed as a load. The gate of the switching element SW1 is connected to the switching power supply controller 5 through a terminal 18. The gate of the switching element SW2 is connected to the switching power supply controller 5 through a terminal 19.

[0014] A plurality of sense resistors 3 and 4 detect the drain current of the switching element SW1. The sense resistors 3 and 4 are set to have the same resistance value. The "same value" here means that the values ​​are the same under conditions that a predetermined effect can be obtained within a range that takes into account the variations in the sense resistors 3 and 4, and it is not necessary for them to be completely the same. The sense resistors 3 and 4 and the drain-source paths of the switching elements SW1 and SW2 are connected in series between the node of the power supply voltage VDD and the ground node. Since the sense resistors 3 and 4 are connected in series, the same current flows through the sense resistors 3 and 4, and the same voltage is generated between the terminals of the sense resistors 3 and 4 if they are operating normally.

[0015] An inductor 101 is connected between the common connection point between the switching elements SW1 and SW2 and the output terminal OUT. A capacitor 102 is connected between the output terminal OUT and a ground node. Thus, the inductor 101 and the capacitor 102 are connected at the node of the output terminal OUT. The output voltage of the output terminal OUT is input to the switching power supply control unit 5 via a terminal 20 as a feedback voltage FB.

[0016] The switching power supply control unit 5 detects the output voltage at the output terminal OUT as a feedback voltage FB, and controls the output voltage to a predetermined target voltage. The switching power supply control unit 5 outputs complementary pulse voltages as gate voltages VGH and VGL to the switching elements SW1 and SW2 via terminals 18 and 19, respectively, and controls the output voltage to the predetermined target voltage by controlling the duty ratio and frequency.

[0017] For example, the switching power supply controller 5 applies an ON control voltage as the gate voltage VGH between the gate and source of the switching element SW1. At the same time, the switching power supply controller 5 applies an OFF control voltage as the gate voltage VGL between the gate and source of the switching element SW2. At this time, a current flows from the application node of the power supply voltage VDD through the sense resistors 3 and 4 and the switching element SW1 to the inductor 101 and the capacitor 102, thereby increasing the output voltage of the output terminal OUT.

[0018] Furthermore, the switching power supply controller 5 applies an OFF control voltage as the gate voltage VGH between the gate and source of the switching element SW1. At the same time, the switching power supply controller 5 applies an ON control voltage as the gate voltage VGL between the gate and source of the switching element SW2. At this time, the current flowing from the power supply voltage VDD is cut off by the switching element SW1, and the current can be returned from the capacitor 102 through the inductor 101 and the switching element SW2, and the output voltage of the output terminal OUT can be reduced.

[0019] The switching power supply control unit 5 inputs the output voltage at the output terminal OUT as a feedback voltage FB through the terminal 20, and judges whether the output voltage at the output terminal OUT is higher or lower than a predetermined target voltage. Based on the result of this judgment, the switching power supply control unit 5 adjusts the pulse width or pulse frequency applied to the switching elements SW1 and SW2. This makes it possible to adjust the on / off time of the switching element SW1 and the on / off time of the switching element SW2, and to control the output voltage at the output terminal OUT.

[0020] <Configuration of abnormality detection device 1> The abnormality detection device 1 is provided to detect an overcurrent based on extracting a plurality of differential voltages ΔV based on the sense resistors 3 and 4. In the case of a short / open abnormality in the switching element SW1, the switching power supply control unit 5 can determine the presence or absence of an abnormality by itself, but the abnormality detection device 1 is provided because it cannot determine an overcurrent.

[0021] In addition to sense resistors 3 and 4, abnormality detection device 1 also includes a first differential voltage extraction circuit 6, a second differential voltage extraction circuit 7, a third differential voltage extraction circuit 8, and an abnormal state detection circuit 10 as a state determination unit. Furthermore, abnormality detection device 1 also includes a voltage conversion unit 9 and an overcurrent detection circuit 11 as an overcurrent detection unit. If it is sufficient to simply detect abnormalities, the voltage conversion unit 9 and the overcurrent detection circuit 11 may be provided as necessary. The first differential voltage extraction circuit 6, the second differential voltage extraction circuit 7, and the third differential voltage extraction circuit 8 are configured as a differential voltage extraction unit.

[0022] The first differential voltage extraction circuit 6, the second differential voltage extraction circuit 7, and the third differential voltage extraction circuit 8 extract a plurality of differential voltages ΔV (corresponding to V1-V2, V2-V3, and V3-V1 in FIG. 1) according to the voltages between the terminals of the plurality of sense resistors 3 and 4 (corresponding to terminals 15-16, terminals 16-17, and terminals 17-15 in FIG. 1). The abnormal status detection circuit 10 determines whether a short circuit abnormality has occurred between the terminals of the plurality of sense resistors 3 and 4 (corresponding to terminals 15-16, terminals 16-17, and terminals 17-15 in FIG. 1) based on the plurality of differential voltages ΔV from the first differential voltage extraction circuit 6, the second differential voltage extraction circuit 7, and the third differential voltage extraction circuit 8.

[0023] 1, resistors 51 and 52 are connected in series between the terminal 15 and a ground node. The resistors 51 and 52 detect a divided voltage of the voltage Va generated at the terminal 15 as a voltage V1 and output it to the first differential voltage extraction circuit 6 and the third differential voltage extraction circuit 8.

[0024] Resistors 53 and 54 are connected in series between the terminal 16 and the ground node. The resistors 53 and 54 detect a divided voltage of the voltage Vb generated at the terminal 16 as a voltage V2 and output it to the first differential voltage extraction circuit 6 and the second differential voltage extraction circuit 7.

[0025] Resistors 55 and 56 are connected in series between the terminal 17 and the ground node. The resistors 55 and 56 detect the divided voltage of the voltage Vc generated at the terminal 17 as a voltage V3, and output it to the second differential voltage extraction circuit 7 and the third differential voltage extraction circuit 8. The voltage division ratio of the divided voltage by the resistors 51 and 52, the voltage division ratio of the divided voltage by the resistors 53 and 54, and the voltage division ratio of the divided voltage by the resistors 55 and 56 are set to, for example, the same value. The same value here means that the values ​​are the same under conditions that a predetermined effect can be obtained within a range that takes into account the variations in the sense resistors 3 and 4 and the variations in the resistors 51 to 56, and does not need to be completely the same.

[0026] The first differential voltage extraction circuit 6 extracts the difference voltage ΔV between voltages V1 and V2, and outputs the extracted difference voltage ΔV to the voltage conversion unit 9 and the abnormal condition detection circuit 10. The second differential voltage extraction circuit 7 extracts the difference voltage ΔV between voltages V2 and V3, and outputs the extracted difference voltage ΔV to the voltage conversion unit 9 and the abnormal condition detection circuit 10. The third differential voltage extraction circuit 8 extracts the difference voltage ΔV between voltages V3 and V1, and outputs the extracted difference voltage ΔV to the voltage conversion unit 9 and the abnormal condition detection circuit 10.

[0027] The voltage conversion unit 9 receives the differential voltages ΔV extracted by the first differential voltage extraction circuit 6, the second differential voltage extraction circuit 7, and the third differential voltage extraction circuit 8. The input differential voltages ΔV are V1-V2, V2-V3, and V3-V1. The voltage conversion unit 9 includes an average voltage extraction circuit 9a as an average voltage extraction unit. The average voltage extraction circuit 9a averages the multiple input differential voltages ΔV.

[0028] Here, if the resistance values ​​of the sense resistors 3 and 4 are the same, in a normal state, the multiple difference voltages ΔV extracted by the first difference voltage extraction circuit 6, the second difference voltage extraction circuit 7, and the third difference voltage extraction circuit 8 will be the same value, and therefore the averaged difference voltages ΔV will also be the same value.

[0029] Furthermore, the sense resistors 3 and 4 do not need to have the same resistance value. If the resistance values ​​are different, the differential voltage ΔV will be proportional to the resistance value, so it is advisable to extract an average voltage of the differential voltage ΔV according to the ratio of the resistance values ​​of the multiple sense resistors 3 and 4. In this case, it is advisable to set a setting value for the differential voltage ΔV in a normal / abnormal determination table T (see FIG. 2), which will be described later, according to the ratio of the resistance values ​​of the sense resistors 3 and 4.

[0030] When the average voltage extraction circuit 9a averages the differential voltage ΔV, in principle, it can average the above-mentioned differential voltages ΔV (=V1-V2, V2-V3, V3-V1) corresponding to between the terminals 15-16, 16-17, and 17-15. As a result, it is possible to average the differential voltages ΔV based on the voltages Va, Vb, and Vc generated at the terminals of the sense resistors 3 and 4, respectively, and it is possible to suppress the effects of manufacturing variations in the resistance values ​​of the sense resistors 3 and 4.

[0031] On the other hand, the abnormal status detection circuit 10 detects an abnormal status based on the multiple difference voltages ΔV input from the first difference voltage extraction circuit 6, the second difference voltage extraction circuit 7, and the third difference voltage extraction circuit 8. The voltage conversion unit 9 outputs an average voltage obtained by averaging the multiple difference voltages ΔV based on the determination result of the abnormal status detection circuit 10, or selectively outputs the multiple difference voltages ΔV of the first difference voltage extraction circuit 6, the second difference voltage extraction circuit 7, and the third difference voltage extraction circuit 8. The overcurrent detection circuit 11 detects an overcurrent based on the output of the voltage conversion unit 9.

[0032] For example, when the abnormal state detection circuit 10 judges that there is no abnormality, that is, that there is no short abnormality and that the state is normal, it outputs the average voltage of the difference voltage ΔV averaged by the average voltage extraction circuit 9a to the overcurrent detection circuit 11. When in the normal state, the overcurrent detection circuit 11 detects an overcurrent by comparing the average voltage of the input difference voltage ΔV with a predetermined overcurrent threshold value that has been set in advance. In this case, it becomes possible to detect an overcurrent from the average voltage of the difference voltage ΔV, and the detection voltage error can be reduced.

[0033] For example, when the abnormal status detection circuit 10 determines that there is an abnormality in the terminals 15, 16, and 17, the voltage conversion unit 9 outputs the difference voltage ΔV of the difference voltage extraction circuit (e.g., 6, 7) that was determined to be abnormal, and outputs the difference voltage ΔV of the other difference voltage extraction circuits (e.g., 8) to the overcurrent detection circuit 11. The overcurrent detection circuit 11 detects an overcurrent by comparing the input difference voltage ΔV with a preset, predetermined overcurrent threshold value. A specific example of this will be described later.

[0034] A method of determining whether an abnormality exists will be described with reference to Fig. 2. The normal / abnormal judgment table T shown in Fig. 2 is stored in a memory pre-installed in the switching power supply device 100. The memory is configured, for example, with a semiconductor memory and is used as a non-transient physical recording medium. The overcurrent detection circuit 11 and the abnormal status detection circuit 10 are capable of referring to the contents of the normal / abnormal judgment table T shown in Fig. 2, and refer to this normal / abnormal judgment table T to determine whether the state is normal or abnormal.

[0035] The normal / abnormal judgment table T shows the relationship between the power supply voltage VDD, the voltages V1 to V3, and the differential voltage ΔV of each of the voltages V1, V2, and V3 in the normal state, light load state, open state, and short state (short circuit state) between adjacent pins, when the standard value of the differential voltage ΔV is the standard differential voltage ΔVr.

[0036] The normal state refers to a state in which normal power is consumed from the output terminal OUT, and the light load state refers to a state in which the power consumption of the load connected to the output terminal OUT is zero or a predetermined power consumption close to zero. As described above, a case will be described in which the resistance values ​​of the sense resistors 3 and 4 are the same and the voltage division ratios of the resistors 51 and 52, the resistors 53 and 54, and the resistors 55 and 56 are the same.

[0037] <Normal state> In a normal state, the output voltages of the first differential voltage extraction circuit 6 and the second differential voltage extraction circuit 7 are standard differential voltage ΔVr. The standard differential voltage ΔVr here is a differential voltage ΔV corresponding to the standard value of the inter-terminal voltage of the sense resistor 3 or 4. The standard differential voltage ΔVr can be expressed as (standard value of current I flowing through sense resistor 3, 4) × (standard value of voltage V applied to sense resistor 3 or 4).

[0038] As shown in FIG. 2, in the normal state, voltage V3-voltage V1 is -2 times the inter-terminal voltage across sense resistor 3 or 4, so that third difference voltage extraction circuit 8 extracts the difference voltage ΔV as -2×ΔVr.

[0039] An error voltage ΔVerr is generated due to error components in the sense resistors 3 and 4 and error components in the first differential voltage extraction circuit 6 and second differential voltage extraction circuit 7. The average voltage extraction circuit 9a averages the error as well as the differential voltage ΔV, so that an error of 1 / 2 × ΔVerr is superimposed on the average voltage of the differential voltage ΔV.

[0040] <Overcurrent Abnormality in Normal State> As described above, in a normal state, the voltage conversion unit 9 outputs the average voltage of the difference voltage ΔV obtained by the average voltage extraction circuit 9a to the overcurrent detection circuit 11. When the standard voltage ΔVr+1 / 2×ΔVerr reaches the overcurrent threshold, the overcurrent detection circuit 11 outputs an overcurrent detection signal to the outside and to the switching power supply control unit 5. When the switching power supply control unit 5 receives the overcurrent detection signal from the overcurrent detection circuit 11, it outputs an off control voltage to the gate of the switching element SW1.

[0041] The switching power supply control unit 5 turns off the switching element SW1 to stop charging the capacitor 102. Although a form in which charging of the capacitor 102 is stopped is shown here, the switching power supply control unit 5 may stop the power supply from the power supply voltage VDD to the switching element SW1 side.

[0042] <Terminals 15 and 16 are shorted> If terminal 15 and terminal 16 are shorted, as shown in FIG. 2, the first differential voltage extraction circuit 6 sets the differential voltage ΔV to zero, the second differential voltage extraction circuit 7 sets the differential voltage ΔV to a standard differential voltage ΔVr, and the third differential voltage extraction circuit 8 outputs the differential voltage ΔV as a negative standard differential voltage −ΔVr.

[0043] The abnormal status detection circuit 10 compares the output voltage with the normal / abnormal determination table T in Fig. 2. When the abnormal status detection circuit 10 determines that the difference voltage ΔV of the first difference voltage extraction circuit 6 is within a first predetermined range including zero and that the absolute values ​​of the difference voltages ΔV extracted by the second difference voltage extraction circuit 7 and the third difference voltage extraction circuit 8 are within a second predetermined range centered on the normal voltage difference |ΔVr|, it can detect that a short circuit has occurred between the terminals 15 and 16. In this case, the abnormal status detection circuit 10 outputs a short detection signal to the voltage conversion unit 9. The abnormal status detection circuit 10 may output a short detection signal to the overcurrent detection circuit 11 and / or the switching power supply control unit 5.

[0044] When the voltage conversion unit 9 receives a short detection signal from the abnormal status detection circuit 10 indicating that terminals 15 and 16 are shorted, it determines that the voltage across the terminals of the sense resistor 3 is unusable. However, since the voltage across the terminals of the sense resistor 4 is usable, the voltage conversion unit 9 selects and outputs the difference voltage ΔV of the second difference voltage extraction circuit 7 to the overcurrent detection circuit 11.

[0045] The overcurrent detection circuit 11 continues the overcurrent detection process using only the difference voltage ΔV of the second difference voltage extraction circuit 7. The overcurrent detection circuit 11 outputs an overcurrent detection signal to the outside when the difference voltage ΔV of the second difference voltage extraction circuit 7 reaches a predetermined overcurrent threshold. The overcurrent detection circuit 11 can continue the overcurrent detection by using only the voltage of the second difference voltage extraction circuit 7 even if a short circuit abnormality occurs.

[0046] <Terminals 16 and 17 are shorted> When terminal 16 and terminal 17 are shorted, the voltage of differential voltage extraction circuit 6 sets the difference voltage ΔV to standard difference voltage ΔVr, the second difference voltage extraction circuit 7 sets the difference voltage ΔV to zero, and the difference voltage extraction circuit 8 outputs the difference voltage ΔV as a negative standard difference voltage −ΔVr.

[0047] The abnormal status detection circuit 10 refers to the normal / abnormality judgment table T in Fig. 2 and compares it with the above-mentioned voltage. The abnormal status detection circuit 10 judges that the difference voltage ΔV of the second difference voltage extraction circuit 7 is within a first predetermined range including zero, and the absolute values ​​of the difference voltages ΔV extracted by the other first difference voltage extraction circuit 6 and third difference voltage extraction circuit 8 are within a second predetermined range centered on the normal voltage difference |ΔVr|, and can detect that a short circuit has occurred between the terminals 16 and 17. In this case, the abnormal status detection circuit 10 outputs a short detection signal to the voltage conversion unit 9. The abnormal status detection circuit 10 may output a short detection signal to the overcurrent detection circuit 11 and / or the switching power supply control unit 5.

[0048] When the voltage conversion unit 9 receives a short detection signal from the abnormal status detection circuit 10 indicating that terminals 16 and 17 are shorted, it determines that the voltage across the sense resistor 4 is unusable. However, since the voltage across the sense resistor 3 is usable, the voltage conversion unit 9 selects and outputs the difference voltage ΔV of the first difference voltage extraction circuit 6 to the overcurrent detection circuit 11.

[0049] The overcurrent detection circuit 11 continues the overcurrent detection process using only the difference voltage ΔV of the first difference voltage extraction circuit 6. The overcurrent detection circuit 11 outputs an overcurrent detection signal to the outside when the difference voltage ΔV of the first difference voltage extraction circuit 6 reaches a predetermined overcurrent threshold. The overcurrent detection circuit 11 can continue the overcurrent detection using only the voltage of the first difference voltage extraction circuit 6 even if a short circuit abnormality occurs.

[0050] <Summary of this embodiment> As described above, according to this embodiment, the multiple difference voltage extraction circuits 6, 7, and 8 extract three difference voltages ΔV corresponding to the voltages between the terminals 15-16, 16-17, and 17-15 of the multiple sense resistors 3 and 4 connected in series to detect the current flowing through the switching element SW1, and the abnormal state detection circuit 10 determines whether a short circuit abnormality has occurred between the terminals of the multiple sense resistors 3 and 4 based on the three difference voltages ΔV extracted by the multiple difference voltage extraction circuits 6, 7, and 8. This makes it possible to determine whether an abnormality such as a short circuit has occurred based on multiple sensing paths using the multiple sense resistors 3 and 4.

[0051] <Explanation of Comparative Example> An example of the electrical configuration of a comparative example is shown in Fig. 3. The switching power supply device 100a in Fig. 3 does not include an abnormal state detection circuit 10 or a voltage conversion unit 9, and only one system of sense resistor 3 is provided to detect overcurrent. In this case, the first differential voltage extraction circuit 6 extracts the differential voltage ΔV=V1-V2, and detects overcurrent by determining whether this differential voltage ΔV reaches a predetermined overcurrent threshold. In this case, if terminals 15 and 16 are shorted, it is not possible to continue to detect whether an overcurrent is occurring in the sense resistor 3.

[0052] <Summary of this embodiment, part 2> In contrast, according to this embodiment, the voltage conversion unit 9 outputs an average voltage obtained by averaging the differential voltages ΔV based on the result of the abnormal state detection circuit 10, or selectively outputs the differential voltages ΔV of the multiple differential voltage extraction circuits 6, 7, and 8, and the overcurrent detection circuit 11 detects an overcurrent based on the output of the voltage conversion unit 9. Therefore, even if a short circuit abnormality occurs, overcurrent detection can be continued.

[0053] For example, when the abnormal condition detection circuit 10 judges that there is a short circuit abnormality, the voltage conversion unit 9 excludes the difference voltage ΔV of the difference voltage extraction circuit (e.g., 6, 8) that was judged to be the subject of the short circuit abnormality, and selects and outputs the difference voltage ΔV of the other difference voltage extraction circuit (e.g., 7). Then, the overcurrent detection circuit 11 detects an overcurrent by comparing the difference voltage ΔV of the selected and output difference voltage extraction circuit (e.g., 7) with a predetermined overcurrent threshold. This makes it possible to continuously detect whether there is an overcurrent even if there is a short circuit abnormality.

[0054] The voltage conversion unit 9 extracts an average voltage of the differential voltage ΔV by the average voltage extraction circuit 9a according to the extraction results of the multiple differential voltage extraction circuits 6, 7, 8 and the ratio of the resistance values ​​of the multiple sense resistors 3, 4, and outputs it to the overcurrent detection circuit 11. If the abnormal condition detection circuit 10 does not determine that there is a short circuit abnormality, the overcurrent detection circuit 11 detects an overcurrent by comparing the extraction result of the average voltage extraction circuit 9a with a predetermined overcurrent threshold. As a result, since the average voltage of the differential voltage ΔV is compared with the overcurrent threshold, the effects of noise can be eliminated and overcurrent can be detected with high reliability.

[0055] The abnormal status detection circuit 10 can determine that there is a short circuit abnormality between terminals under the condition that the differential voltage ΔV of any of the differential voltage extraction circuits (e.g., 7) extracted by the multiple differential voltage extraction circuits 6, 7, and 8 is within a predetermined range including zero, and the absolute value of the differential voltage ΔV extracted by the other differential voltage extraction circuits (e.g., 6 and 8) is within a predetermined range centered on the normal voltage difference |ΔVr|. Note that the resistors 51, 53, and 55 are not necessary and may be provided as necessary. In addition, since two sensing paths are provided, it is possible to determine a normal state, a light load state, and a short state based on the differential voltage ΔV of the multiple differential voltage extraction circuits 6, 7, and 8. It is preferable to use this circuit in a configuration requiring functional safety redundancy.

[0056] Second embodiment The second embodiment will be described below with reference to Fig. 2 as well as Fig. 4. Fig. 4 shows a schematic diagram of a switching power supply device 200. The switching power supply device 200 is configured by connecting an abnormality detection device 201. In this embodiment, a case will be described in which any one of the terminals 15, 16, and 17 becomes open due to some influence.

[0057] The abnormality detection device 201 of the switching power supply device 200 includes an abnormality detection circuit 210 as a state determination unit instead of the abnormality detection circuit 10. The abnormality detection circuit 210 includes an open detection / open determination function for detecting open abnormalities in the terminals 15, 16, and 17, in addition to the short detection / short determination function described in the first embodiment. The short detection / short determination function will not be described here as it is similar to the above embodiment.

[0058] <Open Abnormal> The abnormal status detection circuit 210 detects an open abnormality in the terminals 15, 16, and 17. When an open abnormality occurs in any of the terminals 15, 16, and 17, the target voltage of the terminal that is open among the voltages V1, V2, and V3 is pulled down to zero V by the resistors 52, 54, and 56. For example, when the terminal 15 experiences an open abnormality, as shown in FIG. 2, the output of the second differential voltage extraction circuit 7 becomes the standard differential voltage ΔVr, but the absolute values ​​of the differential voltages ΔV of the differential voltage extraction circuits 6 and 8 are the same potential, VDD.

[0059] The abnormal status detection circuit 10 determines that an open abnormality has occurred at the terminal on the condition that the difference voltage ΔV between the two difference voltage extraction circuits 6, 8 extracted by the multiple difference voltage extraction circuits 6, 7, 8 falls within a third predetermined voltage range (in this case, a predetermined voltage range centered on the power supply voltage VDD). This makes it possible to determine that an open abnormality has occurred.

[0060] The abnormal status detection circuit 10 outputs an open detection signal indicating that the terminal 15 is an open abnormality to the voltage conversion unit 9. Then, the voltage conversion unit 9 selectively outputs only the difference voltage ΔV of the second difference voltage extraction circuit 7 to the overcurrent detection circuit 11. The overcurrent detection circuit 11 can continue the overcurrent detection using only the difference voltage ΔV of the second difference voltage extraction circuit 7.

[0061] The same applies when an open circuit abnormality occurs at the terminals 16 and 17. For example, when an open circuit abnormality occurs at the terminal 16, the voltage conversion unit 9 selectively outputs the difference voltage ΔV of the third difference voltage extraction circuit 8 to the overcurrent detection circuit 11, and the overcurrent detection circuit 11 can continue the overcurrent detection using only the difference voltage ΔV (standard difference voltage=−2×ΔVr) of the third difference voltage extraction circuit 8.

[0062] Furthermore, for example, if terminal 17 experiences an open abnormality, voltage conversion unit 9 selectively outputs the difference voltage ΔV of first difference voltage extraction circuit 6 to overcurrent detection circuit 11, and the overcurrent detection circuit 11 can continue overcurrent detection using only the difference voltage ΔV (standard difference voltage = ΔVr) of the first difference voltage extraction circuit 6.

[0063] As in the first embodiment, resistors 51, 53, and 55 may be omitted. Also, sense resistors 3 and 4 do not need to have the same resistance value, and in that case, a voltage difference proportional to the resistance value may be applied. This provides the same effects as the previous embodiment, and also makes it possible to determine that an open circuit has occurred, and to continue overcurrent detection even if an open circuit has occurred.

[0064] Third embodiment The third embodiment will be described below with reference to Fig. 5 and Fig. 2. Fig. 5 shows a switching power supply device 300. The switching power supply device 300 is configured by connecting an abnormality detection device 301. The abnormality detection device 301 of the switching power supply device 300 has an abnormality detection circuit 310 as a state determination unit instead of the abnormality detection circuit 10. The abnormality detection circuit 310 has a function of determining a light load state and a function of determining other abnormal states in addition to the short detection / short circuit determination function and the open detection / open circuit determination function described in the second embodiment. The short detection / short circuit determination function and the open detection / open circuit determination function will not be described as they are the same as those of the previous embodiments.

[0065] <Light load condition> The abnormal status detection circuit 310 judges a light load state. When the power consumption of the load is small, the output voltage of the output terminal OUT does not decrease, and therefore the switching power supply control unit 5 does not control the on / off of the switching elements SW1 and SW2. In the case of a light load, the differential voltages ΔV of the multiple difference voltage extraction circuits 6, 7, and 8 are each very small and include zero. The abnormal status detection circuit 10 outputs a light load detection signal that indicates that the load on the switching power supply device 300 is a light load.

[0066] When the load is light, zero or a small value is stored in the normal / abnormal judgment table T. When the load is light, the first differential voltage extraction circuit 6, the second differential voltage extraction circuit 7, and the third differential voltage extraction circuit 8 all output a differential voltage ΔV that is approximately close to zero.

[0067] The abnormal status detection circuit 310 refers to the normal / abnormality judgment table T and compares the difference voltages ΔV of the first difference voltage extraction circuit 6, the second difference voltage extraction circuit 7, and the third difference voltage extraction circuit 8. The abnormal status detection circuit 10 judges the state to be a light load state if all of the difference voltages ΔV of the first difference voltage extraction circuit 6, the second difference voltage extraction circuit 7, and the third difference voltage extraction circuit 8 are lower than a predetermined value.

[0068] At this time, the abnormal status detection circuit 10 outputs a light load detection signal indicating a light load state to the voltage conversion unit 9. This enables the abnormal status detection circuit 10 to determine that the load is light. When the voltage conversion unit 9 outputs the average voltage of the difference voltage ΔV extracted by the average voltage extraction circuit 9a, the overcurrent detection circuit 11 can detect an overcurrent by comparing this average voltage with a predetermined overcurrent threshold.

[0069] <Other abnormal conditions> Normally, when the resistance values ​​of the sense resistors 3 and 4 are set to the same value, if the resistance values ​​of the sense resistors 3 and 4 become significantly different due to some influence (such as aging), the voltages of the differential voltage extraction circuits 6 and 7 will be significantly different from the normal resistance ratio. For this reason, it is preferable that the abnormal status detection circuit 10 judges the resistance value of the resistors to be abnormal if the differential voltage ΔV of at least one of the multiple differential voltage extraction circuits 6, 7, and 8 deviates from the fourth predetermined voltage. In this case, the abnormal status detection circuit 10 outputs an abnormal status detection signal indicating an other abnormal state to the voltage conversion unit 9. This makes it possible to judge the resistance abnormality. If the voltage conversion unit 9 inputs an other abnormal state, it stops processing as necessary.

[0070] The other features are the same as those of the previous embodiment, and therefore the description will be omitted. In this embodiment, the same effects as those of the previous embodiment can be obtained, and a light load state and other abnormal states can be detected.

[0071] (Fourth embodiment) The fourth embodiment will be described below with reference to Fig. 6 and Fig. 2. Fig. 6 shows a switching power supply device 400. The switching power supply device 400 is configured by connecting an abnormality detection device 401. The abnormality detection device 401 of the switching power supply device 400 includes a differential voltage extraction circuit 406 instead of the first differential voltage extraction circuit 6, the second differential voltage extraction circuit 7, and the third differential voltage extraction circuit 8 provided in the switching power supply device 300 of the third embodiment, and also includes a switching signal generation circuit 61, a terminal changeover switch circuit 62 as a switch section, and a time-division data synthesis circuit 63.

[0072] The terminal changeover switch circuit 62 switches between differential voltages ΔV (=V1-V2, V2-V3, V3-V1) corresponding to the voltages Va-Vb, Vb-Vc, and Vc-Va between the terminals of the plurality of sense resistors 3 and 4, and outputs a plurality of differential voltages ΔV in a time-division manner. As a specific example, the terminal changeover switch circuit 62 receives voltages V1, V2, and V3 divided by the resistors 51 to 56, selects two of the voltages V1, V2, and V3, and outputs them to the differential voltage extraction circuit 6. At this time, the terminal changeover switch circuit 62 switches between voltages V1 and V2, voltages V2 and V3, and voltages V3 and V1 in a time-division manner based on a switching signal input from the switching signal generation circuit 61, and repeatedly outputs them in sequence.

[0073] The differential voltage extraction circuit 6 extracts a differential voltage ΔV between the two input voltages and outputs it to the time-division data synthesis circuit 63. For this reason, the differential voltage extraction circuit 6 repeatedly extracts a plurality of differential voltages ΔV (=V1-V2, V2-V3, V3-V1) in sequence and outputs them to the time-division data synthesis circuit 63.

[0074] The time-division data synthesis circuit 63 synthesizes and outputs a plurality of differential voltages ΔV which are time-divisionally and serially input, based on the switching signal input from the switching signal generation circuit 61. Specifically, the time-division data synthesis circuit 63 converts the inputted plurality of differential voltages ΔV into serial-parallel data, and outputs the data to the voltage conversion unit 9 and the abnormal state detection circuit 310.

[0075] The abnormal status detection circuit 310 judges whether an abnormality has occurred at the terminals of the multiple sense resistors 3, 4 based on the multiple difference voltages ΔV switched and output by the terminal changeover switch circuit 62 and extracted in a time-division manner by the difference voltage extraction circuit 406. The abnormal status detection circuit 310 judges whether a normal state, a short state, an open state, a light load state, or another abnormal state based on the multiple difference voltages ΔV input thereto, and outputs a detection signal indicative of this state to the voltage conversion unit 9 and to the outside.

[0076] The voltage conversion unit 9 receives a plurality of differential voltages ΔV in parallel from the time-division data synthesis circuit 63. The input differential voltages ΔV are V1-V2, V2-V3, and V3-V1. The voltage conversion unit 9 includes an average voltage extraction circuit 9a as an average voltage extraction unit. The average voltage extraction circuit 9a averages the input differential voltages ΔV in the same manner as in the above-described embodiment.

[0077] Based on the state detection signal input from the abnormal state detection circuit 310, the voltage conversion unit 9 outputs either the average voltage of the average voltage extraction circuit 9a or selects and outputs the difference voltage ΔV. When it is determined that the state is normal and the load is light, the voltage conversion unit 9 outputs the average voltage of the average voltage extraction circuit 9a. The overcurrent detection circuit 11 can detect an overcurrent from this average voltage. This makes it possible to minimize the effects of manufacturing variations in the resistance values ​​of the sense resistors 3 and 4.

[0078] On the other hand, when there is a short circuit between the terminals 15, 16, and 17, when one of the terminals is open, or when there is another abnormality, the voltage conversion unit 9 refers to the normal / abnormality judgment table T and selects and outputs the required differential voltage ΔV. This selection and output method is similar to the methods described in the above-mentioned embodiments, and therefore will not be described here. In this way, even if the differential voltage ΔV is obtained in a time-division manner, the same effects as those of the above-mentioned embodiments can be obtained.

[0079] Fifth embodiment The fifth embodiment will be described below with reference to Fig. 7. Fig. 7 shows a control device 500 for a switching element SW1 as a load control device. The control device 500 includes a switching control unit 505. The switching control unit 505 applies a gate voltage VG between the gate and source of the switching element SW1 through a terminal 18 to drive and control the switching element SW1. An abnormality detection device 301 including sense resistors 3 and 4 is connected to the control device 500.

[0080] 7 is configured with an n-channel MOS transistor, and its size is smaller than that of the switching element SW1. The sense MOS_SWs is disposed in the vicinity of the switching element SW1.

[0081] A series connection circuit of the drain-source of the sense MOS_SWs and the sense resistors 3 and 4 is connected in parallel to the drain-source of the switching element SW1. Therefore, a minute current proportional to the drain current of the switching element SW1 flows through the sense MOS_SWs and the sense resistors 3 and 4. Since a minute current proportional to the drain current of the switching element SW1 flows through the sense resistors 3 and 4, they function as sense elements for the current flowing between the drain and source of the switching element SW1.

[0082] As explained in the third embodiment, the abnormality detection device 301 includes an abnormal status detection circuit 310. Although detailed explanations are omitted since they have been explained in the previous embodiments, the abnormal status detection circuit 310 can determine the status of the terminals 15, 16, and 17 to which the sense resistors 3 and 4 are connected, a normal state, a short abnormality between the terminals, an open abnormality of the terminals, a light load state, and other abnormal states. Therefore, even if the control method of the switching element SW1 is changed as in this embodiment, the same effects as those of the previous embodiments can be obtained.

[0083] Sixth embodiment Hereinafter, the sixth embodiment will be described with reference to Fig. 8. As shown in Fig. 8, an IGBT element SW1a may be applied as a load in place of the switching element SW1. IGBT stands for Insulated Gate Bipolar Transistor.

[0084] 8 shows a control device 600 for the IGBT element SW1a as a load control device. The control device 600 includes a switching control unit 505. The switching control unit 505 applies a gate voltage VG between the gate and emitter of the IGBT element SW1a through a terminal 18 to drive and control the IGBT element SW1a. An abnormality detection device 301 including sense resistors 3 and 4 is connected to the control device 600.

[0085] The IGBT element SW1a is provided with an emitter terminal E through which a large current flows, and a sense emitter terminal SE that outputs a minute sense current. The current flowing through the sense emitter terminal SE varies depending on the current flowing through the emitter terminal E. The sense emitter terminal SE is connected so that its output current flows through sense resistors 3 and 4. Because a current that depends on the current through the emitter terminal E of the IGBT element SW1a flows through the sense resistors 3 and 4, they function as sense elements for the emitter current of the IGBT element SW1a.

[0086] As explained in the third embodiment, the abnormality detection device 301 includes an abnormal state detection circuit 310. Although detailed explanations are omitted since they have been explained in the previous embodiments, the abnormal state detection circuit 310 can determine the states of the terminals 15, 16, and 17 to which the sense resistors 3 and 4 are connected, a normal state, a short abnormality between the terminals, an open abnormality of the terminals, a light load state, and other abnormal states. Therefore, even if the abnormal state detection circuit 310 is applied to the control of the IGBT element SW1a as in this embodiment, the same effects as those of the previous embodiments can be obtained.

[0087] Seventh embodiment The seventh embodiment will be described below with reference to Fig. 9. Fig. 9 shows the configuration of a switching power supply integrated circuit IC300. The switching power supply integrated circuit IC300 has the configurations of the switching power supply device 300 and the abnormality detection device 301 described in the third embodiment.

[0088] The switching power supply integrated circuit IC300 also includes an IC control unit 103. The IC control unit 103 is configured with a hardware logic circuit, and is configured as a controller for the switching power supply integrated circuit IC300. The IC control unit 103 is connected to an external microcomputer 105.

[0089] The microcomputer 105 is a microcomputer or microcontroller, and is connected so as to be able to receive an overcurrent detection signal from the overcurrent detection circuit 11 of the abnormality detection device 301. The microcomputer 105 is also connected so as to be able to receive a short detection signal indicating that a short has occurred between terminals, an open detection signal indicating that a terminal has opened, a light load detection signal indicating a light load state, and other abnormality detection signals indicating other abnormal states, from the abnormal state detection circuit 310 of the abnormality detection device 301.

[0090] When the microcontroller 105 inputs an overcurrent detection signal, a short detection signal, an open detection signal, a light load detection signal, and / or other abnormality detection signals from the switching power supply integrated circuit IC300, the microcontroller 105 determines whether to stop operation or to perform a state transition depending on these conditions, and outputs a power supply control signal according to this determined situation to the IC control unit 103.

[0091] For example, even if the microcomputer 105 receives a short detection signal, if the microcomputer 105 does not receive an overcurrent detection signal, it determines to perform a state transition and outputs a power supply control signal for the state transition to the IC control unit 103. The IC control unit 103 issues a warning by outputting a state transition signal to which the short detection signal has been input to the switching power supply control unit 5. The switching power supply control unit 5 can continue control according to this state transition. Furthermore, when the switching power supply control unit 5 receives an overcurrent detection signal from the overcurrent detection circuit 11, it can immediately stop the operation by turning off the switching elements SW1 and SW2.

[0092] For example, when the microcomputer 105 receives an overcurrent detection signal together with a short circuit detection signal from the switching power supply integrated circuit IC300, it determines that the power output of the switching power supply integrated circuit IC300 should be stopped, and outputs an operation stop command as a power supply control signal to the IC control unit 103. In this case, the IC control unit 103 outputs an operation stop command to the switching power supply control unit 5 to turn off both switching elements SW1 and SW2 to stop operation, or controls to cut off the power supply voltage VDD. This ensures safety.

[0093] (Other embodiments) The present invention is not limited to the above-described embodiment, and may be modified or expanded as follows: In the above-described embodiment, three differential voltages ΔV are extracted to determine whether an abnormality has occurred, but two differential voltages ΔV may be extracted to determine whether an abnormality has occurred, or four or more differential voltages ΔV may be extracted to determine whether an abnormality has occurred. Although the embodiment in which two sense resistors 3, 4 are connected in series has been described, the present invention is not limited to this, and a configuration in which three or more sense resistors are connected in series may also be applied. If three or more sense resistors 3, 4 are connected in series, the amount of information on the differential voltage ΔV corresponding to the voltage between those terminals becomes greater than when there are only two sense resistors, making it possible to determine the abnormal state in more detail.

[0094] The techniques described in the present disclosure may be implemented by a special purpose computer provided by configuring a processor and memory programmed to perform one or more functions embodied in a computer program. Alternatively, the techniques described in the present disclosure may be implemented by a special purpose computer provided by configuring a processor with one or more dedicated hardware logic circuits. Alternatively, the techniques described in the present disclosure may be implemented by one or more special purpose computers configured by a combination of a processor and memory programmed to perform one or more functions and a processor configured with one or more hardware logic circuits. Also, the computer program may be stored in a computer-readable non-transitory tangible recording medium as instructions executed by the computer.

[0095] Although the present disclosure has been described based on the above-mentioned embodiment, it is understood that the present disclosure is not limited to the embodiment or the structure described in the embodiment. The present disclosure also includes various modifications and modifications within the equivalent range. In addition, various combinations and forms, and other combinations and forms including only one element, more than one element, or less than one element, are also within the scope and concept of the present disclosure. [Explanation of symbols]

[0096] In the drawings, 1, 201, 301, 401 indicate abnormality detection devices, 3 and 4 indicate sense resistors (resistors), 6 to 8, 406 indicate differential voltage extraction circuits (differential voltage extraction sections), 10 indicates an abnormal state detection circuit (state determination section), 11 indicates an overcurrent detection circuit (overcurrent detection section), 15, 16, 17 indicate terminals, 62 indicates a terminal changeover switch circuit (switch section), 100, 200, 300, 400 indicate switching power supply devices (load control devices), 500 indicates a control device for a switching element (load control device), 600 indicates a control device for an IGBT element (load control device), SW1 indicates a switching element (load), and SW1a indicates an IGBT element (load).

Claims

1. a differential voltage extraction unit (6, 7, 8; 406) for extracting a plurality of differential voltages (ΔV) corresponding to voltages between terminals of a plurality of resistors (3, 4) connected in series to detect a current flowing through a load; a state determination unit (10) that determines whether an abnormality has occurred in the terminals of the plurality of resistors based on the plurality of differential voltages extracted by the differential voltage extraction unit; An abnormality detection device comprising:

2. a voltage conversion unit (9) that outputs an average voltage obtained by averaging the plurality of difference voltages based on a determination result of the state determination unit, or that selectively outputs the plurality of difference voltages of the difference voltage extraction unit; an overcurrent detection unit (11) that detects an overcurrent based on an output of the voltage conversion unit; The abnormality detection device according to claim 1 .

3. When the state determination unit determines that a short circuit abnormality has occurred, the voltage conversion unit selects and outputs the other differential voltages, excluding the differential voltage that is the subject of the determination of a short circuit abnormality; 3. The abnormality detection device according to claim 2, wherein the overcurrent detection unit detects an overcurrent by comparing the selected and outputted differential voltage with a predetermined overcurrent threshold.

4. the voltage conversion unit includes an average voltage extraction unit (9 a) that extracts an average voltage of the plurality of difference voltages in accordance with an extraction result of the difference voltage extraction unit and a ratio of resistance values ​​of the plurality of resistors; 3. The abnormality detection device according to claim 2, wherein if the state determination unit does not determine that a short circuit abnormality exists, the overcurrent detection unit (11) detects an overcurrent by comparing the extraction result of the average voltage extraction unit with a predetermined overcurrent threshold.

5. 2. The abnormality detection device according to claim 1, wherein the state determination unit determines that a short circuit abnormality exists between the terminals when any of the at least three or more differential voltages extracted by the differential voltage extraction unit falls within a first predetermined range including zero, and the absolute values ​​of the other differential voltages fall within a second predetermined range centered on a normal voltage difference.

6. 2. The abnormality detection device according to claim 1, wherein the state determination unit determines that an open terminal abnormality has occurred on the condition that the two differential voltages extracted by the differential voltage extraction unit are within a third predetermined voltage range.

7. 2. The abnormality detection device according to claim 1, wherein the state determination unit determines that the load is light if all of the at least three or more differential voltages extracted by the differential voltage extraction unit are lower than a predetermined value.

8. 2. The abnormality detection device according to claim 1, wherein the state determination unit determines that the resistance value of the resistor is abnormal if at least one differential voltage extracted by the differential voltage extraction unit deviates from a fourth predetermined voltage.

9. a switch unit (62) that switches the differential voltage according to the voltages between the terminals of the plurality of resistors and switches and outputs a plurality of differential voltages in a time division manner; 3. The abnormality detection device according to claim 1, wherein the state determination unit determines whether an abnormality has occurred at the terminals of the plurality of resistors based on a plurality of differential voltages switched and output by the switch unit and extracted in a time-division manner by the differential voltage extraction unit (406).

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