Display device

Abstract

To provide a light-emitting display device that can improve an opening ratio of a pixel including a thin film transistor formed of an oxide semiconductor.SOLUTION: A display device includes a plurality of pixels each including a thin film transistor and a light-emitting element. The pixel is electrically connected to a first wire functioning as a scan line. The thin film transistor includes an oxide semiconductor layer provided on the first wire with a gate insulating film interposed therebetween. The oxide semiconductor layer is provided protruding over a region where the first wire is provided, and the light-emitting element and the oxide semiconductor layer are provided overlapping each other.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present invention relates to a light-emitting display device and to an electronic device equipped with the light-emitting display device. [Background technology]

[0002] As typified by liquid crystal display devices, thin film transistors formed on flat plates such as glass substrates They are made of amorphous silicon and polycrystalline silicon. Thin-film transistors using GaN have low field-effect mobility, but they are suitable for enlarging the area of ​​glass substrates. On the other hand, thin-film transistors using crystalline silicon have high field-effect mobility. However, a crystallization process such as laser annealing is required, and it is essential to enlarge the area of ​​the glass substrate. It has the characteristic that it is not adapted to

[0003] In response to this, thin-film transistors are being fabricated using oxide semiconductors, and they are being used in electronic devices and optical devices. For example, zinc oxide and In-GaAs films are used as oxide semiconductors. Thin-film transistors are fabricated using a-Zn-O oxide semiconductors, and used as switches for light-emitting display devices. Patent Document 1 discloses a technique for use in a switching element and the like. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] JP 2009-31750 A Summary of the Invention [Problem to be solved by the invention]

[0005] Thin-film transistors that use oxide semiconductors for the channel region are similar to those that use amorphous silicon for the channel region. The field effect mobility is higher than that of a thin film transistor using a GaN-based GaN thin film transistor in the panel region. A pixel having a thin film transistor formed using such an oxide semiconductor is used as an EL display. It is expected that this technology will be applied to light-emitting display devices such as 3D displays and 4k2k displays. In light-emitting display devices with added value such as B, the area per pixel becomes smaller. While this is expected, a light emitting display device having pixels with an improved aperture ratio is desired.

[0006] Therefore, the present invention provides a pixel having a thin film transistor using an oxide semiconductor. An object of the present invention is to provide a light-emitting display device that can improve the brightness. [Means for solving the problem]

[0007] One embodiment of the present invention includes a plurality of pixels each having a thin film transistor and a light-emitting element. The thin film transistor is electrically connected to a first wiring functioning as a scan line. The oxide semiconductor layer is provided on the wiring of the first embodiment via a gate insulating film. The light-emitting element and the oxide semiconductor layer and a light emitting display device in which the light emitting element and the light emitting device are provided so as to overlap each other.

[0008] One embodiment of the present invention includes a plurality of pixels each having a thin film transistor and a light-emitting element. , electrically connected to a first wiring functioning as a scanning line and a second wiring functioning as a signal line The thin film transistor is formed on an oxide film provided on the first wiring via a gate insulating film. The oxide semiconductor layer is provided so as to extend beyond a region in which the first wiring is provided. The second wiring extends on the gate insulating film on the first wiring and is connected to the oxide semiconductor layer. The light-emitting display device has a light-emitting element and an oxide semiconductor layer overlapping each other.

[0009] One embodiment of the present invention includes a plurality of pixels each having a thin film transistor and a light-emitting element. , electrically connected to a first wiring functioning as a scanning line and a second wiring functioning as a signal line The thin film transistor is formed on an oxide film provided on the first wiring via a gate insulating film. The oxide semiconductor layer is provided so as to extend beyond a region in which the first wiring is provided. The second wiring is formed on the gate insulating film on the first wiring and on the interlayer insulating layer on the gate insulating film. The light emitting element and the oxide semiconductor layer are overlapped with each other. It is a light-emitting display device.

[0010] One embodiment of the present invention is a light-emitting element including a first thin film transistor, a second thin film transistor, and a light-emitting element. The pixel has a first wiring functioning as a scanning line and a second wiring functioning as a signal line. The first thin film transistor is electrically connected to a second wiring that functions as a first wiring. an oxide semiconductor layer provided on the first gate electrode via a gate insulating film; The second wiring is provided beyond the region where the line is provided, and the second wiring is a gate insulating layer on the first wiring. A first thin film transistor extends on the insulating film and contacts the oxide semiconductor layer. The third wiring for electrically connecting the first thin film transistor and the second thin film transistor is The light emitting element and the oxide semiconductor layer are overlapped on the gate insulating film on the wiring. This is a light-emitting display device that is folded.

[0011] One embodiment of the present invention includes a plurality of pixels each having a thin film transistor and a light-emitting element. , electrically connected to a first wiring functioning as a scanning line and a second wiring functioning as a signal line The thin film transistor is formed on an oxide film provided on the first wiring via a gate insulating film. The oxide semiconductor layer is provided so as to extend beyond a region in which the first wiring is provided. The second wiring is formed on the gate insulating film on the first wiring and on the interlayer insulating layer on the gate insulating film. The first thin-film transistor is formed on the oxide semiconductor layer. The third wiring for electrically connecting the first thin film transistor to the second thin film transistor is formed on the first wiring. the gate insulating film and the interlayer insulating layer on the gate insulating film, and an oxide semiconductor layer are provided so as to overlap each other. Effect of the Invention

[0012] When manufacturing a pixel having a thin film transistor using an oxide semiconductor, it is necessary to improve the aperture ratio. Therefore, a light emitting display device having a high-definition display portion can be provided. [Brief description of the drawings]

[0013] [Figure 1] 1A and 1B are a top view and a cross-sectional view illustrating a light-emitting display device. [Diagram 2] 1 is a cross-sectional view illustrating a light-emitting display device. [Diagram 3] FIG. 2 is a top view illustrating a light-emitting display device. [Figure 4] 1A and 1B are a top view and a cross-sectional view illustrating a light-emitting display device. [Diagram 5] FIG. 2 is a top view illustrating a light-emitting display device. [Figure 6] 1A and 1B are a top view and a cross-sectional view illustrating a light-emitting display device. [Figure 7] FIG. 1 is a circuit diagram illustrating a light-emitting display device. [Figure 8] FIG. 1 is a circuit diagram illustrating a light-emitting display device. [Figure 9] 1 is a cross-sectional view illustrating a light-emitting display device. [Figure 10] 1A to 1C are diagrams illustrating electronic devices. [Figure 11] 1A to 1C are diagrams illustrating electronic devices. [Figure 12] 1A and 1B are a top view and a cross-sectional view illustrating a light-emitting display device. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0014] The present invention will be described in detail with reference to the accompanying drawings. The present invention is not limited to the above, and various modifications and variations in form and detail are possible without departing from the spirit and scope of the present invention. It will be readily understood by those skilled in the art that the present invention can be modified in the following manner. The present invention is not limited to the above-described embodiment. In the structure, the same parts or parts having similar functions are designated by the same reference numerals in different drawings. and the repeated explanation will be omitted.

[0015] In each figure described in this specification, the size, layer thickness, or area of ​​each component is not clearly indicated. The figures may be exaggerated for illustrative purposes and are not necessarily limited to scale.

[0016] In this specification, the terms "first", "second", "third", etc. are used in order to avoid confusion of components. The number is not limited to the number of the first one. For example, "first one" can be changed to " The terms "second" or "third" can be used interchangeably to explain the present invention.

[0017] (Embodiment 1) In this embodiment, as an example, a thin film transistor (hereinafter, also referred to as a TFT) and the T A pixel having a light-emitting element connected to an FT will be shown and a light-emitting display device will be described. A pixel refers to an element provided in each pixel of a display device, such as a thin film transistor, a light emitting element, A group of elements that are composed of elements for controlling the display by electrical signals such as wiring. The pixel may include a color filter, etc., and each pixel may It may be one color element whose brightness can be controlled. In the case of a color display device consisting of a R pixel, a G pixel, and a B pixel, the smallest unit of an image is It is composed of three pixels, and an image can be obtained by using multiple pixels. become.

[0018] The light-emitting element has a structure in which a light-emitting layer is provided between a pair of electrodes (anode and cathode). In this specification, one electrode of the light-emitting element is shown in FIG. When referring to the inside, it is sometimes called a light-emitting element.

[0019] In addition, when it is stated that A and B are connected, it means that A and B are electrically connected. This includes the cases where A and B are directly connected, and the cases where A and B are directly connected. Specifically, the object is a transistor or other switch. A and B are connected via a switching element, and when the switching element is turned on, A and When A and B are approximately at the same potential, or when A and B are connected via a resistor element, When the potential difference between the terminals A and B is small enough not to affect the operation of the circuit including A and B, When considering the circuit operation, it is acceptable to consider the part between A and B as the same node. This represents the case where the

[0020] FIG. 1(A) shows a top view of a pixel. Note that the structure of the TFT shown in FIG. 1(A) is a bottom gate type. The gate structure is on the opposite side of the oxide semiconductor layer that is the channel region from the gate wiring. The so-called inverted staggered type has wiring layers that become the source and drain electrodes of the TFT on the side of the substrate. The configuration of is shown.

[0021] The pixel 100 shown in FIG. 1A includes a first wiring 101A functioning as a scan line, a second wiring 101B functioning as a signal line, and a third wiring 101C functioning as a second wiring. The second wiring 102A, the first oxide semiconductor layer 103A, and the second oxide semiconductor layer 103B, a power line 104A, a capacitance electrode 101B, and a light-emitting element 105. The pixel 100 shown in FIG. 1 is electrically connected to the first oxide semiconductor layer 103A and the capacitance electrode 101B. A third wiring 102B for connection is provided, and a first thin film transistor 107A is provided. The pixel 100 shown in FIG. 1A includes a second oxide semiconductor layer 103B and a light-emitting element 10 5, and a fourth wiring 104B for electrically connecting the second thin film transistor 10 7B is configured.

[0022] A first wiring 101A, a second wiring 102A, a third wiring 102B, a fourth wiring 104B, A first oxide semiconductor layer 103A, a second oxide semiconductor layer 103B, a power supply line 104A, and A partition wall 106 for separating the light emitting elements into pixels is provided on the capacitance electrode 101B. The light emitting element 105 connected to the fourth wiring 104B is provided on the inner side of the partition wall 106. This results in:

[0023] The first wiring 101A also functions as the gate of the first thin film transistor 107A. The capacitance electrode 101B is connected to the gate of the second thin film transistor 107B and to one of the capacitance elements. The second wiring 102A also functions as an electrode of the first thin film transistor. This is also a wiring that functions as one of the source electrode or drain electrode of 107A. The line 102B is connected to the other of the source electrode or the drain electrode of the first thin film transistor 107A. The power supply line 104A also functions as a source of the second thin film transistor 107B. The wiring that functions as one of the source electrode or drain electrode and the other electrode of the capacitor element may also be The fourth wiring 104B is connected to the source electrode or drain of the second thin film transistor 107B. It also functions as the other of the in-electrodes.

[0024] The first wiring 101A and the capacitance electrode 101B are provided from the same layer, and the second wiring 102 A, a third wiring 102B, a power supply line 104A, and a fourth wiring 104B are provided from the same layer. The power supply line 104A and the capacitance electrode 101B are provided so as to overlap each other. This forms a storage capacitor for the thin film transistor 107B.

[0025] The first oxide semiconductor layer 103A of the first thin film transistor 107A is The first oxide semiconductor layer is provided on the wiring 101A via a gate insulating film (not shown). The conductor layer 103A is provided in a region where the first wiring 101A is provided and extends beyond the partition wall 106. It is being done.

[0026] Note that A protrudes from B when looking at the top view of the stacked A and B. This means that the ends of A and B do not coincide, and A extends outward beyond the end of B.

[0027] In addition to the first thin film transistor 107A and the second thin film transistor 107B, The first thin film transistor 107A may be a thin film transistor. The pixel having the first thin film transistor 107A is selected. The second thin film transistor 107B is also called a selection transistor. The transistor 107B has a function of controlling the current flowing to the light emitting element 105 of the pixel. , also called a drive transistor.

[0028] FIG. 1(B) shows the cross sections between dashed lines A-A', B-B', and C-C' in FIG. 1(A). In the cross-sectional structure shown in FIG. 1B, a base film 111 is formed on a substrate 111. A first wiring 101A, which is a gate, and a capacitance electrode 101B are provided via 12. A gate insulating film 113 is provided so as to cover the first wiring 101A and the capacitance electrode 101B. On the gate insulating film 113, a first oxide semiconductor layer 103A, a second oxide semiconductor layer 103B, and a A conductor layer 103B is provided on the first oxide semiconductor layer 103A. 102A, a third wiring 102B, and a power supply line 104A on the second oxide semiconductor layer 103B. A fourth wiring 104B is provided. The compound semiconductor layer 103B, the second wiring 102A, the third wiring 102B, the power supply line 104A, and An oxide insulating layer 114 functioning as a passivation film is formed on the fourth wiring 104B. A first wiring 101A, a second wiring 102A, a third wiring 102B, a fourth wiring 102B, The wiring 104B, the first oxide semiconductor layer 103A, the second oxide semiconductor layer 103B, the power supply A partition wall 106 is provided on the oxide insulating layer 114 on the line 104A and the capacitance electrode 101B. An opening is formed in the oxide insulating layer 114 on the fourth wiring 104B. In the opening, the electrode of the light emitting element 105 is connected to the fourth wiring 104B. In the dashed line BB′, the third wiring 102B and the capacitance electrode 101B are The connection is made through an opening formed in 113.

[0029] The pixels shown in FIGS. 1A and 1B are a plurality of pixels 701 on a substrate 700 shown in FIG. In FIG. 7, the pixel section 7 is arranged on the substrate 700. 7, a scanning line driver circuit 702, and a signal line driver circuit 704 are shown. The pixel 701 is supplied with a first wiring 101A connected to a scanning line driving circuit 703. The scanning signal determines whether each row is selected or not. The pixel 701 selected by the signal is connected to the second wiring 704. 102A supplies the video voltage (also called image signal, video signal, or video data) In addition, the pixel 701 is connected to a power supply circuit 705 provided outside the substrate 700. The power supply line 104A is connected to a power supply line 104B.

[0030] In FIG. 7, a scanning line driver circuit 703 and a signal line driver circuit 704 are provided on a substrate 700. However, either the scanning line driver circuit 703 or the signal line driver circuit 704 is The pixel portion 702 may be provided on the substrate 700. Alternatively, only the pixel portion 702 may be provided on the substrate 700. In FIG. 7, the power supply circuit 705 is provided outside the substrate 700. However, a configuration in which the semiconductor device is provided on the substrate 700 may also be used.

[0031] In FIG. 7, a pixel section 702 has a plurality of pixels 701 arranged in a matrix (striped arrangement). It should be noted that the pixels 701 do not necessarily need to be arranged in a matrix. For example, the pixels 701 may be arranged in a delta arrangement or a Bayer arrangement. The display method in the element 702 is either the progressive method or the interlace method. In addition, the color elements controlled by pixels when displaying colors are RGB ( R is red, G is green, B is blue) and may be more than three colors, for example, RGBW ( W is white), or RGB plus one or more colors such as yellow, cyan, or magenta The size of the display area may be different for each dot of the color element.

[0032] In FIG. 7, a first wiring 101A, a second wiring 102A, and a power supply line 104A are The numbers are shown according to the row and column directions. 2A and the power supply line 104A are connected to the sub-pixels (also called sub-pixels or sub-pixels) that constitute the pixel. The number of lines may be increased depending on the number of the transistors in the pixel. The first wiring 101A, the second wiring 102A, and the power supply line 104A are shared between the pixels. The element 701 may be driven.

[0033] In FIG. 1A, the shape of the TFT is shown as being rectangular in the second wiring 102A. However, the shape of the third wiring 102B is such that it surrounds the third wiring 102B (specifically, U-shaped or C-shaped), A configuration may be adopted in which the area of ​​the region through which carriers move is increased to increase the amount of current that flows.

[0034] The width of the first wiring 101A other than the region that will become the first thin film transistor 107A is By making the width of the first wiring smaller, the pixel It is possible to improve the aperture ratio.

[0035] The aperture ratio indicates the area through which light passes per unit area. When the area occupied by the non-transmitting material becomes larger, the aperture ratio decreases and the area occupied by the transmitting material becomes larger. The larger the area occupied by the partition wall, the higher the aperture ratio. To prevent wiring or the like that does not transmit light from overlapping an area occupied by the light emitting element to be provided; By reducing the size of the thin film transistor, the aperture ratio is improved.

[0036] A thin film transistor is a transistor that has at least three elements including a gate, a drain, and a source. An element having terminals, and a channel region between a drain region and a source region, A current can be passed through the drain region, the channel region, and the source region. The source and drain are different depending on the transistor structure and operating conditions, so which one is It is difficult to determine whether the source or drain is the source or drain. The region that functions as a gate may not be called a source or drain. For example, they may be written as the first terminal and the second terminal, respectively. These may be referred to as the first electrode and the second electrode, or as the first region and the second region. There are cases.

[0037] Next, the method for fabricating a pixel will be described based on the top view and cross-sectional view shown in Figure 1(A) and (B). 2 will be used to explain.

[0038] First, a glass substrate can be used as the light-transmitting substrate 111. Preventing diffusion of impurities from the substrate 111 or providing close contact with each element provided on the substrate 111 In order to improve the performance, a base film 112 is provided. There is no need to provide a

[0039] Next, a conductive layer is formed on the entire surface of the substrate 111, and then a first photolithography process is performed. A resist mask is formed, and unnecessary portions are removed by etching to form the first wiring 101A. At this time, at least the first wiring 101A and the capacitance electrode 101B are formed. Etch the end of 01B to make it tapered.

[0040] The first wiring 101A and the capacitance electrode 101B are made of aluminum (Al), copper (Cu), etc. It is preferable to use a low-resistance conductive material, but aluminum alone has poor heat resistance and is susceptible to corrosion. Heat-resistant conductive material is used in combination with the material to prevent problems such as the material being easily damaged. The materials are titanium (Ti), tantalum (Ta), tungsten (W), molybdenum (M o), chromium (Cr), neodymium (Nd), scandium (Sc), or or an alloy containing the above elements, or a combination of the above elements, or It is formed of a nitride containing the above elements.

[0041] In addition, the wiring that constitutes the TFT can be formed using an inkjet or printing method. These allow fabrication at room temperature, in low vacuum, or on large substrates. Since it can be manufactured without using a photomask, the transistor layout can be It is easy to change. Furthermore, since there is no need to use resist, the material cost is low. This reduces the number of processes. In addition, the resist mask can be formed using inkjet or printing methods. It is also possible to form the resist only in the required areas using inkjet or printing methods. By forming a resist mask by exposure and development, it is possible to reduce the size of the resist mask compared to forming a resist on the entire surface. This allows for cost reduction.

[0042] In addition, a multi-tone mask is used to create a resist mask having multiple (typically two types) of thickness regions. A wiring or the like may be formed by forming a wiring.

[0043] Next, an insulating film (hereinafter, a gate insulating film 11) is formed on the first wiring 101A and the capacitance electrode 101B. A gate insulating film 113 is formed by sputtering or the like.

[0044] For example, the gate insulating film 113 is formed using a silicon oxide film by a sputtering method. Of course, the gate insulating film 113 is not limited to such a silicon oxide film. Other insulating films such as silicon oxide film, silicon nitride film, aluminum oxide film, and tantalum oxide film may be used and may be formed as a single layer or a laminate structure made of these materials.

[0045] Before forming an oxide semiconductor film, a reverse scanning laser was used to generate plasma by introducing argon gas. It is preferable to remove dust adhering to the surface of the gate insulating film 113 by puttering. Instead of the argon atmosphere, nitrogen, helium, or the like may be used. It may be performed in an atmosphere containing oxygen, N2O, etc. Also, the atmosphere may be mixed with Cl2 Alternatively, the reaction may be carried out in an atmosphere containing CF4 or the like.

[0046] Next, an oxide semiconductor is deposited on the gate insulating film 113 by plasma treatment of the surface of the gate insulating film 113. After the treatment, the oxide semiconductor is deposited without being exposed to the air. This results in a higher field effect transport rate compared to silicon-based semiconductor materials such as amorphous silicon. The oxide semiconductor can be, for example, zinc oxide (ZnO), oxide Tin oxide (SnO2) can also be used. In addition, by adding In or Ga to ZnO, It is also possible.

[0047] InMO3(ZnO) as an oxide semiconductor x It is possible to use a thin film represented by (x>0) M can be any of gallium (Ga), iron (Fe), nickel (Ni), manganese (M n) and cobalt (Co). For example, M may be Ga, or may be any of the above except Ga, such as Ga and Ni or Ga and Fe. In some cases, a metal element is contained. In addition, in the above oxide semiconductor, the metal contained as M is In addition to the group elements, impurity elements include Fe, Ni, and other transition metal elements, or oxides of the transition metals. For example, the In-Ga-Zn-O system is used as an oxide semiconductor layer. A membrane may be used.

[0048] Oxide semiconductor (InMO3(ZnO) x (x>0) film) as In-Ga-Zn-O system film Instead of InMO3(ZnO), M is another metal element. x (x>0) membrane may be used In addition to the above, other oxide semiconductors include In-Sn-Zn-O and In-Al-Z nO system, Sn-Ga-Zn-O system, Al-Ga-Zn-O system, Sn-Al-Zn-O system , In-Zn-O system, Sn-Zn-O system, Al-Zn-O system, In-O system, Sn-O system, A Zn-O based oxide semiconductor can be used.

[0049] The oxide semiconductor used here is In-Ga-Zn-O. The target is a2O3:ZnO=1:1:1. The distance between the substrate and the target is Distance 100 mm, pressure 0.6 Pa, direct current (DC) power supply 0.5 kW, oxygen (oxygen flow rate 1 The film is formed in a 00% atmosphere. Note that if a pulsed direct current (DC) power supply is used, This reduces the amount of powdery material (also called particles or dust) that accumulates on the surface, and the film thickness distribution becomes uniform. preferable.

[0050] The oxide semiconductor film was formed in the same chamber as the previous reverse sputtering. Alternatively, the film may be formed in a chamber different from the chamber in which the previous reverse sputtering was performed.

[0051] The sputtering method uses a high-frequency power supply as the sputtering power source, while the RF sputtering method uses a DC power supply. There are two types of sputtering: DC sputtering and pulsed DC sputtering, which uses a pulsed bias. The sputtering method is mainly used to deposit insulating films, while the DC sputtering method is mainly used to deposit metal films. It is used when:

[0052] There are also multi-target sputtering devices that can accommodate multiple targets of different materials. The equipment can deposit layers of different materials in the same chamber, or multiple types of films in the same chamber. It is also possible to form a film by discharging two or more materials at the same time.

[0053] Also, a sputtering apparatus using a magnetron sputtering method equipped with a magnet mechanism inside the chamber and ECR sputtering using plasma generated by microwaves without glow discharge. There is a sputtering apparatus that uses this method.

[0054] In addition, in a film formation method using a sputtering method, a target material and a sputtering gas component are mixed during film formation. Reactive sputtering is a method of forming thin films of compounds by chemically reacting them with each other, and There is also a bias sputtering method in which a voltage is also applied to the substrate.

[0055] Next, the oxide semiconductor layer is dehydrated or dehydrogenated. The temperature of the heat treatment in step 1 is 400° C. or higher and lower than 750° C., preferably 425° C. or higher. If the temperature is 425°C or higher, the heat treatment time may be 1 hour or less. In this case, the heat treatment time is set to be longer than one hour. The substrate is placed in an electric furnace, and the oxide semiconductor layer is subjected to heat treatment in a nitrogen atmosphere. After this, the oxide semiconductor layer is prevented from being exposed to the air, and water and hydrogen are prevented from re-mixing into the oxide semiconductor layer. In this embodiment, a process for dehydrating or dehydrogenating an oxide semiconductor layer is performed. From the heating temperature T, use the same furnace until it reaches a temperature that is high enough to prevent water from entering again. The temperature is gradually cooled in a nitrogen atmosphere until it drops by 100°C below the temperature T. Dehydration or dehydrogenation under a rare gas (helium, neon, argon, etc.) atmosphere Do the following.

[0056] The heat treatment device is not limited to an electric furnace, and may be a heat treatment device using heat conduction or heat from a heating element such as a resistance heating element. The apparatus may be equipped with a device for heating the object to be treated by radiation. For example, a GRTA (Gas Rapid Thermal Anneal) equipment, LRTA (Lamp Rapid Thermal Annealing equipment such as RTA (Rapid Thermal Annealing) The LRTA device can be used with halogen lamps, metal halide lamps, etc. lamp, xenon arc lamp, carbon arc lamp, high pressure sodium lamp, high pressure A device that heats the workpiece by radiating light (electromagnetic waves) emitted from a lamp such as a mercury lamp. The GRTA device is a device that uses high-temperature gas for heat treatment. A rare gas such as argon or nitrogen that hardly reacts with the material to be treated by heat treatment. An inert gas is used.

[0057] The oxide semiconductor layer is heat-treated at a temperature of 400° C. or higher and lower than 750° C. This will dehydrate and dehydrogenate the carbon black, preventing it from being re-impregnated with water (H2O) thereafter.

[0058] In the first heat treatment, nitrogen or a rare gas such as helium, neon, or argon is used. It is preferable that the nitrogen introduced into the heat treatment device does not contain water, hydrogen, etc. Or the purity of rare gases such as helium, neon, and argon must be 6N (99.9999%) or higher. Preferably, the concentration of impurities is 7N (99.99999%) or more (i.e., the impurity concentration is 1 ppm or less, It is preferable to keep the concentration of the ion exchange resin at 0.1 ppm or less.

[0059] Note that depending on the conditions of the first heat treatment or the material of the oxide semiconductor layer, In some cases, the film crystallizes to become a microcrystalline or polycrystalline film. For example, the crystallization rate is 90% or more. In some cases, the oxide semiconductor film is microcrystalline, or 80% or more of the oxide semiconductor film is microcrystalline. Depending on the conditions or the material of the oxide semiconductor layer, an amorphous oxide semiconductor layer containing no crystalline components may be obtained. It may also be a conductive film.

[0060] The oxide semiconductor layer becomes oxygen-deficient after the first heat treatment for dehydration or dehydrogenation. The oxide semiconductor layer after the first heat treatment has a lower resistance than the oxide semiconductor film just after the deposition. The carrier concentration is increased to 1×10 18 / cm 3 having a carrier concentration of This becomes an oxide semiconductor layer.

[0061] Next, a second photolithography step is performed to form a resist mask and etch. The unnecessary portions are removed by the above-mentioned method, so that the first oxide semiconductor layer 103A and the second oxide semiconductor layer 103B are formed of oxide semiconductor. The oxide semiconductor layer 103B is formed. The first heat treatment for the semiconductor layer 103B is performed on the oxide semiconductor layer 103B before it is processed into an island-shaped oxide semiconductor layer. The etching can be performed on a conductive film. A cross-sectional view at this stage is shown in Figure 2(A).

[0062] After the gate insulating film 113 is formed, a capacitor is applied to the gate insulating film 113 as shown in FIG. An opening 121 is formed so as to reach the capacitance electrode 101B, and a wiring to be formed later is connected to the capacitance electrode. It may be arranged to do so.

[0063] Next, a conductive film made of a metal material is formed on the oxide semiconductor layer by a sputtering method or a vacuum deposition method. The conductive film is made of an element selected from Al, Cr, Ta, Ti, Mo, and W, or Examples of the alloy include alloys containing the above elements or alloys of combinations of the above elements. In addition, when performing heat treatment at 200°C to 600°C, the conductive film must be heat-resistant to withstand this heat treatment. Aluminum alone has problems such as poor heat resistance and susceptibility to corrosion. Therefore, it is formed by combining it with a heat-resistant conductive material. Heat-resistant conductive material combined with Al Titanium (Ti), tantalum (Ta), tungsten (W), molybdenum (Mo ), chromium (Cr), neodymium (Nd), and Sc (scandium), is an alloy containing the above elements, an alloy of a combination of the above elements, or It is formed from nitrides containing elements.

[0064] Here, the conductive film has a single-layer structure of titanium film. The conductive film may also have a two-layer structure. Alternatively, a titanium film may be laminated on an aluminum film. A layer of aluminum containing neodymium (Al-Nd) is layered on top of the Ti film, and then a layer of aluminum containing neodymium (Al-Nd) is layered on top of that. The conductive film may be a single layer of aluminum film containing silicon. It may also have a layered structure.

[0065] Next, a third photolithography process is performed to form a resist mask and perform etching. The unnecessary portions are removed to leave the second wiring 102A and the third wiring 102B, which are made of a conductive film, and the power supply The fourth wiring 104A and the fourth wiring 104B are formed. For example, ammonia hydrogen peroxide (31% by weight) is used. Wet etching using hydrogen peroxide: 28% by weight ammonia water: water = 5:2:2 The conductive film of the Ti film is etched to form the second wiring 102A, the third wiring 102B, the power supply The first oxide semiconductor layer 1 is formed by selectively etching the fourth wiring 104A and the fourth wiring 104B. Therefore, the second oxide semiconductor layer 103A and the second oxide semiconductor layer 103B can be left.

[0066] In addition, depending on the etching conditions, the oxide semiconductor The exposed areas of the layer may be etched. In that case, the second wiring 102A and the third wiring 102B are The first oxide semiconductor layer 103A in the region sandwiched between the wirings 102B is formed on the first wiring 101A. In comparison with the oxide semiconductor layer in the region overlapping with the second wiring 102A and the third wiring 102B, In addition, the thickness of the second oxide film in the region between the power supply line 104A and the fourth wiring 104B is reduced. The compound semiconductor layer 103B is connected to the power line 104A and the fourth wiring 104B on the capacitance electrode 101B. The thickness of the oxide semiconductor layer in the region overlapping with ...

[0067] Next, the gate insulating film 113, the first oxide semiconductor layer 103A, the second oxide semiconductor layer 1 03B, the second wiring 102A, the third wiring 102B, the power supply line 104A, the fourth wiring 104 At this stage, the oxide insulating layer 114 is formed on the first oxide semiconductor layer 103A and A part of the second oxide semiconductor layer 103B is in contact with the oxide insulating layer 114. A region of the first oxide semiconductor layer 103A that overlaps with the first wiring 101A with the insulating film 113 interposed therebetween The region of the second oxide semiconductor layer 103B overlapping with the capacitance electrode 101B is a channel formation region. This becomes an area.

[0068] The oxide insulating layer 114 has a thickness of at least 1 nm and is formed by an oxide method such as a sputtering method. The insulating layer can be formed by any suitable method that does not allow impurities such as water and hydrogen to be mixed into the insulating layer. In this embodiment mode, a silicon oxide film is formed as the oxide insulating layer by a sputtering method. The substrate temperature during film formation may be set to room temperature or higher and 300° C. or lower. In this embodiment, the substrate temperature is set to 100° C. The silicon oxide film is formed by sputtering in a rare gas (typically argon) atmosphere. In air, oxygen, or a mixture of rare gas (typically argon) and oxygen, The target may be a silicon oxide target or a silicon target. For example, a silicon target can be used under an oxygen and rare gas atmosphere. A silicon oxide film can be formed by sputtering. The oxide insulating layer formed in contact with the dielectric layer is resistant to moisture, hydrogen ions, and OH - Contains impurities such as First, an inorganic insulating film is used to block these substances from entering from the outside, typically an oxide film. A silicon film, a silicon nitride oxide film, an aluminum oxide film, an aluminum oxide nitride film, or the like is used. Note that the oxide insulating layer formed by sputtering is particularly dense, and impurities may enter the adjacent layer. It can be used as a single layer as a protective film to suppress the phenomenon of phosphorus diffusion. Using a target doped with phosphorus (P) or boron (B), phosphorus (P) or boron (B) is added to the oxide insulating layer. B) can also be added.

[0069] In this embodiment, a columnar polycrystalline B-doped silicon target (resistance value 0 The distance between the substrate and the target (TS distance) was 89 mm, and the pressure was Pulse was measured under an oxygen atmosphere (oxygen flow rate 100%) with a pressure of 0.4 Pa and a direct current (DC) power of 6 kW. The film is formed by DC sputtering. The film thickness is 300 nm.

[0070] Note that the oxide insulating layer 114 is provided over and in contact with a region that serves as a channel formation region of the oxide semiconductor layer. It also functions as a channel protection layer.

[0071] Next, a second heat treatment (preferably at 200° C. or higher and 400° C. or lower, for example at 250° C. or higher and 3 50°C or less) may be carried out under an inert gas atmosphere or a nitrogen gas atmosphere. For example, A second heat treatment is performed at 250° C. for 1 hour in a nitrogen atmosphere. The first oxide semiconductor layer 103A and a part of the second oxide semiconductor layer 103B are oxide insulating layers. It is heated while in contact with 114.

[0072] The first oxide semiconductor layer 103A whose resistance is reduced by the first heat treatment and the second oxide semiconductor When the second heat treatment is performed on the oxide insulating layer 114, the oxide insulating layer 114 is heated to a temperature of 100.degree. The region in contact with the insulating layer 114 is in an oxygen-excess state. As a result, the first oxide semiconductor layer 1 The first oxide semiconductor layer 103A and the second oxide semiconductor layer 103B are in contact with the oxide insulating layer 114. In the depth direction of the first oxide semiconductor layer 103A and the second oxide semiconductor layer 103B, Make it I-type (high resistance).

[0073] Next, an opening 122 is formed in the oxide insulating layer 114 by a fourth photolithography step. The cross-sectional view at this stage is shown in Figure 2(B).

[0074] Next, a light-transmitting conductive film is formed to connect to the fourth wiring 104B. The conductive film material having this property is indium oxide (In2O3) or indium oxide silicon oxide. ITO alloys (In2O3-SnO2, abbreviated as ITO) are deposited by sputtering or vacuum deposition. Another material for the conductive film with light-transmitting properties is Al-Zn -O-based films, i.e., Al-Zn-ON-based films, Zn-O-based films containing nitrogen, and nitrogen-free The composition ratio of zinc in the Al-Zn-ON film may be (atomic %) is 47 atomic % or less and is larger than the aluminum composition ratio (atomic %) in the film. The composition ratio (atomic %) of aluminum in the film is greater than the composition ratio (atomic %) of nitrogen in the film. The etching process for such materials is carried out with a hydrochloric acid-based solution. Etching tends to leave residue, so indium oxide is used to improve etching processability. A zinc oxide alloy (In2O3-ZnO) may also be used.

[0075] The composition ratio of the light-transmitting conductive film is expressed in atomic percent. (EPMA:Electron Probe X-ray MicroAnalyzer ) will be used for the evaluation.

[0076] Next, a fifth photolithography step is performed to form a resist mask and perform etching. The unnecessary part is removed to form one electrode of the light-emitting element. The structure has a light-emitting layer between the electrodes (electrode and cathode), and the element constituting the light-emitting layer is laminated on the electrodes. Therefore, one electrode of the light emitting element is called a light emitting element 105.

[0077] Next, the first wiring 101A, the second wiring 102A, the third wiring 102B, the fourth wiring 1 04B, the first oxide semiconductor layer 103A, the second oxide semiconductor layer 103B, and the power supply line 104 A partition wall 106 is provided on the capacitor electrode 101B to separate the light emitting elements for each pixel. A light emitting element 105 connected to the fourth wiring 104B is provided on the inner side of the partition wall 106. The cross-sectional view at this stage is shown in Figure 2(C).

[0078] Thus, the first thin film transistor 107A and the second thin film transistor 107B are provided. Then, these are arranged in a matrix to correspond to each pixel. By arranging the electrodes to form a pixel portion, an active matrix type light emitting display device is manufactured. It is possible.

[0079] The advantages of the configuration of this embodiment described with reference to FIGS. 1 and 2 will now be described with reference to FIGS. 3(A) and 3(B). A detailed explanation will be given below.

[0080] 3A and 3B are enlarged views of the oxide semiconductor layer and its vicinity in the top view of FIG. In addition, the width of the first oxide semiconductor layer 103A in FIG. The enlarged view shows the width of the first oxide semiconductor layer 103A in FIG. W2) corresponds to the figure.

[0081] In the top view of the pixel in FIG. 1A in this embodiment mode, as shown in FIGS. In addition, the first wiring 101A is not branched off from the first wiring 101A, and the first The oxide semiconductor layer 103A is provided. The second wiring 102A and the third wiring 102B in the oxide semiconductor layer A channel region formed between the first wiring 102B and the first wiring 101A is located in the overlapping region. The first oxide semiconductor layer 103A has a channel region that is irradiated with light. This may cause variations in the TFT characteristics. It was necessary to ensure reliable light blocking using wiring, which was also a factor in reducing the aperture ratio of the pixels. An oxide semiconductor layer is provided so as to overlap on the first wiring 101A according to the embodiment; By not forming a wiring branched from the first wiring 101A, it is possible to improve the aperture ratio. Cut.

[0082] In addition, a light-transmitting oxide semiconductor layer is used as a semiconductor layer of a thin film transistor. As a result, the oxide semiconductor layer is positioned slightly away from the area where the oxide semiconductor layer overlaps the first wiring 101A, from the designed position. Even if the light emitting element 105 overlaps the light emitting element 105, the aperture ratio is not reduced. The display can be performed without any problem.

[0083] By forming an oxide semiconductor layer in a pattern larger than the specified size, Even if the oxide semiconductor layer is formed at a slightly misaligned portion, it may cause problems such as malfunction and a decrease in aperture ratio. Therefore, the active matrix of the light-emitting display device can provide a good display without any distortion. This makes it easier to manufacture semiconductor substrates, and can lead to improved yields.

[0084] Next, a storage capacitance is reduced by using a thin film transistor using an oxide semiconductor layer. 1 shows an example of a specific top view when

[0085] In a thin film transistor having an oxide semiconductor, a gate is connected to the transistor to make the transistor non-conductive. The current that flows through the transistor when a voltage is applied (hereafter referred to as leakage current) is 0.1 pA. or less, whereas thin-film transistors using amorphous silicon have a current of several hundreds of nA. Therefore, in a thin film transistor having an oxide semiconductor, it is necessary to reduce the storage capacitance. That is, in a pixel provided with a thin film transistor having an oxide semiconductor, The pixel has a smaller pixel area than the pixel having a thin film transistor with amorphous silicon. This allows for greater freedom in layout.

[0086] Since the leakage current of a thin film transistor having an oxide semiconductor layer is very small, the storage capacitance It is also possible to omit the storage capacitor. The diagram is shown in FIG. 12(A) and (B). The top view of the pixel shown in FIG. 12(A) is similar to that described above. This corresponds to a top view of FIG. 1(A) with the capacitance lines omitted. As can be seen from the top view in FIG. 12B and the cross-sectional view in FIG. 12C, the thin film having an oxide semiconductor layer By using a transistor, the arrangement of the second thin film transistor can be used to form the third wiring 10 The wiring of 2B etc. can be shortened and the aperture ratio can be improved.

[0087] As described above, by using the structure described in this embodiment, a thin film using an oxide semiconductor When manufacturing a pixel having a film transistor, the aperture ratio can be improved. As a result, a light-emitting display device having a high-definition display portion can be provided.

[0088] This embodiment mode can be implemented in appropriate combination with the configurations described in other embodiments. It is.

[0089] (Embodiment 2) An example of configuring pixels of a display device having a TFT configuration different from that of the above embodiment will be described below.

[0090] A top view of a pixel having a structure different from that of the embodiment mode 1 is shown in FIG. The TFT structure shown in Fig. 1 is a bottom gate structure, and the channel is On the opposite side of the oxide semiconductor layer that will become the gate region, A so-called inverted staggered configuration having line layers is shown.

[0091] The pixel 400 shown in FIG. 4A includes a first wiring 401A functioning as a scan line, The second wiring 402A, the first oxide semiconductor layer 403A, and the second oxide semiconductor layer 403B, a power line 404A, a capacitance electrode 401B, and a light emitting element 405. A third wiring 40 for electrically connecting the oxide semiconductor layer 403A and the capacitance electrode 401B. 2B, the first thin film transistor 407A is configured. A fourth wiring 404B is provided for electrically connecting the layer 403B and the light-emitting element 405. A second thin film transistor 407B is formed. 2A, a third wiring 402B, a fourth wiring 404B, a first oxide semiconductor layer 403A, a second A light-emitting element is provided on the oxide semiconductor layer 403B, the power line 404A, and the capacitor electrode 401B. A partition wall 406 is provided to separate each pixel. The fourth wiring 4 is provided on the inner side of the partition wall 406. A light emitting element 405 is provided to be connected to the light emitting element 404B.

[0092] The first wiring 401A also functions as a gate of the first thin film transistor 407A. The capacitor electrode 401B is connected to the gate of the second thin film transistor 407B and one of the storage capacitors. The second wiring 402A also functions as an electrode for the first thin film transistor. It also functions as one of the source electrode and the drain electrode of the transistor 407A. The third wiring 402B is connected to the source electrode or drain electrode of the first thin film transistor 407A. The power supply line 404A is also a wiring that functions as the other of the first and second thin film transistors 407. A semiconductor device that functions as one of the source electrode or drain electrode of B and the other electrode of the storage capacitor. The fourth wiring 404B is also a source electrode of the second thin film transistor 407B. is also the wiring that functions as the other of the drain electrodes.

[0093] The first wiring 401A and the capacitance electrode 401B are provided from the same layer, and the second wiring 402 A, a third wiring 402B, a power supply line 404A, and a fourth wiring 404B are provided from the same layer. The power supply line 404A and the capacitance electrode 401B are provided so as to overlap each other. The first thin film transistor 407B forms a storage capacitor. The first oxide semiconductor layer 403A of 07A is a gate insulating film on the first wiring 401A. The first oxide semiconductor layer 403A is provided via a first wiring 40 1A and the partition wall 406 are provided outside the area where they are provided.

[0094] FIG. 4B shows the cross sections between dashed lines A-A', B-B', and C-C' in FIG. 4A. In the cross-sectional structure shown in FIG. 4B, a base film 4 is formed on a substrate 411. A first wiring 401A, which is a gate, and a capacitance electrode 401B are provided via 12. A gate insulating film 413 is provided so as to cover the first wiring 401A and the capacitance electrode 401B. On the gate insulating film 413, a first oxide semiconductor layer 403A, a second oxide semiconductor layer 403B, A conductor layer 403B is provided on the first oxide semiconductor layer 403A. 4A, a third wiring 402B, and a power supply line 404A are provided on the second oxide semiconductor layer 403B. A fourth wiring 404B is provided. The compound semiconductor layer 403B, the second wiring 402A, the third wiring 402B, the power supply line 404A, and An oxide insulating layer 414 functioning as a passivation film is formed on the fourth wiring 404B. A first wiring 401A, a second wiring 402A, a third wiring 402B, and a fourth wiring 402B are provided. The wiring 404B, the first oxide semiconductor layer 403A, the second oxide semiconductor layer 403B, the power A partition 406 is provided on the oxide insulating layer 414 on the line 404A and the capacitance electrode 401B. An opening is formed in the oxide insulating layer 414 on the fourth wiring 404B. In the opening, the electrode of the light emitting element 405 is connected to the fourth wiring 404B. Along the dashed line BB′, the third wiring 402B and the capacitance electrode 401B are The connection is made through an opening formed in 413.

[0095] The pixels shown in FIGS. 4A and 4B are the same as those described in FIGS. 1A and 1B of the first embodiment. Similarly, a plurality of pixels 701 arranged in a matrix on a substrate 700 in FIG. The explanation regarding FIG. 7 is the same as that in the first embodiment.

[0096] The cross-sectional view shown in FIG. 4B is the same as the cross-sectional view shown in FIG. 1B. The method is the same as that explained in FIG. 2 in the first embodiment.

[0097] The advantages of the configuration of this embodiment described with reference to FIGS. 4(A) and 4(B) are shown in FIGS. ) will be used for a detailed explanation.

[0098] 5A and 5B are enlarged views of the oxide semiconductor layer and its vicinity in the top view of FIG. 4A. In addition, the width of the first oxide semiconductor layer 403A in FIG. The enlarged view shows the width of the first oxide semiconductor layer 403A in FIG. W2) corresponds to the figure.

[0099] In the top view of the pixel in FIG. 4(A) in this embodiment, as shown in FIGS. Then, the first wiring 401A is connected to the first wiring 401A without branching the wiring from the first wiring 401A. An oxide semiconductor layer 403A is provided. The second wiring 402A and the third wiring A channel region formed between the first wiring 402B and the first wiring 401A is located in the overlapping region. In addition, in this embodiment, the first oxide semiconductor layer 403A is formed of the first A second wiring 402A and a third wiring 402B are formed by extending on the gate insulating film on the wiring 401A. This will result in contact with

[0100] The first oxide semiconductor layer 403A has a channel region that is irradiated with light, and the TFT characteristics are varied. Therefore, the light is reliably blocked by the wiring branched from the first wiring 401A. This is a factor that reduces the aperture ratio of the pixel. An oxide semiconductor layer is provided over and overlaps with the first wiring 401A. A structure in which no branched wiring is formed, and a gate insulating film extending on the first wiring 401A is formed. The second wiring 402A and the third wiring 402B are in contact with the first oxide semiconductor layer 403A. This structure can improve the aperture ratio.

[0101] In addition, a light-transmitting oxide semiconductor layer is used as a semiconductor layer of a thin film transistor. As a result, the oxide semiconductor layer is positioned slightly away from the area where the oxide semiconductor layer overlaps with the first wiring 401A, from the designed position. Even if the light emitting element 405 overlaps the light emitting element 405, the aperture ratio can be reduced. The display can be performed without any problem.

[0102] In addition, the second wiring 402A and the third wiring 402B extending over the first wiring 401A shown in FIG. The line 402B may be provided so as to overlap the first line 401A. The third wiring 402A and the third wiring 402B may be routed in a meandering manner. Alternatively, the wiring may be provided in a straight line.

[0103] By forming an oxide semiconductor layer with a pattern larger than a predetermined size, Even if the oxide semiconductor layer is formed at a position that is out of alignment with the substrate, there is no problem in terms of malfunction and a decrease in aperture ratio. Therefore, the active matrix of the light-emitting display device can provide a good display without any distortion. This makes it easier to manufacture risk-free substrates, which can lead to improved yields.

[0104] As described above, by using the structure described in this embodiment, a thin film using an oxide semiconductor When manufacturing a pixel having a film transistor, the aperture ratio can be improved. As a result, a light-emitting display device having a high-definition display portion can be provided.

[0105] This embodiment mode can be implemented in appropriate combination with the configurations described in other embodiments. It is.

[0106] (Embodiment 3) An example of configuring pixels of a display device having a TFT configuration different from that of the above embodiment will be described below.

[0107] A top view and a cross-sectional view of a pixel having a structure different from that of the second embodiment are shown in FIG. The structure of the top view shown in FIG. 6(A) is the same as that shown in FIG. 4(A), and the description will not be repeated here. The structure of the cross-sectional view shown in FIG. 6(B) is different from the structure of the cross-sectional view shown in FIG. The point is that an interlayer insulating layer 601A is provided between the first wiring 401A and the second wiring 402A. and an interlayer insulating layer 601 between the first wiring 401A and the third wiring 402B. B is provided.

[0108] A second wiring 402A and a third wiring 402B are provided to extend on the first wiring 401A. In this case, depending on the film thickness of the gate insulating film 413, the first wiring 401A and the second wiring 402A , between the first wiring 401A and the third wiring 402B, and between the first wiring 401A and the power supply line 4 Therefore, as shown in FIG. 6(B), a parasitic capacitance is generated between the insulating layer 04A and the insulating layer 04B. By providing the insulating layer 601A and the interlayer insulating layer 601B, the parasitic capacitance is reduced, and malfunctions and other defects are prevented. can be reduced.

[0109] As described above, by using the structure described in this embodiment, a thin film using an oxide semiconductor When manufacturing a pixel having a film transistor, the aperture ratio can be improved. In this embodiment, in addition to the configuration of the second embodiment, it is possible to reduce parasitic capacitance. Therefore, the light emitting display device has a high-definition display portion and is capable of reducing malfunctions. It is possible.

[0110] (Embodiment 4) In this embodiment mode, a structure of a light-emitting element which is a display element will be described.

[0111] FIG. 9 shows one mode of a cross-sectional structure of a light-emitting element connected to a thin film transistor. The light-emitting element includes a first electrode 911, an EL layer 913 having a light-emitting layer, and a second electrode 914. Either the first electrode 911 or the second electrode 914 is an anode. The light-emitting element functions as a cathode and the other functions as a cathode. The electrons injected from the first electrode of the light emitting element are recombined in the light emitting layer included in the EL layer, and emit light. The electrode 911 is connected to the thin film transistor 107B formed on the substrate 111. The first electrode 911 and one of the electrodes serving as the source or drain of the membrane transistor 107B are covered with The partition wall 106 is provided so as to form a gap between the first electrode 911 and the opening of the partition wall 106. An L layer 913 is provided, and a second electrode 914 is provided so as to cover the EL layer 913 and the partition wall 106. Note that in this embodiment mode, the thin film transistor described in Embodiment Mode 1 is used. In this case, the thin film transistor described in the other embodiment modes can be used.

[0112] The first electrode 911 or the second electrode 914 is made of a metal, an alloy, or an electrically conductive compound. and form.

[0113] For example, the first electrode 911 or the second electrode 914 has a large work function (a work function of 4. 0 eV or more) metals, alloys, electrically conductive compounds, etc. can be used. Representative examples include oxides Indium Tin Oxide (ITO), silicon or oxide Indium oxide-tin oxide and indium oxide-zinc oxide (IZO:In Tungsten oxide and zinc oxide are both contained in the oxide layer. The conductive metal oxide layer has optical transparency, such as InP (Indium-Zinc Oxide) (IWZO).

[0114] In addition, the first electrode 911 or the second electrode 914 has a small work function (typically, (function is 3.8 eV or less) metals, alloys, electrically conductive compounds, etc. can be used. In general, elements in groups 1 and 2 of the periodic table, such as lithium and cesium, Alkali metals and alkaline earth metals such as magnesium, calcium, and strontium metals and alloys containing these metals (aluminum, magnesium-silver alloys, aluminum and lithium alloys), rare earth metals such as europium and ytterbium, and Alloys, etc.

[0115] Alkali metals, alkaline earth metals, and alloys containing these metals are deposited by vacuum deposition, sputtering, etc. In addition, silver paste is ejected by the inkjet method and then sintered. The first electrode 911 and the second electrode 914 may be formed as a single layer. However, the present invention is not limited to this, and the electrodes may be formed by laminating.

[0116] In order to extract light emitted from the EL layer to the outside, the first electrode 911 or the second electrode 91 Either one or both of the first electrode and the second electrode are formed to transmit light emitted from the EL layer. When only the electrode 911 has light-transmitting properties, light passes through the first electrode 911 as shown by the arrow 900. A video signal is input from the signal line through the electrode 911 and output from the substrate 111 at a brightness according to the video signal. In addition, when only the second electrode 914 is an electrode having light transmitting properties, the light is transmitted through the second electrode A light having a luminance according to a video signal input from a signal line through 914 is taken out from the sealing substrate 916 side. Both the first electrode 911 and the second electrode 914 are light-transmitting electrodes. In this case, light passes through the first electrode 911 and the second electrode 914 and is converted into a video signal input from a signal line. The light is extracted from both the substrate 111 side and the sealing substrate 916 side with a luminance according to the signal.

[0117] The light-transmitting electrode is formed using, for example, a light-transmitting conductive metal oxide. Alternatively, silver, aluminum, etc. are formed to a thickness of several nm to several tens of nm. A metal layer such as silver or aluminum having a thin film thickness and a conductive metal oxide layer having light transmission properties. It may also have a laminated structure.

[0118] Either the first electrode 911 or the second electrode 914, which functions as an anode, has a large work function. (Work function: 4.0 eV or more) It is preferable to use metals, alloys, electrically conductive compounds, etc. The other of the first electrode 911 and the second electrode 914 functioning as a cathode has a work function of It is preferable to use metals, alloys, electrically conductive compounds, etc. with small work functions (work functions of 3.8 eV or less). Typically, alkali metals, alkaline earth metals, and alloys and compounds containing these metals are used. , as well as transition metals including rare earth metals.

[0119] The EL layer 913 includes a light-emitting layer. The hole transport layer may be connected to the anode and the light emitting layer. The hole injection layer is provided between the anode and the light emitting layer, or between the anode and the hole transport layer. On the other hand, the electron transport layer is provided between the cathode and the light emitting layer. The layer is provided between the cathode and the light-emitting layer, or between the cathode and the electron transport layer. It is not necessary to provide all of the layers, the hole transport layer, the electron transport layer, and the electron injection layer, and any layer may be provided as required. It may be provided selectively depending on the function, etc.

[0120] The light-emitting layer contains a light-emitting material. The light-emitting material may be, for example, a fluorescent material that emits fluorescent light. Compounds and phosphorescent compounds that emit phosphorescence can be used.

[0121] The light-emitting layer can be formed by dispersing a light-emitting substance in a host material. When the luminescent layer is formed by dispersing the luminescent material in a substrate, the luminescent material reacts with itself to cause concentration quenching. This can suppress the phenomenon of crystallization.

[0122] When the luminescent substance is a fluorescent compound, the host material has a higher singlet excitation than the fluorescent compound. It is possible to use a substance with a large energy (energy difference between the ground state and the singlet excited state) In the case of a phosphorescent compound, it is preferable that the host material has a triplet excitation rather than a phosphorescent compound. It is possible to use a substance with a large energy (energy difference between the ground state and the triplet excited state) preferable.

[0123] The light-emitting substance dispersed in the host material may be the phosphorescent compound or the fluorescent compound described above. A mixture of these can be used.

[0124] In addition, two or more types of host materials and light-emitting substances may be used for the light-emitting layer. Two or more types of light-emitting materials and host materials may be used. Two or more kinds of luminescent substances may be used.

[0125] In addition, a layer containing a substance having a high hole transporting property and a substance having an electron accepting property is used as the hole injecting layer. The layer containing a substance having a high hole transporting property and a substance having an electron accepting property can be formed by a carrier. It has a high hole density and excellent hole injection properties. The layer containing the material is used as a hole injection layer in contact with the electrode functioning as an anode. Regardless of the work function of the electrode material acting as the anode, various metals, alloys, and Conductive compounds, mixtures thereof, and the like can be used.

[0126] The light-emitting layer, the hole injection layer, the hole transport layer, the electron transport layer and the electron injection layer are formed by deposition, coating, etc. It can be formed more.

[0127] In addition, a passivation layer 915 is formed on the second electrode 914 and the partition wall 106 by sputtering. The passivation layer 915 may be formed by a method such as a CVD method. This can reduce the deterioration of the light emitting element due to the intrusion of moisture or oxygen into the light emitting element. The space between the passivation layer 915 and the sealing substrate 916 is filled with nitrogen, and a desiccant is further added. Alternatively, a light-transmitting layer may be disposed between the passivation layer 915 and the sealing substrate 916. Alternatively, the porous material may be filled with an organic resin having high water absorption properties.

[0128] When the light emitting element emits white light, a color filter or a color conversion layer is provided on the substrate 11. 1 or the sealing substrate 916, full color display can be achieved.

[0129] In order to enhance contrast, a polarizing plate or a circular polarizing plate is provided on the substrate 111 or the sealing substrate 916. A plate may be provided.

[0130] In the pixel of this embodiment, by combining the configurations of the above embodiments, When manufacturing a pixel having a thin film transistor using an oxide semiconductor, it is necessary to improve the aperture ratio. It is possible to plan this.

[0131] This embodiment can be implemented in appropriate combination with the configurations described in other embodiments. It is Noh.

[0132] (Embodiment 5) In this embodiment mode, a circuit configuration of a pixel that can be applied to a light-emitting display device will be described.

[0133] FIG. 8 is a diagram showing an example of a pixel configuration that can be applied to a light-emitting display device. a first thin film transistor 801, a second thin film transistor 802, a capacitor element 803, a light-emitting element The gate of the first thin film transistor 801 is electrically connected to the first wiring 805. The first terminal of the first thin film transistor 801 is electrically connected to the second wiring 806. The second terminal of the first thin film transistor 801 is connected to the first electrode of the capacitor element 803 and and the gate of the second thin film transistor 802. The electrode is electrically connected to a power supply line 807. is electrically connected to a power supply line 807. A second terminal of the second thin film transistor 802 is It is electrically connected to one electrode of the light-emitting element 804 .

[0134] The first wiring 805 has the same function as the first wiring 101A described in the first embodiment. The second wiring 806 is the same as the second wiring 10 described in the first embodiment. The power supply line 807 has the same function as the power supply line 2A described in the first embodiment. The structure of the light emitting element 804 is the same as that of the light emitting element 104A described in the fourth embodiment. The configuration is the same as that of the light-emitting element described above.

[0135] In the pixel of this embodiment, by combining the configurations of the above embodiments, In order to improve the aperture ratio, a pixel having a thin film transistor using a nitride semiconductor is manufactured. It is possible.

[0136] This embodiment mode can be implemented in appropriate combination with the configurations described in other embodiments. It is.

[0137] (Embodiment 6) In this embodiment, an electronic device including the light-emitting display device described in the above embodiment is An example will be described.

[0138] FIG. 10A shows a portable game machine, which includes a housing 9630, a display unit 9631, and a speaker 9633. , operation keys 9635, a connection terminal 9636, a recording medium reading unit 9672, etc. The portable game machine shown in FIG. 10(A) can be used to play a program or data recorded on a recording medium. The function of reading the data and displaying it on the display unit, and the function of sharing information with other portable gaming machines through wireless communication The portable gaming machine shown in FIG. 10(A) has the following functions. The functions are not limited to these, and various functions can be provided.

[0139] FIG. 10B shows a digital camera having a housing 9630, a display portion 9631, and a speaker 963 3, operation keys 9635, connection terminal 9636, shutter button 9676, image receiving unit 9677 , etc. The digital camera with a television receiving function shown in FIG. 10(B) can have the following: Functions for taking still images, shooting videos, and automatically or manually correcting captured images Functions, such as acquiring various information from the antenna, capturing images, or acquiring information from the antenna The function to save the captured information, the function to display the captured image or the information obtained from the antenna on the display. In addition, the digital camera with a television receiving function shown in FIG. The functions of the mobile camera are not limited to those described above, and the mobile camera may have a variety of functions.

[0140] FIG. 10C shows a television receiver, which includes a housing 9630, a display portion 9631, and a speaker 9633. , operation keys 9635, connection terminals 9636, etc. A television receiver has two functions: to process television radio waves and convert them into image signals, and to process image signals and It has functions such as converting signals suitable for display and converting the frame frequency of image signals. Note that the functions of the television receiver shown in FIG. 10(C) are not limited to these. It can have a variety of functions.

[0141] FIG. 11A shows a computer, which includes a housing 9630, a display portion 9631, and a speaker 9633. , operation keys 9635, connection terminals 9636, external connection ports 9680, pointing devices The computer shown in FIG. 11A can store various information. The function to display images (still images, videos, text images, etc.) on the display, A function to control processing by a program, a communication function such as wireless communication or wired communication, The ability to connect to various computer networks using the communication function, The function of transmitting or receiving data can be included. The functions possessed by the computer are not limited to those described above, and the computer may have a variety of functions.

[0142] Next, FIG. 11B shows a mobile phone, which includes a housing 9630, a display portion 9631, and a speaker 963. 3, operation keys 9635, a microphone 9638, etc. The mobile phone shown in has the following functions: A function to display the calendar, date, time, etc. on the display, and to operate or It has the functions of editing, controlling the processing by various software (programs), etc. However, the functions of the mobile phone shown in FIG. 11(B) are not limited to these. It can have a variety of functions.

[0143] Next, FIG. 11C shows an electronic paper (also called an E-book). The electronic pen 9630 may have a display unit 9631, operation keys 9635, etc. The user interface has the functions to display various information (still images, videos, text images, etc.), a calendar, , a function to display the date or time on the display unit, and a function to operate or edit the information displayed on the display unit Functions such as the ability to control processing using various software (programs) Note that the functions of the electronic paper shown in FIG. 11(C) are not limited to these. It can have a variety of functions.

[0144] The electronic device described in the present embodiment has a plurality of pixels constituting a display unit, each of which has an aperture ratio It is possible to improve the

[0145] This embodiment mode can be implemented in appropriate combination with the configurations described in other embodiments. It is. [Explanation of symbols]

[0146] 100 pixels 103 Oxide semiconductor layer 105 Light emitting element 106 Bulkhead 111 Substrate 112 Base film 113 Gate insulating film 114 Oxide insulating layer 121 Opening 122 Opening 400 pixels 405 Light emitting element 406 Bulkhead 411 Substrate 412 Base film 413 Gate insulating film 414 Oxide insulating layer 700 Substrates 701 pixels 702 Pixel section 703 Scanning line driver circuit 704 Signal line driver circuit 705 Power supply circuit 800 pixels 801 Thin Film Transistor 802 Thin Film Transistor 803 Capacitive element 804 Light emitting element 805 Wiring 806 Wiring 807 Power line 900 Arrow direction 911 Electrode 912 Bulkhead 913 EL layer 914 Electrode 915 Passivation Layer 916 Sealing substrate 101A Wiring 101B Capacitive electrode 102A Wiring 102B Wiring 103A Oxide semiconductor layer 103B Oxide semiconductor layer 104A power line 104B Wiring 107A Thin Film Transistor 107B Thin-film transistor 401A Wiring 401B Capacitive electrode 402A Wiring 402B Wiring 403A Oxide semiconductor layer 403B Oxide semiconductor layer 404A power line 404B Wiring 407A Thin Film Transistor 407B Thin-film transistor 601A Interlayer insulation layer 601B Interlayer Insulation Layer 9630 Case 9631 Display section 9633 Speaker 9635 Operation Key 9636 Connection terminal 9638 Microphone 9672 Recording medium reading unit 9676 Shutter button 9677 Image receiving unit 9680 External connection port 9681 Pointing Device

Claims

1. a first pixel including a first transistor, a second transistor, and a light-emitting element; a source or a drain of the first transistor is electrically connected to a gate electrode of the second transistor; the light-emitting element is electrically connected to one of the source and the drain of the second transistor; the other of the source and the drain of the second transistor is electrically connected to a power supply line, a first oxide semiconductor layer, a second oxide semiconductor layer, a first conductive layer, a second conductive layer, and a third conductive layer; each of the first oxide semiconductor layer and the second oxide semiconductor layer contains In, Ga, and Zn; the first oxide semiconductor layer has a channel formation region of the first transistor, the second oxide semiconductor layer has a channel formation region of the second transistor, a channel length of the second transistor is greater than a channel length of the first transistor; the first conductive layer overlaps with the first oxide semiconductor layer and has a region functioning as a gate electrode of the first transistor and a region functioning as a first wiring; the second conductive layer overlaps with the second oxide semiconductor layer and has a region that functions as a gate electrode of the second transistor; the third conductive layer has a region that functions as a second wiring; The second wiring functions as the power supply line, In a plan view, a channel length direction of the first transistor is the same as a channel length direction of the second transistor, the second oxide semiconductor layer does not have a region overlapping with a light emitting region of the first pixel in a plan view; the first oxide semiconductor layer does not have a region overlapping with a light emitting region of the first pixel in a plan view; a light-emitting region of a second pixel adjacent to the first pixel, the first oxide semiconductor layer having a region overlapping with the light-emitting region of the second pixel adjacent to the first pixel when viewed in a plan view;

2. a first pixel including a first transistor, a second transistor, and a light-emitting element; a source or a drain of the first transistor is electrically connected to a gate electrode of the second transistor; the light-emitting element is electrically connected to one of the source and the drain of the second transistor; the other of the source and the drain of the second transistor is electrically connected to a power supply line, a first oxide semiconductor layer, a second oxide semiconductor layer, a first conductive layer, a second conductive layer, and a third conductive layer; each of the first oxide semiconductor layer and the second oxide semiconductor layer contains In, Ga, and Zn; the first oxide semiconductor layer has a channel formation region of the first transistor, the second oxide semiconductor layer has a channel formation region of the second transistor, the first conductive layer overlaps with the first oxide semiconductor layer and has a region functioning as a gate electrode of the first transistor and a region functioning as a first wiring; the second conductive layer overlaps with the second oxide semiconductor layer and has a region that functions as a gate electrode of the second transistor; the third conductive layer has a region that functions as a second wiring; The second wiring functions as the power supply line, the third conductive layer has a region extending in the same direction as a channel length direction of the first transistor and a channel length direction of the second transistor in a plan view; the second oxide semiconductor layer does not have a region overlapping with a light emitting region of the first pixel in a plan view; the first oxide semiconductor layer does not have a region overlapping with a light emitting region of the first pixel in a plan view; a light-emitting region of a second pixel adjacent to the first pixel, the first oxide semiconductor layer having a region overlapping with the light-emitting region of the second pixel adjacent to the first pixel when viewed in a plan view;

3. a first pixel including a first transistor, a second transistor, and a light-emitting element; a source or a drain of the first transistor is electrically connected to a gate electrode of the second transistor; the light-emitting element is electrically connected to one of the source and the drain of the second transistor; the other of the source and the drain of the second transistor is electrically connected to a power supply line, a first oxide semiconductor layer, a second oxide semiconductor layer, a first conductive layer, a second conductive layer, and a third conductive layer; each of the first oxide semiconductor layer and the second oxide semiconductor layer contains In, Ga, and Zn; the first oxide semiconductor layer has a channel formation region of the first transistor, the second oxide semiconductor layer has a channel formation region of the second transistor, a channel length of the second transistor is greater than a channel length of the first transistor; the first conductive layer overlaps with the first oxide semiconductor layer and has a region functioning as a gate electrode of the first transistor and a region functioning as a first wiring; the second conductive layer overlaps with the second oxide semiconductor layer and has a region that functions as a gate electrode of the second transistor; the third conductive layer has a region that functions as a second wiring; The second wiring functions as the power supply line, the third conductive layer has a region extending in the same direction as a channel length direction of the first transistor and a channel length direction of the second transistor in a plan view; the second oxide semiconductor layer does not have a region overlapping with a light emitting region of the first pixel in a plan view; the first oxide semiconductor layer does not have a region overlapping with a light emitting region of the first pixel in a plan view; a light-emitting region of a second pixel adjacent to the first pixel, the first oxide semiconductor layer having a region overlapping with the light-emitting region of the second pixel adjacent to the first pixel when viewed in a plan view;

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