Information processing system and information processing program

Abstract

To provide an information processing device that switches memory maps according to each type of processing executed and an information processing program that prevent an erroneous output in performing subsequent processing.SOLUTION: A sub-processor performs the processing of: switching, after executing preceding processing, setting of a page memory 24 to that for a memory map for subsequent processing; confirming job queue information 40; and erasing information in a predetermined object area where information needs to be erased.SELECTED DRAWING: Figure 4

Description

[Technical Field]

[0001] The present disclosure relates to an information processing system and an information processing program. [Background technology]

[0002] Patent document 1 discloses an information processing device having a CPU and a non-volatile main memory and a control method thereof, in which a memory area is reserved in the main memory when an application is executed, and when the application finishes using the memory area, the information stored in the memory area is erased and the memory area is released. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2015-95001 Summary of the Invention [Problem to be solved by the invention]

[0004] In an information processing device that switches memory maps depending on the type of processing to be executed, when the next processing is executed after the previous processing is completed, the overlapping area of ​​the page memory may be switched to the memory map for the subsequent processing. However, since the information for the subsequent processing is overwritten while the data used in the previous processing remains in the memory, the data from the previous processing may be output as the output result of the subsequent processing, resulting in an erroneous output.

[0005] Therefore, the present disclosure aims to provide an information processing device and an information processing program that can prevent erroneous output when performing subsequent processing in an information processing device that switches memory maps for each type of processing to be performed. [Means for solving the problem]

[0006] In order to achieve the above object, the information processing system according to the first aspect comprises a processor and a memory in which a memory map for each type of processing to be executed is set, and after executing a processing to be executed first, the processor switches the memory setting to the memory map for the subsequent processing, and performs processing to erase information from a predetermined target area from which information needs to be erased.

[0007] In the information processing system of the second aspect, in the information processing system of the first aspect, when the subsequent processing is determined after the completion of the processing to be executed first, the processor erases a predetermined area as a target area depending on the type of the processing to be executed first and the type of the subsequent processing.

[0008] An information processing system according to a third aspect is the information processing system according to the first aspect, wherein the processor erases the entire area of ​​the memory map of the memory as the target area when the subsequent processing has not been determined.

[0009] An information processing system according to a fourth aspect is the information processing system according to the first aspect, wherein the processor erases information by writing a predetermined value in the target area.

[0010] An information processing system according to a fifth aspect is the information processing system according to the first aspect, wherein the processor performs processing specialized for image processing and further comprises a main processor that requests the processor to perform the image processing, and shared memory connected to the main processor and each of the processors, and communication between the main processor and the processor is performed via the shared memory.

[0011] An information processing program according to a sixth aspect causes a computer to execute a process of switching a memory setting in which a memory map for each type of process to be executed is set to a memory map for the subsequent process after executing a process to be executed earlier, and erasing information from a predetermined target area from which information needs to be erased. [Effects of the Invention]

[0012] According to the first aspect, it is possible to provide an information processing device that switches memory maps for each type of processing to be executed, and that can prevent erroneous output when performing subsequent processing.

[0013] According to the second aspect, when there is subsequent processing, it is possible to erase information only from a target area from which information needs to be erased.

[0014] According to the third aspect, it is possible to prevent erroneous output no matter what kind of processing is performed as subsequent processing.

[0015] According to the fourth aspect, the information in the target area can be erased.

[0016] According to the fifth aspect, it is possible to reduce the memory capacity and suppress deterioration of the memory used for image processing, compared to when information is deleted each time the memory is released.

[0017] According to the sixth aspect, it is possible to provide an information processing program that can prevent erroneous output when performing subsequent processing in an information processing device that switches memory maps for each type of processing to be executed. [Brief explanation of the drawings]

[0018] [Figure 1] 1 is a diagram showing a schematic configuration of an information processing system according to an embodiment of the present invention; [Figure 2] 10A and 10B are diagrams illustrating examples of memory maps of a page memory in a copy mode, a print mode, and a scan / fax mode. [Figure 3] 10A and 10B are diagrams illustrating an example in which data of a previously executed print job is erroneously output in a later scan job. [Figure 4] 10A and 10B are diagrams for explaining an example of preventing erroneous output of data of a preceding job by the information processing system according to the present embodiment (when a subsequent process is determined after the completion of a process to be executed in advance). [Figure 5]10A and 10B are diagrams for explaining an example of preventing erroneous output of data of a preceding job by the information processing system according to the present embodiment (when subsequent processing is undetermined after the completion of processing to be executed in advance); [Figure 6] FIG. 10 is a diagram showing scan memory map clear information as an example of memory map clear information. [Figure 7] 10 is a flowchart showing an example of a specific processing flow performed by a main processor of the information processing system according to the present embodiment. [Figure 8] 10 is a flowchart showing an example of a specific processing flow performed by a sub-processor of the information processing system according to the present embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0019] An example of an embodiment of the present disclosure will be described in detail below with reference to the drawings. Fig. 1 is a diagram showing a schematic configuration of an information processing system according to this embodiment.

[0020] 1, an information processing system 10 according to this embodiment includes multiple processors, and performs data communication between the processors via a shared memory 16. In this embodiment, as an example, an information processing system 10 provided in an image forming apparatus, an image processing apparatus, or the like will be described. Also, as an example of the multiple processors, the information processing system 10 includes two processors: a main processor 12 as an example of a main processor, and a sub-processor 14 as an example of a processor, and the sub-processor 14 is a processor specialized for image processing.

[0021] As shown in FIG. 1, an information processing system 10 according to this embodiment includes a system 11 equipped with a main processor 12 and a system 13 equipped with a sub-processor 14, which are connected via a shared memory 16.

[0022] The system 13 equipped with the sub-processor 14 is equipped with a page memory 24 as an example of memory. The page memory 24 is used for image processing and includes a conting memory 26. As shown in Fig. 2, the sub-processor 14 uses the page memory 24 by dynamically switching the memory map depending on the type of processing to be performed, such as image processing of copying, printing, and scanning. Fig. 2 is a diagram showing examples of the memory map of the page memory 24 in the copy mode, print mode, and scan / fax mode.

[0023] Specifically, in the scan / fax mode, the memory map has the following areas: Other, Reserve, SCAN / FUNC, and MYKONOS.

[0024] In copy mode, the memory map has the following areas: Other, PRINT, SCAN / FUNC, and MYKONOS.

[0025] In print mode, the memory map also has PRINT and Decomp areas.

[0026] The Reserve area indicates an unused area, the SCAN / FUNC area indicates an area for temporarily storing scanned images, the MYKONOS area indicates an area for temporarily storing scanned images for image processing, the PRINT area indicates an area for real-time output when images are output, and the Decomp area indicates an area used for decompose processing.

[0027] The general flow of data communication in the information processing system 10 according to this embodiment is as follows: Note that 1 to 4 in Fig. 1 indicate processing procedures.

[0028] Step 1: The main processor 12 transmits an inter-OS communication command representing an image processing request from the inter-OS communication module 18 of the main processor 12 and stores it in the inter-OS communication command storage area 22 of the shared memory 16 .

[0029] Step 2: The inter-OS communication module 20 on the sub-processor 14 side receives an interrupt notification from the inter-OS communication module 18 on the main processor 12 side that the storage of the inter-OS communication command has been completed, and receives the inter-OS communication command representing an image processing request from the shared memory 16.

[0030] Step 3: The inter-OS communication module 20 on the sub-processor 14 side executes image processing corresponding to the received inter-OS communication command while switching the memory map of the page memory 24 depending on the type of image processing.

[0031] Step 4: The inter-OS communication module 20 on the sub-processor 14 side receives from the page memory 24 a response indicating that the image processing has been completed in response to the inter-OS communication command.

[0032] Step 5: The inter-OS communication module 20 on the sub-processor 14 side transmits the received inter-OS communication command indicating completion of image processing execution to the shared memory 16 and stores it in the inter-OS communication command storage area 22 of the shared memory 16 .

[0033] Step 6. The inter-OS communication module 18 on the main processor 12 side receives an interrupt notification from the inter-OS communication module 20 on the sub-processor 14 side indicating that the storage of the inter-OS communication command has been completed following the successful completion of image processing, and receives the inter-OS communication command indicating the completion of image processing from the shared memory 16.

[0034] In the information processing system 10 configured as described above, when a different type of job is executed after a previously executed job is completed, the overlapping area of ​​the page memory 24 is used by switching the memory map for the subsequent job.

[0035] In this case, the subsequent job is executed while the data that has been image processed by the previously executed job remains in the memory, so the data from the preceding job may be printed in the output result of the subsequent job, resulting in an incorrect output.

[0036] It should be noted that a job refers to a process or a group of processes executed by the information processing system 10.

[0037] Here, referring to Fig. 3, a specific example will be described in which data of a previously executed job is output, resulting in an erroneous output. As an example, a case will be described below in which a scan job is executed after a print job is executed as a previous job. Fig. 3 is a diagram for explaining an example in which data of a previously executed print job is erroneously output in a subsequent scan job. Note that the main processor 12 and sub-processor 14 are omitted from Fig. 3.

[0038] Step 1. The inter-OS communication module 18 on the main processor 12 side stores an inter-OS communication command representing memory map setting (print) in the shared memory 16 in order to send a memory map setting request command (packet data) for print image processing to the inter-OS communication module 20 on the sub-processor 14 side via the shared memory 16.

[0039] Step 2: The inter-OS communication module 20 on the sub-processor 14 side receives an interrupt notification from the inter-OS communication module 18 on the main processor 12 side that the storage of the inter-OS communication command has been completed, and receives the inter-OS communication command representing memory map setting (print) from the shared memory 16. Since the received inter-OS communication command is a memory operation-related command, it sends the inter-OS communication command to the memory management task 30.

[0040] Step 3: The memory management task 30 analyzes the packet data of the inter-OS communication command, determines that it is a request to set the memory map of the page memory 24, and sets the memory map of the page memory 24 to the print mode.

[0041] Step 4: The memory management task 30 receives a response from the page memory 24 indicating that the memory map setting has been completed.

[0042] Step 5. The memory management task 30 adds memory map setting completion information to the packet data of the inter-OS communication command and transmits the inter-OS communication command to the inter-OS communication module 20 on the sub-processor 14 side. The inter-OS communication module 20 stores the received inter-OS communication command in the shared memory 16.

[0043] Step 6. The inter-OS communication module 18 on the main processor 12 side receives an interrupt notification from the inter-OS communication module 20 on the sub-processor 14 side indicating that the storage of the inter-OS communication command has been completed following completion of the memory map setting, and receives the inter-OS communication command with the setting completion information attached from the shared memory 16.

[0044] Step 7. The inter-OS communication module 18 on the main processor 12 side stores the inter-OS communication command representing the print image processing request in the shared memory 16 in order to send the print image processing request command (packet data) to the inter-OS communication module 20 on the sub-processor 14 side via the shared memory 16.

[0045] Step 8. The inter-OS communication module 20 on the sub-processor 14 side receives an interrupt notification from the inter-OS communication module 18 on the main processor 12 side that the storage of the inter-OS communication command has been completed, and receives the inter-OS communication command from the shared memory 16. Since the received inter-OS communication command is a print image processing related command, it transmits the inter-OS communication command to the print image processing task 32.

[0046] Step 9: The print image processing task 32 analyzes the packet data of the inter-OS communication command, determines that it is a print image processing request, and performs image processing using the PRINT area of ​​the page memory 24.

[0047] Step 10: The print image processing task 32 receives a response from the page memory 24 indicating that image processing using the PRINT area has been completed.

[0048] Step 11: The print image processing task 32 adds image processing completion information to the packet data of the inter-OS communication command and transmits the inter-OS communication command to the inter-OS communication module 20 on the sub-processor 14 side. The inter-OS communication module 20 stores the received inter-OS communication command in the shared memory 16.

[0049] Step 12. The inter-OS communication module 18 on the main processor 12 side receives an interrupt notification from the inter-OS communication module 20 on the sub-processor 14 side indicating that storage of the inter-OS communication command has been completed following completion of image processing, and receives the inter-OS communication command with image processing completion information attached from the shared memory 16.

[0050] Step 13. The inter-OS communication module 18 on the main processor 12 side stores the inter-OS communication command (packet data) representing the memory map setting (scan) in the shared memory 16 in order to send a memory map setting request command for scan image processing to the inter-OS communication module 20 on the sub-processor 14 side via the shared memory 16.

[0051] Step 14: The inter-OS communication module 20 on the sub-processor 14 side receives an interrupt notification from the inter-OS communication module 18 on the main processor 12 side that the storage of the inter-OS communication command has been completed, and receives an inter-OS communication command representing memory map setting (scan) from the shared memory 16. Since the received inter-OS communication command is a memory operation-related command, it sends the inter-OS communication command to the memory management task 30.

[0052] Step 15: The memory management task 30 analyzes the packet data of the inter-OS communication command, determines that it is a request to set the memory map of the page memory 24, and sets the memory map of the page memory 24 to scan mode.

[0053] Step 16: The memory management task 30 receives a response from the page memory 24 indicating that the memory map setting has been completed.

[0054] Step 17: The memory management task 30 adds memory map setting completion information to the packet data of the inter-OS communication command, and transmits the inter-OS communication command to the inter-OS communication module 20 on the sub-processor 14 side. The inter-OS communication module 20 stores the received inter-OS communication command in the shared memory 16.

[0055] Step 18. The inter-OS communication module 18 on the main processor 12 side receives an interrupt notification from the inter-OS communication module 20 on the sub-processor 14 side indicating that the storage of the inter-OS communication command has been completed following completion of the memory map setting, and receives the inter-OS communication command with the setting completion information attached from the shared memory 16.

[0056] Step 19. The inter-OS communication module 18 on the main processor 12 side stores the inter-OS communication command (packet data) representing the scan image processing request in the shared memory 16 in order to send the scan image processing request command to the inter-OS communication module 20 on the sub-processor 14 side via the shared memory 16.

[0057] Step 20: The inter-OS communication module 20 on the sub-processor 14 side receives an interrupt notification from the inter-OS communication module 18 on the main processor 12 side that the storage of the inter-OS communication command has been completed, and receives the inter-OS communication command from the shared memory 16. Since the received inter-OS communication command is a command related to scan image processing, it transmits the inter-OS communication command to the scan image processing task 34.

[0058] Step 21: The scan image processing task 34 analyzes the packet data of the inter-OS communication command, determines that it is a scan image processing request, and performs image processing using the SCAN_FUNC area and MYKONOS area of ​​the page memory 24.

[0059] Step 22: The scan image processing task 34 receives a response from the page memory 24 indicating completion of image processing using the SCAN_FUNC field and the MYKONOS field.

[0060] Step 23: The scan image processing task 34 adds image processing completion information to the packet data of the inter-OS communication command, and transmits the inter-OS communication command to the inter-OS communication module 20 on the sub-processor 14 side. The inter-OS communication module 20 stores the received inter-OS communication command in the shared memory 16.

[0061] Step 24. The inter-OS communication module 18 on the main processor 12 side receives an interrupt notification from the inter-OS communication module 20 on the sub-processor 14 side indicating that storage of the inter-OS communication command has been completed following completion of image processing, and receives the inter-OS communication command with image processing completion information attached from the shared memory 16.

[0062] The processing is carried out in the above-mentioned procedure, but when the scanned image processing is carried out in step 21, the scan involves placing a rectangle on the white background image, so the SCAN_FUNC area of ​​page memory 24 must be completely cleared to zero when image processing begins.

[0063] However, since the data is in an undefined state due to the printing executed in the preceding job, abnormal data is erroneously output.

[0064] Therefore, in the information processing system 10 according to this embodiment, after the sub-processor 14 executes the processing to be executed first, it switches the setting of the page memory 24 to the memory map of the subsequent processing, and also performs processing to erase information from a predetermined target area from which information needs to be erased.

[0065] Here, when a subsequent process has been determined after the completion of a preceding process, the sub-processor 14 erases a predetermined area according to the type of the preceding process and the type of the subsequent process as the target area. Furthermore, when a subsequent process has not been determined, the sub-processor 14 erases the entire memory map of the page memory 24 as the target area. When erasing information, the information is erased by writing a predetermined value into the target area. For example, information can be erased by writing a value such as "0" or "F."

[0066] Next, a method for preventing the erroneous output of data of a preceding job by the information processing system 10 will be described with a specific example.

[0067] First, a case where a subsequent process is determined after a preceding process is completed will be described. Fig. 4 is a diagram for explaining an example of preventing erroneous output of data of a preceding job by the information processing system 10 according to this embodiment (a case where a subsequent process is determined after a preceding process is completed). Note that the main processor 12 and the sub-processor 14 are omitted from Fig. 4.

[0068] Step 1. The inter-OS communication module 18 on the main processor 12 side stores an inter-OS communication command (packet data) representing memory map setting (print) in the shared memory 16 in order to send a memory map setting request command for print image processing to the inter-OS communication module 20 on the sub-processor 14 side via the shared memory 16.

[0069] Step 2: The inter-OS communication module 20 on the sub-processor 14 side receives an interrupt notification from the inter-OS communication module 18 on the main processor 12 side that the storage of the inter-OS communication command has been completed, and receives the inter-OS communication command representing memory map setting (print) from the shared memory 16. Since the received inter-OS communication command is a memory operation-related command, it sends the inter-OS communication command to the memory management task 30.

[0070] Step 3: The memory management task 30 analyzes the packet data of the inter-OS communication command, determines that it is a request to set the memory map of the page memory 24, and sets the memory map of the page memory 24 to the print mode.

[0071] Step 4: The memory management task 30 receives a response from the page memory 24 indicating that the memory map setting has been completed.

[0072] Step 5. The memory management task 30 adds memory map setting completion information to the packet data of the inter-OS communication command and transmits the inter-OS communication command to the inter-OS communication module 20 on the sub-processor 14 side. The inter-OS communication module 20 stores the received inter-OS communication command in the shared memory 16.

[0073] Step 6. The inter-OS communication module 18 on the main processor 12 side receives an interrupt notification from the inter-OS communication module 20 on the sub-processor 14 side indicating that the storage of the inter-OS communication command has been completed following completion of the memory map setting, and receives the inter-OS communication command with the setting completion information attached from the shared memory 16.

[0074] Step 7. The inter-OS communication module 18 on the main processor 12 side stores the inter-OS communication command (packet data) representing the print image processing request in the shared memory 16 in order to send the print image processing request command to the inter-OS communication module 20 on the sub-processor 14 side via the shared memory 16.

[0075] Step 8. The inter-OS communication module 20 on the sub-processor 14 side receives an interrupt notification from the inter-OS communication module 18 on the main processor 12 side that the storage of the inter-OS communication command has been completed, and receives the inter-OS communication command from the shared memory 16. Since the received inter-OS communication command is a print image processing related command, it transmits the inter-OS communication command to the print image processing task 32.

[0076] Step 9: The print image processing task 32 analyzes the packet data of the inter-OS communication command, determines that it is a print image processing request, and performs image processing using the PRINT area of ​​the page memory 24.

[0077] Step 10: The print image processing task 32 receives a response from the page memory 24 indicating that image processing using the PRINT area has been completed.

[0078] Step 11: The print image processing task 32 adds image processing completion information to the packet data of the inter-OS communication command and transmits the inter-OS communication command to the inter-OS communication module 20 on the sub-processor 14 side. The inter-OS communication module 20 stores the received inter-OS communication command in the shared memory 16.

[0079] Step 12. The inter-OS communication module 18 on the main processor 12 side receives an interrupt notification from the inter-OS communication module 20 on the sub-processor 14 side indicating that storage of the inter-OS communication command has been completed following completion of image processing, and receives the inter-OS communication command with image processing completion information attached from the shared memory 16.

[0080] Step 13: The inter-OS communication module 18 on the main processor 12 side stores an inter-OS communication command (packet data) representing a memory map clear in the shared memory 16 in order to send a memory map clear request command to the inter-OS communication module 20 on the sub-processor 14 side via the shared memory 16.

[0081] Step 14: The inter-OS communication module 20 on the sub-processor 14 side receives an interrupt notification from the inter-OS communication module 18 on the main processor 12 side that the storage of the inter-OS communication command has been completed, and receives the inter-OS communication command from the shared memory 16. Since the received inter-OS communication command is a memory operation-related command, it transmits the inter-OS communication command to the memory management task 30.

[0082] Step 15. In order to determine the area to be cleared in the memory map of the page memory 24, the memory management task 30 checks the type of job to be executed next from the job queue information 40 attached to the packet data of the inter-OS communication command requesting memory map clearing.

[0083] Step 16: The memory management task 30 clears the memory map of the page memory 24 depending on the type of the next job and whether or not there is a job. In the example of Figure 4, the job queue information 40 is empty and there is currently no job to be executed next, so the memory map is completely cleared.

[0084] Step 17: The memory management task 30 receives a response from the page memory 24 indicating that the memory has been cleared.

[0085] Step 18. The memory management task 30 adds memory map clear completion information to the packet data of the inter-OS communication command, and transmits the inter-OS communication command to the inter-OS communication module 20 on the sub-processor 14 side. The inter-OS communication module 20 stores the received inter-OS communication command in the shared memory 16.

[0086] Step 19. The inter-OS communication module 18 on the main processor 12 side receives an interrupt notification from the inter-OS communication module 20 on the sub-processor 14 side indicating that the storage of the inter-OS communication command has been completed following the completion of the memory map clear, and receives the inter-OS communication command with the memory map clear completion information attached from the shared memory 16.

[0087] Next, a case where a subsequent process is undetermined after a preceding process is completed will be described. Fig. 5 is a diagram for explaining an example of preventing erroneous output of data of a preceding job by the information processing system 10 according to this embodiment (a case where a subsequent process is undetermined after a preceding process is completed). Note that the main processor 12 and the sub-processor 14 are omitted from Fig. 5.

[0088] Step 1. The inter-OS communication module 18 on the main processor 12 side stores an inter-OS communication command (packet data) representing memory map setting (print) in the shared memory 16 in order to send a memory map setting request command for print image processing to the inter-OS communication module 20 on the sub-processor 14 side via the shared memory 16.

[0089] Step 2: The inter-OS communication module 20 on the sub-processor 14 side receives an interrupt notification from the inter-OS communication module 18 on the main processor 12 side that the storage of the inter-OS communication command has been completed, and receives the inter-OS communication command representing memory map setting (print) from the shared memory 16. Since the received inter-OS communication command is a memory operation-related command, it sends the inter-OS communication command to the memory management task 30.

[0090] Step 3: The memory management task 30 analyzes the packet data of the inter-OS communication command, determines that it is a request to set the memory map of the page memory 24, and sets the memory map of the page memory 24 to the print mode.

[0091] Step 4: The memory management task 30 receives a response from the page memory 24 indicating that the memory map setting has been completed.

[0092] Step 5. The memory management task 30 adds memory map setting completion information to the packet data of the inter-OS communication command and transmits the inter-OS communication command to the inter-OS communication module 20 on the sub-processor 14 side. The inter-OS communication module 20 stores the received inter-OS communication command in the shared memory 16.

[0093] Step 6. The inter-OS communication module 18 on the main processor 12 side receives an interrupt notification from the inter-OS communication module 20 on the sub-processor 14 side indicating that the storage of the inter-OS communication command has been completed following completion of the memory map setting, and receives the inter-OS communication command with the setting completion information attached from the shared memory 16.

[0094] Step 7. The inter-OS communication module 18 on the main processor 12 side stores the inter-OS communication command (packet data) representing the print image processing request in the shared memory 16 in order to send the print image processing request command to the inter-OS communication module 20 on the sub-processor 14 side via the shared memory 16.

[0095] Step 8. The inter-OS communication module 20 on the sub-processor 14 side receives an interrupt notification from the inter-OS communication module 18 on the main processor 12 side that the storage of the inter-OS communication command has been completed, and receives the inter-OS communication command from the shared memory 16. Since the received inter-OS communication command is a print image processing related command, it transmits the inter-OS communication command to the print image processing task 32.

[0096] Step 9: The print image processing task 32 analyzes the packet data of the inter-OS communication command, determines that it is a print image processing request, and performs image processing using the PRINT area of ​​the page memory 24.

[0097] Step 10: The print image processing task 32 receives a response from the page memory 24 indicating that image processing using the PRINT area has been completed.

[0098] Step 11: The print image processing task 32 adds image processing completion information to the packet data of the inter-OS communication command and transmits the inter-OS communication command to the inter-OS communication module 20 on the sub-processor 14 side. The inter-OS communication module 20 stores the received inter-OS communication command in the shared memory 16.

[0099] Step 12. The inter-OS communication module 18 on the main processor 12 side receives an interrupt notification from the inter-OS communication module 20 on the sub-processor 14 side indicating that storage of the inter-OS communication command has been completed following completion of image processing, and receives the inter-OS communication command with image processing completion information attached from the shared memory 16.

[0100] Step 13: The inter-OS communication module 18 on the main processor 12 side stores an inter-OS communication command (packet data) representing a memory map clear in the shared memory 16 in order to send a memory map clear request command to the inter-OS communication module 20 on the sub-processor 14 side via the shared memory 16.

[0101] Step 14: The inter-OS communication module 20 on the sub-processor 14 side receives an interrupt notification from the inter-OS communication module 18 on the main processor 12 side that the storage of the inter-OS communication command has been completed, and receives the inter-OS communication command from the shared memory 16. Since the received inter-OS communication command is a memory operation-related command, it transmits the inter-OS communication command to the memory management task 30.

[0102] Step 15. In order to determine the area to be cleared in the memory map of the page memory 24, the memory management task 30 checks whether there is a job to be executed next from the job queue information 40 attached to the packet data of the inter-OS communication command for the memory map clear request.

[0103] Step 16: The memory management task 30 acquires information about areas that require memory clearing from predetermined memory map clear information 42 in order to determine areas to be cleared in the memory map of the page memory 24. In the example of FIG. 5, the job queue information 40 is not empty and a scan job will be executed next, so the memory management task 30 refers to the scan memory map clear information shown in FIG. 6 to acquire areas (address, size) that require clearing in the page memory 24. In the example of FIG. 6, the SCAN_FUNC area is the area that requires clearing. Note that the memory map clear information 42 is predetermined for each type of job, and the areas to be cleared are acquired from areas that are predetermined according to the type of the preceding job and the type of the subsequent job.

[0104] Step 17: The memory management task 30 clears only the area that needs to be cleared in the page memory 24. In the example of FIG. 6, the SCAN_FUNC area is cleared.

[0105] Step 18: The memory management task 30 receives a response from the page memory 24 indicating that the memory has been cleared.

[0106] Step 19: The memory management task 30 adds memory map clear completion information to the packet data of the inter-OS communication command, and transmits the inter-OS communication command to the inter-OS communication module 20 on the sub-processor 14 side. The inter-OS communication module 20 stores the received inter-OS communication command in the shared memory 16.

[0107] Step 20: The inter-OS communication module 18 on the main processor 12 side receives an interrupt notification from the inter-OS communication module 20 on the sub-processor 14 side indicating that the storage of the inter-OS communication command has been completed following the completion of the memory map clear, and receives the inter-OS communication command with the memory map clear completion information attached from the shared memory 16.

[0108] Step 21. The inter-OS communication module 18 on the main processor 12 side stores an inter-OS communication command (packet data) representing memory map setting (scan) in the shared memory 16 in order to send a memory map setting request command for scan image processing to the inter-OS communication module 20 on the sub-processor 14 side via the shared memory 16.

[0109] Step 22: The inter-OS communication module 20 on the sub-processor 14 side receives an interrupt notification from the inter-OS communication module 18 on the main processor 12 side that the storage of the inter-OS communication command has been completed, and receives an inter-OS communication command representing memory map setting (scan) from the shared memory 16. Since the received inter-OS communication command is a memory operation-related command, it sends the inter-OS communication command to the memory management task 30.

[0110] Step 23: The memory management task 30 analyzes the packet data of the inter-OS communication command, determines that it is a request to set the memory map of the page memory 24, and sets the memory map of the page memory 24 to scan mode.

[0111] Step 24: The memory management task 30 receives a response from the page memory 24 indicating that the memory map setting has been completed.

[0112] Step 25. The memory management task 30 adds memory map setting completion information to the packet data of the inter-OS communication command, and transmits the inter-OS communication command to the inter-OS communication module 20 on the sub-processor 14 side. The inter-OS communication module 20 stores the received inter-OS communication command in the shared memory 16.

[0113] Step 26: The inter-OS communication module 18 on the main processor 12 side receives an interrupt notification from the inter-OS communication module 20 on the sub-processor 14 side indicating that the storage of the inter-OS communication command has been completed following completion of the memory map setting, and receives the inter-OS communication command with the setting completion information attached from the shared memory 16.

[0114] Step 27. The inter-OS communication module 18 on the main processor 12 side stores the inter-OS communication command (packet data) representing the scan image processing request in the shared memory 16 in order to send the scan image processing request command to the inter-OS communication module 20 on the sub-processor 14 side via the shared memory 16.

[0115] Step 28. The inter-OS communication module 20 on the sub-processor 14 side receives an interrupt notification from the inter-OS communication module 18 on the main processor 12 side that the storage of the inter-OS communication command has been completed, and receives the inter-OS communication command from the shared memory 16. Since the received inter-OS communication command is a command related to scan image processing, it transmits the inter-OS communication command to the scan image processing task 34.

[0116] Step 29: The scan image processing task 34 analyzes the packet data of the inter-OS communication command, determines that it is a scan image processing request, and performs image processing using the SCAN_FUNC area and MYKONOS area of ​​the page memory 24.

[0117] Step 30: The scan image processing task 34 receives a response from the page memory 24 indicating completion of image processing using the SCAN_FUNC field and the MYKONOS field.

[0118] Step 31: The scan image processing task 34 adds image processing completion information to the packet data of the inter-OS communication command and transmits the inter-OS communication command to the inter-OS communication module 20 on the sub-processor 14 side. The inter-OS communication module 20 stores the received inter-OS communication command in the shared memory 16.

[0119] Step 32: The inter-OS communication module 18 on the main processor 12 side receives an interrupt notification from the inter-OS communication module 20 on the sub-processor 14 side indicating that storage of the inter-OS communication command has been completed following completion of image processing, and receives the inter-OS communication command with image processing completion information attached from the shared memory 16.

[0120] In this manner, in the information processing system 10 according to the present embodiment, when a subsequent job is determined after the completion of a previously executed job, information in a predetermined area is deleted according to the type of the previously executed job and the type of the subsequent job. On the other hand, when a subsequent job is not determined, the entire memory map is erased. This prevents performance degradation and reduces execution errors for jobs that require real-time performance, since data used in image processing is erased only once after image processing is completed, compared to the prior art document, which erases data each time memory is released.

[0121] Next, specific processes performed by each unit of the information processing system 10 according to this embodiment configured as described above will be described.

[0122] First, a description will be given of specific processing performed by the main processor 12. Fig. 7 is a flowchart showing an example of the flow of specific processing performed by the main processor 12 of the information processing system 10 according to this embodiment. The processing in Fig. 7 starts when, for example, any of copying, printing, and scanning is instructed.

[0123] In step 100, the main processor 12 sends a memory map setting request to the shared memory 16, and the process proceeds to step 102. That is, the inter-OS communication module 18 on the main processor 12 side stores in the inter-OS communication command storage area 22 of the shared memory 16 an inter-OS communication command representing a memory map setting request corresponding to the specified job type.

[0124] In step 102, the main processor 12 determines whether the setting of the memory map is complete. This determination is made by determining whether the inter-OS communication module 18 on the main processor 12 side has received an interrupt notification from the inter-OS communication module 20 on the sub-processor 14 indicating the completion of storage of the inter-OS communication command accompanying the setting completion, and whether it has received an inter-OS communication command indicating the setting completion from the shared memory 16. The process waits until the determination is affirmative, and then proceeds to step 104.

[0125] In step 104, the main processor 12 sends an image processing request to the shared memory 16, and the process proceeds to step 106. That is, the inter-OS communication module 18 on the main processor 12 side stores in the inter-OS communication command storage area 22 of the shared memory 16 an inter-OS communication command representing an image processing request corresponding to the specified job type.

[0126] In step 106, the main processor 12 determines whether the image processing is complete. This determination is made by determining whether the inter-OS communication module 18 on the main processor 12 side has received an interrupt notification from the inter-OS communication module 20 on the sub-processor 14 side indicating the completion of storage of the inter-OS communication command accompanying the completion of image processing, and whether it has received an inter-OS communication command indicating the completion of image processing from the shared memory 16. The process waits until the determination is affirmative, and then proceeds to step 108.

[0127] In step 108, the main processor 12 transmits a request to clear the memory map, and the process proceeds to step 110. That is, the inter-OS communication module 18 on the main processor 12 side stores an inter-OS communication command representing a request to clear the memory map in the inter-OS communication command storage area 22 of the shared memory 16.

[0128] In step 110, the main processor 12 determines whether clearing of the memory map is complete. This determination is made by determining whether the inter-OS communication module 18 on the main processor 12 side has received an interrupt notification from the inter-OS communication module on the sub-processor 14 side indicating the completion of storage of the inter-OS communication command accompanying the completion of clearing of the memory map, and has received the inter-OS communication command from the shared memory 16. The process waits until the determination is affirmative, and then proceeds to step 112.

[0129] In step 112, the main processor 12 determines whether or not there is a subsequent job. If the determination is affirmative, the process returns to step 100 and repeats the above-described processing. If the determination is negative, the process ends.

[0130] Next, a description will be given of specific processing performed by the sub-processor 14. Fig. 8 is a flowchart showing an example of the flow of specific processing performed by the sub-processor 14 of the information processing system 10 according to this embodiment. Note that the processing in Fig. 8 starts, for example, when an interrupt notification is received from the inter-OS communication module 18 on the main processor 12 side indicating that storage of a memory map setting request command has been completed.

[0131] In step 200, the sub-processor 14 determines whether or not it has received a memory map setting request. This determination is made by determining whether or not the inter-OS communication module 20 on the sub-processor 14 side has received a command from the shared memory 16 in response to an interrupt notification from the inter-OS communication module 18 on the main processor 12 side that the storage of the inter-OS communication command has been completed. The process waits until the determination is affirmative, and then proceeds to step 202.

[0132] In step 202, the sub-processor 14 sets the memory map to the type that meets the request, and then proceeds to step 204. That is, the memory management task 30 sets the memory map of the page memory 24 to the memory map of the type that meets the request.

[0133] In step 204, the sub-processor 14 determines whether the setting of the memory map is complete. This determination is made by determining whether the memory management task 30 has received a response indicating that the setting of the memory map is complete from the page memory 24. The process waits until the determination is affirmative, and then proceeds to step 206.

[0134] In step 206, the sub-processor 14 transmits memory setting completion information to the shared memory 16, and the process proceeds to step 208. That is, the memory management task 30 adds the memory map setting completion information to the packet data of the inter-OS communication command, transmits the inter-OS communication command to the inter-OS communication module 20 on the sub-processor 14 side, and the inter-OS communication module 20 stores the received inter-OS communication command in the shared memory 16.

[0135] In step 208, the sub-processor 14 determines whether or not there is an image processing request. This determination is made by determining whether or not an image processing request command has been stored from the inter-OS communication module 18 on the main processor 12 side to the inter-OS communication module 20 on the sub-processor 14 side via the shared memory 16. The process waits until the determination is affirmative, and then proceeds to step 210.

[0136] In step 210, the sub-processor 14 executes image processing, and the process proceeds to step 212. That is, the requested type of image processing task analyzes the packet data of the inter-OS communication command and then executes the requested type of image processing.

[0137] In step 212, the sub-processor 14 determines whether the image processing is complete. This determination is made by determining whether the requested type of image processing task has received a response indicating that the image processing is complete from the page memory 24. The process waits until the determination is affirmative, and then proceeds to step 214.

[0138] In step 214, the sub-processor 14 transmits image processing completion information to the shared memory 16, and the process proceeds to step 216. That is, the image processing task of the requested type adds the image processing completion information to the packet data of the inter-OS communication command, transmits the inter-OS communication command to the inter-OS communication module 20 on the sub-processor 14 side, and the inter-OS communication module 20 transmits the received inter-OS communication command to the shared memory 16.

[0139] In step 216, the sub-processor 14 determines whether or not it has received a memory map clear command. This determination is made by determining whether or not the inter-OS communication module 20 on the sub-processor 14 side has received a memory operation-related command from the shared memory 16 in response to an interrupt notification from the inter-OS communication module 18 on the main processor 12 side that the storage of the inter-OS communication command has been completed. The process waits until the determination is affirmative, and then proceeds to step 218.

[0140] In step 218, the sub-processor 14 checks the type of job to be executed next, and proceeds to step 220. In order to determine the area to be cleared in the memory map of the page memory 24, the memory management task 30 checks whether there is a job to be executed next from the job queue information 40 added to the packet data of the inter-OS communication command for the memory map clear request.

[0141] In step 220, the sub-processor 14 determines whether or not there is a subsequent job. This determination is made based on the confirmation result of step 218. If the determination is negative, the process proceeds to step 222, and if the determination is affirmative, the process proceeds to step 224.

[0142] In step 222, since there is no next job, the sub-processor 14 clears the entire memory map of the page memory 24 and proceeds to step 230.

[0143] Meanwhile, in step 224, the sub-processor 14 acquires area information that requires memory clearing, and proceeds to step 226. That is, the memory management task 30 refers to the predetermined memory map clear information 42 and determines the target area that requires clearing based on the type of the preceding job and the type of the subsequent job.

[0144] In step 226, the sub-processor 14 clears the target area of ​​the page memory 24 that requires memory clearing, and then proceeds to step 228. That is, the memory management task 30 clears the target area determined in step 224.

[0145] In step 228, the sub-processor 14 determines whether the clearing is complete. This determination is made by determining whether the memory management task 30 has received a response indicating that the memory clearing is complete from the page memory 24. If the determination is affirmative, the sub-processor 14 waits and ends the series of processes.

[0146] By performing processing in this manner, the sub-processor 14 switches the settings of the page memory 24 to the memory map of the subsequent process after executing the preceding process, and also performs processing to erase information from predetermined target areas from which information needs to be erased.

[0147] This erases only the information in the area that needs to be erased, so compared to erasing information each time the memory is released, the capacity of the page memory 24 can be reduced while suppressing performance degradation of the page memory 24. Also, execution errors in processes that require real-time performance can be suppressed. Also, erroneous output can be prevented while reducing the capacity of the installed page memory 24.

[0148] In the above embodiment, an example was described in which the sub-processor 14 performs processing specialized for image processing, but the processing performed by the sub-processor 14 is not limited to this, and other processing may also be performed.

[0149] In the above embodiment, the information processing system 10 is described as including the main processor 12 and the sub-processor 14, but the present invention is not limited to this. For example, the main processor 12 and the sub-processor 14 may be mounted on separate devices.

[0150] Furthermore, in the above embodiments, the term "processor" refers to a processor in a broad sense, and includes general-purpose processors (e.g., CPUs, etc.) and dedicated processors (e.g., GPU: Graphics Processing Unit, ASIC: Application Specific Integrated Circuit, FPGA: Field Programmable Gate Array, programmable logic device, etc.).

[0151] Furthermore, the operations of the processors in the above embodiments may not only be performed by a single processor, but may also be performed by multiple processors located at physically separate locations working together. Furthermore, the order of the operations of the processors is not limited to the order described in the above embodiments, and may be changed as appropriate.

[0152] Furthermore, the "system" in this embodiment may be configured by multiple devices, or may be configured by a single device that has some of the functions of multiple devices.

[0153] Furthermore, the processing performed by each unit of the information processing system 10 according to the above embodiment may be processing performed by software, processing performed by hardware, or a combination of both. Furthermore, the processing performed by each unit of the information processing system 10 may be stored as a program on a storage medium and distributed.

[0154] Furthermore, the present disclosure is not limited to the above, and it goes without saying that various modifications can be made without departing from the spirit of the present disclosure.

[0155] The following additional notes are provided regarding the above-described embodiments. (((1))) A processor and a memory in which a memory map for each type of processing to be executed is set, The processor: An information processing system that, after executing a process to be executed in advance, switches the memory settings to the memory map of the subsequent process and performs a process to erase information from a predetermined target area that needs to be erased.

[0156] (((2))) The information processing system described in (((1))) is characterized in that, when the subsequent processing is determined after the completion of the processing to be executed first, the processor erases a predetermined area as a target area depending on the type of the processing to be executed first and the type of the subsequent processing.

[0157] (((3))) The information processing system according to (((1))) or (((2))), wherein the processor erases the entire memory map of the memory as the target area when the subsequent processing has not been determined.

[0158] (((4))) The information processing system according to any one of (((1))) to (((3))), wherein the processor erases information by writing a predetermined value in the target area.

[0159] (((5))) The processor performs processing specialized for image processing, The image processing system further includes a main processor that requests the processor to execute the image processing, and a shared memory connected to the main processor and the processor, The information processing system according to any one of (((1))) to (((4))), wherein communication between a main processor and the processor is performed via the shared memory.

[0160] (((6))) On the computer, An information processing program for executing a process that, after executing a process to be executed first, switches the memory setting in which a memory map for each type of process to be executed is set to the memory map for the subsequent process, and erases information from a predetermined target area from which information needs to be erased.

[0161] According to ((1)), in an information processing device that switches memory maps for each type of processing to be executed, it is possible to provide an information processing device that can prevent erroneous output when performing subsequent processing.

[0162] According to (((2))), when there is subsequent processing, information can be erased only from the target area where information needs to be erased.

[0163] According to (((3))), erroneous output can be prevented no matter what kind of processing is performed later.

[0164] According to (((4))), the information in the target area can be erased.

[0165] According to (((5))), it is possible to reduce the memory capacity and suppress deterioration of the memory used for image processing, compared to when information is deleted each time the memory is released.

[0166] According to (((6))), in an information processing device that switches memory maps for each type of processing to be executed, an information processing program that can prevent erroneous output when performing subsequent processing can be provided. [Explanation of symbols]

[0167] 10 Information Processing Systems 12 Main Processor 14 Subprocessors 16 Shared Memory 18, 20 Inter-OS communication module 22 Inter-OS communication command storage area 24 page memory 30 Memory Management Tasks 32 Print Image Processing Task 34 Scan Image Processing Task 40 Job Queue Information 42 Memory map clear information

Claims

1. A processor and a memory in which a memory map for each type of processing to be executed is set, The processor: An information processing system that, after executing a process to be executed in advance, switches the memory settings to the memory map of the subsequent process and performs a process to erase information from a predetermined target area that needs to be erased.

2. The information processing system according to claim 1, wherein when the subsequent processing is determined after the completion of the processing to be executed first, the processor erases a predetermined area as a target area depending on the type of the processing to be executed first and the type of the subsequent processing.

3. The information processing system according to claim 1 , wherein the processor erases the entire area of ​​the memory map of the memory as the target area when the subsequent processing has not been determined.

4. The information processing system according to claim 1 , wherein the processor erases information by writing a predetermined value to the target area.

5. The processor performs processing specialized for image processing, The image processing system further includes a main processor that requests the processor to execute the image processing, and a shared memory connected to the main processor and the processor, 2. The information processing system according to claim 1, wherein communication between a main processor and said processors is performed via said shared memory.

6. On the computer, An information processing program for executing a process that, after executing a process to be executed first, switches the memory setting in which a memory map for each type of process to be executed is set to the memory map for the subsequent process, and erases information from a predetermined target area from which information needs to be erased.

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