Display device

Abstract

As the definition of a display device is increased, the number of pixels, the number of gate lines, and the number of signal lines are increased. When the number of gate lines and signal lines is increased, it is difficult to mount an IC chip including a driver circuit for driving the gate lines and the signal lines by bonding or the like, which causes a problem of an increase in manufacturing cost.SOLUTION: A pixel portion and a driving circuit for driving the pixel portion are provided over the same substrate, and at least a part of the driving circuit is formed using an inverted staggered thin film transistor in which a channel protective layer is provided over an oxide semiconductor layer serving as a channel formation region overlapping with a gate electrode layer. Manufacturing cost is reduced by providing a driver circuit in addition to a pixel portion over the same substrate.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present invention relates to a display device using an oxide semiconductor and a manufacturing method thereof. [Background technology]

[0002] As typified by liquid crystal display devices, thin film transistors formed on flat plates such as glass substrates are , amorphous silicon, and polycrystalline silicon. Thin film transistors using silicon have low field effect mobility, but are suitable for enlarging the area of ​​glass substrates. On the other hand, thin film transistors using crystalline silicon have high field effect mobility. However, a crystallization process such as laser annealing is required, and enlarging the glass substrate is essential. However, it has the characteristic of not being adaptable.

[0003] In response to this, thin film transistors are being fabricated using oxide semiconductors, and they are being used in electronic devices and optical devices. For example, zinc oxide and In-G Thin film transistors were fabricated using a-Zn-O oxide semiconductors and used as switches for image display devices. Patent Documents 1 and 2 disclose techniques used in chip elements and the like. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Japanese Patent Application Laid-Open No. 2007-123861 [Patent Document 2] Japanese Patent Application Laid-Open No. 2007-96055 Summary of the Invention [Problem to be solved by the invention]

[0005] Thin film transistors with a channel formation region in an oxide semiconductor are made of amorphous silicon. The oxide semiconductor film has a higher field effect mobility than the thin film transistors used in the previous study. Film formation is possible at temperatures below 300°C using methods such as sputtering, and polycrystalline silicon The manufacturing process is simpler than that of thin film transistors using SiO2.

[0006] Using such oxide semiconductors, thin film transistors can be formed on glass substrates, plastic substrates, etc. and then used in liquid crystal displays, electroluminescent displays, electronic paper, etc. Applications are expected.

[0007] As the resolution of display devices increases, the number of pixels increases, and the number of gate lines and signal lines also increases. As the number of wires and signal lines increases, the number of IC chips with drive circuits to drive them increases. This makes it difficult to mount the chip by bonding, etc., which increases manufacturing costs. There is a problem.

[0008] In addition, in order to achieve high-speed driving in the drive circuit, the contact resistance between the wiring connecting the elements is reduced. For example, if the contact resistance between the gate wiring and the upper wiring is high, The input signal may be distorted.

[0009] In addition, the number of contact holes can be reduced, and the area occupied by the driving circuit can be reduced. Providing a structure is also one of the objectives. [Means for solving the problem]

[0010] A pixel portion and a driver circuit for driving the pixel portion are provided on the same substrate, and at least a part of the driver circuit is provided. The circuit is formed by using an oxide semiconductor and by forming a channel on an oxide semiconductor layer overlapping with a gate electrode layer. It is composed of an inverted staggered thin film transistor with a protective layer. Furthermore, the provision of a drive circuit reduces manufacturing costs.

[0011] The oxide semiconductor used in this specification is InMO3(ZnO) m Thin (m>0) A thin film is formed, and a thin film transistor is fabricated using the thin film as the semiconductor layer. , gallium (Ga), iron (Fe), nickel (Ni), manganese (Mn) and cobalt ( Co) represents one or more metal elements selected from the group consisting of Ga and Co. In addition, there are cases where the above metal elements other than Ga are included, such as Ga and Ni or Ga and Fe. In addition, in the oxide semiconductor, there may be impurities other than the metal element contained as M. Contains Fe, Ni or other transition metal elements, or oxides of said transition metals as the solid element. In this specification, this thin film is also called an In-Ga-Zn-O based non-single crystal film. .

[0012] Inductively Coupled Plasma Mass Spectrometry Representative measurement examples using ICP-MS (Inductively Coupled Plasma Mass Spectrometry) The results are shown in Table 1. The sputtering method was performed with an argon gas flow rate of 40 sccm. The oxide semiconductor film obtained under the condition 1 is InGa 0.95 Zn 0.41 O 3.33 Yes In addition, the sputtering method was performed under the conditions of argon gas flow rate of 10 sccm and oxygen flow rate of 5 sccm. The oxide semiconductor film obtained in Example 2 is InGa 0.94 Zn 0.40 O 3.31is.

[0013] [Table 1]

[0014] The measurement method was Rutherford Backscattering Analysis. The results were quantified using RBS analysis. Shown in Table 2.

[0015] [Table 2]

[0016] The sample under condition 1 was measured by RBS analysis, and the oxide semiconductor film was found to be InGa 0.93 Zn0 .44 O 3.49 In addition, the sample under condition 2 was measured by RBS analysis, and it was found that the oxide semiconductor The body membrane is InGa 0.92 Zn 0.45 O 3.86 is.

[0017] The crystalline structure of the In-Ga-Zn-O non-single crystal film is formed by sputtering and then heated at 200°C This is done at 500°C, typically 300-400°C for 10-100 minutes, so amorphous The structure of the thin film transistor is observed by XRD (X-ray diffraction). At a gate voltage of ±20V, the on / off ratio was 10 9 Above, create a mobility of 10 or more. It can be manufactured.

[0018] It is useful to use a thin film transistor having such electrical characteristics in a driving circuit. For example, the gate line driving circuit includes a shift register circuit that sequentially transfers gate signals and a buffer circuit. The source line driver circuit is composed of a shift register circuit that transfers gate signals sequentially. A circuit, a buffer circuit, and an analog switch that switches on and off the transfer of the video signal to the pixel. It has higher mobility than TFTs that use amorphous silicon. The TFT using the oxide semiconductor film can drive the shift register circuit at high speed. .

[0019] In addition, at least a part of the driving circuit for driving the pixel section is made of a thin film transistor using an oxide semiconductor. When configured with transistors, all are formed with n-channel TFTs, and the circuit shown in Figure 1(B) In the drive circuit, the gate electrode and the source wiring, or By directly connecting the drain wiring, good contact can be obtained. In the driving circuit, the resistance can be reduced. When connecting the internal wiring via another conductive film, for example, a transparent conductive film, the number of contact holes Increase in the number of contact holes, increase in the occupied area, or contact resistance and wiring resistance This may result in an increase in resistance and further complicate the process.

[0020] One embodiment of the configuration of the invention disclosed in this specification includes a pixel portion and a driver circuit. at least a first oxide semiconductor layer, and a first channel protection layer in contact with the first oxide semiconductor layer; and a driving circuit includes a first thin film transistor having at least a second oxide semiconductor layer. and a second thin-film transistor having a second channel protection layer in contact with the second oxide semiconductor layer. a third oxide semiconductor layer, and a third channel protection layer in contact with the third oxide semiconductor layer. and a third thin film transistor having a second oxide semiconductor layer. The wiring directly contacting the gate electrode of the second thin film transistor provided below is formed on the third oxide film. the third oxide semiconductor layer is electrically connected to the third oxide semiconductor layer; This is the source wiring or drain wiring of a thin film transistor.

[0021] One aspect of the present invention solves at least one of the above problems.

[0022] In addition, in a thin film transistor used in one embodiment of the present invention, a source wiring and a channel formation region Between the oxide semiconductor layers (the third oxide semiconductor layers in the above structure) that become the drain wiring The oxide semiconductor layer that becomes the line and the channel formation region (the third oxide semiconductor layer in the above structure) ) between the first and second oxide semiconductor layers, the first oxide semiconductor layer and the second oxide semiconductor layer are formed to be thinner than the first oxide semiconductor layer and have a conductive property similar to that of the third oxide semiconductor layer. A fourth oxide semiconductor layer having a higher electrical conductivity than the first oxide semiconductor layer may be included.

[0023] The fourth oxide semiconductor layer exhibits n-type conductivity and functions as a source region and a drain region. do.

[0024] The third oxide semiconductor layer has an amorphous structure, and the fourth oxide semiconductor layer has an amorphous structure. The crystal grains (nanocrystals) in the fourth oxide semiconductor layer may be included. Nanocrystals have a diameter of 1 nm to 10 nm, typically about 2 nm to 4 nm.

[0025] In addition, a fourth oxide semiconductor layer functioning as a source region and a drain region (n+ layer) In-Ga-Zn-O based non-single crystal films can be used. n is replaced with tungsten, molybdenum, titanium, nickel, or aluminum. It may be replaced.

[0026] A first thin film transistor, a second thin film transistor, and a third thin film transistor included in the display device A first channel protection layer, a second channel protection layer, and a third channel protection layer are formed on the transistor. The channel protection layer may have an insulating layer in contact with the channel protection layer.

[0027] In addition, thin film transistors are easily damaged by static electricity, so the gate line or source It is preferable to provide a protection circuit for protecting the driver circuit on the same substrate as the line. is preferably configured using a nonlinear element using an oxide semiconductor.

[0028] The ordinal numbers such as 1st and 2nd are used for convenience and do not indicate the order of processes or stacking. Furthermore, the specific names used in this specification are not intended to identify the invention. This does not indicate

[0029] In addition to liquid crystal display devices, display devices having a driving circuit include light-emitting devices using light-emitting elements. display devices, and display devices that use electrophoretic display elements and are also called electronic paper. .

[0030] In a light-emitting display device using a light-emitting element, a plurality of thin film transistors are provided in a pixel portion, and a pixel In the element part, the gate electrode of a thin film transistor and the source wiring of another transistor, The light-emitting element has a portion where the drain wiring is directly connected. In the drive circuit of the device, the gate electrode of the thin film transistor and the The source wiring or the drain wiring is directly connected to the gate electrode.

[0031] In this specification, a semiconductor device is a device that can function by utilizing semiconductor characteristics. Generally, electro-optical devices, semiconductor circuits, and electronic devices are all semiconductor devices. [Effects of the Invention]

[0032] The gate line driver circuit or source line driver circuit is formed by thin film transistors using oxide semiconductors. By forming a thin film transistor using a driving circuit, the manufacturing cost can be reduced. By directly connecting the gate electrode and the source wiring or the drain wiring, a contact hole is formed. Therefore, it is possible to provide a display device in which the number of driving circuits can be reduced and the area occupied by the driving circuits can be reduced.

[0033] Therefore, according to one embodiment of the present invention, a display device having high electrical characteristics and high reliability can be provided at low cost. It is possible. [Brief explanation of the drawings]

[0034] [Figure 1] 1A to 1C illustrate a semiconductor device. [Figure 2] 1A to 1C illustrate a semiconductor device. [Figure 3] 1A to 1C illustrate a method for manufacturing a semiconductor device. [Figure 4] 1A to 1C illustrate a method for manufacturing a semiconductor device. [Figure 5] 1A to 1C illustrate a method for manufacturing a semiconductor device. [Figure 6] 1A to 1C illustrate a method for manufacturing a semiconductor device. [Figure 7] 1A to 1C illustrate a method for manufacturing a semiconductor device. [Figure 8] 1A to 1C illustrate a method for manufacturing a semiconductor device. [Figure 9] 1A to 1C illustrate a method for manufacturing a semiconductor device. [Figure 10] 1A to 1C illustrate a semiconductor device. [Figure 11] 1A to 1C illustrate a semiconductor device. [Figure 12] 1A to 1C illustrate a semiconductor device. [Figure 13]1A to 1C illustrate a semiconductor device. [Figure 14] FIG. 1 is a block diagram illustrating a semiconductor device. [Figure 15] FIG. 2 illustrates a configuration of a signal line driver circuit. [Figure 16] 4 is a timing chart illustrating the operation of the signal line driver circuit. [Figure 17] 4 is a timing chart illustrating the operation of the signal line driver circuit. [Figure 18] FIG. 2 is a diagram illustrating the configuration of a shift register. [Figure 19] FIG. 19 is a diagram for explaining the connection configuration of the flip-flop shown in FIG. 18. [Figure 20] 1A and 1B are diagrams illustrating pixel equivalent circuits of a semiconductor device. [Figure 21] 1A to 1C illustrate a semiconductor device. [Figure 22] 1A to 1C illustrate a semiconductor device. [Figure 23] 1A to 1C illustrate a semiconductor device. [Figure 24] 1A to 1C illustrate a semiconductor device. [Figure 25] 1A and 1B are diagrams illustrating examples of usage of electronic paper. [Figure 26] FIG. 1 is an external view showing an example of an electronic book. [Figure 27] FIG. 1 is an external view showing an example of a television device and a digital photo frame. [Figure 28] FIG. 1 is an external view showing an example of a gaming machine. [Figure 29] FIG. 1 is an external view showing an example of a mobile phone. [Figure 30] 1A to 1C illustrate a semiconductor device. DETAILED DESCRIPTION OF THE INVENTION

[0035] The embodiments will be described in detail with reference to the drawings. However, the present invention is not limited to the following description. The present invention is not limited to the above embodiments, and various changes and modifications may be made in the form and details thereof without departing from the spirit and scope of the present invention. It will be readily understood by those skilled in the art that the present invention can be achieved by the following embodiments. The present invention is not limited to the following description. In the structure, the same parts or parts having similar functions are designated by the same reference numerals in different drawings. and the repeated explanation will be omitted.

[0036] (Embodiment 1) Here, we will show an example of configuring an inverter circuit using two n-channel thin film transistors. One embodiment of the present invention will be described below based on the above.

[0037] The driver circuit for driving the pixel section is composed of an inverter circuit, a capacitor, a resistor, etc. When two n-channel TFTs are combined to form an inverter circuit, When forming a combination of a ment type transistor and a depletion type transistor ( EDMOS circuit) and enhancement-type TFTs (hereinafter referred to as In addition, when the threshold voltage of the n-channel TFT is positive, is defined as an enhancement type transistor, and the threshold voltage of the n-channel TFT is negative. In this case, the transistor is defined as a depletion-type transistor, and this definition is followed throughout the specification. Let's say.

[0038] The pixel section and the driver circuit are formed on the same substrate, and the pixel section is arranged in a matrix. An enhancement-type transistor is used to switch the voltage applied to the pixel electrode on and off. The enhancement type transistor disposed in this pixel portion uses an oxide semiconductor. The electrical characteristics are as follows: the on-off ratio is 10 at a gate voltage of ±20V. 9 Because that's all, The leakage current is small, and low power consumption driving can be achieved.

[0039] The cross-sectional structure of the inverter circuit of the driver circuit is shown in FIG. The transistor 430 and the second thin film transistor 431 are inverted transistors having a channel protection layer. The transistor is a thin film transistor with wiring on the semiconductor layer via the source region or the drain region. 1 is an example of a thin film transistor provided.

[0040] In FIG. 1A, a first gate electrode 401 and a second gate electrode 402 are formed on a substrate 400. The first gate electrode 401 and the second gate electrode 402 are made of molybdenum. , titanium, chromium, tantalum, tungsten, aluminum, copper, neodymium, scandium It is formed by using a metal material such as aluminum or an alloy material containing these as the main component, in a single layer or in a laminated form. It is possible.

[0041] For example, the two-layer laminate structure of the first gate electrode 401 and the second gate electrode 402 is , a two-layer laminate structure in which a molybdenum layer is laminated on an aluminum layer, or a molybdenum layer on a copper layer Two-layer structure with a copper layer and a titanium nitride layer or a tantalum nitride layer on a copper layer. A two-layer structure in which a titanium nitride layer and a molybdenum layer are laminated is preferable. The three-layer structure is composed of a tungsten layer or tungsten nitride layer, an aluminum layer, and a silicon layer. A titanium nitride or titanium layer is laminated on a silicon alloy or an aluminum-titanium alloy. It is preferable to use a laminate in this manner.

[0042] Also, on the gate insulating layer 403 covering the first gate electrode 401 and the second gate electrode 402 A first oxide semiconductor layer 405 and a second oxide semiconductor layer 407 are provided.

[0043] A first channel protection layer is formed on the first oxide semiconductor layer 405 overlapping the first gate electrode 401. The second oxide semiconductor layer 407 is provided on the second gate electrode 402. A second channel protection layer 419 is provided in contact with the first channel protection layer 419 .

[0044] A first channel protective layer 418 is provided over a channel formation region of the first oxide semiconductor layer 405. A second channel protective layer 419 is provided over a channel formation region of the second oxide semiconductor layer 407. Since the first oxide semiconductor layer 405 and the second oxide semiconductor layer 407 are formed in the same structure, Damage to the channel formation area during processing (plasma during etching and etching Therefore, the first thin film transistor 43 can be prevented from being thinned by the adhesive. 0. The reliability of the second thin film transistor 431 can be improved.

[0045] A first wiring 409 and a second wiring 410 are provided over the first oxide semiconductor layer 405. The wiring 410 is connected to the second gate electrode 401 via a contact hole 404 formed in the gate insulating layer 403. The second oxide semiconductor layer 407 is directly connected to the gate electrode 402. Set 11.

[0046] The first thin film transistor 430 includes a first gate electrode 401 and a gate insulating layer 403 interposed therebetween. and a first oxide semiconductor layer 405 overlapping the first gate electrode 401. 09 is the power supply line of the ground potential (ground power supply line). This power supply line of the ground potential is connected to a negative voltage V It may also be a power supply line (negative power supply line) to which DL is applied.

[0047] The second thin film transistor 431 includes a second gate electrode 402 and a gate insulating layer 40 a second oxide semiconductor layer 407 overlapping with the second gate electrode 402 via the third gate electrode 403; The wiring 411 is a power supply line (positive power supply line) to which a positive voltage VDD is applied.

[0048] In addition, between the first oxide semiconductor layer 405 and the first wiring 409, n + providing a layer 406a; Between the first oxide semiconductor layer 405 and the second wiring 410, n + A layer 406b is provided. Between the second oxide semiconductor layer 407 and the second wiring 410, + A second layer 408a is provided. Between the oxide semiconductor layer 407 and the third wiring 411, n + A layer 408b is provided.

[0049] In this embodiment, n + layers 406a, 406 b, 408a, and 408b are In-Ga-Zn-O based non-single crystal films, and the first oxide semiconductor The conductive layer 405 and the second oxide semiconductor layer 407 are formed under different film formation conditions. For example, the oxide semiconductor layer formed by sputtering with argon as shown in Table 1 above has a lower resistance. The n oxide semiconductor film formed under condition 1 with a gas flow rate of 40 sccm + layer 406 a, 406b, 408a, and 408b have n-type conductivity and activation energy (ΔE In this embodiment, n + layer 406a, 406b, 408a, and 408b are In-Ga-Zn-O based non-single crystal films, and at least It is assumed that amorphous components are also included. + Layers 406a, 406b, 408a, 4 O8b may contain crystalline grains (nanocrystals) in its amorphous structure. + layer 40 The crystal grains (nanocrystals) in 6a, 406b, 408a, and 408b have diameters of 1 nm to 10 nm, typically about 2 nm to 4 nm.

[0050] n + By providing layers 406a, 406b, 408a, and 408b, the first metal layer The wiring 409, the second wiring 410, the third wiring 411, the first oxide semiconductor layer 405, the second The oxide semiconductor layer 407 has a good junction and is thermally stable compared to a Schottky junction. Also, the carrier of the channel is supplied (source side), or the channel The drain side must absorb the carriers stably, or must not create a resistance component at the interface with the wiring. In order to + It is effective to provide a high drain layer. It is possible to maintain good mobility even at high voltages.

[0051] As shown in FIG. 1A, the first oxide semiconductor layer 405 and the second oxide semiconductor layer 407 The second wiring 410 electrically connecting both of them is formed on the gate insulating layer 403. The second gate electrode 402 of the second thin film transistor 431 is directly connected to the second gate electrode 402 through a hole 404. By connecting directly, good contact can be obtained and contact resistance can be reduced. The second gate electrode 402 and the second wiring 410 can be formed by other conductive films, for example, Compared to connecting via a transparent conductive film, the number of contact holes can be reduced and The occupied area can be reduced by reducing the number of rules.

[0052] FIG. 1C shows a plan view of the inverter circuit of the driver circuit. The cross section taken along line Z1-Z2 corresponds to FIG. 1(A).

[0053] The equivalent circuit of the EDMOS circuit is shown in Figure 1(B). The wiring corresponds to FIG. 1B, and the first thin film transistor 430 is an enhancement type. The second thin film transistor 431 is an n-channel transistor, and the second thin film transistor 432 is a depletion type n This is an example of a channel type transistor.

[0054] Enhancement type n-channel transistor and depletion type n-channel transistor are mounted on the same substrate. The method for manufacturing the first-channel transistor is, for example, The oxide semiconductor layer 407 is formed using a material different from that of the oxide semiconductor layer 404 and under different deposition conditions. The threshold voltage is controlled by providing gate electrodes above and below the semiconductor layer, and one TFT is normally Apply a voltage to the gate electrode so that one TFT is turned on, and apply a voltage to the gate electrode so that the other TFT is normally off. An EDMOS circuit may be configured in this manner.

[0055] (Embodiment 2) In the first embodiment, an example of an EDMOS circuit is shown, but in this embodiment, an example of an EEMOS circuit is shown. The equivalent circuit is shown in Figure 2(A). In the equivalent circuit of Figure 2(A), both The driving circuit uses a combination of a gate-type n-channel transistor and a gate-type n-channel transistor.

[0056] Both can be fabricated using the same enhancement-type n-channel transistor. The use of the circuit configuration of FIG. 2A for the driver circuit allows the transistors used in the pixel portion to be the same. Since the same enhancement type n-channel transistor is used, the manufacturing process does not increase, which is preferable. In addition, a plan view is shown in FIG. 2(B). In FIG. 2(B), the dashed line Y1-Y2 The cross section cut at corresponds to FIG. 3(C).

[0057] The first thin film transistor 460 and the second thin film transistor 461 shown in FIG. It is an inverted staggered thin film transistor having a channel protection layer, and a source region or This is an example of a thin film transistor in which wiring is provided via the drain region.

[0058] An example of a manufacturing process of an inverter circuit is shown in FIGS. 3A, 3B, and 3C. vinegar.

[0059] A first conductive film is formed on a substrate 440 by sputtering, and a first photomask is used. The first conductive film is selectively etched to form the first gate electrode 441 and the second gate electrode 442. Next, the first gate electrode 441 and the second gate electrode 442 are formed. The gate insulating layer 443 is formed by plasma CVD or sputtering. The edge layer 443 is formed by depositing a silicon oxide layer, a silicon nitride layer, or the like by using a CVD method or a sputtering method. A silicon nitride layer, a silicon oxynitride layer, or a silicon nitride oxide layer can be formed as a single layer or a stacked layer. The gate insulating layer 443 can be formed by oxidizing a silicon dioxide film by a CVD method using organic silane gas. It is also possible to form a silicon layer. The organic silane gas is ethyl silicate (TEO S: Chemical formula Si(OC2H5)4), tetramethylsilane (TMS: Chemical formula Si(CH3 )4), tetramethylcyclotetrasiloxane (TMCTS), octamethylcyclotetrasiloxane Siloxane (OMCTS), hexamethyldisilazane (HMDS), triethoxysilane silane (SiH(OC2H5)3), trisdimethylaminosilane (SiH(N(CH3)2 Silicon-containing compounds such as )3) can be used.

[0060] Then, the gate insulating layer 443 is selectively etched using a second photomask to form a second A contact hole 444 is formed that reaches the gate electrode 442. The plan view corresponds to Figure 3(A).

[0061] Next, an oxide semiconductor film is formed by sputtering, and a first channel protection film is formed thereon. The first channel protection layer 458 and the second channel protection layer 459 are formed. The channel protective layer 459 is formed by forming an insulating layer over the oxide semiconductor film and then forming a third photomask. The film is formed by selectively etching the film.

[0062] Before forming the oxide semiconductor film by a sputtering method, argon gas was introduced to form a plasma. A reverse sputtering process is performed to generate a ferrite layer, and the surface of the gate insulating layer 443 and the contact hole 44 It is preferable to remove any dust adhering to the bottom surface of the target 4. The substrate was heated by applying a voltage to the substrate side using an RF power supply in an argon atmosphere without applying a voltage to the substrate. This is a method of modifying the surface by forming plasma in the atmosphere. Helium may also be used. In addition, oxygen, hydrogen, N2O, etc. may be added to the argon atmosphere. It can also be carried out in an argon atmosphere to which Cl2, CF4, etc. have been added. It is also possible.

[0063] Next, the oxide semiconductor film, the first channel protection layer 458, and the second channel protection layer 45 9 on n + A layer is deposited.

[0064] Next, a fourth photomask is used to selectively remove the oxide semiconductor film and the n + Etching of layers The first oxide semiconductor layer 445 and the second oxide semiconductor layer 447 are formed. A second conductive film is formed by sputtering, and a fifth photomask is used to selectively The conductive film is etched to form a first wiring 449, a second wiring 450, and a third wiring 451. The third wiring 451 is connected to the second gate electrode 442 through the contact hole 444. Before forming the second conductive film by sputtering, argon gas was introduced. The surface of the gate insulating layer 443, n + Layer surface It is preferable to remove dust adhering to the bottom surface of the contact hole 444. Sputtering is a process in which an RF power source is applied to the substrate side in an argon atmosphere without applying voltage to the target side. This is a method of applying a voltage using a laser to generate plasma on the substrate and modify the surface. Instead of the argon atmosphere, nitrogen, helium, etc. may be used. It may be performed in an atmosphere containing Cl2, C, or N2O. This may be done in an atmosphere where F4 or the like has been added.

[0065] When etching the second conductive film, n + Etch part of the layer to form n + Layers 446a, 446b, 448a, and 448b are formed. Thus, the first thin film transistor 460 and the second thin film transistor 461 are completed. The cross section at this stage corresponds to FIG. 3(B).

[0066] Next, a heat treatment is carried out at 200°C to 600°C in an air atmosphere or a nitrogen atmosphere. The timing of this heat treatment is not limited, and it can be performed at any time after the formation of the oxide semiconductor film. That's fine.

[0067] Next, a protective layer 452 is formed, and the protective layer 452 is selectively etched using a sixth photomask. After etching to form contact holes, a third conductive film is formed. The third conductive film is selectively etched using a photomask to electrically connect it to the second wiring 410. A connecting wiring 453 is formed to connect the layers. The cross-sectional view at this stage corresponds to FIG.

[0068] In a light-emitting display device using a light-emitting element, a plurality of thin film transistors are provided in a pixel portion, and a pixel Even in the elemental part, the gate electrode of one thin film transistor and the source of another transistor It has contact holes for direct connection to wiring or drain wiring. The contact portion is formed by forming a contact hole in the gate insulating film using a second photomask. The same mask can be used when forming the semiconductor layer.

[0069] In addition, in LCD displays and electronic paper, the wiring board is used to connect to external terminals such as FPCs. When forming a contact hole that reaches the gate wiring in the terminal portion, a second photomask When forming contact holes in the gate insulating film using a mask, the same mask is used. It is possible.

[0070] The above-described process sequence is an example and is not particularly limited. Although the number of sheets increases, the photomask for etching the second conductive film and the + Etching part of the layer Alternatively, etching may be performed using separate photomasks.

[0071] (Embodiment 3) In this embodiment mode, an inverter circuit is manufactured using a manufacturing process different from that in Embodiment Mode 2. An example will be described with reference to FIGS. 4(A), 4(B), 4(C), and 4(D).

[0072] A first conductive film is formed on a substrate 440 by sputtering, and a first photomask is used. The first conductive film is selectively etched to form the first gate electrode 441 and the second gate electrode 442. Next, the first gate electrode 441 and the second gate electrode 442 are formed. A gate insulating layer 443 is formed by plasma CVD or sputtering.

[0073] Next, an oxide semiconductor film is formed by sputtering, and a first channel protection film is formed thereon. The first channel protection layer 458 and the second channel protection layer 459 are formed. The channel protective layer 459 is formed by forming an insulating layer over the oxide semiconductor film and then forming a second photomask. The film is formed by selectively etching the film.

[0074] Next, the oxide semiconductor film, the first channel protection layer 458, and the second channel protection layer 45 9 on n + A layer is deposited.

[0075] Then, the oxide semiconductor film and the n + Etching of layers The first oxide semiconductor layer 445, the second oxide semiconductor layer 447, and the n + layer 455, 4 In this way, a first gate electrode 441 and a gate insulating layer 443 are overlapped with each other. The first oxide semiconductor layer 445, the first channel protection layer 458, and the n + Layer 455 is formed and a second oxide semiconductor layer overlapping the second gate electrode 442 with the gate insulating layer 443 interposed therebetween. layer 447, a second channel protection layer 459, and + Layer 457 is formed. The cross-sectional view at the floor level corresponds to Figure 4(A).

[0076] Next, the gate insulating layer 443 is selectively etched using a fourth photomask to form a second A contact hole 444 is formed that reaches the gate electrode 442. The plan view corresponds to Figure 4(B).

[0077] Next, a second conductive film is formed by sputtering, and a fifth photomask is used to selectively The second conductive film is etched to form a first wiring 449, a second wiring 450, and a third wiring 45 Before forming the second conductive film by sputtering, argon gas is introduced. The surface of the gate insulating layer 443, n + layer 45 5, 457 and the bottom of the contact hole 444. Inverse sputtering is a method in which a target is sputtered in an argon atmosphere without applying a voltage to the target. A method of modifying the surface by applying voltage to the substrate using an RF power supply to generate plasma on the substrate. In place of the argon atmosphere, nitrogen, helium, etc. may be used. It may be performed in an argon atmosphere to which oxygen, hydrogen, N2O, etc. have been added. The treatment may be carried out in an atmosphere containing Cl2, CF4, etc.

[0078] In the process of this embodiment, after the contact hole 444 is formed, other films are formed. Therefore, the second conductive film can be formed without using a contact hole, which is less than that in the second embodiment. Since the bottom surface of the gate electrode is exposed in fewer processes, the freedom of material selection for the gate electrode is increased. In the second embodiment, the contact hole 444 is connected to the gate electrode surface exposed by the contact hole 444. Since the oxide semiconductor film is formed by etching the oxide semiconductor film, the gate electrode It is necessary to select etching conditions or gate electrode materials that do not etch the material. .

[0079] When etching the second conductive film, n + Etching part of the layer to remove the n + layer 446a, 446b, 448a, and 448b are formed. When this etching is completed, A first thin film transistor 460 and a second thin film transistor 461 are completed.

[0080] The first thin film transistor 460 includes a first gate electrode 441 and a gate insulating layer 443 . and a first oxide semiconductor layer 445 overlapping the first gate electrode 441. 49 is a power supply line of the ground potential (ground power supply line). This power supply line of the ground potential is connected to a negative voltage V It may also be a power supply line (negative power supply line) to which DL is applied.

[0081] The second thin film transistor 461 includes a second gate electrode 442 and a gate insulating layer 44 a second oxide semiconductor layer 447 overlapping with the second gate electrode 442 via the third The wiring 451 is a power supply line (positive power supply line) to which a positive voltage VDD is applied.

[0082] In addition, between the first oxide semiconductor layer 445 and the first wiring 449, n + providing a layer 446a; Between the first oxide semiconductor layer 445 and the second wiring 450, n + A layer 446b is provided. , and n is provided between the second oxide semiconductor layer 447 and the second wiring 450. + layer 448a, and a second Between the oxide semiconductor layer 447 and the third wiring 451, n + Layer 448b is provided.

[0083] The cross section at this stage corresponds to FIG. 4(C).

[0084] Next, a heat treatment is carried out at 200°C to 600°C in an air atmosphere or a nitrogen atmosphere. The timing of this heat treatment is not limited, and it can be performed at any time after the formation of the oxide semiconductor film. That's fine.

[0085] Next, a protective layer 452 is formed, and the protective layer 452 is selectively etched using a sixth photomask. After etching to form contact holes, a third conductive film is formed. The third conductive film is selectively etched using a photomask to electrically connect to the second wiring 450. A connecting wiring 453 is formed to connect the layers. The cross-sectional view at this stage corresponds to FIG.

[0086] In a light-emitting display device using a light-emitting element, a plurality of thin film transistors are provided in a pixel portion, and a pixel In the element part, the gate electrode of a thin film transistor and the source wiring of another transistor, The contact hole is for direct connection to the drain wiring. The contact portion is formed at the same time when a contact hole is formed in the gate insulating film using the fourth photomask. The same mask can be used to form the film.

[0087] In addition, in LCD displays and electronic paper, the wiring board is used to connect to external terminals such as FPCs. When forming a contact hole that reaches the gate wiring in the terminal portion, a fourth photomask When forming contact holes in the gate insulating film using a mask, the same mask is used. It is possible.

[0088] The above-described process sequence is an example and is not particularly limited. Although the number of sheets increases, the photomask for etching the second conductive film and the + Etching part of the layer Alternatively, etching may be performed using separate photomasks.

[0089] (Fourth embodiment) In this embodiment, a manufacturing process of a display device including a thin film transistor according to one embodiment of the present invention will be described. This will be explained with reference to FIGS. 5 to 12.

[0090] In FIG. 5(A), a light-transmitting substrate 100 is made of barium borosilicate glass or aluminum. A glass substrate such as borosilicate glass can be used.

[0091] Next, a conductive layer is formed on the entire surface of the substrate 100, and then a first photolithography process is performed. A resist mask is formed, and unnecessary portions are removed by etching to form wiring and electrodes (gate The gate wiring including the gate electrode layer 101, the capacitance wiring 108, and the first terminal 121 are formed. At this time, the edge is formed so that at least the end of the gate electrode layer 101 has a tapered shape. The cross section at this stage is shown in Figure 5(A). Equivalent to 7.

[0092] The gate wiring including the gate electrode layer 101, the capacitance wiring 108, and the first terminal 121 of the terminal portion are It is desirable to form it from a low-resistance conductive material such as aluminum (Al) or copper (Cu), However, since aluminum itself has problems such as poor heat resistance and susceptibility to corrosion, a heat-resistant conductive material The heat-resistant conductive material is titanium (Ti), tantalum (Ta ), tungsten (W), molybdenum (Mo), chromium (Cr), Nd (neodymium), An element selected from the group consisting of Sc, or an alloy containing the above elements, or The alloy is formed from a combination of the above elements, or a nitride containing the above elements as components.

[0093] Next, a gate insulating layer 102 is formed on the entire surface of the gate electrode layer 101. The film thickness of 02 is set to 50 to 250 nm using a sputtering method or the like.

[0094] For example, a silicon oxide film is used as the gate insulating layer 102 by sputtering, and the thickness is 100 nm. Of course, the gate insulating layer 102 is not limited to such a silicon oxide film. Silicon oxide nitride film, silicon nitride film, aluminum oxide film, tantalum oxide film, It may be formed as a single layer or a laminated structure made of these materials using other insulating films such as a film. good.

[0095] Before the oxide semiconductor film is formed, a reverse process in which argon gas is introduced to generate plasma is performed. It is preferable to perform sputtering to remove dust adhering to the surface of the gate insulating layer. Instead of the argon atmosphere, nitrogen, helium, etc. may be used. It may be carried out in an atmosphere containing oxygen, hydrogen, NO, etc. 2. It may be carried out in an atmosphere containing CF4 or the like.

[0096] Next, a first oxide semiconductor film (a first In- After the plasma treatment, the first Depositing an In-Ga-Zn-O based non-single crystal film creates a gate insulating layer and a semiconductor film. It is useful in that it does not attract dust or moisture. Here, an 8-inch diameter In, Ga, and The oxide semiconductor target containing Zn (In2O3:Ga2O3:ZnO=1:1:1) The distance between the substrate and the target was 170 mm, the pressure was 0.4 Pa, and the DC voltage was The film is formed under an argon or oxygen atmosphere with a 0.5 kW power source. The use of In-Ga- is preferable because it reduces dust and makes the film thickness distribution uniform. The thickness of the Zn—O-based non-single crystal film is set to 5 nm to 200 nm. The thickness of the n-Ga-Zn-O based non-single crystal film is set to 100 nm.

[0097] There are two types of sputtering methods: RF sputtering, which uses a high frequency power supply for the sputtering power source, and DC sputtering. There is also the pulsed DC sputtering method, which applies a pulsed bias. The DC sputtering method is mainly used to deposit insulating films, while the DC sputtering method is mainly used to deposit metal films. It is used for.

[0098] There are also multi-target sputtering devices that can accommodate multiple targets of different materials. The equipment can deposit layers of different materials in the same chamber, or multiple types of materials in the same chamber. It is also possible to simultaneously discharge and deposit the same materials.

[0099] Also, a sputtering apparatus using a magnetron sputtering method equipped with a magnet mechanism inside the chamber and ECR sputtering using plasma generated by microwaves without glow discharge. There are sputtering devices that use this method.

[0100] In addition, in the film formation method using the sputtering method, the target material and the sputtering gas component are mixed during film formation. Reactive sputtering is used to form thin films of these compounds by chemically reacting them with each other. There is also a bias sputtering method in which a voltage is also applied to the substrate.

[0101] Next, a channel is formed in the region of the first In-Ga-Zn-O based non-single crystal film that overlaps the channel forming region. The channel protection layer 133 is also made of the first In-Ga-Zn-O based non-metallic compound. The thin film may be formed by successively depositing the single crystal film without exposing it to the air. If the film is continuously formed without being exposed to the atmosphere, productivity will be improved.

[0102] The channel protection layer 133 may be made of an inorganic material (silicon oxide, silicon nitride, silicon oxynitride, silicon nitride, silicon nitride, silicon nitride, silicon dioxide ... The manufacturing method can be plasma CVD or thermal CVD. Any vapor deposition method or sputtering method can be used. The channel protection layer 133 is formed by The shape is then processed by etching. Here, a silicon oxide film is formed by sputtering. The channel is protected by etching using a photolithography mask. A protective layer 133 is formed.

[0103] Next, a second In—Ga—Zn—O-based non-single-crystal film is formed on the first In—Ga—Zn—O-based non-single-crystal film and the channel protection layer 133. The oxide semiconductor film (in this embodiment, the second In-Ga-Zn-O based non-single-crystal film) is Here, the substrate is In2O3:Ga2O3:ZnO=1:1:1. The deposition conditions were a pressure of 0.4 Pa, a power of 500 W, and a deposition temperature of room temperature. The temperature was raised and argon gas was introduced at a flow rate of 40 sccm to perform sputtering deposition. Although a target with a ZnO content of 1:1:1 was intentionally used, Immediately after deposition, an In-Ga-Zn-O based non-single crystal film containing crystal grains of 1 nm to 10 nm in size was formed. The target component ratio and deposition pressure (0.1 Pa to 2.0 Pa) may be , power (250W~3000W: 8 inch φ), temperature (room temperature ~ 100℃), reactive sputter By appropriately adjusting the deposition conditions of the crystal grains, the presence or absence of crystal grains, the density of the crystal grains, and the diameter size can be controlled. Therefore, it can be said that the thickness can be adjusted in the range of 1 nm to 10 nm. The thickness of the crystal film is set to 5 nm to 20 nm. Of course, if the film contains crystal grains, the included In this embodiment, the size of the crystal grains formed in the second In-Ga The thickness of the Zn—O-based non-single crystal film is set to 5 nm.

[0104] The first In-Ga-Zn-O based non-single-crystal film is For example, the film formation conditions for the second In-Ga-Zn-O based non-single crystal film are different from those for the first In-Ga-Zn-O based non-single crystal film. The ratio of the oxygen gas flow rate to the argon gas flow rate in the first In-Ga-Zn-O system non-single The conditions for forming the crystal film are such that the oxygen gas flow rate accounts for a large proportion. The deposition conditions for the In-Ga-Zn-O non-single crystal film in 2 are: rare gas (argon or helium) etc.) atmosphere (or oxygen gas 10% or less, argon gas 90% or more), and The conditions for forming the n-Ga-Zn-O non-single crystal film were an oxygen atmosphere (or an oxygen gas flow rate of 1000 MPa). The amount shall be equal to or greater than the Gongas flow rate.

[0105] The second In-Ga-Zn-O non-single crystal film was deposited in the chamber where the reverse sputtering was performed previously. The same chamber as the previous reverse sputtering may be used, or a different chamber may be used. The film may be formed using a bar.

[0106] Next, a third photolithography step is performed to form a resist mask. Etching of the Ga-Zn-O non-single crystal film and the second In-Ga-Zn-O non-single crystal film Here, the unnecessary layer is removed by wet etching using ITO07N (manufactured by Kanto Chemical Co., Ltd.). The semiconductor layer 103 is a first In-Ga-Zn-O-based non-single-crystal film, and the second In-Ga-Zn-O-based non-single-crystal film is a second In-Ga-Zn-O-based non-single-crystal film. The oxide semiconductor film 111 is an In—Ga—Zn—O-based non-single-crystal film. The etching is not limited to wet etching, but dry etching may also be used. The cross section at this stage is shown in Figure 5(B). The plan view at this stage corresponds to Figure 8. do.

[0107] Next, a fourth photolithography step is performed to form a resist mask and etch the By removing unnecessary parts, wiring made of the same material as the gate electrode layer and contacts that reach the electrode layer can be formed. This contact hole is designed to be directly connected to the conductive film that will be formed later. For example, in the driving circuit, a gate electrode layer and a source electrode layer or a drain electrode layer are Forming terminals that are electrically connected to the thin film transistors that come into direct contact with the gate wiring of the terminal area In this case, a contact hole is formed.

[0108] Next, a conductive film 132 made of a metal material is formed over the semiconductor layer 103 and the oxide semiconductor film 111 by spraying. The film is formed by sputtering or vacuum deposition. The cross section at this stage is shown in Figure 5(C).

[0109] The material of the conductive film 132 is an element selected from Al, Cr, Ta, Ti, Mo, and W, or or an alloy containing the above elements as a component, or an alloy film of a combination of the above elements. In addition, when heat treatment is performed at 200 to 600°C, the heat resistance that can withstand this heat treatment is introduced. It is preferable to have a conductive film with Al as the only material. It is formed by combining it with a heat-resistant conductive material. The conductive materials include titanium (Ti), tantalum (Ta), tungsten (W), and molybdenum. Elements selected from (Mo), chromium (Cr), neodymium (Nd), and scandium (Sc) or an alloy containing the above elements as components, or an alloy film containing a combination of the above elements, or It is formed from a nitride containing the above-mentioned elements as components.

[0110] Here, the conductive film 132 has a single-layer structure of a titanium film. Alternatively, a titanium film may be stacked on an aluminum film. A Ti film is layered on top of the Ti film, and an aluminum film containing Nd (Al-Nd) is layered on top of the Ti film. The conductive film 132 may be a silicon film, and a Ti film may be formed on top of the silicon film. Alternatively, the aluminum film may have a single layer structure containing the above.

[0111] Next, a fifth photolithography step is performed to form a resist mask 131 and etch the resist mask. Unnecessary portions are removed by etching to form the source electrode layer or the drain electrode layer 105a, 105b, The source and drain regions 104a and 104b are formed by etching. For example, the conductive film 132 is formed by wet etching or dry etching. When using an aluminum film or an aluminum alloy film, a mixture of phosphoric acid, acetic acid, and nitric acid is used. Wet etching can be performed using a solution. The Ti film was then removed by wet etching using a mixture of hydrogen chloride, ammonia, and water (5:2:2). The conductive film 132 is etched to remove the source and drain electrode layers 105a and 105b. The source and drain regions 104a and 104b are formed by etching the nitride semiconductor film 111. In this etching process, the channel protection layer 133 is formed by etching the semiconductor layer 103. Since the etching stopper functions as a etching stopper, the semiconductor layer 103 is not etched. In the above, the source and drain electrode layers 105a and 105b, the source and drain regions The rain regions 104a and 104b are etched with an etchant of ammonia hydrogen peroxide. In order to perform the above steps simultaneously, the source electrode layer 105a, the drain electrode layer 105b, and the source region or The ends of the drain regions 104a and 104b are aligned to form a continuous structure. In order to use hot etching, the etching is performed isotropically and the source electrode layer or the drain electrode layer The ends of the electrode layers 105a and 105b are recessed from the resist mask 131. In this process, the semiconductor layer 103 is used as a channel forming region, and a channel protection layer is formed on the channel forming region. A thin film transistor 170 having the layer 133 can be fabricated. A cross-sectional view at this stage is shown in FIG. ) The plan view at this stage corresponds to Figure 9.

[0112] Since the channel protection layer 133 is provided on the channel formation region of the semiconductor layer 103, Damage to the channel formation region of the semiconductor layer 103 during processing (protrusion during etching) Therefore, it is possible to prevent thin film transistors from being damaged by plasma or etching agents, or from being oxidized. This can improve the reliability of the transistor 170.

[0113] Next, it is preferable to carry out a heat treatment at 200°C to 600°C, typically 300°C to 500°C. Here, the material is placed in a furnace and heat treated at 350°C for 1 hour in a nitrogen atmosphere. This heat treatment causes rearrangement at the atomic level in the In-Ga-Zn-O non-single crystal film. This releases the strain that inhibits carrier movement, so the heat treatment (including optical annealing) The timing of the heat treatment is important. There are no particular limitations as long as it is after the formation of the single crystal film, and it may be performed, for example, after the formation of the pixel electrode.

[0114] In the fifth photolithography step, the source electrode layer or the drain electrode layer The second terminal 122 made of the same material as the terminals 105a and 105b is left in the terminal portion. The terminal 122 is a source wiring (a source electrode layer including the source and drain electrode layers 105a and 105b). It is electrically connected to the

[0115] In addition, in the terminal portion, the connection electrode 120 is formed through a contact hole formed in the gate insulating film. It is directly connected to the first terminal 121 of the terminal portion through the The source wiring or drain wiring of the thin film transistor of the driving circuit is formed through the same process as described above. The wiring and the gate electrode are directly connected.

[0116] Also, a resist having regions of multiple thicknesses (typically two types) formed by a multi-tone mask is used. By using a resist mask, the number of resist masks can be reduced, which simplifies the process and reduces Cost reduction is possible.

[0117] Next, the resist mask 131 is removed, and the protective insulating layer 10 covering the thin film transistor 170 is removed. The protective insulating layer 107 is formed by a silicon nitride film obtained by a sputtering method or the like, an oxide film, or the like. silicon oxide film, silicon oxynitride film, aluminum oxide film, tantalum oxide film, etc. It is possible.

[0118] Next, a sixth photolithography step is performed to form a resist mask, and a protective insulating layer 1 A contact hole 125 reaching the drain electrode layer 105b is formed by etching in step 07. In addition, the etching here forms a contact hole 122 that reaches the second terminal 122. 7. The contact hole 126 reaching the connection electrode 120 is also formed using the same resist mask. A cross-sectional view at this stage is shown in FIG.

[0119] Next, the resist mask is removed, and then a transparent conductive film is formed. are indium oxide (In2O3) and indium oxide tin oxide alloy (In2O3-SnO 2, abbreviated as ITO) is formed using a sputtering method or a vacuum deposition method. Etching of such materials is done with a hydrochloric acid solution. However, etching of ITO in particular Residues tend to be generated, so indium oxide zinc oxide alloy is used to improve etching processability. Gold (In2O3-ZnO) may also be used.

[0120] Next, a seventh photolithography step is performed to form a resist mask and apply etching. The pixel electrode layer 110 is formed by removing unnecessary portions.

[0121] In this seventh photolithography step, the gate insulating layer 10 in the capacitance section 2 and the protective insulating layer 107 as dielectrics, the capacitance wiring 108 and the pixel electrode layer 110 form a storage capacitor. A quantity is formed.

[0122] In the seventh photolithography step, the first terminal and the second terminal are formed by resist. The transparent conductive films 128 and 129 formed on the terminal portions are left covered with a mask. 8 and 129 are electrodes or wiring used for connection with the FPC. The transparent conductive film 128 formed on the connected connection electrode 120 is connected to the input terminal of the gate wiring. The transparent conductive film 1 formed on the second terminal 122 serves as a terminal electrode for connection. Reference numeral 29 denotes a connection terminal electrode that functions as an input terminal for the source wiring.

[0123] Next, the resist mask is removed, and the cross-sectional view at this stage is shown in FIG. The plan view at this stage corresponds to Figure 10.

[0124] 11(A1) and 11(A2) are cross-sectional views of the gate wiring terminal portion at this stage. 11(A1) shows a plan view along the line C1-C2 in FIG. 11(A2). In FIG. 11(A1), a transparent insulating film formed on the protective insulating film 154 The conductive film 155 is a terminal electrode for connection that functions as an input terminal. ), the terminal portion includes a first terminal 151 made of the same material as the gate wiring, and a source The gate insulating layer 152 is formed between the gate electrode 153 and the gate wiring 154. The connection electrode 153 and the transparent conductive film 155 are electrically connected to each other. The electrodes are in direct contact with each other through contact holes provided in the electrodes, thereby providing electrical continuity.

[0125] 11(B1) and 11(B2) are a cross-sectional view and a plan view of the source wiring terminal portion. Also, FIG. 11(B1) is taken along the line D1-D2 in FIG. 11(B2). In FIG. 11(B1), a transparent conductive film formed on the protective insulating film 154 is The conductive film 155 is a terminal electrode for connection that functions as an input terminal. In the terminal portion, an electrode 156 made of the same material as the gate wiring is connected to the source wiring. The electrode overlaps the second terminal 150 to which it is electrically connected via a gate insulating layer 152. The electrode 156 is not electrically connected to the second terminal 150. For example, by setting the potential to floating, GND, 0V, etc., noise can be reduced. A capacitance for preventing static electricity or a capacitance for preventing static electricity can be formed. 0 is electrically connected to the transparent conductive film 155 via the protective insulating film 154.

[0126] A plurality of gate wirings, source wirings, and capacitance wirings are provided depending on the pixel density. In addition, in the terminal section, a first terminal has the same potential as the gate wiring, a second terminal has the same potential as the source wiring, and The second terminal, the third terminal with the same potential as the capacitance wiring, and so on are arranged in a row. The number of terminals may be any number and may be determined appropriately by the implementer.

[0127] In this way, seven photolithography processes were carried out using seven photomasks to create the bottom A pixel having a thin film transistor 170 which is a gate-type n-channel thin film transistor. The thin film transistor and storage capacitor can be completed. By arranging the pixels in a matrix corresponding to the active matrix type, For the sake of convenience, the present specification will discuss such a substrate. Such a substrate is called an active matrix substrate.

[0128] When manufacturing an active matrix liquid crystal display device, an active matrix substrate a liquid crystal layer is provided between the active matrix substrate and an opposing substrate on which an opposing electrode is provided; The common electrode is electrically connected to the counter electrode provided on the counter substrate. A fourth terminal electrically connected to the common electrode is provided on the active matrix substrate. This fourth terminal is used to set the common electrode to a fixed potential, such as GND or 0V. This is a terminal for connecting the

[0129] Furthermore, one embodiment of the present invention is not limited to the pixel configuration of FIG. 10 and may be an example of a plan view different from that of FIG. This is shown in Fig. 12. In Fig. 12, no capacitance wiring is provided, and the pixel electrode layer is connected to the gate wiring of adjacent pixels. and a protective insulating film and a gate insulating layer are placed one on top of the other to form a storage capacitor. The capacitance wiring and the third terminal connected to the capacitance wiring can be omitted. 10. In this case, the same parts as those in FIG. 10 will be described using the same reference numerals.

[0130] In an active matrix liquid crystal display device, pixel electrodes arranged in a matrix form By driving the selected pixels, a display pattern is formed on the screen. A voltage is applied between the electrode and the counter electrode corresponding to the pixel electrode. The liquid crystal layer disposed between the electrode and the counter electrode is optically modulated, and this optical modulation produces a display pattern. is perceived by the observer as

[0131] When displaying moving images on a liquid crystal display device, the response of the liquid crystal molecules themselves is slow, which can cause afterimages. In order to improve the moving image characteristics of the LCD device, There is a driving technique called black insertion, which displays black every other frame.

[0132] In addition, the response speed can be improved by increasing the normal vertical period by 1.5 or 2 times or more. There is also a driving technology called double speed driving.

[0133] In addition, in order to improve the video characteristics of the LCD display, multiple LEDs (light emitting diodes) are used as backlights. A surface light source is formed by using a diode) light source or multiple EL light sources, etc., and a surface light source is formed. There is also a driving technology that drives each light source to light intermittently within one frame. Three or more types of LEDs may be used, or white light emitting LEDs may be used. Since it is possible to control a large number of LEDs, the LEDs can be switched in accordance with the timing of the optical modulation of the liquid crystal layer. This driving technology can also synchronize the timing of LEDs to be turned off partially. This is especially useful when the image display has a large proportion of black areas occupying the entire screen. This can reduce power consumption.

[0134] By combining these driving technologies, the display characteristics such as the video characteristics of the LCD device can be improved. can be improved compared to the past.

[0135] The n-channel transistor obtained in this embodiment is an In-Ga-Zn-O based non-single crystal The crystal film is used in the channel formation region and has good dynamic characteristics, so these driving technologies They can be combined.

[0136] In addition, when a light-emitting display device is manufactured, one electrode (also called a cathode) of the organic light-emitting element is In order to set the low power supply potential, for example, GND or 0V, the cathode is connected to the terminal. A fourth terminal is provided for setting the voltage level, for example, GND, 0V, etc. When manufacturing a device, a power supply line is provided in addition to a source line and a gate line. Therefore, the terminal section is provided with a fifth terminal that is electrically connected to the power supply line.

[0137] The gate line driver circuit or source line driver circuit is formed by thin film transistors using oxide semiconductors. By forming a thin film transistor using a driving circuit, the manufacturing cost can be reduced. By directly connecting the gate electrode and the source wiring or the drain wiring, a contact hole is formed. Therefore, it is possible to provide a display device in which the number of driving circuits can be reduced and the area occupied by the driving circuits can be reduced.

[0138] Therefore, this embodiment makes it possible to provide a display device with high electrical characteristics and high reliability at low cost. It is possible.

[0139] (Embodiment 5) Here, in the first embodiment, a thin film transistor having a configuration in which the wiring and the semiconductor layer are in contact with each other is An example of a display device having such a configuration is shown in FIG.

[0140] The cross-sectional structure of the inverter circuit of the drive circuit is shown in FIG. The first thin film transistor 430 and the second thin film transistor 431 are inverted staggered transistors having a channel protection layer. a first channel protection layer in contact with the first oxide semiconductor layer 405; 418, a first wiring 409, and a second wiring 410 are provided and connected to the second oxide semiconductor layer 407. In this example, a second channel protection layer 419, a second wiring 410, and a third wiring 411 are provided. is.

[0141] In the first thin film transistor 430 and the second thin film transistor 431, the first oxide The semiconductor layer 405 is connected to the first wiring 409, the second wiring 410, and the second oxide semiconductor. The contact areas between the conductor layer 407 and the second wiring 410 and the third wiring 411 are formed by plasma treatment. In this embodiment, before forming a conductive film to be a wiring, The oxide semiconductor layer (in this embodiment, an In-Ga-Zn-O based non-single-crystal film) is grown in an argon atmosphere. Plasma treatment is carried out under atmospheric pressure.

[0142] The plasma treatment may be performed using nitrogen, helium, or the like instead of an argon atmosphere. It may be performed in an argon atmosphere to which oxygen, hydrogen, N2O, etc. have been added. The treatment may be carried out in an atmosphere containing Cl2, CF4, etc.

[0143] The first oxide semiconductor layer 405 and the second oxide semiconductor layer 40 are modified by the plasma treatment. 7, a conductive film is formed to form a first wiring 409, a second wiring 410, and a third wiring 411. By this, the first oxide semiconductor layer 405, the second oxide semiconductor layer 407 and the first wiring 409, the contact resistance with the second wiring 410, and the third wiring 411 can be reduced.

[0144] Through the above steps, a highly reliable display device can be manufactured as a semiconductor device.

[0145] This embodiment mode can be implemented by being appropriately combined with the configurations described in other embodiments. is.

[0146] (Sixth embodiment) In this embodiment mode, in a display device which is an example of a semiconductor device of the present invention, The following is an example of manufacturing a thin film transistor disposed in at least a part of a driver circuit and a pixel portion. Explained below.

[0147] The thin film transistor disposed in the pixel portion is formed according to the fourth or fifth embodiment. The thin film transistor described in Embodiment 4 or 5 is an n-channel TFT. Therefore, some of the driver circuits can be configured with n-channel TFTs. The thin film transistors in the pixel portion are formed on the same substrate.

[0148] FIG. 1 is a block diagram of an active matrix liquid crystal display device, which is an example of a semiconductor device of the present invention. An example is shown in FIG. 14A. The display device shown in FIG. 14A has a display element over a substrate 5300. A pixel portion 5301 having a plurality of pixels, and a scanning line driver circuit 5302 for selecting each pixel. and a signal line driver circuit 5303 for controlling input of a video signal to a selected pixel.

[0149] The pixel portion 5301 is a signal line driver circuit 5303. The signal line driver circuit 5303 is arranged to extend in the column direction. The signal line driver circuit 5303 is connected to the signal line driver circuit 5303 by lines S1 to Sm (not shown). A plurality of scanning lines G1 to Gn (not shown) are arranged extending from 5302 in the row direction. The scanning line driver circuit 5302 is connected to the signal lines S1 to Sm and the scanning lines G1 to Gn. The image sensor has a plurality of pixels (not shown) arranged in a matrix. signal line Sj (one of the signal lines S1 to Sm), scanning line Gi (one of the scanning lines G1 to Gn), (either one) is connected.

[0150] The thin film transistor described in Embodiment 4 or 5 is an n-channel TFT. A signal line driver circuit configured with n-channel TFTs will be described with reference to FIG.

[0151] The signal line driver circuit shown in FIG. 15 includes a driver IC 5601 and a group of switches 5602_1 to 5602_56. 02_M, a first wiring 5611, a second wiring 5612, a third wiring 5613 and a wiring 56 Each of the switch groups 5602_1 to 5602_M includes: A first thin film transistor 5603a, a second thin film transistor 5603b, and a third thin film transistor It has a transistor 5603c.

[0152] The driver IC 5601 is connected to a first wiring 5611, a second wiring 5612, and a third wiring 5613. and are connected to the wirings 5621_1 to 5621_M. 5602_M are connected to the first wiring 5611, the second wiring 5612, and the third wiring 561 3 and wiring 5621_1 to 5621_5 corresponding to the switch groups 5602_1 to 5602_M, respectively. Each of the wirings 5621_1 to 5621_M is connected to the first A thin film transistor 5603a, a second thin film transistor 5603b, and a third thin film transistor For example, the wiring 5621 in the Jth column is connected to three signal lines via a resistor 5603c. _J (one of the wirings 5621_1 to 5621_M) is connected to the switch group 5602 The first thin film transistor 5603a, the second thin film transistor 5603b, and and the third thin film transistor 5603c, the signal line Sj-1, the signal line Sj, the signal line S connected to j+1.

[0153] The first wiring 5611, the second wiring 5612, and the third wiring 5613 are each connected to a signal line. The number is entered.

[0154] It is desirable that the driver IC 5601 be formed on a single crystal substrate. The switch groups 5602_1 to 5602_M are formed on the same substrate as the pixel section. Therefore, the driver IC 5601 and the switch group 5602_1 to 5602_ It is recommended to connect to M via an FPC or similar.

[0155] Next, the operation of the signal line driver circuit shown in FIG. 15 will be described with reference to the timing chart of FIG. The timing chart in FIG. 16 is explained with reference to the timing chart when the i-th scanning line Gi is selected. Furthermore, the timing chart shows the selection period of the i-th scanning line Gi. is divided into a first sub-selection period T1, a second sub-selection period T2, and a third sub-selection period T3. Furthermore, when a scanning line of another row is selected, the signal line driving circuit of FIG. In this case, the same operation as in FIG. 16 is performed.

[0156] In the timing chart of FIG. 16, the wiring 5621_J in the Jth column is connected to the first thin-film transistor. a second thin film transistor 5603a, a second thin film transistor 5603b, and a third thin film transistor 560 When connected to signal line Sj-1, signal line Sj, and signal line Sj+1 via 3c It shows.

[0157] In the timing chart of FIG. 16, the timing at which the i-th scanning line Gi is selected, The on / off timing 5703a of the first thin film transistor 5603a, The on / off timing 5703b of the third thin film transistor 56 The on / off timing of 03c is input to 5703c and the J-th row wiring 5621_J. Signal 5721_J is shown.

[0158] The wirings 5621_1 to 5621_M are connected to the first sub-selection period T1 and the second sub-selection period T2. In the first sub-selection period T2 and the third sub-selection period T3, different video signals are input. For example, the video signal input to the wiring 5621_J in the first sub-selection period T1 is The signal is input to the signal line Sj-1 and input to the wiring 5621_J in the second sub-selection period T2. The video signal to be output is input to the signal line Sj, and the signal is output to the wiring 5621 during the third sub-selection period T3. The video signal input to the first sub-selection period is input to the signal line Sj+1. During the period T1, the second sub-selection period T2, and the third sub-selection period T3, the wiring 5621_ The video signals input to J are Data_j-1, Data_j, and Data_j+ Let's say it's 1.

[0159] As shown in FIG. 16, in the first sub-selection period T1, the first thin film transistor 5603 a is turned on, and the second thin film transistor 5603b and the third thin film transistor 5603c At this time, Data_j-1 input to the wiring 5621_J is turned off. The signal is input to the signal line Sj-1 via the transistor 5603a. Second sub-selection period T2 In this case, the second thin film transistor 5603b is turned on, and the first thin film transistor 5603a The third thin film transistor 5603c is turned off. The output Data_j is input to the signal line Sj via the second thin film transistor 5603b. In the third sub-selection period T3, the third thin film transistor 5603c is turned on, and the first The first thin film transistor 5603a and the second thin film transistor 5603b are turned off. At this time, Data_j+1 input to the wiring 5621_J is input to the third thin film transistor 56 It is input to the signal line Sj+1 via 03c.

[0160] From the above, the signal line driver circuit in FIG. 15 can achieve the following by dividing one gate selection period into three. During one gate selection period, a video signal is input from one wiring 5621 to three signal lines. Therefore, the signal line driver circuit of FIG. The number of connections between the substrate on which the display is mounted and the substrate on which the pixel section is formed is reduced to about one-third of the number of signal lines. By reducing the number of connections to about one-third, the signal line driver circuit of FIG. This can improve productivity and yield.

[0161] As shown in Figure 15, one gate selection period is divided into multiple sub-selection periods, and multiple sub-selection periods are During each selection period, a video signal is input from one line to each of multiple signal lines. As long as this can be achieved, there are no limitations on the arrangement, number, driving method, etc. of the thin film transistors.

[0162] For example, three or more signal lines are connected to one wiring in each of three or more sub-selection periods. When a video signal is input to each, a thin film transistor and a thin film transistor are controlled. However, it is necessary to divide one gate selection period into four or more sub-selection periods. Therefore, one gate selection period is divided into two or Preferably, it is divided into three sub-selection periods.

[0163] As another example, as shown in the timing chart of FIG. 17, one gate selection period is precharged. page period Tp, first sub-selection period T1, second sub-selection period T2, third selection period T3 Furthermore, in the timing chart of FIG. 17, the scanning line Gi of the i-th row is selected. the timing at which the first thin film transistor 5603a is turned on and off; 3a, the on / off timing 5803b of the second thin film transistor 5603b, the third The on / off timing 5803c of the thin film transistor 5603c and the J-th column wiring 56 17 shows the signal 5821_J input to the precharger 21_J. During the period Tp, the first thin film transistor 5603a and the second thin film transistor 560 3b and the third thin film transistor 5603c are turned on. The input precharge voltage Vp is applied to the first thin film transistor 5603a and the second thin film transistor 5603b. The signal line Sj is connected to the first thin film transistor 5603b and the second thin film transistor 5603c. In the first sub-selection period T1, the first The first thin film transistor 5603a is turned on, and the second thin film transistor 5603b and the third thin film transistor The thin film transistor 5603c is turned off. At this time, the Da ta_j-1 is input to the signal line Sj-1 via the first thin film transistor 5603a. In the second sub-selection period T2, the second thin film transistor 5603b is turned on, and the first The thin film transistor 5603a and the third thin film transistor 5603c are turned off. Data_j input to the wiring 5621_J is input to the second thin film transistor 5603b During the third sub-selection period T3, the third thin-film transistor The first thin film transistor 5603a and the second thin film transistor 5603c are turned on. 5603b is turned off. At this time, Data_j+1 input to the wiring 5621_J is The signal is input to the signal line Sj+1 via the third thin film transistor 5603c.

[0164] From the above, the signal line driver circuit of FIG. 15 to which the timing chart of FIG. 17 is applied By providing a precharge period before the block selection period, the signal line can be precharged. Therefore, the video signal can be written to the pixel at high speed. 16 are denoted by the same reference numerals, and the same parts or parts having similar functions are shown. A detailed description of the relevant parts will be omitted.

[0165] The configuration of the scanning line driving circuit will be described. The scanning line driving circuit includes a shift register, a buffer, and a In some cases, a level shifter may be included. In the circuit, a clock signal (CLK) and a start pulse signal (SP) are input to the shift register. ) is input, the selection signal is generated. The generated selection signal is The signal is buffered and amplified in the scanning line and then supplied to the corresponding scanning line. The gate electrodes of the transistors are connected. Since they must all be turned on at the same time, the buffer must be able to pass a large current. It is used.

[0166] One form of a shift register used as part of a scanning line driving circuit will be explained with reference to FIGS. 18 and 19. I will explain.

[0167] The circuit configuration of the shift register is shown in Figure 18. The shift register shown in Figure 18 is a flip-flop. It is composed of multiple flip-flops 5701_i to 5701_n. A first clock signal, a second clock signal, a start pulse signal, and a reset signal are input. It works as it is.

[0168] The connection relationship of the shift register in Fig. 18 will be explained. The shift register in Fig. 18 has i-stage Flip-flop 5701_i (flip-flop 5701_1~5701_n) In either case, the first wiring 5501 shown in FIG. 19 is connected to the seventh wiring 5717_i-1. 19 is connected to the seventh wiring 5717_i+1. 19 is connected to the seventh wiring 5717_i, and The sixth wiring 5506 is connected to the fifth wiring 5715 .

[0169] In addition, the fourth wiring 5504 shown in FIG. 19 is the second wiring in the odd-numbered flip-flops. 5712, and in the even-numbered flip-flops, it is connected to the third wiring 5713. The fifth wiring 5505 shown in FIG.

[0170] However, the first wiring 5501 shown in FIG. 19 of the first-stage flip-flop 5701_1 is 19 of the n-th stage flip-flop 5701_n. The second wiring 5502 is connected to the sixth wiring 5716 .

[0171] The first wiring 5711, the second wiring 5712, the third wiring 5713, and the sixth wiring 57 16 can be called the first signal line, the second signal line, the third signal line, and the fourth signal line, respectively. Furthermore, the fourth wiring 5714 and the fifth wiring 5715 are respectively connected to the first power supply line and the This may also be called the power line 2.

[0172] Next, the details of the flip-flop shown in FIG. 18 are shown in FIG. 19. The flip-flop includes a first thin film transistor 5571, a second thin film transistor 5572, A third thin film transistor 5573, a fourth thin film transistor 5574, a fifth thin film transistor a sixth thin film transistor 5575, a sixth thin film transistor 5576, a seventh thin film transistor 5577, and and an eighth thin film transistor 5578. A second thin film transistor 5572, a third thin film transistor 5573, a fourth thin film transistor a fifth thin film transistor 5574, a fifth thin film transistor 5575, a sixth thin film transistor 5576, The seventh thin film transistor 5577 and the eighth thin film transistor 5578 are n-channel A transistor in which the gate-source voltage (Vgs) exceeds the threshold voltage (Vth) When this occurs, the device is in a conductive state.

[0173] In FIG. 19, the gate electrode of the third thin film transistor 5573 is electrically connected to the power supply line. In addition, the third thin film transistor 5573 and the fourth thin film transistor 557 The circuit connected to 4 (circuit surrounded by a chain line in Figure 19) corresponds to the circuit configuration shown in Figure 2(A). All thin film transistors here are enhancement type n-channel Although an example in which the third thin film transistor 55 is used is shown, it is not particularly limited. 73 can drive the driver circuit even using a depletion type n-channel transistor It is also possible.

[0174] Next, the connection configuration of the flip-flop shown in FIG. 19 will be described below.

[0175] A first electrode (either a source electrode or a drain electrode) of the first thin film transistor 5571 is connected to a fourth wiring 5504, and a second electrode (source) of the first thin film transistor 5571 is connected to a The other of the source electrode and the drain electrode is connected to a third wiring 5503 .

[0176] A first electrode of the second thin film transistor 5572 is connected to the sixth wiring 5506, and A second electrode of the thin film transistor 5572 is connected to a third wiring 5503 .

[0177] A first electrode of the third thin film transistor 5573 is connected to a fifth wiring 5505. The second electrode of the thin film transistor 5573 is the gate electrode of the second thin film transistor 5572. , and the gate electrode of the third thin film transistor 5573 is connected to the fifth wiring 5505. will be done.

[0178] A first electrode of the fourth thin film transistor 5574 is connected to a sixth wiring 5506, and The second electrode of the thin film transistor 5574 is the gate electrode of the second thin film transistor 5572. , and the gate electrode of the fourth thin film transistor 5574 is connected to the first thin film transistor 5 It is connected to the gate electrode of 571.

[0179] A first electrode of the fifth thin film transistor 5575 is connected to a fifth wiring 5505. The second electrode of the thin film transistor 5575 is the gate electrode of the first thin film transistor 5571. , and the gate electrode of the fifth thin film transistor 5575 is connected to the first wiring 5501. will be done.

[0180] A first electrode of the sixth thin film transistor 5576 is connected to the sixth wiring 5506. The second electrode of the thin film transistor 5576 is the gate electrode of the first thin film transistor 5571. , and the gate electrode of the sixth thin film transistor 5576 is connected to the second thin film transistor 5 It is connected to the gate electrode of 572.

[0181] A first electrode of the seventh thin film transistor 5577 is connected to the sixth wiring 5506. The second electrode of the thin film transistor 5577 is the gate electrode of the first thin film transistor 5571. , and the gate electrode of the seventh thin film transistor 5577 is connected to the second wiring 5502. A first electrode of the eighth thin film transistor 5578 is connected to the sixth wiring 5506. The second electrode of the eighth thin film transistor 5578 is connected to the gate of the second thin film transistor 5572. The gate electrode of the eighth thin film transistor 5578 is connected to the first wiring 550. Connected to 1.

[0182] The gate electrode of the first thin film transistor 5571 and the gate electrode of the fourth thin film transistor 5574 the gate electrode of the fifth thin film transistor 5575, the second electrode of the sixth thin film transistor The connection point of the second electrode of the seventh thin film transistor 5576 and the second electrode of the seventh thin film transistor 5577 is Further, the gate electrode of the second thin film transistor 5572, the gate electrode of the third thin film transistor 5573, and the gate electrode of the third thin film transistor 5574 are connected to the gate electrode of the second thin film transistor 5575. a second electrode of the fourth thin film transistor 5573; a second electrode of the fourth thin film transistor 5574; The gate electrode of the sixth thin film transistor 5576 and the gate electrode of the eighth thin film transistor 5578 The connection point of the two electrodes is designated as node 5544.

[0183] The first wiring 5501, the second wiring 5502, the third wiring 5503 and the fourth wiring 5504 are 504 are referred to as the first signal line, the second signal line, the third signal line, and the fourth signal line, respectively. Furthermore, the fifth wiring 5505 may be connected to a first power supply line, and the sixth wiring 5506 may be connected to a second power supply line. It can also be called a line.

[0184] In addition, the signal line driver circuit and the scanning line driver circuit are formed by using only the n-channel TFTs shown in the fourth embodiment. The n-channel TFT shown in Embodiment 4 can be manufactured by Because of the high mobility, it is possible to increase the driving frequency of the driving circuit. The n-channel TFT shown in form 4 has a source region made of an In-Ga-Zn-O non-single crystal film. Or, the drain region reduces the parasitic capacitance, so the frequency characteristics (called f characteristics) For example, the scanning line driver circuit using the n-channel TFT shown in the fourth embodiment has a high speed. This allows for faster frame rates and the insertion of black screens. It is also possible to realize things that can be realized.

[0185] Furthermore, the channel width of the transistor of the scanning line driving circuit can be increased, and multiple scanning lines can be formed. By arranging the drive circuit, it is possible to achieve an even higher frame frequency. When multiple scanning line driving circuits are arranged, the scanning line driving circuits for driving the even-numbered scanning lines are The circuit for driving the odd-numbered scanning lines is placed on one side, and the scanning line driving circuit for driving the odd-numbered scanning lines is placed on the other side. By placing multiple If signals are output to the same scanning line by the scanning line driving circuit, it is advantageous for increasing the size of the display device. do.

[0186] In addition, an active matrix light-emitting display device, which is an example of the semiconductor device of the present invention, is manufactured. In this case, since a plurality of thin film transistors are arranged in at least one pixel, the scanning line driving circuit It is preferable to arrange a plurality of the active matrix light emitting display devices. An example is shown in FIG.

[0187] The light-emitting display device shown in FIG. 14B has a plurality of pixels each having a display element over a substrate 5400. A pixel portion 5401 for selecting each pixel, a first scanning line driver circuit 5402 for selecting each pixel, and a second scanning line driver circuit 5403 for selecting each pixel. A driver circuit 5404 and a signal line driver circuit 5405 for controlling the input of a video signal to a selected pixel 403 and

[0188] In the case where a video signal input to a pixel of the light-emitting display device shown in FIG. 14(B) is in a digital format, When a pixel is turned on, it emits light or does not emit light by switching the transistor on or off. Therefore, gray scale display can be performed using area gray scale or time gray scale. The stacked gray scale method divides one pixel into multiple sub-pixels, and each sub-pixel is independently driven based on a video signal. The time gray scale method is a driving method that displays gray scales by moving the pixel. This is a driving method that displays gradation by controlling the period during which the light is turned on.

[0189] Light-emitting elements have a higher response speed than liquid crystal elements, making them more suitable for time gray scale modulation than liquid crystal elements. Specifically, when displaying using the time gray scale method, one frame period is divided into multiple subframes. Then, in accordance with the video signal, the light emitting element of the pixel is By dividing the period into multiple subframes, The total length of the period during which pixels actually emit light during one frame is controlled by the video signal. It is possible to control the brightness and display gradation.

[0190] In the light-emitting display device shown in FIG. 14B, two switching TFTs are provided for one pixel. When the first scanning line is connected to the gate of one of the switching TFTs, The signal to be output is generated by the first scanning line driver circuit 5402, and the gate of the other switching TFT is A signal to be input to the second scanning line, which is a light source wiring, is generated by a second scanning line driver circuit 5404. The example shows a signal input to the first scanning line and a signal input to the second scanning line. The signal and the signal may be generated by one scanning line driving circuit. The operation of the switching element is controlled by the number of switching TFTs that the pixel has. In this case, a plurality of scanning lines may be provided for each pixel. The signals input to the lines may all be generated by one scanning line driver circuit, or may be generated by a plurality of scanning lines. It may be generated by the drive circuit.

[0191] In addition, in the light-emitting display device, the driver circuit may be configured with an n-channel TFT. A part of the driver circuit can be formed on the same substrate as the thin film transistor of the pixel portion. In addition, the signal line driver circuit and the scanning line driver circuit may be formed by the n-channel transistors shown in Embodiment 4 or 5. It is also possible to fabricate the device using only channel TFTs.

[0192] The above-mentioned driving circuit is not limited to liquid crystal display devices and light-emitting display devices, but may also be used in It may also be used in electronic paper, which uses electrically connected elements to drive electronic ink. Electronic paper is also called an electrophoretic display (electrophoretic display), and has the same properties as paper. The advantages are readability, low power consumption compared to other display devices, and the possibility of making them thin and light. It has points.

[0193] Electrophoretic displays can be of various forms, but the first particle has a positive charge. A microcapsule containing a negatively charged particle and a second particle is immersed in a solvent or solute. By applying an electric field to the microcapsules, The particles in the capsule are moved in opposite directions to each other, and only the color of the particles that have gathered on one side is displayed. The first particles or the second particles contain a dye, and in the absence of an electric field, The first particle and the second particle have different colors (colorless). (including

[0194] Thus, electrophoretic displays allow materials with high dielectric constants to migrate to areas of high electric field. This is a display that utilizes the so-called dielectrophoretic effect. The polarizing plate and counter substrate required for display devices are not required, and the thickness and weight are reduced by half.

[0195] The microcapsules dispersed in a solvent are called electronic ink. The electronic ink can be printed on surfaces such as glass, plastic, fabric, and paper. Color display is also possible by using color filters or particles containing pigments.

[0196] Furthermore, the microphone is appropriately placed on the active matrix substrate so as to be sandwiched between two electrodes. By arranging multiple microcapsules, an active matrix display device is completed. Display can be achieved by applying an electric field to the cell. An active matrix substrate obtained by the thin film transistor of 5 can be used. .

[0197] The first particles and the second particles in the microcapsules may be made of a conductive material, an insulating material, Semiconductor materials, magnetic materials, liquid crystal materials, ferroelectric materials, electroluminescent materials, A material selected from magnetochromic materials, magnetophoretic materials, or a composite material thereof Just use it.

[0198] Through the above steps, a highly reliable display device can be manufactured as a semiconductor device.

[0199] This embodiment mode can be implemented by being appropriately combined with the configurations described in other embodiments. is.

[0200] (Embodiment 7) A thin film transistor according to one embodiment of the present invention is manufactured, and the thin film transistor is used in a pixel portion and a driving By using the semiconductor device in an operating circuit, a semiconductor device (also called a display device) having a display function can be manufactured. Further, a part or the whole of a driver circuit may be formed using a thin film transistor according to one embodiment of the present invention. They can be integrally formed on the same substrate to form a system-on-panel.

[0201] The display device includes a display element. The display element includes a liquid crystal element (also called a liquid crystal display element), a light-emitting element, A light-emitting element (also called a light-emitting display element) can be used. This category includes elements whose brightness is controlled by the light emitted from the light source, specifically inorganic EL (Electroluminescent) Also, electronic inks and other electronic devices are also included. A display medium whose contrast changes due to mechanical action can also be applied.

[0202] The display device also includes a panel in which a display element is sealed, and a controller for the panel. Furthermore, one aspect of the present invention is a module in which an IC or the like including the table is mounted. In the process of manufacturing a display device, the element substrate corresponds to one form before the display element is completed. The element substrate includes a means for supplying a current to each of the plurality of pixels. Specifically, the substrate may be in a state where only pixel electrodes of the display element are formed, or After forming the conductive film that will become the electrode, but before etching to form the pixel electrode It's fine, and all forms apply.

[0203] In this specification, the term "display device" refers to an image display device, a display device, or an optical device. It also refers to connectors, such as FPC (Flexible Printed Circuit) integrated circuit) or TAB (Tape Automated Bon ding) tape or TCP (Tape Carrier Package) Modules with printed wiring boards attached to the end of TAB tape or TCP or the display element is mounted on an IC (integrated circuit) by the COG (Chip On Glass) method. The display device also includes all modules in which the display device (circuit) is directly mounted.

[0204] In this embodiment mode, the appearance and cross section of a liquid crystal display panel, which is one mode of a semiconductor device of the present invention, will be described. The surface will be described with reference to FIG. 22. FIGS. 22(A1) and 22(A2) show the first substrate 4001 The In-Ga-Zn-O based non-single crystal film formed on the substrate as shown in the fourth embodiment is used as a semiconductor layer. Highly reliable thin film transistors 4010 and 4011 and a liquid crystal element 4013 are included in the first 4006. The panel is sealed with a sealing material 4005 between the two substrates 4006. FIG. 22(B) corresponds to a cross-sectional view taken along line MN in FIGS. 22(A1) and 22(A2).

[0205] A pixel portion 4002 and a scanning line driver circuit 4004 are provided on a first substrate 4001. In this way, a sealing material 4005 is provided. A second substrate 4006 is provided on the path 4004. The line driver circuit 4004 is made up of a first substrate 4001, a sealing material 4005, and a second substrate 4006. The first substrate 4001 is sealed together with the liquid crystal layer 4008. In a region different from the region surrounded by the material 4005, a single crystal is formed on a separately prepared substrate. A signal line driver circuit 4003 formed of a semiconductor film or a polycrystalline semiconductor film is mounted.

[0206] The method of connecting the separately formed drive circuit is not particularly limited, and may be a COG method, Wire bonding or TAB method can be used. is an example of mounting a signal line driver circuit 4003 by the COG method, and FIG. 22(A2) is This is an example in which a signal line driver circuit 4003 is mounted by the TAB method.

[0207] A pixel portion 4002 and a scanning line driver circuit 4004 are provided on a first substrate 4001. 22B, the thin film transistor included in the pixel portion 4002 is A transistor 4010 and a thin film transistor 4011 included in the scanning line driver circuit 4004 Insulating layers 4020 and 4022 are formed on the thin film transistors 4010 and 4011. 1 is provided.

[0208] The thin film transistors 4010 and 4011 are made of an In-Ga-Zn-O based non-single crystal film as a semiconductor layer. The highly reliable thin film transistor described in Embodiment 4 can be applied. In addition, the thin film transistor described in Embodiment 5 may be applied. The thin film transistors 4010 and 4011 are n-channel thin film transistors.

[0209] The pixel electrode layer 4030 of the liquid crystal element 4013 is connected to the thin film transistor 4010. The counter electrode layer 4031 of the liquid crystal element 4013 is electrically connected to the second substrate 40. 06. The pixel electrode layer 4030, the counter electrode layer 4031, and the liquid crystal layer 4008 are The overlapping portion corresponds to the liquid crystal element 4013. The electrode layer 4031 is provided with insulating layers 4032 and 4033 which function as alignment films. A liquid crystal layer 4008 is sandwiched between insulating layers 4032 and 4033 .

[0210] The first substrate 4001 and the second substrate 4006 may be made of glass or metal (typically, stainless steel). Stainless steel, ceramics, and plastics can be used. , FRP (Fiberglass-Reinforced Plastics) board, PV F (polyvinyl fluoride) film, polyester film or acrylic resin film Aluminum foil can also be used with PVF film or polyester film. A sheet sandwiched between films can also be used.

[0211] 4035 is a columnar spacer obtained by selectively etching the insulating film. To control the distance (cell gap) between the pixel electrode layer 4030 and the counter electrode layer 4031 A spherical spacer may be used. is electrically connected to a common potential line provided on the same substrate as the thin film transistor 4010. The common connection portion is used to connect the opposing electrode layer 40 via conductive particles disposed between the pair of substrates. The conductive particles can be electrically connected to the sealing material 4. Included in 005.

[0212] Alternatively, a liquid crystal that exhibits a blue phase without using an alignment film may be used. The blue phase is one of the liquid crystal phases. When the temperature of cholesteric liquid crystal is increased, the phase immediately transitions from the cholesteric phase to the isotropic phase. The blue phase appears only in a narrow temperature range, so the temperature range needs to be improved. In order to achieve this, a liquid crystal composition containing 5% by weight or more of a chiral agent is used for the liquid crystal layer 4008. The liquid crystal composition containing the liquid crystal exhibiting the blue phase and the chiral agent has a response speed of 10 μs to It is optically isotropic, requiring no alignment treatment, and has little viewing angle dependency. stomach.

[0213] Although this embodiment is an example of a transmissive liquid crystal display device, one embodiment of the present invention is a reflective liquid crystal display device. The present invention can be applied to both a liquid crystal display device and a semi-transmissive liquid crystal display device.

[0214] In the liquid crystal display device of this embodiment, a polarizing plate is provided on the outer side (viewing side) of the substrate, and a polarizing plate is provided on the inner side. An example is shown in which a colored layer and an electrode layer used for a display element are provided in this order, but the polarizing plate is provided on the inner side of the substrate. The laminated structure of the polarizing plate and the colored layer is not limited to that of the present embodiment. The coloring layer may be appropriately selected depending on the material and manufacturing process conditions of the coloring layer. A light-shielding film that functions as a light-shielding film may be provided.

[0215] In this embodiment, in order to reduce the surface unevenness of the thin film transistor, In order to improve the reliability of the thin film transistor obtained in the fourth embodiment, a protective film and The insulating layer 4020 and the insulating layer 4021 are covered with insulating layers that function as planarizing insulating films. The protective film also prevents contamination by organic matter, metals, water vapor, and other polluting impurities floating in the air. The protective film is formed by sputtering. Silicon oxide film, silicon nitride film, silicon oxynitride film, silicon nitride oxide film, aluminum oxide film, nitride A single layer or multilayer of an aluminum film, an aluminum oxynitride film, or an aluminum nitride oxide film In this embodiment, an example in which the protective film is formed by sputtering is shown. There is no limitation and various methods may be used for forming the layer.

[0216] Here, an insulating layer 4020 having a stacked structure is formed as a protective film. As the first layer of the silicon dioxide film, a silicon dioxide film is formed by sputtering. By using the above, it is possible to prevent hillocks in the aluminum film used as the source electrode layer and the drain electrode layer. It is effective in stopping.

[0217] In addition, an insulating layer is formed as the second layer of the protective film. Then, a silicon nitride film is formed by sputtering. When a silicon nitride film is used as a protective film, Mobile ions such as thorium penetrate into the semiconductor region and change the electrical properties of the TFT. can be suppressed.

[0218] After forming the protective film, the semiconductor layer may be annealed (at 300°C to 400°C). stomach.

[0219] An insulating layer 4021 is formed as a planarization insulating film. Heat-resistant organic compounds such as amide, acrylic, benzocyclobutene, polyamide, and epoxy. In addition to the above organic materials, low-k materials can also be used. , siloxane resin, PSG (phosphorus glass), BPSG (borophosphorus glass), etc. In addition, by stacking multiple insulating films made of these materials, it is possible to obtain an insulating layer. 4021 may be formed.

[0220] Siloxane-based resin is a Si-OS compound formed using siloxane-based materials as starting materials. It corresponds to a resin containing i bonds. The substituents are organic groups (e.g., alkyl groups and aryl groups). Alternatively, a fluoro group may be used. The organic group may have a fluoro group.

[0221] The method for forming the insulating layer 4021 is not particularly limited, and may be a sputtering method, an SOG method, or the like, depending on the material. , spin coating, dip coating, spray coating, droplet ejection method (inkjet method, screen printing, offset printing, etc.), doctor knife, roll coater, curtain coater, knife When the insulating layer 4021 is formed using a material liquid, The semiconductor layer may be annealed (at 300°C to 400°C) at the same time as the step of annealing. By combining the firing process of the edge layer 4021 with the annealing of the semiconductor layer, semiconductor devices can be efficiently manufactured. It becomes possible to do this.

[0222] The pixel electrode layer 4030 and the counter electrode layer 4031 are made of indium oxide containing tungsten oxide. , indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, Indium tin oxide containing titanium oxide, indium tin oxide (hereinafter referred to as ITO), Translucent materials such as indium zinc oxide and indium tin oxide doped with silicon oxide A conductive material can be used.

[0223] The pixel electrode layer 4030 and the counter electrode layer 4031 are made of a conductive polymer (conductive polymer The conductive composition can be used to form the conductive film. The pixel electrode has a sheet resistance of 10,000 Ω / □ or less and a light transmittance of 550 nm. It is preferable that the resistance of the conductive polymer contained in the conductive composition is 70% or more. It is preferable that the electrical conductivity is 0.1 Ω·cm or less.

[0224] As the conductive polymer, a so-called π-electron conjugated conductive polymer can be used. For example, polyaniline or its derivatives, polypyrrole or its derivatives, polythiophene or or a derivative thereof, or a copolymer of two or more of these.

[0225] A signal line driver circuit 4003 and a scanning line driver circuit 4004 or a pixel section 4 Various signals and potentials applied to 002 are supplied from FPC4018.

[0226] In this embodiment, the connection terminal electrode 4015 is connected to the pixel electrode layer 40 of the liquid crystal element 4013. The terminal electrode 4016 is formed from the same conductive film as the thin film transistors 4010 and 40 The source electrode layer and the drain electrode layer 11 are formed of the same conductive film.

[0227] The connection terminal electrode 4015 is connected to the terminal of the FPC 4018 via the anisotropic conductive film 4019. are electrically connected.

[0228] In FIG. 22, a signal line driver circuit 4003 is separately formed and mounted on a first substrate 4001. However, this embodiment is not limited to this configuration. Alternatively, a part of the signal line driver circuit or a part of the scanning line driver circuit may be formed separately and mounted. Alternatively, the circuit board may be formed separately and mounted.

[0229] FIG. 23 shows a semiconductor device using a TFT substrate 2600 manufactured according to one embodiment of the present invention. 1 shows an example of a liquid crystal display module.

[0230] FIG. 23 shows an example of a liquid crystal display module, in which a TFT substrate 2600 and an opposing substrate 2601 are connected. The substrate is fixed by a bonding material 2602, and a pixel portion 2603 including a TFT and the like and a liquid crystal layer are disposed between the substrate and the bonding material 2602. A display element 2604 and a colored layer 2605 are provided to form a display area. is required for color display, and in the case of the RGB method, it corresponds to each color of red, green, and blue. A colored layer is provided corresponding to each pixel. On the outside, a polarizing plate 2606, a polarizing plate 2607, and a diffusion plate 2613 are arranged. It is composed of a cathode ray tube 2610 and a reflector 2611, and a circuit board 2612 is a flexible wiring board. The wiring board 2609 is connected to the wiring circuit section 2608 of the TFT substrate 2600, and the controller It also incorporates external circuits such as a polarizing plate and a power supply circuit. The layers may be laminated with a retardation film interposed therebetween.

[0231] The LCD module is available in TN (Twisted Nematic) mode, IPS (In-Plane Switching) mode, n-Plane-Switching mode, FFS (Fringe Field Switching) Switching mode, MVA (Multi-domain Vertical A alignment) mode, PVA(Patterned Vertical Alignment) mode nment), ASM(Axially Symmetric aligned Mic) ro-cell) mode, OCB(Optical Compensated Bire) fringence mode, FLC (Ferroelectric Liquid Crystal Crystal mode, AFLC (AntiFerroelectric Liquid Crystal) can be used.

[0232] By the above steps, a highly reliable liquid crystal display panel can be manufactured as a semiconductor device. do.

[0233] This embodiment mode can be implemented by being appropriately combined with the configurations described in other embodiments. is.

[0234] (Embodiment 8)

[0235] In this embodiment, an example of electronic paper will be described as a semiconductor device according to one embodiment of the present invention.

[0236] FIG. 13 shows an active matrix type semiconductor device as an example of a semiconductor device to which one embodiment of the present invention is applied. The thin film transistor 581 used in the semiconductor device is It can be fabricated in the same way as the thin-film transistor shown in Form 4, and the In-Ga-Zn-O system non-single crystal film is used as a semiconductor. The thin film transistor shown in Embodiment 5 is a highly reliable thin film transistor including the conductive layer. The transistor can also be applied as the thin film transistor 581 of this embodiment.

[0237] The electronic paper in Figure 13 is an example of a display device that uses the twisting ball display method. The spherical display method is an electrode layer that uses spherical particles painted in black and white as display elements. and a potential difference is applied between the first electrode layer and the second electrode layer. This is a method of displaying by controlling the orientation of spherical particles by generating a magnetic field.

[0238] The thin film transistor 581 is a thin film transistor with a bottom gate structure, and the source electrode layer The drain electrode layer is in contact with the first electrode layer 587 through an opening formed in the insulating layer 585. The first electrode layer 587 and the second electrode layer 588 are electrically connected to each other. A cavity 594 having a white area 590a and a white area 590b, surrounded by a liquid-filled cavity 594. The spherical particles 589 are surrounded by a filler 595 such as a resin. In this embodiment, the first electrode layer 587 is filled with The second electrode layer 588 corresponds to a thin electrode. It is electrically connected to a common potential line provided on the same substrate as the membrane transistor 581. The connection portion is used to connect the second electrode layer 588 through conductive particles disposed between the pair of substrates. It can be electrically connected to a current-carrying line.

[0239] Also, instead of the twist ball, an electrophoretic element can be used. and a diameter of 10 μm to 20 μm that contains positively charged white particles and negatively charged black particles. Microcapsules of about 0 μm in size are used. When an electric field is applied by the first and second electrode layers, the microcapsules turn white. White particles and black particles move in opposite directions, allowing the display to be white or black. The display element that applies this principle is an electrophoretic display element, which is generally called electronic paper. Electrophoretic display elements have a higher reflectivity than liquid crystal display elements, so auxiliary lights are not required. It also consumes little power and the display can be seen even in dimly lit places. Even if power is not supplied to the display unit, the image that has been displayed can be retained. Therefore, the semiconductor device with a display function (simply a display device, or a device equipped with a display device) is The ability to preserve the displayed image even when the device (also known as a semiconductor device) is moved away This becomes possible.

[0240] Through the above steps, electronic paper with high reliability as a semiconductor device can be manufactured. .

[0241] This embodiment mode can be implemented by being appropriately combined with the configurations described in other embodiments. is.

[0242] (Embodiment 9) In this embodiment, an example of a light-emitting display device will be described as a semiconductor device according to one embodiment of the present invention. As the display element of the device, a light-emitting element using electroluminescence is used here. The light-emitting element that utilizes electroluminescence uses an organic compound as the light-emitting material. Generally, the former are organic EL elements, and the latter are inorganic compounds. These are called inorganic EL elements.

[0243] In an organic EL element, electrons and holes are released from a pair of electrodes by applying a voltage to the light-emitting element. are injected into the layers containing the light-emitting organic compounds, causing a current to flow. The recombination of the electrons and holes creates an excited state in the light-emitting organic compound. The excited state is then converted to the ground state, at which point light is emitted. Such a light-emitting element is called a current-excited light-emitting element.

[0244] Inorganic EL elements are divided into dispersion-type inorganic EL elements and thin-film-type inorganic EL elements depending on the element structure. Dispersion-type inorganic EL elements have a light-emitting layer in which particles of a light-emitting material are dispersed in a binder. The emission mechanism is a donor-acceptor interaction that utilizes the donor and acceptor levels. Thin-film inorganic EL devices sandwich the light-emitting layer between dielectric layers. Furthermore, this structure is sandwiched between electrodes, and the light emission mechanism utilizes the inner-shell electron transition of metal ions. In this example, the light-emitting element is an organic EL element. do.

[0245] FIG. 20 shows an example of a semiconductor device to which one embodiment of the present invention is applied, in which digital time gray scale driving is applied. FIG. 1 shows an example of a possible pixel configuration.

[0246] The configuration and operation of a pixel to which digital time gray scale driving can be applied will be described. The n-type semiconductor uses an oxide semiconductor layer (In-Ga-Zn-O based non-single crystal film) in the channel formation region. 1 shows an example in which two channel-type transistors are used in one pixel.

[0247] The pixel 6400 includes a switching transistor 6401, a driving transistor 6402, It has a light emitting element 6404 and a capacitor element 6403. 01 has a gate connected to a scanning line 6406 and a first electrode (one of the source and drain electrodes) The first electrode (the other of the source electrode and the drain electrode) is connected to a signal line 6405, and the second electrode (the other of the source electrode and the drain electrode) is connected to a drive The driving transistor 6402 is connected to the gate of the driving transistor 6402. The gate is connected to a power supply line 6407 via a capacitor element 6403, and the first electrode is connected to a power supply line 640 7, and the second electrode is connected to the first electrode (pixel electrode) of the light emitting element 6404. The second electrode of the light emitting element 6404 corresponds to a common electrode 6408. It is electrically connected to a common potential line formed on the substrate, and the connection portion is used as a common connection portion, The structure shown in FIG. 1(A), FIG. 2(A), or FIG. 3(A) may be used.

[0248] A low power supply potential is set to the second electrode (common electrode 6408) of the light emitting element 6404. The low power supply potential is a low power supply potential with respect to the high power supply potential set to the power supply line 6407. Potential < High power supply potential. For example, GND, 0V, etc. are set as low power supply potential. The potential difference between the high power supply potential and the low power supply potential is applied to the light emitting element 6404. Then, in order to make the light emitting element 6404 emit light by passing a current through the light emitting element 6404, a high power supply potential and the low power supply potential is set to be equal to or greater than the forward threshold voltage of the light emitting element 6404. Each potential is set.

[0249] The capacitor element 6403 is omitted by substituting the gate capacitance of the driving transistor 6402. The gate capacitance of the driving transistor 6402 is determined by the channel region A capacitance may be formed between the gate electrode and the transistor.

[0250] In the case of a voltage input voltage driving method, the gate of the driving transistor 6402 is connected to The driving transistor 6402 is either fully on or off. A video signal is input, that is, the driving transistor 6402 is operated in a linear region. The driving transistor 6402 is operated in a linear region, so that the voltage of the driving transistor 6402 is higher than the voltage of the power supply line 6407. A high voltage is applied to the gate of the driving transistor 6402. The signal line 6405 is connected to A voltage equal to or greater than (power supply line voltage+Vth of the driving transistor 6402) is applied.

[0251] Furthermore, when analog grayscale driving is performed instead of digital time grayscale driving, the input of the signal is different. By doing so, the same pixel configuration as in FIG. 20 can be used.

[0252] When analog gradation driving is performed, a light emitting element 6404 is connected to the gate of a driving transistor 6402. A voltage equal to or greater than the forward voltage of the light emitting element 64 and the Vth of the driving transistor 6402 is applied. The forward voltage in 04 refers to the voltage required to achieve the desired brightness, and It should be noted that the driving transistor 6402 is designed to operate in the saturation region. By inputting an optical signal, a current can be passed through the light emitting element 6404. In order to operate the transistor 6402 in the saturation region, the potential of the power supply line 6407 is The potential of the light emitting element is made higher than the gate potential of the capacitor 6402. A current corresponding to a video signal is passed through 6404, enabling analog gradation driving.

[0253] Note that the pixel configuration shown in Fig. 20 is not limited to this. For example, A switch, a resistor, a capacitor, a transistor, a logic circuit, or the like may be added.

[0254] Next, the configuration of the light emitting element will be described with reference to FIG. 21. Here, the driving TFT is The cross-sectional structure of a pixel will be explained using the example of the type shown in Figures 21(A), (B), and (C). The TFTs 7001, 7011, and 7021, which are driving TFTs used in semiconductor devices, are actually It can be fabricated in the same manner as the thin film transistor shown in the fourth embodiment, and is an In-Ga-Zn-O based non-single crystal The thin film transistor shown in Embodiment 5 is highly reliable and includes the film as a semiconductor layer. The thin film transistors can be applied as TFT7001, 7011, and 7021. .

[0255] The light emitting element only needs to have at least one of the anode and cathode transparent in order to extract light. Then, a thin film transistor and a light emitting element are formed on the substrate, and light is taken from the surface opposite to the substrate. Top emission, bottom emission, and top emission. There is a light emitting element having a double-sided emission structure in which light is emitted from the side surface. It can be applied to any light emitting element with any emission structure.

[0256] A light emitting element with a top emission structure will be described with reference to FIG.

[0257] In FIG. 21(A), a TFT 7001 which is a driving TFT is an n-type, and a light emitting element 7002 emits light. FIG. 21(A) shows a cross-sectional view of a pixel when incident light exits the anode 7005 side. A cathode 7003 of the light emitting element 7002 and a TFT 7001 which is a driving TFT are electrically connected. A light-emitting layer 7004 and an anode 7005 are stacked in this order on a cathode 7003. 7003 uses various materials as long as they have a small work function and are conductive films that reflect light. For example, Ca, Al, CaF, MgAg, AlLi, etc. are preferable. The light-emitting layer 7004 may be composed of a single layer or a plurality of layers stacked together. When it is composed of multiple layers, the electron injection layer is formed on the cathode 7003. The electron transport layer, the light emitting layer, the hole transport layer, and the hole injection layer are laminated in this order. It is not necessary to provide all of the anodes. The anode 7005 is made of a conductive material that transmits light. For example, indium oxide containing tungsten oxide, indium oxide containing tungsten oxide Indium zinc oxide, indium oxide with titanium oxide, indium tin oxide with titanium oxide oxide, indium tin oxide (hereinafter referred to as ITO), indium zinc oxide, oxidized silicon dioxide, A light-transmitting conductive film such as indium tin oxide to which indium is added may also be used.

[0258] The region where the light-emitting layer 7004 is sandwiched between the cathode 7003 and the anode 7005 is the light-emitting element 7002. In the case of the pixel shown in FIG. 21(A), the light emitted from the light emitting element 7002 is The light is emitted toward the anode 7005 as shown by the mark.

[0259] Next, a light emitting element with a bottom emission structure will be described with reference to FIG. When 011 is n-type and light emitted from the light emitting element 7012 is emitted to the cathode 7013 side, 21(B) shows a cross-sectional view of the pixel. A cathode 7013 of a light-emitting element 7012 is formed on a light-transmitting conductive film 7017. On the cathode 7013, a light-emitting layer 7014 and an anode 7015 are laminated in this order. When the 015 has a light-transmitting property, a shielding layer for reflecting or blocking light is applied to cover the anode. The cathode 7013 may have a film 7016 formed thereon, as in the case of FIG. Various conductive materials with small electrical conductivity can be used. The thickness is set to a level that allows light to pass through (preferably, about 5 nm to 30 nm). For example, a 20 nm film An aluminum film having a thickness of 700 nm can be used as the cathode 7013. 014 is composed of a single layer, as in FIG. 21(A), but multiple layers are laminated. The anode 7015 does not need to transmit light, but as shown in FIG. As with 21(A), it can be formed using a light-transmitting conductive material. The shielding film 7016 may be made of, for example, a metal that reflects light, but is not limited to a metal film. For example, a resin containing a black pigment may be used.

[0260] The region where the light-emitting layer 7014 is sandwiched between the cathode 7013 and the anode 7015 is the light-emitting element 7012. In the case of the pixel shown in FIG. 21B, light emitted from the light-emitting element 7012 corresponds to The light is emitted toward the cathode 7013 as shown by the arrow.

[0261] Next, a light emitting element with a dual emission structure will be described with reference to FIG. Then, on the conductive film 7027 having light-transmitting properties and electrically connected to the driving TFT 7021, A cathode 7023 of the light-emitting element 7022 is formed as a film. A light-emitting layer 7024 is formed on the cathode 7023. The cathode 7023 is laminated in the same manner as in FIG. Various conductive materials with small electrical conductivity can be used. For example, Al having a thickness of 20 nm is used as the cathode 7023. The light-emitting layer 7024 can be formed of a single layer, as in FIG. The anode 70 may be formed by laminating a plurality of layers. 25 is formed using a light-transmitting conductive material, similar to that shown in FIG. It is possible.

[0262] The overlapping portion of the cathode 7023, the light-emitting layer 7024, and the anode 7025 is the light-emitting element 70. In the case of the pixel shown in FIG. 21C, the light emitted from the light emitting element 7022 is emitted to both the anode 7025 side and the cathode 7023 side as shown by the arrows.

[0263] Although organic EL elements have been described as light-emitting elements here, inorganic EL elements can also be used as light-emitting elements. It is also possible to provide an L element.

[0264] In this embodiment, a thin film transistor (driving TFT) that controls driving of a light emitting element is Although an example in which the light emitting element is electrically connected has been shown, it is possible to prevent a current from flowing between the driving TFT and the light emitting element. A control TFT may be connected.

[0265] Note that the semiconductor device described in this embodiment mode is not limited to the configuration shown in FIG. Various modifications based on the technical concept of the present invention are possible.

[0266] Next, a light-emitting display panel (also referred to as a light-emitting panel) which is one embodiment of the semiconductor device of the present invention will be described. The appearance and cross section will be explained using Figure 24. Figure 24(A) shows a structure formed on a first substrate. The thin film transistor and the light emitting element are sealed between the second substrate and the thin film transistor and the light emitting element by a sealing material. 24(B) is a cross-sectional view of the panel taken along line HI in FIG. 24(A). do.

[0267] A pixel portion 4502, a signal line driver circuit 4503a, and a signal line driver circuit 4504 are provided on a first substrate 4501. 3b and the scanning line driver circuits 4504a and 4504b. In addition, a pixel portion 4502, signal line driver circuits 4503a and 4503b, and A second substrate 4506 is provided on the scanning line driver circuits 4504a and 4504b. The pixel portion 4502, the signal line driver circuits 4503a and 4503b, and the scanning line driver circuit 45 4504a and 4504b are a first substrate 4501, a sealing material 4505, and a second substrate 4506. The seal is sealed together with the filler 4507 by the sealant. Highly airtight protective film with little outgassing (lamination film, UV curable resin film) It is preferable to package (enclose) the product in a protective film (such as a film) or a cover material.

[0268] A pixel portion 4502, a signal line driver circuit 4503a, and a fourth 503b and the scanning line driver circuits 4504a and 4504b have a plurality of thin film transistors. In FIG. 24B, a thin film transistor 4510 included in a pixel portion 4502 and a signal 45 shows an example of a thin film transistor 4509 included in a line driver circuit 4503a.

[0269] The thin film transistors 4509 and 4510 are made of In-Ga-Zn-O based non-single crystal films as semiconductor layers. The highly reliable thin film transistor described in Embodiment 4 can be applied. In addition, the thin film transistor described in Embodiment 5 may be applied. The thin film transistors 4509 and 4510 are n-channel thin film transistors.

[0270] Further, 4511 corresponds to a light-emitting element, and a first electrode which is a pixel electrode of the light-emitting element 4511 The layer 4517 is electrically connected to the source electrode layer or the drain electrode layer of the thin film transistor 4510. The light-emitting element 4511 is configured by a first electrode layer 4517, an electroluminescent layer The second electrode layer 4512 and the second electrode layer 4513 are stacked in a stacked structure. The direction of the light emitting element 4511 is adjusted according to the direction of the light extracted from the light emitting element 4511. The configuration can be changed as appropriate.

[0271] The partition wall 4520 is formed using an organic resin film, an inorganic insulating film, or organic polysiloxane. In particular, a photosensitive material is used to form an opening on the first electrode layer 4517, and the sidewall of the opening It is preferable to form the inclined surface so that the inclined surface has a continuous curvature.

[0272] The electroluminescent layer 4512 may be composed of a single layer or a plurality of layers stacked. It doesn't matter whether it's done or not.

[0273] The second electrode layer is formed to prevent oxygen, hydrogen, moisture, carbon dioxide, and the like from entering the light-emitting element 4511. A protective film may be formed on the partition wall 4513 and the partition wall 4520. The protective film may be a silicon nitride film, A silicon nitride oxide film, a DLC film, or the like can be formed.

[0274] In addition, signal line driver circuits 4503a and 4503b, scanning line driver circuits 4504a and 4504b Various signals and potentials applied to the pixel portion 4502 are transmitted through the FPC 4518a, 4518b, and It is supplied by b.

[0275] In this embodiment, the connection terminal electrode 4515 is connected to the first electrode layer 4 The terminal electrode 4516 is formed from the same conductive film as the thin film transistors 4509 and 517. The source electrode layer and the drain electrode layer 510 are formed from the same conductive film.

[0276] The connection terminal electrode 4515 is connected to the terminal of the FPC 4518a via the anisotropic conductive film 4519. are electrically connected to each other.

[0277] The second substrate 4506 located in the direction of light extraction from the light emitting element 4511 must be light-transmitting. In this case, glass plates, plastic plates, polyester films or A light-transmitting material such as an acrylic film is used.

[0278] In addition to inert gases such as nitrogen and argon, filler 4507 can also be used as UV-curable resin. It can be made of oil or thermosetting resin, and PVC (polyvinyl chloride), acrylic, Polyimide, epoxy resin, silicone resin, PVB (polyvinyl butyral) or EV In this embodiment, nitrogen is used as the filler. The material used was

[0279] If necessary, a polarizing plate or a circular polarizing plate (including an elliptical polarizing plate) may be provided on the light-emitting surface of the light-emitting element. Optical films such as retardation plates (λ / 4 plates, λ / 2 plates) and color filters may be provided as appropriate. In addition, an anti-reflection film may be provided on the polarizing plate or the circular polarizing plate. Anti-glare treatment can be applied to diffuse reflected light and reduce glare.

[0280] The signal line driver circuits 4503a and 4503b and the scanning line driver circuits 4504a and 4504b are A driving circuit formed of a single crystal semiconductor film or a polycrystalline semiconductor film on a separately prepared substrate is Alternatively, only the signal line driver circuit, or a part of the signal line driver circuit, or the scanning line driver circuit may be mounted. Only the path or only a part of the path may be separately formed and mounted. In this embodiment, the structure shown in FIG. Not limited.

[0281] Through the above steps, a highly reliable light-emitting display device (display panel) can be manufactured as a semiconductor device. It is possible.

[0282] This embodiment mode can be implemented by being appropriately combined with the configurations described in other embodiments. is.

[0283] (Embodiment 10) The semiconductor device according to one embodiment of the present invention can be used as electronic paper. The display can be used in any electronic device that displays information. For example, electronic paper can be used for electronic books, posters, and vehicles such as trains. The present invention can be applied to in-car advertisements, displays on various cards such as credit cards, etc. An example of the electronic device is shown in FIG. 25 and FIG.

[0284] FIG. 25(A) shows a poster 2631 made of electronic paper. In the case of printed matter, the advertisements are exchanged manually. By using electronic paper, the display of advertisements can be changed in a short time. The poster is designed to be able to send and receive information wirelessly. It may also be possible to use the following.

[0285] FIG. 25(B) shows an advertisement 2632 inside a vehicle such as a train. In the case of paper printouts, the advertisements are exchanged manually. By using electronic paper, it is possible to change the display of advertisements in a short time without requiring much manpower. In addition, stable images can be displayed without any distortion. It may be configured to be able to send and receive information.

[0286] 26 shows an example of an electronic book 2700. For example, the electronic book 2700 includes: It consists of two housings, housing 2701 and housing 2703. The body 2703 is integrated with a shaft 2711, and the opening and closing movement is performed around the shaft 2711. This configuration allows the device to operate like a paper book. This becomes:

[0287] A display unit 2705 is incorporated in the housing 2701, and a display unit 2707 is incorporated in the housing 2703. The display unit 2705 and the display unit 2707 are configured to display a continuous screen. Alternatively, a different screen may be displayed. For example, a sentence is displayed on the right display unit (display unit 2705 in FIG. 26) and An image can be displayed on the display unit 2707 in FIG.

[0288] 26 shows an example in which the housing 2701 is provided with an operation unit. 701 includes a power supply 2721, operation keys 2723, a speaker 2725, etc. The operation keys 2723 can be used to turn pages. It may also be configured to include a touch panel, a pointing device, etc. On the side, there are external connection terminals (earphone terminal, USB terminal, or AC adapter and USB A configuration including a terminal that can be connected to various cables, a recording medium insertion section, etc. Furthermore, the electronic book 2700 may be configured to have the function of an electronic dictionary. That's fine.

[0289] The electronic book 2700 may also be configured to be able to send and receive information wirelessly. The desired book data can be purchased and downloaded from the e-book server. is also possible.

[0290] (Embodiment 11) A semiconductor device according to one embodiment of the present invention can be applied to various electronic devices (including game machines). The electronic device can be, for example, a television device (television or television receiver) (also called signal processors), computer monitors, digital cameras, digital video cameras , digital photo frames, mobile phones (also called mobile phones or mobile phone devices), portable games Examples include gaming machines, mobile information terminals, sound reproduction devices, and large game machines such as pachinko machines. .

[0291] FIG. 27(A) shows an example of a television device 9600. The display unit 9603 is incorporated in the housing 9601. In this case, the housing 9601 is supported by a stand 9605. This shows a configuration in which the above is supported.

[0292] The television device 9600 can be operated using an operation switch on the housing 9601 or a separate remote control. This can be done by the remote control operation device 9610. The channel and volume can be controlled by the 9609, and the information displayed on the display 9603 is In addition, the remote control operation device 9610 can operate the video. A display portion 9607 for displaying information output from 9610 may be provided.

[0293] The television device 9600 is configured to include a receiver, a modem, and the like. It can receive more general TV broadcasts and can also receive them via wired or wireless modems. By connecting to a communication network, it can be one-way (sender to receiver) or two-way. It is also possible to communicate information (between a sender and a receiver, or between receivers).

[0294] FIG. 27B shows an example of a digital photo frame 9700. The photo frame 9700 has a display unit 9703 built into a housing 9701. The unit 9703 is capable of displaying various images, for example, images taken with a digital camera. By displaying the image data, it can function like a normal photo frame.

[0295] The Digital Photo Frame 9700 has an operation panel, external connection terminals (USB terminal, US A terminal that can be connected to various cables such as B cable, etc., and a recording medium insertion section. These components may be incorporated on the same surface as the display unit, but they may be incorporated on the side or back. It is preferable to have a recording medium for a digital photo frame as it improves the design. A memory that stores image data taken with a digital camera is inserted into the body insertion section. The image data can be captured and the captured image data can be displayed on the display portion 9703 .

[0296] The digital photo frame 9700 may also be configured to be capable of transmitting and receiving information wirelessly. It is also possible to configure the device so that desired image data can be wirelessly acquired and displayed.

[0297] FIG. 28(A) shows a portable gaming machine, which is composed of two cabinets, a cabinet 9881 and a cabinet 9891. The housing 9881 is connected to a connector 9893 so as to be openable and closable. A display unit 9883 is incorporated in the housing 9891. The portable gaming machine shown in 28(A) also includes a speaker unit 9884, a recording medium insertion unit 988 6, LED lamp 9890, input means (operation key 9885, connection terminal 9887, sensor 9 888 (force, displacement, position, velocity, acceleration, angular velocity, rotation speed, distance, light, liquid, magnetism, temperature, Chemical substances, sound, time, hardness, electric field, current, voltage, power, radiation, flow rate, humidity, gradient, vibration (including functions for measuring movement, smell, or infrared rays), microphone 9889) Of course, the configuration of the portable gaming machine is not limited to the above, and It is sufficient that the configuration includes one type of semiconductor device, and other auxiliary equipment may be appropriately provided. The portable gaming machine shown in FIG. 28(A) can It has the function of reading out the program or data and displaying it on the display, and wireless communication with other portable gaming machines. The portable gaming machine shown in FIG. 28(A) has a function of sharing information. The function is not limited to this and can have various functions.

[0298] FIG. 28(B) shows an example of a slot machine 9900, which is a large gaming machine. The machine 9900 has a display unit 9903 built into a housing 9901. Machine 9900 also has other operating means such as a start lever and stop switch, coin It is equipped with an insertion slot, a speaker, etc. Of course, the configuration of the slot machine 9900 is However, the present invention is not limited to the above, and may be configured to include at least a semiconductor device according to one embodiment of the present invention. Other auxiliary equipment may be provided as appropriate.

[0299] FIG. 29(A) shows an example of a mobile phone 1000. The mobile phone 1000 has a housing In addition to the display unit 1002 incorporated in the 1001, the operation buttons 1003 and the external connection port 10 04, speaker 1005, microphone 1006, etc.

[0300] The mobile phone 1000 shown in FIG. 29(A) displays information by touching the display unit 1002 with a finger or the like. In addition, operations such as making a phone call or sending an email can be performed using the display. This can be done by touching 1002 with a finger or the like.

[0301] The screen of the display unit 1002 has three main modes. The first is a display mode that mainly displays images. The first mode is a display mode, and the second mode is an input mode that mainly inputs information such as characters. This is a display + input mode that combines two modes: display mode and input mode.

[0302] For example, when making a call or creating an email, the display unit 1002 is used to input characters. This is the main character input mode, and you can input characters displayed on the screen. It is preferable to display a keyboard or number buttons on most of the screen of the display unit 1002. I wish.

[0303] In addition, the mobile phone 1000 may include a sensor for detecting tilt, such as a gyro or an acceleration sensor. By providing a detection device having the above configuration, the orientation of the mobile phone 1000 (portrait or landscape) can be determined and the display The screen display of the display unit 1002 can be automatically switched.

[0304] The screen mode can be switched by touching the display unit 1002 or by operating the housing 1001. This is done by operating the button 1003. Also, depending on the type of image displayed on the display unit 1002, For example, if the image signal to be displayed on the display unit is a video signal, If it is data, the display mode is switched to, and if it is text data, the input mode is switched to.

[0305] In the input mode, the optical sensor of the display unit 1002 detects a signal and displays it. If there is no input by touch operation of the part 1002 for a certain period of time, the screen mode is changed to the input mode. Alternatively, the display mode may be switched from the normal mode to the display mode.

[0306] The display unit 1002 can also function as an image sensor. By touching the palm or fingers to the sensor 02, the palm print, fingerprint, etc. can be captured and identity authentication can be performed. In addition, the display unit may be equipped with a backlight that emits near-infrared light or a sensor that emits near-infrared light. By using a scanning light source, it is also possible to capture images of finger veins, palm veins, etc.

[0307] FIG. 29B is also an example of a mobile phone. The mobile phone in FIG. 29B has a housing 9411. A display device 9410 including a display portion 9412 and an operation button 9413 is mounted on a housing 9401. An operation button 9402, an external input terminal 9403, a microphone 9404, a speaker 9405, and The communication device 9400 includes a light emitting unit 9406 that emits light when an incoming call is received, and has a display function. The display device 9410 can be attached to and detached from the communication device 9400 having a telephone function in two directions as shown by the arrows. Therefore, the display device 9410 and the communication device 9400 can be attached to each other with their short axes facing each other. The display device 9410 and the communication device 9400 can be attached to each other with their long axes facing each other. When only the function is required, the display device 9410 is removed from the communication device 9400. The communication device 9400 and the display device 9410 can be used independently. Images or input information can be sent and received via wired or wireless communication, and each can be recharged with a battery. Having Terry.

Claims

[Claim 1] It has a pixel portion and a driver circuit, the pixel portion includes a first thin film transistor having at least a first oxide semiconductor layer and a first channel protection layer in contact with the first oxide semiconductor layer; The drive circuit a second thin film transistor having at least a second oxide semiconductor layer and a second channel protection layer in contact with the second oxide semiconductor layer; a third thin film transistor having a third oxide semiconductor layer and a third channel protection layer in contact with the third oxide semiconductor layer; a wiring provided below the second oxide semiconductor layer and in direct contact with a gate electrode of the second thin film transistor has a region provided above the third oxide semiconductor layer; the wiring is one of a source wiring and a drain wiring of the third thin film transistor electrically connected to the third oxide semiconductor layer.

Images