Display board and method for manufacturing the same, display device

Abstract

The present invention relates to a display substrate, a method for manufacturing the same, and a display device, wherein the display substrate has a hole region, a transient region surrounding the hole region, and a display region surrounding the transient region, the transient region is provided with isolation pillars surrounding the hole region, the isolation pillars include a first isolation portion and a first coating layer, the display substrate includes a base, the first isolation portion includes a second conductive layer, the first side and second side of the first isolation portion face the display region and hole region respectively, the first coating layer is set on the side of the first isolation portion away from the base, covering one of the first side and second side of the first isolation portion, and the second conductive layer is set on the other side of the first side and second side of the first isolation portion, contracting inward more than the first coating layer, and the first coating layer is an insulating material.

Description

Technical Field

[0001] This application claims the priority of a Chinese patent application filed with the Chinese Patent Office on March 31, 2023, with an application number of 202310341484.5 and an invention title of "Display Substrate and Its Manufacturing Method, Display Device", and its content should be understood to be incorporated into this application by reference.

[0002] This specification relates to the field of display technology, but is not limited thereto. Specifically, it relates to a display substrate and its manufacturing method, and a display device.

Background Art

[0003] With the development of display technology, people's requirements for the performance of display products are becoming increasingly high. Only a display that can withstand a series of tests such as long-term high-temperature and high-humidity tests and stress tests can meet the demand and be a qualified good product.

[0004] Organic light-emitting diode (OLED) display products have advantages such as self-emission, wide viewing angle, high contrast, low power consumption, and extremely high response speed, so they have become the mainstream products in the display field. However, reliability has always been a challenge for conventional OLED display products. The high-temperature and high-humidity operation test is to place the display in a high-temperature and high-humidity environment with the power on and observe the display after 672 hours to check whether there are any reliability defects. In the case of an OLED display product with apertures designed, since the frame of the aperture region is narrow, the area near the aperture is a place with weak reliability. To prevent external water vapor and oxygen from entering the display region through the light-emitting functional layer and the cathode layer (the OLED light-emitting element includes an anode, a light-emitting functional layer, and a cathode layer that are sequentially stacked), in some technologies, isolation columns are provided inside the edge of the aperture region to separate the light-emitting functional layer and the cathode layer and block the intrusion path of water and oxygen. However, when the display is powered on, due to the electric field effect, the conductive adhesive of the display or the conductive ions in the polarizer will be released into the display region, resulting in the loss of product reliability.

Summary of the Invention

[0005] The following is an overview of the topics described herein. This overview does not limit the scope of protection of the claims.

[0006] Embodiments of the present disclosure provide a display substrate including a hole region, a transient region surrounding the hole region, and a display region surrounding the transient region, wherein an isolation column is provided in the transient region surrounding the hole region, the isolation column includes a first isolation portion and a first coating layer, the display substrate includes a substrate, the first isolation portion includes a second conductive layer, the first side of the first isolation portion faces the display region, the second side of the first isolation portion faces the hole region, the first coating layer is set on the side of the first isolation portion away from the substrate and covers one of the first and second sides of the first isolation portion, the second conductive layer is set on the other side of the first isolation portion shrinking inward compared to the first coating layer, and the material of the first coating layer is an insulating material.

[0007] Embodiments of the present disclosure further provide a display device, which includes the display substrate.

[0008] Embodiments of the present disclosure further provide a method for manufacturing the display substrate, which includes the following steps.

[0009] A first isolation layer is formed on the substrate of the transient region, and the first isolation layer includes a first film layer, a second film layer, and a third film layer that are sequentially stacked along the direction away from the substrate, and the edges of the first film layer, the second film layer, and the third film layer are flush with each other on the side of the first isolation layer facing the display region and the side facing the hole region.

[0010] The third film layer is completely removed by employing an etching process.

[0011] A first coating layer is formed on the surface of the second film layer that is separated from the substrate, and the first coating layer covers the side of the first isolation layer facing the display area or the hole area, and on the side of the first isolation layer not covered by the first coating layer, the edges of the second film layer and the first film layer protrude beyond the edge of the first coating layer.

[0012] An etching process is employed to etch the first isolation layer so that on the side of the first isolation layer not covered by the first coating layer, the edge of the second film layer and the edge of the first coating layer become flush, and the edge of the first film layer protrudes from or is flush with the edge of the second film layer.

[0013] An etching process is employed to etch the second film layer, causing the edge of the second film layer to shrink inward on the side of the first isolation layer not covered by the first coating layer, compared to the edges of the first coating layer and the first film layer, so that the first film layer and the second film layer of the first isolation layer become the first conductive layer and the second conductive layer of the first isolation portion, respectively.

[0014] After reading and understanding the drawings and detailed descriptions, other embodiments can be understood. [Brief explanation of the drawing]

[0015] The drawings are for the purpose of further understanding the technical proposal of this disclosure and constitute part of the specification, and are used in conjunction with the embodiments of this application to interpret the technical proposal of this disclosure, and are not intended to limit the technical proposal of this disclosure. The shapes and sizes of the parts in the drawings are for illustrative purposes only and do not reflect true proportions. [Figure 1] These are schematic diagrams of the planar structure of display boards in several exemplary embodiments. [Figure 2] This is a schematic diagram of the AA cross-sectional structure in Figure 1, showing some exemplary embodiments. [Figure 3] This is a schematic diagram of the structure that separates the light-emitting functional layer of an isolation column in several technologies. [Figure 4]It is a schematic structural diagram showing the structure for partitioning the light-emitting functional layer of the isolation pillars in several technologies. [Figure 5] It is a schematic structural diagram showing the structure in which the third metal conductive layer of the isolation pillar in FIG. 4 warps upward to form a lap joint with the light-emitting functional layer. [Figure 6] It is a schematic structural diagram showing the structure in which the light-emitting functional layer in FIG. 4 bends downward to form a lap joint with the third metal conductive layer of the isolation pillar. [Figure 7a] It is a schematic cross-sectional structural diagram of the isolation pillar of the display substrate in several exemplary embodiments. [Figure 7b] It is a schematic cross-sectional structural diagram of the isolation pillar of the display substrate in several other exemplary embodiments. [Figure 7c] It is a schematic cross-sectional structural diagram of the isolation pillar of the display substrate in several other exemplary embodiments. [Figure 8] It is a schematic cross-sectional structural diagram of the isolation pillar of the display substrate in several other exemplary embodiments. [Figure 9] It is a schematic cross-sectional structural diagram of the isolation pillar of the display substrate in several further exemplary embodiments. [Figure 10] It is a schematic cross-sectional structural diagram of the isolation pillar of the display substrate in several further exemplary embodiments. [Figure 11] It is a schematic cross-sectional structural diagram of the isolation pillar of the display substrate in several further exemplary embodiments. [Figure 12a] It is a schematic structural diagram of the display substrate after forming the fourth insulating layer in several exemplary embodiments. [Figure 12b] It is a schematic structural diagram of the display substrate after forming the first source / drain metal layer in several exemplary embodiments. [Figure 12c] It is a schematic structural diagram of the display substrate after removing the third metal layer of the first isolation layer in several exemplary embodiments. [Figure 12d] It is a schematic structural diagram of the display substrate after forming the passivation layer in several exemplary embodiments. [Figure 12e] It is a schematic structural diagram of the display substrate after forming the second source / drain metal layer in several exemplary embodiments. [Figure 12f]It is a schematic diagram of the structure of a display substrate after a pixel definition layer of some exemplary embodiments is formed. [Figure 12g] It is a schematic diagram of the structure of a display substrate after etching the second metal layer of the first isolation layer in some exemplary embodiments. [Figure 13a] It is a schematic diagram of the structure of a display substrate after forming a second source / drain metal layer in some other exemplary embodiments. [Figure 13b] It is a schematic diagram of the structure of a display substrate after removing the sixth metal layer of the first isolation layer in some other exemplary embodiments. [Figure 13c] It is a schematic diagram of the structure of a display substrate after forming a second planarization layer in some other exemplary embodiments. [Figure 13d] It is a schematic diagram of the structure of a display substrate after forming a first electrode in some other exemplary embodiments. [Figure 13e] It is a schematic diagram of the structure of a display substrate after forming a pixel definition layer in some other exemplary embodiments. [Figure 13f] It is a schematic diagram of the structure of a display substrate after etching the fifth metal layer of the first isolation layer in some other exemplary embodiments. [Figure 14a] It is a schematic diagram of the structure of a display substrate after forming a fourth insulating layer in some further exemplary embodiments. [Figure 14b] It is a schematic diagram of the structure of a display substrate after forming a first source / drain metal layer in some further exemplary embodiments. [Figure 14c] It is a schematic diagram of the structure of a display substrate after etching a part of the third metal layer of the first isolation layer in some further exemplary embodiments. [Figure 14d] It is a schematic diagram of the structure of a display substrate after forming a passivation layer in some further exemplary embodiments. [Figure 14e] It is a schematic diagram of the structure of a display substrate after forming a second source / drain metal layer in some further exemplary embodiments. [Figure 14f] It is a schematic diagram of the structure of a display substrate after a pixel definition layer is formed in some further exemplary embodiments. [Figure 14g] Furthermore, the following are schematic diagrams of the structure of a display substrate after etching the second metal layer of the first isolation layer in several exemplary embodiments. [Figure 15a] Furthermore, here are schematic diagrams of the structure of the display substrate after the fourth insulating layer has been formed in several exemplary embodiments. [Figure 15b] Furthermore, here are schematic diagrams of the structure of a display substrate after the first source-drain metal layer has been formed in several exemplary embodiments. [Figure 15c] Furthermore, the following are schematic diagrams of the structure of a display substrate after the passivation layer has been formed in several exemplary embodiments. [Figure 15d] Furthermore, the following are schematic diagrams of the structure of the display substrate after the formation of the second source-drain metal layer in several exemplary embodiments. [Figure 15e] Furthermore, the following are schematic diagrams of the structure of a display substrate after etching a portion of the third metal layer of the first isolation layer in several exemplary embodiments. [Figure 15f] Furthermore, the following are schematic diagrams of the structure of a display substrate after etching the second metal layer of the first isolation layer in several exemplary embodiments. [Modes for carrying out the invention]

[0016] A person skilled in the art will understand that they may modify or change the technical proposal disclosed herein without deviating from the spirit and scope disclosed herein, but all such modifications should be included within the claims of this disclosure.

[0017] As shown in Figures 1 and 2, Figure 1 is a schematic diagram of the planar structure of a display substrate according to some exemplary embodiments, and Figure 2 is a schematic diagram of the AA cross-sectional structure of Figure 1 according to some exemplary embodiments, the display substrate includes a hole region 200, a transient region 300 surrounding the hole region 200, and a display region 100 surrounding the transient region 300.

[0018] For example, the display area 100 includes a drive structure layer 20, a light-emitting structure layer 30, and a sealing structure layer 40, which are sequentially stacked on the base 10.

[0019] The drive structure layer 20 includes a plurality of pixel drive circuits, and each pixel drive circuit includes a plurality of transistors (T) 201 and storage capacitors (C) 202. The pixel drive circuit may employ structures such as 3T1C, 4T1C, 5T1C, 5T2C, 6T1C, 7T1C, etc., and is not limited thereto in this disclosure.

[0020] The light-emitting structure layer 30 includes a plurality of light-emitting elements, which may be OLED (organic light-emitting diode) devices or QLED (quantum dot light-emitting diode) devices. The light-emitting structure layer 30 includes a first electrode layer, a pixel definition layer 32, a light-emitting function layer, and a second electrode layer 34, which are sequentially set in a direction perpendicular to the substrate 10. The first electrode layer includes a plurality of first electrodes 31, the pixel definition layer 32 is set on the side of the plurality of first electrodes 31 away from the substrate 10 and has a plurality of pixel apertures, which expose the first electrodes 31, and the light-emitting function layer and the second electrode layer 34 are sequentially stacked on the side of the first electrodes 31 away from the substrate 10. The light-emitting element includes a first electrode 31, a light-emitting function layer 33, and a second electrode layer 34. The light-emitting functional layer 33 includes an organic light-emitting layer and may further include one or more film layers of any hole injection layer, hole transport layer, and electron blocking layer located between the first electrode 31 and the organic light-emitting layer, and one or more film layers of any electron injection layer, electron transport layer, and hole blocking layer located between the second electrode layer 34 and the organic light-emitting layer. The first electrode 31 of the light-emitting element is connected to a pixel driving circuit, and the light-emitting element emits light when driven by the pixel driving circuit.

[0021] The sealing structure layer 40 may include a first sealing layer 41, a second sealing layer 42, and a third sealing layer 43, which are sequentially laminated along a direction away from the substrate 10. The main material of the first sealing layer 41 and the third sealing layer 43 (the material with the most abundant component in the film layer) is an inorganic material, which may include at least one of silicon dioxide, silicon nitride, or silicon oxide nitride, and the main material of the second sealing layer 42 is an organic material, which may be, for example, epoxy resin. Such materials help to achieve sealing and can avoid erosion by water vapor. The first sealing layer 41 and the third sealing layer 43 may be formed using a chemical vapor deposition (CVD) process, and the second sealing layer 42 may be formed using an inkjet printer (IJP) process.

[0022] Exemplary, isolation dams 60 and isolation columns 50 are set in the transient region 300, and both isolation dams 60 and isolation columns 50 are set surrounding the hole region 200. The surface of the isolation dam 60 away from the substrate 10 is higher than the surface of the isolation column 50 away from the substrate 10. The number of isolation dams 60 and isolation columns 50 is not limited. In the process of forming the second sealing layer 42 of the sealing structure layer 40 using an inkjet printer process, an overflow of inkjet printer material may occur, and the isolation dams 60 can play a role in preventing the overflow of inkjet printer material. The isolation columns 50 serve to separate the light-emitting functional layer 33 and the second electrode layer 34, preventing water-oxygen erosion from the hole region 200 along the light-emitting functional layer 33 and the second electrode layer 34 toward the display region 100, and protecting the light-emitting functional layer 33 and the second electrode layer 34 of the display region 100 from water-oxygen erosion.

[0023] Among several technologies, as shown in Figure 3, Figure 3 is a schematic diagram of a structure in which an isolation column separates the light-emitting functional layer, and includes a first metal conductive layer 1', a second metal conductive layer 2', and a third metal conductive layer 3' which are sequentially stacked along the direction away from the substrate of the isolation column, and in a cross section perpendicular to the substrate of the isolation column, the first metal conductive layer 1', the second metal conductive layer 2', and the third metal conductive layer 3' are arranged in a roughly "I" shape, and after the light-emitting functional layer 33 is separated by the isolation column, both sides of the isolation column (one side facing the display area 100, the other side All of the light-emitting functional layers 33 located (towards the hole region 200) are lap-jointed to the first metal conductive layer 1' and connected via the first metal conductive layer 1' as a conductive path. As a result, after the hole region is formed, the conductive adhesive or polarizing plate of the display adheres to the edge of the hole region and to the light-emitting functional layer 33. Consequently, when the display is powered on, the conductive ions in the conductive adhesive or polarizing plate are released into the display area via the conductive path due to the electric field, resulting in a loss of product reliability. To address this problem, the structure of the isolation column is optimized, and as shown in Figure 4, one side of the isolation column is covered with the insulating layer 4', thereby partitioning the conductive path. After the insulating layer 4' covers one side (first side) of the isolation column, it is also partially located on the surface away from the substrate of the third metal conductive layer 3', while the other side (second side) of the third metal conductive layer 3' that approaches the isolation column is not covered by the insulating layer 4'. After the light-emitting functional layer 33 is partitioned to a position on the side of the isolation column that is not covered by the insulating layer 4', the light-emitting functional layer 33 located on the first side of the isolation column is partially located on the insulating layer 4' on the surface away from the substrate of the third metal conductive layer 3', and the light-emitting functional layer 33 located on the second side of the isolation column is partially located on the first metal conductive layer 1.In practical applications, as shown in Figure 5, the portion of the third metal conductive layer 3' not covered by the insulating layer 4' approaching the second side of the isolation column may bend upward and lap-joint with the light-emitting functional layer 33 on the insulating layer 4' on the surface of the third metal conductive layer 3' away from the substrate, or as shown in Figure 6, the light-emitting functional layer 33 on the insulating layer 4' on the surface of the third metal conductive layer 3' away from the substrate may be bent downward and lap-joint with the portion of the third metal conductive layer 3' not covered by the insulating layer 4' approaching the second side of the isolation column. As a result, the light-emitting functional layer 33 located on the first side of the isolation column can still be connected to the light-emitting functional layer 33 located on the second side of the isolation column via the third metal conductive layer 3', the second metal conductive layer 2', and the first metal conductive layer 1' as a conductive passage. Consequently, when the display is powered on, the electric field action will cause conductive ions in the conductive adhesive or polarizer to still be released into the display area via the conductive path, resulting in a loss of product reliability.

[0024] As shown in Figures 1, 2, 7a, and 8, Figure 7a is a schematic cross-sectional view of the isolation column of a display substrate in some exemplary embodiments, and Figure 8 is a schematic cross-sectional view of the isolation column of a display substrate in some other exemplary embodiments, and embodiments of the present disclosure provide a display substrate which includes a hole region 200, a transient region 300 surrounding the hole region 200, and a display region 100 surrounding the transient region 300, wherein an isolation column 50 surrounding the hole region 200 is set in the transient region 300, and the isolation column 50 includes a first isolation portion 51 and a first coating layer 52, and the display The substrate includes a base layer 10, the first isolation portion 51 includes a second conductive layer 512, the first side of the first isolation portion 51 faces the display area 100, the second side of the first isolation portion 51 faces the hole area 200, the first coating layer 52 is provided on the side of the first isolation portion 51 away from the base layer 10 and covers one of the first and second sides of the first isolation portion 51, the second conductive layer 512 is set to be more inwardly compressed than the first coating layer 52 on the other side of the first and second sides of the first isolation portion 51, and the material of the first coating layer 52 is an insulating material.

[0025] In the embodiment of the present disclosure, the display substrate is provided with a first coating layer 52 of insulating material that covers one of the first and second sides of the first isolation portion 51, and the second conductive layer 512 is set to contract inward from the first coating layer 52 on the other side of the first isolation portion 51 (i.e., the first coating layer 52 is set to protrude more than the second conductive layer 512). As a result, the light-emitting functional layer 33 of the display substrate can be cut off on the side of the first isolation portion that is not covered by the first coating layer 52, and after the light-emitting functional layer 33 is cut off at the isolation column 50, it is positioned on the first coating layer 52. Since the light-emitting functional layer 33 does not lap-joint with the second conductive layer 512, the light-emitting functional layer 33 located on the side of the isolation column 50 facing the display area 100 and the light-emitting functional layer 33 located on the side of the isolation column 50 facing the display area 200 are not connected via the first isolation portion 51 which has a conductive function, and thus do not form a conductive path. Therefore, in some technologies, when the display is powered on, the conductive ions in the conductive adhesive or polarizer of the display are released into the display area 100 via the conductive path due to the action of the electric field, thus avoiding the problem of loss of product reliability.

[0026] In some exemplary embodiments, as shown in Figure 7a, the first isolation portion 51 further includes a first conductive layer 511 provided on the side of the second conductive layer 512 closer to the substrate 10, the first covering layer 52 provided on the surface of the second conductive layer 512 away from the substrate 10 and covering one of the first and second sides of the first isolation portion 51, and on the other side of the first and second sides of the first isolation portion 51, the second conductive layer 512 is set to be more inwardly compressed than the first conductive layer 511. In this embodiment, the first isolation portion 51 may include only the first conductive layer 511 and the second conductive layer 512.

[0027] In some examples of this embodiment, the second conductive layer 512 may shrink by about 0.35 to 0.4 micrometers compared to the first coating layer 52, so that the isolation column 50 separates the light-emitting functional layer 33, and after the light-emitting functional layer 33 is cut off at the isolation column 50, the light-emitting functional layer 33 located on the first coating layer 52 does not overlap and join with the second conductive layer 512 on the other side of the first isolation portion 51, either the first or second side.

[0028] In some examples of this embodiment, as shown in Figure 7b, which is a schematic cross-sectional view of the isolation column of a display substrate in some other exemplary embodiments, the portion of the first isolation portion 51 that approaches the edge of the first coating layer 52 is thinner than the rest of the first coating layer 52, and the portion that approaches the edge of the first coating layer 52 may have a gradient angle of 20° to 45°.

[0029] In some exemplary embodiments, as shown in Figure 8, the first isolation portion 51 may further include a third conductive layer 513 provided on the side of the second conductive layer 512 away from the substrate 10, the first covering layer 52 provided on the surface of the third conductive layer 513 away from the substrate 10 and covering one of the first and second sides of the first isolation portion 51, and on the other side of the first isolation portion 51, the second conductive layer 512 is set to be more inwardly compressed than the third conductive layer 513.

[0030] In some examples of this embodiment, as shown in Figure 8, the first coating layer 52 further covers the surface of the third conductive layer 513 located on the other side of the first isolation portion 51 (the side not covered by the first coating layer 52), and the orthographic projection of the third conductive layer 513 on the substrate 10 is located inside the orthographic projection of the first coating layer 52 on the substrate 10.

[0031] In this embodiment, since the first coating layer 52 covers the surfaces of the third conductive layer 513 located on the first and second sides of the first isolation portion 51, after the light-emitting functional layer 33 is cut at the isolation column 50, the light-emitting functional layer 33 located on the first coating layer 52 does not lap-joint with the third conductive layer 513 on the other sides of the first and second sides of the first isolation portion 51. As a result, the light-emitting functional layer 33 located on the side of the isolation column 50 facing the display area 100 and the light-emitting functional layer 33 located on the side of the isolation column 50 facing the hole area 200 do not form a conductive path through the first isolation portion 51 which has a conductive function. Therefore, in some technologies, when the display is powered on, the electric field action causes conductive ions in the conductive adhesive or polarizer of the display to be released into the display area 100 via the conductive path, thus avoiding the problem of loss of product reliability.

[0032] In some examples of this embodiment, the second conductive layer 512 may be set to be about 0.35 micrometers to 0.4 micrometers smaller than the first coating layer 52.

[0033] In some examples of this embodiment, on the other side of the first isolation portion 51, the portion approaching the edge of the first coating layer 52 may have a gradient angle of approximately 50 to 75 degrees, with reference to the gradient angle θ in Figure 7b.

[0034] In some exemplary embodiments, as shown in Figure 9, Figure 9 is a schematic cross-sectional view of an isolation column of a display substrate in some further exemplary embodiments, the isolation column may further include a second isolation portion 53, the second isolation portion 53 being set on the side of the first isolation portion 51 facing the substrate 10, and the second isolation portion 53 includes a fourth conductive layer 531, a fifth conductive layer 532, and a sixth conductive layer 533 that are sequentially laminated along the side away from the substrate 10, the first side of the second isolation portion 53 facing the display area 100, the second side of the second isolation portion 53 facing the hole area 200, the first covering layer 52 covering one of the first and second sides of the second isolation portion 53, and the fifth conductive layer 532 being set to be more inwardly compressed than the fourth conductive layer 531 and the sixth conductive layer 533 on the other side of the first and second sides of the second isolation portion 53. In other embodiments, the second isolation portion 53 may include only the fourth conductive layer 531 and the fifth conductive layer 532, which are sequentially laminated along the direction away from the substrate 10, and the sixth conductive layer 533 may not be provided.

[0035] In this embodiment, by providing the second isolation section 53, the light-emitting functional layer 33 can be partitioned on the first side of the second isolation section 53 and on the side of the second side that is not covered by the first covering layer 52, thereby improving the partitioning effect of the isolation column on the light-emitting functional layer 33.

[0036] In some examples of this embodiment, as shown in Figure 9, the side of the first isolation portion 51 covered by the first coating layer 52 is located on the same side of the isolation column as the side of the second isolation portion 53 covered by the first coating layer 52, and for example, both may be located on the side of the isolation column facing the display area 100, or both may be located on the side of the isolation column facing the hole area 200.

[0037] In some examples of this embodiment, as shown in Figure 9, the first conductive layer 511 may be provided on a surface of the sixth conductive layer 533 that is separated from the substrate 10. The materials of the first conductive layer 511 and the sixth conductive layer 533 may be the same or different.

[0038] In some exemplary embodiments, as shown in Figures 9 and 10, Figure 10 is a schematic cross-sectional view of the isolation column of a display substrate in some further exemplary embodiments, the isolation column including a first isolation section 51, a first coating layer 52, and a second isolation section 53. In the example of Figure 9, the structure of the first isolation section 51 may be the same as the structure of the first isolation section 51 in Figure 7a, and the first isolation section 51 includes a first conductive layer 511 and a second conductive layer 512 that are sequentially laminated along the direction away from the substrate 10, the first coating layer 52 is provided on the surface of the second conductive layer 512 away from the substrate 10 and covers the side of the first isolation section 51 and the second isolation section 53 facing the display area 100 or hole area 200, and on the side of the first isolation section 51 not covered by the first coating layer 52, the second conductive layer 512 is set to be more inwardly contracted than the first conductive layer 511 and the first coating layer 52. In the example of Figure 10, the structure of the first isolation section 51 may be the same as the structure of the first isolation section 51 in Figure 8. The first isolation section 51 includes a first conductive layer 511, a second conductive layer 512, and a third conductive layer 513 that are sequentially laminated along the direction away from the substrate 10. The first covering layer 52 is provided on the surface of the third conductive layer 513 away from the substrate 10, covering the side of the first isolation section 51 and the second isolation section 53 toward the display area 100 or hole area 200, and covering the surface of the third conductive layer 513 on the side of the first isolation section 51 not covered by the first covering layer 52. The second conductive layer 512 is set on the side of the first isolation section 51 not covered by the first covering layer 52, shrinking inward more than the first conductive layer 511 and the third conductive layer 513.

[0039] In some exemplary embodiments, as shown in Figure 11, Figure 11 is a schematic cross-sectional view of an isolation column of a display substrate in some further exemplary embodiments, wherein the isolation column 50 includes a first isolation portion 51 and a first coating layer 52, the first isolation portion 51 includes a first conductive layer 511 and a second conductive layer 512 that are sequentially laminated along the direction away from the substrate 10, the first side of the first isolation portion 51 faces the display area 100, the second side of the first isolation portion 51 faces the hole area 200, the first coating layer 52 is provided on the side of the first isolation portion 51 away from the substrate 10 and covers one of the first and second sides of the first isolation portion 51, the second conductive layer 512 is set to be more inwardly compressed than the first conductive layer 511 and the first coating layer 52, and the material of the first coating layer 52 is an insulating material.

[0040] The isolation column 50 may further include a second isolation section 53 and a second coating layer 54, wherein the second isolation section 53 is provided on the side of the first isolation section 51 facing the substrate 10, the first side of the second isolation section 53 facing the display area 100, and the second side of the second isolation section 53 facing the hole area 200, the second coating layer 54 is provided between the second isolation section 53 and the first isolation section 51, and covers one of the first and second sides of the second isolation section 53, the material of the second isolation section 53 is a conductive material, and the material of the second coating layer 54 is an insulating material.

[0041] In some examples of this embodiment, as shown in Figure 11, the second isolation portion 53 may include a fourth conductive layer 531, a fifth conductive layer 532, and a sixth conductive layer 533 that are sequentially laminated along the direction away from the substrate 10, and on the other side of the second isolation portion 53 (the side not covered by the second coating layer 54), the fifth conductive layer 532 is set to be more inwardly compressed than the fourth conductive layer 531 and the sixth conductive layer 533.

[0042] In some examples of this embodiment, as shown in Figure 11, the side of the first isolation section 51 covered by the first coating layer 52 and the side of the second isolation section 53 covered by the second coating layer 54 may be located on different sides of the isolation column 50. For example, the side of the first isolation section 51 covered by the first coating layer 52 may be located on the side of the isolation column 50 facing the display area 100, and the side of the second isolation section 53 covered by the second coating layer 54 may be located on the side of the isolation column 50 facing the hole area 200; or the side of the first isolation section 51 covered by the first coating layer 52 may be located on the side of the isolation column 50 facing the hole area 200, and the side of the second isolation section 53 covered by the second coating layer 54 may be located on the side of the isolation column 50 facing the display area 100. In other embodiments, the side of the first isolation portion 51 covered by the first coating layer 52 and the side of the second isolation portion 53 covered by the second coating layer 54 may be located on the same side of the isolation column 50. For example, they may both be located on the side of the isolation column 50 facing the display area 100, or they may both be located on the side of the isolation column 50 facing the hole area 200.

[0043] In some exemplary embodiments, the number of isolation sections of the isolation column may be one or more. For example, in the examples of Figures 7a and 8, there may be only one isolation section (i.e., a first isolation section), in the examples of Figures 9, 10, and 11, there may be two isolation sections (i.e., a first isolation section and a second isolation section), and in other embodiments, the number of isolation sections may be three or four, and so on. The embodiments of this disclosure do not limit the number of isolation sections of the isolation column.

[0044] In some exemplary embodiments, as shown in Figures 7a and 8, the isolation column 50 may further include a column foundation 55 set on the side of the first isolation section 51 facing the base 10, and the column foundation 55 may include one or more membrane layers.

[0045] In some examples of this embodiment, the column foundation 55 may include one inorganic insulating layer or multiple inorganic insulating layers arranged in layers. Alternatively, the column foundation 55 may include at least one inorganic insulating layer and at least one metal layer, wherein the metal layer is covered with the inorganic insulating layer.

[0046] Exemplary, as shown in Figure 7c, which is a schematic cross-sectional view of the isolation column of a display substrate in some other exemplary embodiments, the column base 55 may include a seventh metal layer 555, a first inorganic insulating layer 553, an eighth metal layer 556, and a second inorganic insulating layer 554, which are sequentially laminated along the direction away from the substrate, with the first inorganic insulating layer 553 covering the seventh metal layer 555 and the second inorganic insulating layer 554 covering the eighth metal layer 556. The first isolation portion 51 may be provided on the surface of the second inorganic insulating layer 554 away from the substrate.

[0047] In some examples of this embodiment, as shown in Figures 7a and 8, if the isolation column 50 does not include the second isolation section 53, the first conductive layer 511 of the first isolation section 51 may be provided on a surface of the column foundation 55 that is away from the substrate 10.

[0048] In some examples of this embodiment, as shown in Figures 9 and 10, when the isolation column 50 includes the second isolation section 53, the column base 55 may be provided on the side of the second isolation section 53 facing the substrate 10, and the fourth conductive layer 531 of the second isolation section 53 may be provided on the surface of the column base 55 that is away from the substrate 10.

[0049] In some exemplary embodiments, as shown in Figure 2, the display area 100 includes a drive structure layer 20 and a light-emitting structure layer 30 that are sequentially stacked on the base 10, the drive structure layer 20 includes a pixel drive circuit, the pixel drive circuit includes a plurality of transistors 201 and a storage capacitor 202, the light-emitting structure layer 30 includes a plurality of light-emitting elements, the light-emitting elements include a first electrode 31, a light-emitting functional layer 33 and a second electrode layer 34 that are sequentially stacked along a direction away from the base 10.

[0050] In a direction perpendicular to the substrate 10, the drive structure layer 20 may include a first source / drain metal layer, a fifth insulating layer 25, a second source / drain metal layer, and a second flat layer 26, which are sequentially set away from the substrate 10, the first source / drain metal layer including at least one source electrode 2013 and drain electrode 2014 of the transistor 201, the second source / drain metal layer including a connecting electrode 203 connected to the source electrode 2013 or drain electrode 2014 of the transistor 201, and the connecting electrode 203 is also connected to the first electrode 31.

[0051] In some examples of this embodiment, the first source-drain metal layer includes a plurality of metal layers stacked together, and the first isolation portion 51 may be provided in the same single layer as the source electrode 2013 and drain electrode 2014 of the transistor 201. The film layers of the first isolation portion 51 may be the same as the film layers of the source electrode 2013 and drain electrode 2014 of the transistor 201, or the number of film layers of the first isolation portion 51 may be less than the number of film layers of the source electrode 2013 and drain electrode 2014 of the transistor 201.

[0052] In this disclosure, "A and B are set in the same layer" means that the film layer of A and the film layer of B originate from the same thin film, which may be a single-layer structure or a multilayer composite structure, and the film layer of A and the film layer of B may be the same or different. "A and B are set in the same layer" means that the same thin film simultaneously forms A and B through the same patterning process, or that the same thin film simultaneously forms A' and B' through the same patterning process, and A is obtained after further processing (e.g., etching) of A', and B is obtained after further processing (e.g., etching) of B'.

[0053] Exemplary, the first source-drain metal layer includes a first metal layer 301, a second metal layer 302, and a third metal layer 303, which are sequentially stacked along the direction away from the substrate 10. For example, the first metal layer 301 and the third metal layer 303 may be titanium layers, and the second metal layer 302 may be an aluminum layer. The film layers of the source electrode 2013 and the drain electrode 2014 of the transistor 201 are the same as the film layers of the first source-drain metal layer, i.e., both include a first metal layer 301, a second metal layer 302, and a third metal layer 303, which are stacked. In some examples, as shown in Figure 7a, the first isolation portion 51 includes two film layers, i.e., a first conductive layer 511 and a second conductive layer 512, where the first conductive layer 511 is made of the same material as the first metal layer 301 and the second conductive layer 512 is made of the same material as the second metal layer 302. In some other examples, as shown in Figure 8, the first isolation portion 51 includes three film layers, namely the first conductive layer 511, the second conductive layer 512, and the third conductive layer 513, wherein the first conductive layer 511 is made of the same material as the first metal layer 301, the second conductive layer 512 is made of the same material as the second metal layer 302, and the third conductive layer 513 is made of the same material as the third metal layer 303.

[0054] The first coating layer 52 may be set to be the same single layer as the fifth insulating layer 25, and the fifth insulating layer 25 may have a single-layer structure or a multi-layer structure. If the fifth insulating layer 25 has a single-layer structure, the material of the first coating layer 52 is the same as the material of the fifth insulating layer 25, and if the fifth insulating layer 25 has a multi-layer structure, the material of the first coating layer 52 may be the same as the material of any one of the film layers of the fifth insulating layer 25, or the first coating layer 52 may contain multiple film layers, and the materials of the multiple film layers of the first coating layer 52 are the same as the materials of the multiple film layers of the fifth insulating layer 25. For example, the fifth insulating layer 25 includes a passivation layer 251 and a first flat layer 252 that are sequentially laminated along a direction away from the substrate 10, and the material of the first coating layer 52 may be the same as that of the passivation layer 251 or the first flat layer 252, or the first coating layer 52 may include two film layers, and the two film layers may each be made of the same material as the passivation layer 251 and the first flat layer 252. Alternatively, for example, the fifth insulating layer 25 may include only the first flat layer 252, that is, the material of the first coating layer 52 is the same as that of the first flat layer 252.

[0055] In some examples of this embodiment, the second source / drain metal layer may include a plurality of metal layers arranged in a stack, and the first isolation portion 51 may be provided in the same single layer as the connecting electrode 203. The film layer of the first isolation portion 51 may be the same as the film layer of the connecting electrode 203, or the number of film layers of the first isolation portion 51 may be less than the number of film layers of the connecting electrode 203.

[0056] Exemplary, the second source-drain metal layer may include a fourth metal layer 401, a fifth metal layer 402, and a sixth metal layer 403, which are sequentially laminated along the direction away from the substrate 10. For example, the fourth metal layer 401 and the sixth metal layer 403 may be titanium layers, and the fifth metal layer 402 may be an aluminum layer. The film layer of the connecting electrode 203 is the same as the film layer of the second source-drain metal layer, i.e., it includes the fourth metal layer 401, the fifth metal layer 402, and the sixth metal layer 403, which are laminated. In some examples, as shown in Figure 7a, the first isolation portion 51 includes two film layers, i.e., the first conductive layer 511 and the second conductive layer 512, where the first conductive layer 511 is made of the same material as the fourth metal layer 401 and the second conductive layer 512 is made of the same material as the fifth metal layer 402. In some other examples, as shown in Figure 8, the first isolation portion 51 may include three film layers, namely the first conductive layer 511, the second conductive layer 512, and the third conductive layer 513, wherein the first conductive layer 511 is made of the same material as the fourth metal layer 401, the second conductive layer 512 is made of the same material as the fifth metal layer 402, and the third conductive layer 513 is made of the same material as the sixth metal layer 403.

[0057] The first coating layer 52 may be the same layer as the second flat layer 26 and may be made of the same material.

[0058] In some examples of this embodiment, as shown in Figures 9 and 10, the isolation column 50 includes a first isolation section 51, a first coating layer 52, and a second isolation section 53. The first isolation section 51 is set to be the same layer as the connecting electrode 203, the first coating layer 52 is set to be the same layer as the second flat layer 26 and may be made of the same material, and the second isolation section 53 may be set to be the same layer as the source electrode 2013 and drain electrode 2014 of the transistor 201.

[0059] Exemplary, the first source-drain metal layer may include a first metal layer 301, a second metal layer 302, and a third metal layer 303 that are sequentially stacked along a direction away from the substrate 10. For example, the first metal layer 301 and the third metal layer 303 may be titanium layers, and the second metal layer 302 may be an aluminum layer. The film layers of the source electrode 2013 and the drain electrode 2014 of the transistor 201 are the same as the film layers of the first source-drain metal layer, that is, they both include a first metal layer 301, a second metal layer 302, and a third metal layer 303 that are stacked. The second isolation portion 53 includes a fourth conductive layer 531, a fifth conductive layer 532, and a sixth conductive layer 533 which are sequentially laminated along a direction away from the base material 10. The material of the fourth conductive layer 531 is the same as the material of the first metal layer 301, the material of the fifth conductive layer 532 is the same as the material of the second metal layer 302, and the material of the sixth conductive layer 533 is the same as the material of the third metal layer 303.

[0060] The second source-drain metal layer may include a fourth metal layer 401, a fifth metal layer 402, and a sixth metal layer 403, which are sequentially laminated along the direction away from the substrate 10. For example, the fourth metal layer 401 and the sixth metal layer 403 may be titanium layers, and the fifth metal layer 402 may be an aluminum layer. The film layer of the connecting electrode 203 is the same as the film layer of the second source-drain metal layer, i.e., both include a fourth metal layer 401, a fifth metal layer 402, and a sixth metal layer 403, which are laminated. In some examples, as shown in Figure 9, the first isolation portion 51 includes two film layers, i.e., a first conductive layer 511 and a second conductive layer 512, where the first conductive layer 511 is made of the same material as the fourth metal layer 401 and the second conductive layer 512 is made of the same material as the fifth metal layer 402. In some other examples, as shown in Figure 10, the first isolation portion 51 includes three film layers, namely the first conductive layer 511, the second conductive layer 512, and the third conductive layer 513, wherein the first conductive layer 511 is made of the same material as the fourth metal layer 401, the second conductive layer 512 is made of the same material as the fifth metal layer 402, and the third conductive layer 513 is made of the same material as the sixth metal layer 403.

[0061] In some examples of this embodiment, as shown in Figure 11, the isolation column 50 includes a first isolation portion 51 and a first coating layer 52, and a second isolation portion 53 and a second coating layer 54. The first isolation portion 51 is set to be the same layer as the connecting electrode 203, the first coating layer 52 is set to be the same layer as the second flat layer 26 and may be made of the same material, the second isolation portion 53 may be set to be the same layer as the source electrode 2013 and drain electrode 2014 of the transistor 201, and the second coating layer 54 may be set to be the same layer as the fifth insulating layer 25. In this example, the film layer structure of the first isolation portion 51 and the second isolation portion 53 may refer to the example in Figure 10, and the film layer structure of the second coating layer 54 may refer to the film layer structure of the first coating layer 52 when it is set to be the same layer as the first coating layer 52 and the fifth insulating layer 25 in the above example.

[0062] In some examples of this embodiment, as shown in Figure 2, the drive structure layer 20 may include a semiconductor layer, a first gate metal layer, and a second gate metal layer, which are set on the side of the first source / drain metal layer facing the substrate 10, the semiconductor layer may include the active layer 2011 of the transistor 201, the first gate metal layer may include the gate electrode 2012 of the transistor 201 and one plate of the storage capacitor 202, and the second gate metal layer may include the other plate of the storage capacitor 202.

[0063] The column foundation 55 may include one inorganic insulating layer or multiple inorganic insulating layers arranged in layers. Alternatively, the column foundation 55 may include at least one inorganic insulating layer and at least one metal layer, wherein the metal layer may cover the inorganic insulating layer. Exemplarily, one inorganic insulating layer of the column foundation 55 may be set in the same layer as and made of the same material as the insulating layer located between the first source / drain metal layer and the second gate metal layer. The metal layer in the column foundation 55 may be set in the same layer as and made of the same material as the first gate metal layer and / or the second gate metal layer. Exemplarily, as shown in Figure 7c, the column foundation 55 may include a seventh metal layer 555, a first inorganic insulating layer 553, an eighth metal layer 556, and a second inorganic insulating layer 554, which are sequentially laid out along the direction away from the substrate, with the first inorganic insulating layer 553 covering the seventh metal layer 555 and the second inorganic insulating layer 554 covering the eighth metal layer 556. The seventh metal layer 555 may be the same single layer as the first gate metal layer and made of the same material, and the eighth metal layer 556 may be the same single layer as the second gate metal layer and made of the same material.

[0064] In some exemplary embodiments, as shown in Figure 2, the drive structure layer 20 includes a first insulating layer 21, a semiconductor layer, a second insulating layer 22, a first gate metal layer, a third insulating layer 23, a second gate metal layer, a fourth insulating layer 24, a first source / drain metal layer, a fifth insulating layer 25, a second source / drain metal layer, and a sixth insulating layer, which are sequentially laminated on the substrate 10. The fifth insulating layer 25 may include a passivation layer 251 and a first flat layer 252, which are sequentially laminated along the direction away from the substrate 10, or the fifth insulating layer 25 may include only the first flat layer 252, and the sixth insulating layer is the second flat layer 26. The first electrode 31 may be set on the surface of the second flat layer 26 away from the substrate 10.

[0065] For example, the substrate 10 may be a flexible substrate 10, and may include, for example, a polyimide (PI) material. Alternatively, the substrate 10 may be a rigid substrate 10, such as glass. For example, the first insulating layer 21, the second insulating layer 22, the third insulating layer 23, the fourth insulating layer 24, and the passivation layer 251 may be inorganic insulating layers, such as silicon oxide (SiOX), silicon nitride (SiNX), and silicon oxide nitride (SiO X N Y One or more of the above types may be used, and the structure may be single-layer or multi-layer. The first insulating layer 21 may be called a buffer layer for improving the aqueous and oxygen resistance of the substrate 10, the second insulating layer 22 and the third insulating layer 23 may be called gate insulating layers (GI), and the fourth insulating layer 24 may be called an interlayer insulating layer (ILD). The first flat layer 252 and the second flat layer 26 are organic insulating layers, and organic insulating materials, such as resin, may be used. The first gate metal layer, the second gate metal layer, the first source / drain metal layer, and the second source / drain metal layer may be made of a metallic material, for example, one or more of the following: silver (Ag), copper (Cu), aluminum (Al), titanium (Ti), and molybdenum (Mo). Alternatively, they may be alloys of the above metals, for example, aluminum neodymium alloy (AlNd) or molybdenum niobium alloy (MoNb). They may be single-layer or multilayer structures, for example, a Ti / Al / Ti stacked structure. The semiconductor layer may be made of materials such as amorphous indium gallium zinc oxide (a-IGZO), zinc nitrogen oxide (ZnON), indium zinc tin oxide (IZTO), amorphous silicon (a-Si), polycrystalline silicon (p-Si), hexathiophene, or polythiophene. In other words, this disclosure applies to transistors 201 manufactured based on oxide technology, silicon technology, or organic technology.

[0066] In some exemplary embodiments, as shown in Figure 2, four isolation columns 50a, 50b, 50c, and 50d are shown. The number of isolation columns 50 is not limited and may be set to one or more, for example, and the isolation columns 50 may be set on the side of the isolation dam 60 facing the display area 100 and / or the side facing the hole area 200. If there are multiple isolation columns 50, the structures of the multiple isolation columns 50 may be the same or different, and the multiple isolation columns 50 may be one or more of the isolation columns 50 examples in Figures 7a, 8, 9, 10, and 11. Of the multiple isolation columns 50, the side covered by the first covering layer of the first isolation section may all face the display area or the hole area, or at least one side of the isolation column 50 covered by the first covering layer of the first isolation section may face the hole area, and at least one side of the isolation column 50 covered by the first covering layer of the first isolation section may face the display area.

[0067] In some exemplary embodiments, as shown in Figure 2, the isolation dam 60 includes a first dam layer, a second dam layer, and a third dam layer that are sequentially stacked along the direction away from the substrate 10, wherein the first dam layer may be the same layer as the first flat layer 25, the second dam layer may be the same layer as the second flat layer 26, and the third dam layer may be the same layer as the pixel definition layer 32. The isolation dam 60 may further include a dam foundation set on the side of the first dam layer facing the substrate 10, and the dam foundation may include at least one inorganic insulating layer.

[0068] The structure of a display substrate will be described exemplified below through the manufacturing process of the display substrate. In this disclosure, the “patterning process” includes processes such as photoresist coating, mask exposure, development, etching, and photoresist stripping for metallic, inorganic, or transparent conductive materials, and processes such as organic material coating, mask exposure, and development for organic materials. Deposition may be sputtering, vapor deposition, or chemical vapor deposition (one or more types); coating may be spray, spin coating, or inkjet printing (one or more types); and etching may be dry etching or wet etching (one or more types), but these disclosures are not limited to these. “Thin film” refers to a thin film produced by vapor deposition, coating, or other processes on a substrate. In the overall manufacturing process, if the “thin film” does not require a patterning process, it may also be called a “layer.” If the “thin film” requires a patterning process in the overall manufacturing process, it is referred to as a “thin film” before the patterning process and as a “layer” after the patterning process. A “layer” after the patterning process includes at least one “pattern.” The "thickness" of the film layer is the size of the film layer in the direction perpendicular to the display substrate. In exemplary embodiments of this disclosure, "the orthographic projection of B is located within the range of the orthographic projection of A" or "the orthographic projection of A includes the orthographic projection of B" means that the boundary of the orthographic projection of B is within the boundary range of the orthographic projection of A, or that the boundary of the orthographic projection of A overlaps with the boundary of the orthographic projection of B.

[0069] In some exemplary embodiments, using the display substrate shown in Figure 2 and the isolation column shown in Figure 7a as examples, the first isolation portion 51 is set to be the same layer as the source electrode 2013 and drain electrode 2014 of the transistor 201, and the first coating layer 52 is set to be the same layer as the passivation layer 251 of the fifth insulating layer 25. Exemplarily, the manufacturing process of the display substrate may include the following operations.

[0070] (1) The drive structure layer 20 and the membrane layer of the isolation column 50 are formed.

[0071] A first insulating thin film and a semiconductor thin film are sequentially deposited onto the substrate 10, and the semiconductor thin film is patterned by a patterning process to form a first insulating layer 21 covering the substrate 10 and a semiconductor layer pattern placed on the first insulating layer 21. The semiconductor layer pattern includes a plurality of active layers 2011 located in the display area 100. After this patterning process, the transient area 300 includes the first insulating layer 21 set on the substrate 10. As shown in Figure 12a.

[0072] Next, the second insulating thin film and the first gate metal thin film are sequentially deposited, and the first gate metal thin film is patterned by a patterning process to form a second insulating layer 22 that covers the semiconductor layer pattern and a first gate metal layer pattern set on the second insulating layer 22. The first gate metal layer pattern includes a plurality of gate electrodes 2012 and a plurality of first electrode plates 2021 located in the display area 100. After this patterning process, the transient area 300 includes a first insulating layer 21 and a second insulating layer 22 that are sequentially laminated on the substrate 10, as shown in Figure 12a.

[0073] Next, the third insulating thin film and the second gate metal thin film are sequentially deposited, and the second gate metal thin film is patterned by a patterning process to form a third insulating layer 23 covering the first gate metal layer and a second gate metal layer pattern set on the third insulating layer 23. The second gate metal layer pattern includes a plurality of second electrodes 2022 located in the display area 100. The plurality of second electrodes 2022 are set opposite a plurality of first electrodes 2021 to form a plurality of storage capacitors 202. After this patterning process, the transient area 300 includes a first insulating layer 21, a second insulating layer 22, and a third insulating layer 23 that are sequentially laminated on the substrate 10, as shown in Figure 12a.

[0074] Next, a fourth insulating thin film is deposited and patterned by a patterning process to form a fourth insulating layer 24 pattern that covers the second gate metal layer pattern. The fourth insulating layer 24 pattern includes a first column base layer 551 located in the transient region 300. The fourth insulating layer 24 in the display region 100 has a plurality of first vias V1 and a plurality of second vias V2, with the plurality of first vias V1 exposing one end of the plurality of active layers 2011 and the second vias V2 exposing the other end of the plurality of active layers 2011. After this patterning process, the transient region 300 includes a first insulating layer 21, a second insulating layer 22, and a third insulating layer 23 that are sequentially laminated on the substrate 10, and a first column base layer 551 set on the third insulating layer 23, as shown in Figure 12a.

[0075] Next, a first source-drain metal thin film is deposited and patterned by a patterning process to form a first source-drain metal layer pattern on the fourth insulating layer 24. The first source-drain metal layer pattern includes a plurality of source electrodes 2013 and a plurality of drain electrodes 2014 located in the display region 100, and a first isolation layer located on the first column base layer 551 in the transient region 300. The source electrodes 2013 are connected to one end of the active layer 2011 via a first via V1, and the drain electrodes 2014 are connected to the other end of the active layer 2011 via a second via V2. The plurality of active layers 2011, a plurality of gate electrodes 2012, a plurality of source electrodes 2013, and a plurality of drain electrodes 2014 in the display region 100 constitute a plurality of transistors 201, as shown in Figure 12b.

[0076] The first source / drain metal layer includes a first metal layer 301, a second metal layer 302, and a third metal layer 303, which are sequentially laminated along the direction away from the substrate 10. For example, the first metal layer 301 and the third metal layer 303 may be titanium layers, and the second metal layer 302 may be an aluminum layer. In that case, the source electrode 2013, the drain electrode 2014, and the first isolation layer each include a first metal layer 301 (Ti), a second metal layer 302 (Al), and a third metal layer 303 (Ti), which are sequentially laminated along the direction away from the substrate 10. On the side of the first isolation layer facing the display area 100 and the side facing the hole area 200, the edges of the first metal layer 301, the second metal layer 302, and the third metal layer 303 of the first isolation layer may be substantially flush, as shown in Figure 12b.

[0077] In this specification, "edges A and B are flush" means that the edges of A and B are flush within the range of process tolerance, and not that they are absolutely flush.

[0078] Next, using a photomask, an etching process is employed to completely etch the third metal layer 303 of the first isolation layer in the transient region 300, as shown in Figure 12c.

[0079] Next, a passivation thin film is deposited and patterned by a patterning process to form a passivation layer 251 pattern that covers the first source-drain metal layer pattern. The passivation layer 251 pattern includes a first coating layer 52 located in the transient region 300, where the first coating layer 52 is set on the surface of the second metal layer 302 of the first isolation layer that is away from the substrate 10 and covers one side of the first isolation layer (e.g., the side facing the display region 100). The portion of the first isolation layer that is close to the other side of the first isolation portion on the surface of the second metal layer 302 of the first isolation layer that is away from the substrate 10 (e.g., the side facing the pore region 200) does not need to be covered by the first isolation layer 52, as shown in Figure 12d.

[0080] Next, a first flat thin film is applied, and the first flat thin film is patterned by a patterning process to form a first flat layer 252 pattern on the passivation layer 251. Multiple third vias V3 located in the display area 100 are formed in the first flat layer 252, and the first flat layer 252 and passivation layer 251 within the third vias V3 are removed to expose the surface of the drain electrode 2014, as shown in Figure 12e. In this example, the entire passivation layer 251 and the first flat layer 252 are referred to as the fifth insulating layer 25, and the passivation layer 251 can be an inorganic insulating material and the first flat layer 252 can be an organic insulating material. In other examples, the passivation layer 251 may not be provided, and the fifth insulating layer 25 may include only the first flat layer 252. In this case, the first coating layer 52 may be formed simultaneously during the patterning process of the first flat layer 252.

[0081] Next, a second source-drain metal thin film is deposited, and a patterning process is employed to pattern the second source-drain metal thin film, forming a second source-drain metal layer pattern on the first flat layer 252. The second source-drain metal layer pattern includes a plurality of anode connection electrodes 203 located in the display area 100, and the anode connection electrodes 203 are connected to the drain electrode 2014 via a third via V3, as shown in Figure 12e.

[0082] The film structure and material of the second source-drain metal layer may be the same as that of the first source-drain metal layer. For example, the second source-drain metal layer may include a fourth metal layer 401, a fifth metal layer 402, and a sixth metal layer 403 that are sequentially laminated along the direction away from the substrate 10. For example, the fourth metal layer 401 and the sixth metal layer 403 may be titanium layers, and the fifth metal layer 402 may be an aluminum layer. As a result, in the patterning process of the second source-drain metal thin film, the portion of the transient region 300 not covered by the first coating layer 52 of the first isolation layer is also etched. After the patterning process is completed, the portion of the second metal layer 302 of the first isolation layer not covered by the first coating layer 52 in the transient region 300 is etched, and on the side of the first isolation layer not covered by the first coating layer 52, the edge of the second metal layer 302 of the first isolation layer is approximately flush with the edge of the first coating layer 52, while the edge of the first metal layer 301 of the first isolation layer protrudes more than the edge of the second metal layer 302. Because the titanium first metal layer 301 of the first isolation layer is more difficult to etch than the aluminum second metal layer 302, after the patterning process is completed, on the side of the first isolation layer not covered by the first coating layer 52, the edge of the first metal layer 301 of the first isolation layer protrudes more than the edge of the second metal layer 302. As shown in Figure 12e.

[0083] Next, a second flat thin film is applied, and a patterning process is employed to pattern the second flat thin film, forming a second flat layer 26 pattern that covers the second source / drain metal layer pattern. Multiple fourth vias V4 located in the display area 100 are formed in the second flat layer 26, and the second flat layer 26 within the fourth vias V4 is removed to expose the surface of the anode connection electrode 203, as shown in Figure 12f.

[0084] This completes the fabrication of the drive structure layer 20 and the membrane layer of the isolation column 50.

[0085] (2) Form the light-emitting structural layer 30. In an exemplary embodiment, forming the light-emitting structural layer 30 may include the following steps.

[0086] A first electrode thin film is deposited on the substrate 10 on which the aforementioned pattern is formed, and the first electrode thin film is patterned by a patterning process to form a first electrode layer pattern. The first electrode layer pattern includes a plurality of first electrodes 31 (anodes) located in the display area 100, and the first electrodes 31 are connected to the anode-connecting electrode 203 via a fourth via V4 on the second flat layer 26, thereby connecting the first electrodes 31 to the drain electrode 2014 via the anode-connecting electrode 203, as shown in Figure 12f.

[0087] Next, a pixel definition thin film is applied to the substrate 10 on which the aforementioned pattern is formed, and the pixel definition thin film is patterned by a patterning process to form a pixel definition layer 32 pattern, and multiple pixel apertures are set in the pixel definition layer 32, and the pixel apertures expose the surface of the first electrode 31 of the display area 100, as shown in Figure 12f.

[0088] Next, using a photomask, a wet etching process is employed to etch the second metal layer 302 of the first isolation layer in the transient region 300 laterally. This causes the second metal layer 302 of the first isolation layer to shrink inward on the side not covered by the first coating layer 52 of the first isolation layer, compared to the first coating layer 52. As a result, the final isolation column 50 structure is formed, with the first metal layer 301 and the second metal layer 302 of the first isolation layer becoming the first conductive layer 511 and the second conductive layer 512 of the first isolation portion 51 of the isolation column 50, and the first column base layer 551 forming the column base 55. As shown in Figure 12g.

[0089] Next, a spacer column thin film is applied to the substrate 10 on which the aforementioned pattern is formed, and the spacer column thin film is patterned by a patterning process to form a spacer column layer pattern, the spacer column layer pattern includes multiple spacer columns (not shown in the figure) located on the pixel definition layer 32 of the display area 100.

[0090] Next, multiple film layers of the light-emitting functional layer 33 may be sequentially formed on the substrate 10 on which the aforementioned pattern is formed by a vapor deposition process. The light-emitting functional layer 33 may include a hole injection layer, a hole transport layer, an electron blocking layer, an organic light-emitting layer, a hole blocking layer, an electron transport layer, and an electron injection layer, which are sequentially set out in the direction away from the substrate. Except for the organic light-emitting layer, the remaining film layers of the light-emitting functional layer 33 may all be a single, integrated full-surface structure. That is, the remaining film layers of the light-emitting functional layer 33 may be common layers for subpixels of different colors, and these common layers may be formed in the display area 100 and the transient area 300 during vapor deposition. Since isolation pillars 50 are set in the transient area 300, these common layers are cut at the isolation pillars 50, blocking the water-oxygen transfer path from the hole area 200 to the display area 100 via the light-emitting functional layer 33, and thus preventing water-oxygen erosion of the light-emitting functional layer 33 from the display area 100. As shown in Figure 2.

[0091] Next, a second electrode (cathode) layer is formed on the substrate 10 on which the aforementioned pattern is formed by a vapor deposition process. The second electrode layers 34 of different colored subpixels are connected in a common layer with an integrated structure, and the second electrode layer 34 may be formed in the display area 100 and the transient area 300. The second electrode layer 34 may be cut at the isolation column 50, thereby blocking the water-oxygen transfer path from the pore area 200 to the display area 100 via the second electrode layer 34, and preventing water-oxygen from eroding the second electrode layer 34 in the display area 100. As shown in Figure 2.

[0092] This completes the fabrication of the light-emitting structural layer 30.

[0093] (3) Form the sealing structure layer 40. In a exemplary embodiment, the process for forming the sealing structure layer 40 may include the following:

[0094] First, a first sealing thin film is deposited on the substrate 10 on which the aforementioned pattern is formed, using an open photomask and employing a vapor deposition method to form a first sealing layer 41 located in the display area 100 and the transient area 300. Subsequently, a second sealing material is printed using an open photomask and employing an inkjet printer process to form a second sealing layer 42 located in the display area 100 and the transient area 300, and the isolation dam 60 in the transient area 300 can block ink overflow in the inkjet printer process. Subsequently, a third sealing thin film is deposited using an open photomask and employing a vapor deposition method to form a third sealing layer 43 located in the display area 100 and the transient area 300. The materials for the first sealing layer 41 and the third sealing layer 43 may be inorganic materials, and the material for the second sealing layer 42 may be organic materials. This is shown in Figure 2.

[0095] Next, film layers such as a touch structure layer and a color film layer may be sequentially formed on the side of the sealing structure layer 40 that is away from the substrate 10.

[0096] In some other exemplary embodiments, such as the display substrate shown in Figure 2 and the isolation column shown in Figure 7a, the first isolation portion 51 is set to be the same layer as the connecting electrode 203, and the first coating layer 52 is set to be the same layer as the second flat layer 26. Exemplarily, the process for manufacturing the display substrate may include the following steps.

[0097] (1) The drive structure layer 20 and the membrane layer of the isolation column 50 are formed.

[0098] A first insulating thin film and a semiconductor thin film are sequentially deposited onto the substrate 10, and the semiconductor thin film is patterned by a patterning process to form a first insulating layer 21 covering the substrate 10 and a semiconductor layer pattern set on the first insulating layer 21, which includes a plurality of active layers 2011 located in the display area 100. After this patterning process, the transient area 300 includes the first insulating layer 21 set on the substrate 10, as shown in Figure 13a.

[0099] Next, the second insulating thin film and the first gate metal thin film are sequentially deposited, and the first gate metal thin film is patterned by a patterning process to form a second insulating layer 22 that covers the semiconductor layer pattern and a first gate metal layer pattern set on the second insulating layer 22. The first gate metal layer pattern includes a plurality of gate electrodes 2012 and a plurality of first electrode plates 2021 located in the display area 100. After this patterning process, the transient region 300 includes a first insulating layer 21 and a second insulating layer 22 that are sequentially laminated on the substrate 10, as shown in Figure 13a.

[0100] Next, a third insulating thin film and a second gate metal thin film are sequentially deposited, and the second gate metal thin film is patterned by a patterning process to form a third insulating layer 23 covering the first gate metal layer and a second gate metal layer pattern set on the third insulating layer 23, which includes a plurality of second electrodes 2022 where the second gate metal layer pattern is located in the display area 100. The plurality of second electrodes 2022 are set facing a plurality of first electrodes 2021 to form a plurality of storage capacitors 202. After this patterning process, the transient area 300 includes a first insulating layer 21, a second insulating layer 22, and a third insulating layer 23 that are sequentially laminated on the substrate 10, as shown in Figure 13a.

[0101] Next, a fourth insulating film is deposited and patterned by a patterning process to form a fourth insulating layer 24 pattern that covers the second gate metal layer pattern. The fourth insulating layer 24 pattern includes a first column base layer 551 located in the transient region 300. The fourth insulating layer 24 in the display region 100 has a plurality of first vias and a plurality of second vias, with the plurality of first vias exposing one end of the plurality of active layers 2011 and the plurality of second vias exposing the other end of the plurality of active layers 2011. After this patterning process, the transient region 300 includes a first insulating layer 21, a second insulating layer 22, and a third insulating layer 23 that are sequentially laminated on the substrate 10, and a first column base layer 551 set on the third insulating layer 23, as shown in Figure 13a.

[0102] Next, a first source-drain metal thin film is deposited, and the first source-drain metal thin film is patterned by a patterning process to form a first source-drain metal layer pattern on the fourth insulating layer 24. The first source-drain metal layer pattern includes a plurality of source electrodes 2013 and a plurality of drain electrodes 2014 located in the display area 100, with the source electrodes 2013 connected to one end of the active layer 2011 via a first via, and the drain electrodes 2014 connected to the other end of the active layer 2011 via a second via. The plurality of active layers 2011, a plurality of gate electrodes 2012, a plurality of source electrodes 2013, and a plurality of drain electrodes 2014 in the display area 100 constitute a plurality of transistors 201, as shown in Figure 13a.

[0103] Next, a passivation thin film is deposited and patterned by a patterning process to form a passivation layer 251 pattern that covers the first source-drain metal layer pattern, and the passivation layer 251 pattern includes a second column base layer 552 located on the first column base layer 551 of the transient region 300, as shown in Figure 13a.

[0104] Next, a first flat thin film is applied, and the first flat thin film is patterned by a patterning process to form a pattern for the first flat layer 252 to be set on the passivation layer 251. The first flat layer 252 forms a third via located in the display area 100, and the first flat layer 252 and passivation layer 251 within the third via are removed to expose the surface of the drain electrode 2014, as shown in Figure 13a.

[0105] Next, a second source-drain metal thin film is deposited, and a patterning process is employed to pattern the second source-drain metal thin film, forming a second source-drain metal layer pattern on the first flat layer 252. The second source-drain metal layer pattern includes a plurality of anode connection electrodes 203 located in the display region 100 and a first isolation layer located on the second column base layer 552 in the transient region 300. The anode connection electrodes 203 are connected to the drain electrode 2014 via a third via, as shown in Figure 13a.

[0106] The second source-drain metal layer may include a fourth metal layer 401, a fifth metal layer 402, and a sixth metal layer 403, which are sequentially laminated along the direction away from the substrate 10. For example, the fourth metal layer 401 and the sixth metal layer 403 may be titanium layers, and the fifth metal layer 402 may be an aluminum layer. In that case, the film layer of the anode connection electrode 203 and the film layer of the first isolation layer are the same as the film layer of the second source-drain metal layer, that is, they both include the fourth metal layer 401, the fifth metal layer 402, and the sixth metal layer 403, which are laminated. On the side of the first isolation layer facing the display area 100 and the side facing the hole area 200, the edges of the fourth metal layer 401, the fifth metal layer 402, and the sixth metal layer 403 of the first isolation layer may be substantially flush, as shown in Figure 13a.

[0107] Next, using a photomask, an etching process is employed to completely etch the sixth metal layer 403 of the first isolation layer in the transient region 300, as shown in Figure 13b.

[0108] Next, a second flat thin film is applied, and a patterning process is employed to pattern the second flat thin film to form a second flat layer 26 pattern that covers the second source-drain metal layer pattern. Multiple fourth vias V4 located in the display area 100 are formed in the second flat layer 26, and the second flat layer 26 within the fourth vias V4 is removed to expose the surface of the anode connection electrode 203. The second flat layer 26 pattern includes a first coating layer 52 located in the transient area 300, where the first coating layer 52 is set on the surface of the fifth metal layer 402 of the first isolation layer away from the substrate 10, covering one side of the first isolation layer (e.g., the side facing the display area 100). The portion of the surface of the fifth metal layer 402 of the first isolation layer away from the substrate 10 that is close to the other side of the first isolation layer (e.g., the side facing the pore area 200) may not be covered by the first coating layer 52, as shown in Figure 13c.

[0109] This creates the drive structure layer 20 and the membrane layer of the isolation column 50.

[0110] (2) Form the light-emitting structure layer 30. In an exemplary embodiment, the formation of the light-emitting structure 30 may include the following steps.

[0111] A first electrode thin film is deposited on the substrate 10 on which the aforementioned pattern is formed, and the first electrode thin film is patterned by a patterning process to form a first electrode layer pattern. The first electrode layer pattern includes a plurality of first electrodes 31 (anodes) located in the display area 100, and the first electrodes 31 are connected to the anode connection electrode 203 via a fourth via on the second flat layer 26, and the first electrodes 31 are connected to the drain electrode 2014 via the anode connection electrode 203, as shown in Figure 13d.

[0112] In the patterning process of the first electrode thin film, the portion of the transient region 300 that is not covered by the first coating layer 52 of the first isolation layer is also etched. After the completion of this patterning process, the portion of the fifth metal layer 402 of the first isolation layer that is not covered by the first coating layer 52 of the transient region 300 can be etched, and on the side of the first isolation layer that is not covered by the first coating layer 52, the edge of the fifth metal layer 402 of the first isolation layer may be substantially flush with the edge of the first coating layer 52, and the edge of the fourth metal layer 401 of the first isolation layer may protrude more than the edge of the fifth metal layer 402. As shown in Figure 13d.

[0113] Next, a pixel definition thin film is applied to the substrate 10 on which the aforementioned pattern is formed, and the pixel definition thin film is patterned by a patterning process to form a pixel definition layer 32 pattern, and multiple pixel apertures are set in the pixel definition layer 32, and the pixel apertures expose the surface of the first electrode 31 of the display area 100, as shown in Figure 13e.

[0114] Next, using a photomask, a wet etching process is employed to etch the fifth metal layer 402 of the first isolation layer in the transient region 300 laterally, causing the fifth metal layer 402 of the first isolation layer to shrink inward on the side not covered by the first coating layer 52 of the first isolation layer compared to the first coating layer 52. This forms the final isolation column 50 structure, where the fourth metal layer 401 and the fifth metal layer 402 of the first isolation layer become the first conductive layer 511 and the second conductive layer 512 of the first isolation portion 51 of the isolation column 50, and the first column base layer 551 and the second column base layer 552 form the column base 55, as shown in Figure 13f.

[0115] Next, a spacer column thin film is applied to the substrate 10 on which the aforementioned pattern is formed, and the spacer column thin film is patterned by a patterning process to form a spacer column layer pattern, which includes multiple spacer columns (not shown in the figure) located on the pixel definition layer 32 of the display area 100.

[0116] Next, on the substrate 10 on which the aforementioned pattern is formed, multiple film layers of the light-emitting functional layer 33 may be sequentially formed by a vapor deposition process. The light-emitting functional layer 33 may include a hole injection layer, a hole transport layer, an electron blocking layer, an organic light-emitting layer, a hole blocking layer, an electron transport layer, and an electron injection layer, which are sequentially set away from the substrate. Except for the organic light-emitting layer, the remaining film layers of the light-emitting functional layer 33 may all be an integrated, full-surface structure. That is, the remaining film layers of the light-emitting functional layer 33 may be common layers for subpixels of different colors, and these common layers may be formed in the display area 100 and the transient area 300 during vapor deposition. Since isolation pillars 50 are set in the transient area 300, these common layers are cut at the isolation pillars 50, blocking the water-oxygen transfer path from the hole area 200 to the display area 100 via the light-emitting functional layer 33, and thus preventing water-oxygen erosion of the light-emitting functional layer 33 from the display area 100. This is shown in Figure 2.

[0117] Next, a second electrode (cathode) layer is formed on the substrate 10 on which the aforementioned pattern is formed by a vapor deposition process. The second electrode layers 34 of different colored subpixels are connected in a common layer with an integrated structure, and the second electrode layer 34 may be formed in the display area 100 and the transient area 300. The second electrode layer 34 may be disconnected at the isolation column 50, thereby blocking the water-oxygen transfer path from the hole area 200 to the display area 100 via the second electrode layer 34, and preventing water-oxygen from eroding the second electrode layer 34 in the display area 100. This is shown in Figure 2.

[0118] This completes the fabrication of the light-emitting structural layer 30.

[0119] Next, film layers such as a sealing structure layer 40, a touch structure layer, and a color film layer may be sequentially formed on the side of the light-emitting structure layer 30 that is away from the substrate 10.

[0120] Based on the processes shown in Figures 12a to 12g or Figures 13a to 13f, embodiments of the present disclosure provide a method for manufacturing a display substrate, which includes manufacturing the isolation column shown in the example of Figure 7a, the manufacturing process of the isolation column shown in Figure 7a, and the manufacturing process of the isolation column shown in the example of Figure 7a includes the following steps:

[0121] A first isolation layer is formed on the substrate of the transient region, and the first isolation layer is sequentially laminated along the direction away from the substrate to form a first film layer, a second film layer, and a third film layer, wherein the edges of the first film layer, the second film layer, and the third film layer are flush with each other on the side of the first isolation layer facing the display region and the side facing the hole region.

[0122] An etching process is employed to completely remove the third film layer.

[0123] A first coating layer is formed on the surface of the second film layer that is separated from the substrate, the first coating layer covers the side of the first isolation layer facing the display area or the hole area, and on the side of the first isolation layer not covered by the first coating layer, the edges of the second film layer and the first film layer protrude beyond the edge of the first coating layer.

[0124] An etching process is employed to etch the first isolation layer, and on the side of the first isolation layer not covered by the first coating layer, the edge of the second film layer becomes flush with the edge of the first coating layer, and the edge of the first film layer protrudes more than or is flush with the edge of the second film layer.

[0125] An etching process is employed to etch the second film layer, and on the side of the first isolation layer not covered by the first coating layer, the edge of the second film layer shrinks inward compared to the edge of the first coating layer and the edge of the first film layer, so that the first film layer and the second film layer of the first isolation layer become the first conductive layer and the second conductive layer of the first isolation portion, respectively.

[0126] In several other exemplary embodiments, taking the display substrate of the example in Figure 2 and the isolation column of the example in Figure 8 as examples, the first isolation portion 51 is set to be the same layer as the source electrode 2013 and drain electrode 2014 of the transistor 201, and the first coating layer 52 is set to be the same layer as the passivation layer 251 of the fifth insulating layer 25. Exemplarily, the manufacturing process of the display substrate may include the following operations.

[0127] (1) The drive structure layer 20 and the membrane layer of the isolation column 50 are formed.

[0128] On the substrate 10, a first insulating layer 21, a semiconductor layer, a second insulating layer 22, a first gate metal layer, a third insulating layer 23, a second gate metal layer, and a fourth insulating layer 24 are formed in sequence.

[0129] As the fourth insulating layer 24 of the display area 100 is formed, the first column base layer 551 is formed on the third insulating layer 23 of the transient area 300. That is, the first column base layer 551 is the same single layer as the fourth insulating layer 24 and is made of the same material. The fourth insulating layer 24 of the display area 100 has a plurality of first vias V1 and a plurality of second vias V2, with the plurality of first vias V1 exposing one end of the plurality of active layers 2011, and the plurality of second vias V2 exposing the other end of the plurality of active layers 2011, as shown in Figure 14a.

[0130] Next, a first source-drain metal thin film is deposited and patterned by a patterning process to form a first source-drain metal layer pattern on the fourth insulating layer 24. The first source-drain metal layer pattern includes a plurality of source electrodes 2013 and a plurality of drain electrodes 2014 located in the display region 100, and a first isolation layer located on the first column base layer 551 in the transient region 300. The source electrodes 2013 are connected to one end of the active layer 2011 via a first via, and the drain electrodes 2014 are connected to the other end of the active layer 2011 via a second via. The plurality of active layers 2011, a plurality of gate electrodes 2012, a plurality of source electrodes 2013, and a plurality of drain electrodes 2014 in the display region 100 form a plurality of transistors 201, as shown in Figure 14b.

[0131] The first source / drain metal layer includes a first metal layer 301, a second metal layer 302, and a third metal layer 303, which are sequentially laminated along the direction away from the substrate 10. For example, the first metal layer 301 and the third metal layer 303 may be titanium layers, and the second metal layer 302 may be an aluminum layer. In that case, the source electrode 2013, the drain electrode 2014, and the first isolation layer all include a first metal layer 301 (Ti), a second metal layer 302 (Al), and a third metal layer 303 (Ti), which are sequentially laminated along the direction away from the substrate 10. On the side of the first isolation layer facing the display area 100 and the side facing the hole area 200, the edges of the first metal layer 301, the second metal layer 302, and the third metal layer 303 of the first isolation layer may be substantially flush, as shown in Figure 14b.

[0132] Next, using a photomask, an etching process is employed to etch and remove the portion of the third metal layer 303 of the first isolation layer in the transient region 300 that is close to the display region 100 or the hole region 200 (in the example of Figure 14c, the portion close to the hole region 200), as shown in Figure 14c.

[0133] Next, a passivation thin film is deposited and patterned by a patterning process to form a passivation layer 251 pattern that covers the first source-drain metal layer pattern. The passivation layer 251 pattern includes a first coating layer 52 located in the transient region 300. The first coating layer 52 is set on the surface of the third metal layer 303 away from the substrate 10 of the first isolation layer, covering the side of the first isolation layer facing the display region 100, and covering the surface of the third metal layer 303 away from the substrate 10 and the surface of the third metal layer 303 facing the pore region 200 of the first isolation layer (i.e., the surface of the third metal layer 303 facing the pore region 200). The portion of the second metal layer 302 of the first isolation layer that is separated from the substrate 10 and close to the pore region 200 does not need to be covered by the first coating layer 52. That is, on the side of the first isolation layer that is not covered by the first coating layer 52, the edge of the second metal layer 302 of the first isolation layer may protrude more than the edge of the first coating layer 52, as shown in Figure 14d.

[0134] Next, a first flat thin film is applied, and the first flat thin film is patterned by a patterning process to form a first flat layer 252 pattern on the passivation layer 251. Multiple third vias V3 located in the display area 100 are formed in the first flat layer 252, and the first flat layer 252 and passivation layer 251 within the third vias V3 are removed to expose the surface of the drain electrode 2014, as shown in Figure 14e. In this example, the entire passivation layer 251 and the first flat layer 252 may be referred to as the fifth insulating layer 25, and the passivation layer 251 may be an inorganic insulating material, and the first flat layer 252 may be an organic insulating material. In other examples, the passivation layer 251 may not be set, and the fifth insulating layer 25 may include only the first flat layer 252, in which case the first coating layer 52 may be formed simultaneously in the process of forming the first flat layer 252 pattern by patterning.

[0135] Next, a second source-drain metal thin film is deposited, and a patterning process is employed to pattern the second source-drain metal thin film, forming a second source-drain metal layer pattern on the first flat layer 252. The second source-drain metal layer pattern includes a plurality of anode connection electrodes 203 located in the display area 100, and the anode connection electrodes 203 are connected to the drain electrode 2014 via a third via V3, as shown in Figure 14e.

[0136] The film structure and material of the second source / drain metal layer may be the same as that of the first source / drain metal layer. For example, the second source / drain metal layer may include a fourth metal layer 401, a fifth metal layer 402, and a sixth metal layer 403 that are sequentially laminated along the direction away from the substrate 10. For example, the fourth metal layer 401 and the sixth metal layer 403 may be titanium layers, and the fifth metal layer 402 may be an aluminum layer. As a result, during the patterning process of the second source-drain metal thin film, the portion of the transient region 300 not covered by the first coating layer 52 of the first isolation layer is also etched. After the patterning process is completed, the portion of the second metal layer 302 of the first isolation layer not covered by the first coating layer 52 of the transient region 300 is etched, and on the side of the first isolation layer not covered by the first coating layer 52, the edge of the second metal layer 302 of the first isolation layer is approximately flush with the edge of the first coating layer 52, while the edge of the first metal layer 301 of the first isolation layer protrudes more than the edge of the second metal layer 302. Because the titanium first metal layer 301 of the first isolation layer is more difficult to etch than the aluminum second metal layer 302, after the patterning process is completed, on the side of the first isolation layer not covered by the first coating layer 52, the edge of the first metal layer 301 of the first isolation layer protrudes more than the edge of the second metal layer 302, as shown in Figure 14e.

[0137] Next, a second flat thin film is applied, and a patterning process is employed to pattern the second flat thin film, thereby forming a second flat layer 26 pattern that covers the second source / drain metal layer pattern. The second flat layer 26 forms a plurality of fourth vias V4 located in the display area 100, and the second flat layer 26 within the fourth vias V4 is removed to expose the surface of the anode connection electrode 203, as shown in Figure 14f.

[0138] This completes the manufacturing of the drive structure layer 20 and the membrane layer of the isolation column 50.

[0139] (2) Form the light-emitting structural layer 30. In an exemplary embodiment, forming the light-emitting structural layer 30 may include the following steps.

[0140] A first electrode thin film is deposited on the substrate 10 on which the pattern is formed, and the first electrode thin film is patterned by a patterning process to form a first electrode layer pattern. The first electrode layer pattern includes a plurality of first electrodes 31 (anodes) located in the display area 100, and the first electrodes 31 are connected to an anode-connecting electrode 203 via a fourth via V4 on the second flat layer 26, and the first electrodes 31 are connected to a drain electrode 2014 via the anode-connecting electrode 203. As shown in Figure 14f.

[0141] Next, a pixel definition thin film is applied to the substrate 10 on which the aforementioned pattern is formed, and the pixel definition thin film is patterned by a patterning process to form a pixel definition layer 32 pattern, and multiple pixel apertures are set in the pixel definition layer 32, and the pixel apertures expose the surface of the first electrode 31 of the display area 100, as shown in Figure 14f.

[0142] Next, using a photomask, a wet etching process is employed to etch the second metal layer 302 of the first isolation layer in the transient region 300 laterally, causing the second metal layer 302 of the first isolation layer to shrink inward in part compared to the third metal layer 303 on the side not covered by the first coating layer 52 of the first isolation layer. This forms the final isolation column 50 structure, where the first metal layer 301, second metal layer 302, and third metal layer 303 of the first isolation layer become the first conductive layer 511, second conductive layer 512, and third conductive layer 513 of the first isolation portion 51 of the isolation column 50, and the first column base layer 551 forms the column base 55, as shown in Figure 14g.

[0143] Next, the remaining film layers of the display substrate are formed.

[0144] The process shown in Figures 14a to 14g above forms the isolation column 50 shown in the example of Figure 8, the first isolation portion 51 is set to be the same layer as the source electrode 2013 and drain electrode 2014 of the transistor 201, and the first coating layer 52 is set to be the same layer as the passivation layer 251 of the fifth insulating layer 25. In other embodiments, in the isolation column 50 shown in Figure 8, the first isolation portion 51 is set to be the same layer as the connecting electrode 203, and the first coating layer 52 is set to be the same layer as the second flat layer 26, and the isolation column 50 may be formed in the same way as the isolation column 50 in Figures 14a to 14g, in which case the second source / drain metal layer pattern may be formed by patterning, the connecting electrode 203 may be formed in the display area 100, and the first isolation layer may be formed in the transient area 300, and the second source / drain metal layer includes a fourth metal layer 401, a fifth metal layer 402, and a sixth metal layer 403 which are sequentially laminated along the direction away from the substrate 10, for example the fourth metal layer 401 and the sixth metal layer 403 may be titanium layers, and the fifth metal layer 402 may be an aluminum layer, and the first isolation layer is sequentially laminated along the direction away from the substrate 10 The set includes a fourth metal layer 401, a fifth metal layer 402, and a sixth metal layer 403. Subsequently, using a photomask, an etching process is employed to etch and remove the portion of the sixth metal layer 403 of the first isolation layer in the transient region 300 that is close to the display area 100 or hole area 200. Subsequently, a second flat layer 26 pattern is formed by patterning, and at the same time, a first coating layer 52 is formed on the sixth metal layer 403 of the first isolation layer in the transient region 300. Subsequently, a first electrode 31 is formed by patterning, and at the same time, the portion of the fifth metal layer 402 of the first isolation layer that is not covered by the first coating layer 52 is etched and removed. On the side of the first isolation layer that is not covered by the first coating layer 52, the edge of the fifth metal layer 402 of the first isolation layer may be substantially flush with the edge of the first coating layer 52, and the edge of the fourth metal layer 401 protrudes more than the edge of the fifth metal layer 402. Next, the fifth metal layer 402 of the first isolation layer in the transient region 300 is etched laterally using a wet etching process with a photomask, causing the fifth metal layer 402 of the first isolation layer in the transient region 300 to shrink inward in part compared to the sixth metal layer 403 on the side not covered by the first coating layer 52 of the first isolation layer.This forms the final isolation column 50 structure, where the fourth metal layer 401, fifth metal layer 402, and sixth metal layer 403 of the first isolation layer become the first conductive layer 511, second conductive layer 512, and third conductive layer 513 of the first isolation portion 51 of the isolation column 50.

[0145] Based on the processes shown in Figures 14a to 14g, embodiments of the present disclosure provide a method for manufacturing a display substrate, which includes manufacturing the isolation column shown in the example of Figure 8, the manufacturing process of the isolation column shown in the example of Figure 8 may include the following steps.

[0146] A first isolation layer is formed on the substrate of the transient region, and the first isolation layer is sequentially laminated along the direction away from the substrate to form a first film layer, a second film layer, and a third film layer, wherein the edges of the first film layer, the second film layer, and the third film layer are flush with each other on the side of the first isolation layer facing the display region and the side facing the hole region.

[0147] An etching process is employed to etch and remove a portion of the third film layer near the display area or the pore area, so that on the first side of the first isolation layer, the edges of the first film layer and the second film layer protrude beyond the edge of the third film layer.

[0148] A first coating layer is formed on the surface of the third film layer that is separated from the substrate, and the first coating layer covers the second side of the first isolation layer, and covers the surface of the third film layer that is separated from the substrate and the surface of the third film layer that is located on the first side of the first isolation layer.

[0149] An etching process is employed to etch the first isolation layer, and on the side of the first isolation layer not covered by the first coating layer (i.e., the first side of the first isolation layer), the edge of the second film layer becomes flush with the edge of the first coating layer, and the edge of the first film layer protrudes from or is flush with the edge of the second film layer.

[0150] An etching process is employed to etch the second isolation layer, causing the edge of the second film layer to shrink inward on the side of the first isolation layer not covered by the first coating layer, compared to the edge of the third film layer and the edge of the first film layer, so that the first film layer, second film layer, and third film layer of the first isolation layer become the first conductive layer, second conductive layer, and third conductive layer of the first isolation portion, respectively.

[0151] In some exemplary embodiments, taking the display substrate shown in Figure 2 and the isolation column shown in Figure 8 as examples, the first isolation portion 51 is set to be the same layer as the source electrode 2013 and drain electrode 2014 of the transistor 201, and the first coating layer 52 is set to be the same layer as the passivation layer 251 of the fifth insulating layer 25. Exemplarily, the manufacturing process of the display substrate may include the following operations.

[0152] On the substrate 10, a first insulating layer 21, a semiconductor layer, a second insulating layer 22, a first gate metal layer, a third insulating layer 23, a second gate metal layer, and a fourth insulating layer 24 are formed in sequence.

[0153] As the fourth insulating layer 24 of the display area 100 is formed, the first column base layer 551 is formed on the third insulating layer 23 of the transient area 300. That is, the first column base layer 551 is set to be the same layer as the fourth insulating layer 24 and is made of the same material. The fourth insulating layer 24 of the display area 100 is provided with a plurality of first vias V1 and a plurality of second vias V2. The plurality of first vias V1 expose one end of the plurality of active layers 2011, and the plurality of second vias V2 expose the other end of the plurality of active layers 2011. As shown in Figure 15a.

[0154] Next, a first source-drain metal thin film is deposited and patterned by a patterning process to form a first source-drain metal layer pattern on the fourth insulating layer 24. The first source-drain metal layer pattern includes a plurality of source electrodes 2013 and a plurality of drain electrodes 2014 located in the display region 100, and a first isolation layer located on the first column base layer 551 in the transient region 300. The source electrodes 2013 are connected to one end of the active layer 2011 via a first via, and the drain electrodes 2014 are connected to the other end of the active layer 2011 via a second via. The plurality of active layers 2011, a plurality of gate electrodes 2012, a plurality of source electrodes 2013, and a plurality of drain electrodes 2014 in the display region 100 form a plurality of transistors 201, as shown in Figure 15b.

[0155] The first source / drain metal layer includes a first metal layer 301, a second metal layer 302, and a third metal layer 303, which are sequentially laminated along the direction away from the substrate 10. For example, the first metal layer 301 and the third metal layer 303 may be titanium layers, and the second metal layer 302 may be an aluminum layer. In that case, the source electrode 2013, the drain electrode 2014, and the first isolation layer all include a first metal layer 301 (Ti), a second metal layer 302 (Al), and a third metal layer 303 (Ti), which are sequentially laminated along the direction away from the substrate 10. On the side of the first isolation layer facing the display area 100 and the side facing the hole area 200, the edges of the first metal layer 301, the second metal layer 302, and the third metal layer 303 of the first isolation layer may be substantially flush. As shown in Figure 15b.

[0156] Next, a passivation thin film is deposited and patterned by a patterning process to form a passivation layer 251 pattern that covers the first source-drain metal layer pattern, the passivation layer 251 pattern including a first coating layer 52 located in the transient region 300, the first coating layer 52 being set on the surface of the third metal layer 303 of the first isolation layer away from the substrate 10, and covering the side of the first isolation layer toward the display region 100 or hole region 200 (the side toward the display region 100 in the example of Figure 15c), and a portion of the side of the third metal layer 303 of the first isolation layer that is not covered by the first coating layer 52 and approaches the first isolation layer is not covered by the first coating layer 52 (i.e., on the side of the first isolation layer not covered by the first coating layer 52, the edge of the third metal layer 303 of the first isolation layer protrudes more than the edge of the first coating layer 52). As shown in Figure 15c.

[0157] Next, a first flat thin film is applied, and the first flat thin film is patterned by a patterning process to form a first flat layer 252 pattern to be set on the passivation layer 251. The first flat layer 252 forms a plurality of third vias V3 located in the display area 100, and the first flat layer 252 and passivation layer 251 within the third vias V3 are removed to expose the surface of the drain electrode 2014, as shown in Figure 15d. In this example, the entire passivation layer 251 and the first flat layer 252 may be referred to as the fifth insulating layer 25, and the passivation layer 251 may be an inorganic insulating material, and the first flat layer 252 may be an organic insulating material. In other examples, the passivation layer 251 may not be set, and the fifth insulating layer 25 may include only the first flat layer 252, in which case the first coating layer 52 may be formed simultaneously in the process of forming the first flat layer 252 pattern by the patterning process.

[0158] Next, a second source-drain metal thin film is deposited, and a patterning process is employed to pattern the second source-drain metal thin film, forming a second source-drain metal layer pattern on the first flat layer 252. The second source-drain metal layer pattern includes a plurality of anode connection electrodes 203 located in the display area 100, and the anode connection electrodes 203 are connected to the drain electrode 2014 via a third via V3, as shown in Figure 15d.

[0159] The film structure and material of the second source / drain metal layer may be the same as that of the first source / drain metal layer. For example, the second source / drain metal layer may include a fourth metal layer 401, a fifth metal layer 402, and a sixth metal layer 403 which are sequentially laminated along the direction away from the substrate 10. For example, the fourth metal layer 401 and the sixth metal layer 403 may be titanium layers, and the fifth metal layer 402 may be an aluminum layer. As a result, in the patterning process for patterning the second source-drain metal thin film, the portion of the transient region 300 that is not covered by the first coating layer 52 of the first isolation layer is also etched. After the patterning process is completed, the portions of the third metal layer 303 and the second metal layer 302 of the first isolation layer in the transient region 300 that are not covered by the first coating layer 52 are etched, and on the side of the first isolation layer that is not covered by the first coating layer 52, the edges of the third metal layer 303 and the second metal layer 302 of the first isolation layer become approximately flush with the edge of the first coating layer 52, while the edge of the first metal layer 301 of the first isolation layer protrudes more than the edges of the third metal layer 303 and the second metal layer 302. Because the first metal layer 301 of the first isolation layer, made of titanium, is more difficult to etch than the second metal layer 302 made of aluminum, after the patterning process is completed, the edge of the first metal layer 301 of the first isolation layer protrudes more than the edge of the second metal layer 302 on the side of the first isolation layer that is not covered by the first coating layer 52, as shown in Figure 15d.

[0160] Next, an etching process is employed to etch and remove a portion of the third metal layer 303 of the first isolation layer in the transient region 300 that is close to the side not covered by the first coating layer 52 of the first isolation layer. As a result, the portion of the first coating layer 52 that is close to the side not covered by the first coating layer 52 of the first isolation layer is not supported by the third metal layer 303 and hangs down, covering the surface of the third metal layer 303 that is not covered by the first coating layer 52 of the first isolation layer, as shown in Figure 15e.

[0161] Next, using a photomask, a wet etching process is employed to etch the second metal layer 302 of the first isolation layer in the transient region 300 laterally, causing the second metal layer 302 of the first isolation layer to shrink inward on the side not covered by the first coating layer 52 of the first isolation layer, due to the third metal layer 303 and the first metal layer 301. This forms the final isolation column 50 structure, where the first metal layer 301, second metal layer 302, and third metal layer 303 of the first isolation layer become the first conductive layer 511, second conductive layer 512, and third conductive layer 513 of the first isolation portion 51 of the isolation column 50, and the first column base layer 551 forms the column base 55, as shown in Figure 15f.

[0162] Next, the remaining film layers of the display substrate are formed.

[0163] Based on the processes shown in Figures 15a to 15f, embodiments of the present disclosure provide a method for manufacturing a display substrate, which includes manufacturing the isolation column shown in the example of Figure 8, the manufacturing process of the isolation column shown in the example of Figure 8 may include the following steps.

[0164] A first isolation layer is formed on the substrate of the transient region, and the first isolation layer is sequentially laminated along the direction away from the substrate to form a first film layer, a second film layer, and a third film layer, wherein the edges of the first film layer, the second film layer, and the third film layer are flush with each other on the side of the first isolation layer facing the display region and the side facing the hole region.

[0165] A first coating layer is formed on the surface of the third film layer that is separated from the substrate, the first coating layer covers the side of the first isolation layer facing the display area or the hole area, and on the side of the first isolation layer that is not covered by the first coating layer, the edges of the first film layer, the second film layer and the third film layer protrude beyond the edge of the first coating layer (i.e., a portion of the surface of the third film layer that is separated from the substrate, close to the side of the first isolation layer that is not covered by the first coating layer, is not covered by the first coating layer).

[0166] An etching process is employed to etch the first isolation layer, so that on the side of the first isolation layer not covered by the first coating layer, the edges of the second and third film layers become flush with the edges of the first coating layer, and the edges of the first film layer protrude beyond the edges of the second and third film layers.

[0167] An etching process is employed to etch the third film layer, and on the side of the first isolation layer not covered by the first coating layer, the edge of the third film layer shrinks inward compared to the edge of the first coating layer, the portion of the first coating layer not supported by the third film layer hangs down, and the surface of the third film layer located on the side of the first isolation layer not covered by the first coating layer is covered.

[0168] An etching process is employed to etch the second film layer, so that on the side of the first isolation layer not covered by the first coating layer, the edge of the second film layer is set to be inwardly contracted compared to the edge of the third film layer and the edge of the first film layer, and the first film layer, second film layer and third film layer of the first isolation layer become the first conductive layer, second conductive layer and third conductive layer of the first isolation portion, respectively.

[0169] Embodiments of this disclosure further provide a display device, including a display board as described in any of the embodiments above. The display device may be any product or component having a display function, such as a mobile phone, tablet device, television, display, notebook computer, digital photo frame, or navigator.

[0170] In the drawings, the size of components, layer thickness, or area may be exaggerated for clarity. Therefore, embodiments of this disclosure are not necessarily limited to these sizes, and the shape and size of each component in the drawings do not reflect the true scale. Furthermore, the drawings are schematic examples, and embodiments of this disclosure are not limited to the shapes, figures, etc., shown in the drawings.

[0171] In this specification, "parallel" refers to a state in which the angle formed by two straight lines is -10° or greater and 10° or less, and therefore also includes the state in which the angle is -5° or greater and 5° or less. Furthermore, "perpendicular" refers to a state in which the angle formed by two straight lines is 80° or greater and 100° or less, and therefore also includes the state in which the angle is 85° or greater and 95° or less.

[0172] In this specification, directions or positional relationships indicated by terms such as “up,” “down,” “left,” “right,” “top,” “inside,” “outside,” “axial direction,” and “square” are based on the directions or positional relationships shown in the drawings and are intended solely to illustrate and simplify the disclosure, and do not express or imply that the indicated structures have a particular orientation or are composed and operated in a particular orientation, and should therefore not be considered a limitation on this disclosure.

[0173] In the description of the embodiments of this application, unless otherwise explicitly stated and limited, the terms “connection,” “fixed connection,” “mounting,” and “assembly” should be understood broadly, for example, that a connection may be fixed, detachable, or integrated; and the terms “mounting,” “connection,” and “fixed connection” may be direct, indirect, or connected via an intermediate medium, or connected by internal communication between two components. A person skilled in the art will be able to understand the meaning of the terms in the embodiments of this disclosure as appropriate. [Explanation of Symbols]

[0174] 1' First metallic conductive layer 2' Second metal conductive layer 3' Third Metal Conductive Layer 4' Insulating layer 10. Primer 20 Drive structure layer 21 First insulating layer 22 Second insulating layer 23 Third insulating layer 24. Fourth insulating layer 25. Fifth insulating layer 25 1st flat layer 26 2nd flat layer 30. Luminescent structural layer 31 1st electrode 32-pixel definition layer 33. Light-emitting functional layer 34 Second electrode layer 40 Sealing structure layer 41. First sealing layer 42 Second sealing layer 43 Third sealing layer 50 Isolation Pillar 50a~d Isolation Pillar 51 1st isolation section 52 1st isolation layer, 1st covering layer 53 2nd isolation section 54 Second coating layer 55 Column foundation 60 Isolation Dam 100 display area 200 hole area 201 Transistors 202 Storage Capacitors 203 Connecting electrodes 251 Passivation Layer 252 1st flat layer 300 Transient region 301 1st metal layer 302 2nd metal layer 303 Third metal layer 401 4th metal layer 402 5th metal layer 403 6th metal layer 511 First conductive layer 512 Second conductive layer 513 Third conductive layer 531 Fourth conductive layer 532 Fifth conductive layer 533 Sixth conductive layer 551 1st Pillar Foundation Layer 552 2nd Pillar Foundation Layer 553 First inorganic insulating layer 554 Second inorganic insulating layer 555 7th metal layer 556 8th metal layer 2011 Active Users 2012 Gatepost 2013 Source Electrode 2014 Drain electrode 2021 1st pole plate 2022 2nd pole plate

Claims

1. A display substrate comprising a hole region, a transient region surrounding the hole region, and a display region surrounding the transient region, wherein isolation columns surrounding the hole region are set in the transient region, and the isolation columns include a first isolation portion and a first coating layer. The display substrate includes a base layer, the first isolation portion includes a second conductive layer, the first side of the first isolation portion faces the display area, and the second side of the first isolation portion faces the hole area. A display substrate wherein the first coating layer is provided on the side of the first isolation portion that is away from the substrate and covers one of the first and second sides of the first isolation portion, and the second conductive layer is set on the other side of the first and second sides of the first isolation portion, contracting inward more than the first coating layer, and the material of the first coating layer is an insulating material.

2. The display substrate according to claim 1, further comprising a first conductive layer provided on the side of the second conductive layer closer to the substrate, the first isolation portion being provided on the surface of the second conductive layer away from the substrate, covering one of the first and second sides of the first isolation portion, and on the other side of the first and second sides of the first isolation portion, the second conductive layer being set to be more inwardly compressed than the first conductive layer.

3. The display substrate according to claim 1, further comprising a third conductive layer on which the first isolation portion is set away from the substrate of the second conductive layer, the first covering layer is set on the surface of the third conductive layer away from the substrate and covers one of the first and second sides of the first isolation portion, and on the other of the first and second sides of the first isolation portion, the second conductive layer is set to be more inwardly compressed than the third conductive layer.

4. The display substrate according to claim 3, wherein the first coating layer further coats the surface of the third conductive layer located on the other side of the first isolation portion of the third conductive layer, and the orthographic projection of the third conductive layer on the substrate is located within the orthographic projection of the first coating layer on the substrate.

5. The display substrate according to any one of claims 1 to 4, wherein the second conductive layer is 0.35 micrometers to 0.4 micrometers smaller than the first coating layer.

6. The display substrate according to claim 5, wherein the portion of the first isolation portion that approaches the edge of the first coating layer has a gradient angle of 20 to 45° on the other side of the first isolation portion, between the first and second sides.

7. The display substrate according to claim 1, wherein the isolation column further includes a second isolation portion, the second isolation portion is set on the side of the first isolation portion facing the substrate, and the second isolation portion includes a fourth conductive layer and a fifth conductive layer that are sequentially laminated along the direction away from the substrate, the first side of the second isolation portion faces the display area, the second side of the second isolation portion faces the hole area, the first covering layer further covers one of the first and second sides of the second isolation portion, and the fifth conductive layer is set on the other side of the first and second sides of the second isolation portion, contracting inward more than the fourth conductive layer.

8. The display substrate according to claim 7, further comprising a sixth conductive layer set on the side of the fifth conductive layer away from the substrate, wherein the fifth conductive layer is set on the other side of the second conductive layer (the first and second sides) so as to be more inwardly compressed than the sixth conductive layer.

9. The display substrate according to claim 1, wherein the isolation column further includes a second isolation portion and a second coating layer, the second isolation portion is set on the side of the first isolation portion facing the substrate, the first side of the second isolation portion faces the display area, the second side of the second isolation portion faces the hole area, the second coating layer is provided between the second isolation portion and the first isolation portion and covers one of the first and second sides of the second isolation portion, the material of the second isolation portion is a conductive material, and the material of the second coating layer is an insulating material.

10. The display substrate according to claim 9, wherein the second isolation portion includes a fourth conductive layer, a fifth conductive layer, and a sixth conductive layer that are sequentially laminated along the direction away from the substrate, and the fifth conductive layer is set on the other side of the second isolation portion (the first side and the second side) so as to be more inwardly compressed than the fourth conductive layer and the sixth conductive layer.

11. The display substrate according to claim 9, wherein the side of the first isolation portion that is covered by the first coating layer and the side of the second isolation portion that is covered by the second coating layer are located on different sides of the isolation column.

12. The display substrate according to any one of claims 1 to 4, wherein the isolation column further includes a column foundation set on the side of the first isolation portion facing the substrate, and the column foundation includes one or more film layers.

13. The display substrate according to claim 12, wherein the column foundation includes one inorganic insulating layer or a plurality of inorganic insulating layers arranged in layers, or the column foundation includes at least one inorganic insulating layer and at least one metal layer, wherein the metal layer is covered over the inorganic insulating layer.

14. The display area includes a drive structure layer and a light-emitting structure layer that are sequentially stacked on the base, the drive structure layer includes a pixel drive circuit, the pixel drive circuit includes a plurality of transistors and a storage capacitor, the light-emitting structure layer includes a plurality of light-emitting elements, and the light-emitting elements include a first electrode, a light-emitting functional layer and a second electrode layer that are sequentially stacked along the direction away from the base, The display substrate according to claim 1, wherein the drive structure layer includes a first source / drain metal layer, a fifth insulating layer, a second source / drain metal layer, and a second flat layer, which are sequentially set out in a direction away from the substrate in a direction perpendicular to the substrate, the first source / drain metal layer includes the source electrode and drain electrode of at least one transistor, the second source / drain metal layer includes a connecting electrode connected to the source electrode or drain electrode of the transistor, and the connecting electrode is further connected to the first electrode.

15. The display substrate according to claim 14, wherein the first source-drain metal layer includes a plurality of metal layers stacked together, the first isolation portion and the source and drain electrodes of the transistor are set on the same layer, and the first coating layer and the fifth insulating layer are set on the same layer.

16. The display substrate according to claim 14, wherein the second source / drain metal layer includes a plurality of metal layers arranged in a stack, the first isolation portion and the connecting electrode are set in the same layer, and the first coating layer and the second flat layer are set in the same layer.

17. The isolation column further includes a second isolation portion, the second isolation portion is set on the side of the first isolation portion facing the substrate, and the second isolation portion includes a fourth conductive layer and a fifth conductive layer that are sequentially laminated along the direction away from the substrate, the first side of the second isolation portion facing the display area, the second side of the second isolation portion facing the hole area, the first coating layer further coating one of the first and second sides of the second isolation portion, and the fifth conductive layer is set on the other side of the first and second sides of the second isolation portion, contracting inward more than the fourth conductive layer. The display substrate according to claim 14, wherein the first source-drain metal layer and the second source-drain metal layer both include a plurality of metal layers stacked together, the first isolation portion and the connecting electrode are set in the same layer, the first coating layer and the second flat layer are set in the same layer, and the second isolation portion and the source electrode and drain electrode of the transistor are set in the same layer.

18. The isolation column further includes a second isolation portion and a second coating layer, wherein the second isolation portion is set on the side of the first isolation portion facing the substrate, the first side of the second isolation portion faces the display area, the second side of the second isolation portion faces the hole area, the second coating layer is set between the second isolation portion and the first isolation portion and covers one of the first and second sides of the second isolation portion, the material of the second isolation portion is a conductive material, and the material of the second coating layer is an insulating material. The display substrate according to claim 14, wherein the first source-drain metal layer and the second source-drain metal layer both include a plurality of metal layers stacked together, the first isolation portion and the connecting electrode are set in the same layer, the first coating layer and the second flat layer are set in the same layer, the second isolation portion and the source electrode and drain electrode of the transistor are set in the same layer, and the second coating layer and the fifth insulating layer are set in the same layer.

19. The drive structure layer further includes a semiconductor layer on the substrate side of the first source / drain metal layer, a first gate metal layer, and a second gate metal layer, wherein the semiconductor layer includes the active layer of the transistor, the first gate metal layer includes the gate electrode of the transistor and one plate of the storage capacitor, and the second gate metal layer includes the other plate of the storage capacitor. The display substrate according to claim 14, wherein the isolation column further includes a column foundation set on the side of the first isolation portion facing the substrate, the column foundation includes at least one inorganic insulating layer and at least one metal layer, the metal layer is covered with the inorganic insulating layer, and the metal layer and the first gate metal layer or the second gate metal layer are set in the same layer.

20. The display substrate according to claim 14, wherein the fifth insulating layer includes a passivation layer and a first flat layer that are sequentially laminated along a direction away from the substrate, the passivation layer being an inorganic insulating layer and the first flat layer being an organic insulating layer.

21. A display device including a display board according to any one of claims 1 to 20.

22. A first isolation layer is formed on the substrate of the transient region, and the first isolation layer is configured by sequentially laminating a first film layer, a second film layer, and a third film layer along the direction away from the substrate, wherein the edges of the first film layer, the second film layer, and the third film layer are flush with the surface on the side of the first isolation layer facing the display region and the side facing the hole region. The third film layer is completely removed by employing an etching process. A first coating layer is formed on the surface of the second film layer that is separated from the substrate, and the first coating layer covers the side of the first isolation layer facing the display area or the hole area, and on the side of the first isolation layer not covered by the first coating layer, the edges of the second film layer and the first film layer protrude beyond the edge of the first coating layer. An etching process is employed to etch the first isolation layer, so that on the side of the first isolation layer not covered by the first coating layer, the edge of the second film layer and the edge of the first coating layer are flush, and the edge of the first film layer protrudes from or is flush with the edge of the second film layer. A method for manufacturing a display substrate according to claim 2, comprising employing an etching process to etch the second film layer, thereby setting the edge of the second film layer to be inwardly contracted compared to the edge of the first coating layer and the edge of the first film layer on the side of the first isolation layer not covered by the first coating layer, so that the first film layer and the second film layer of the first isolation layer become the first conductive layer and the second conductive layer of the first isolation portion, respectively.

Images