Display Panel

Abstract

To provide a display panel having excellent luminous efficiency. [Solution] The device comprises a substrate divided into first to third subpixels, an overcoat layer including convex portions and concave portions connected by a slope, the slope including a first inclined surface surrounding the concave portions in at least one of the first to third subpixels, first to third anode electrodes located in each of the first to third subpixels along the surface of the overcoat layer, and a bank layer including a bank open portion in the center of each of the first to third subpixels, the overcoat layer and the first to third anode electrodes, first to third organic light-emitting layers on a portion of each anode electrode in the bank open portion, and a cathode electrode on the first to third organic light-emitting layers and the bank layer, wherein one or more of the first to third anode electrodes include a second inclined surface that follows the first inclined surface, and the bank layer includes a third inclined surface that follows the second inclined surface, the angle between the bottom surface of the concave portion and the first inclined surface is 27° or more, and the distance between the second inclined surface and the third inclined surface is 3.2 μm or less.

Description

[Technical field]

[0001] The present invention relates to a display panel. [Background technology]

[0002] As the information society develops, there is an increasing demand for various display panels to be used in display devices, lighting devices, etc. In the field of display panels, there is an increasing demand for organic light-emitting display panels, which do not require a separate light source and have the advantages of being lightweight and thin.

[0003] However, an organic light-emitting display panel includes an organic light-emitting layer that emits light. Of the light emitted from the organic light-emitting layer, some is trapped inside the organic light-emitting display device without escaping to the outside of the organic light-emitting display panel, which reduces the light extraction efficiency of the organic light-emitting display panel and reduces the luminous efficiency.

[0004] In addition, research is being actively conducted to solve the problem of image distortion occurring depending on the viewing angle at which the display panel is viewed. Summary of the Invention [Problem to be solved by the invention]

[0005] An object of the present invention is to provide a display panel having excellent luminous efficiency.

[0006] One object of the present invention is to provide a display panel with little color shift due to viewing angle. [Means for solving the problem]

[0007] In one embodiment of the present invention, a display panel includes a substrate, an overcoat layer, a first anode electrode, a second anode electrode, a third anode electrode, a bank layer, a first organic light-emitting layer, a second organic light-emitting layer, a third organic light-emitting layer, and a cathode electrode.

[0008] The substrate is partitionable into a first sub-pixel, a second sub-pixel, and a third sub-pixel.

[0009] The first sub-pixel emits visible light of a first hue, the second sub-pixel emits visible light of a second hue, and the third sub-pixel emits visible light of a third hue, the first to third hues being different from each other.

[0010] The overcoat layer is located on the substrate and can include protrusions and recesses connected by slopes.

[0011] The slope may include a first sloped surface surrounding the recess at one or more of the first to third subpixels.

[0012] A first anode electrode may be located on the overcoat layer, formed along a surface of the overcoat layer, and located at the first sub-pixel.

[0013] A second anode electrode may be located on the overcoat layer, formed along a surface of the overcoat layer, and located at the second sub-pixel.

[0014] A third anode electrode may be located on the overcoat layer, formed along a surface of the overcoat layer, and located at the third sub-pixel.

[0015] The bank layer includes a bank open portion located at the center of each of the first to third subpixels, and can be located on the overcoat layer and the first to third anode electrodes.

[0016] The first organic light-emitting layer can be located on a portion of the first anode electrode located in the bank open portion.

[0017] The second organic light-emitting layer can be located on a portion of the second anode electrode located in the bank open portion.

[0018] The third organic light-emitting layer can be located on a portion of the third anode electrode located in the bank open portion.

[0019] A cathode electrode can be located on the first to third organic light-emitting layers and the bank layer.

[0020] One or more of the first to third anode electrodes may include a second inclined surface formed along the first inclined surface.

[0021] The bank layer may include a third inclined surface formed along the second inclined surface.

[0022] The angle of the first inclined surface may be 27° or more.

[0023] The distance between the second inclined surface and the third inclined surface can be set to 3.2 μm or less.

[0024] The height of the first inclined surface can be set to 0.7 μm or more.

[0025] The display panel can be divided into an opening region corresponding to the bank open portion of the bank layer and a non-opening region corresponding to the area excluding the bank open portion.

[0026] The display panel may include a first light-emitting region and a second light-emitting region when the organic light-emitting layer in the subpixel including the first inclined surface emits light.

[0027] The first light-emitting region emits visible light and can have a shape corresponding to the shape of the aperture region.

[0028] The second light-emitting region can have a shape that corresponds to the shape of the edge of the first light-emitting region without overlapping with the first light-emitting region.

[0029] The second light emitting region can be located surrounding the first light emitting region.

[0030] The second light-emitting region can be located in the non-aperture region.

[0031] The color coordinates of visible light emitted from the first light-emitting region may be different from the color coordinates of visible light emitted from the second light-emitting region adjacent to the first light-emitting region.

[0032] One or more of the first to third organic light-emitting layers can be formed to extend onto the bank layer.

[0033] In the organic light-emitting layer formed to extend onto the bank layer, the thickness of the portion formed on the anode electrode may be greater than the thickness of the portion formed on the third inclined surface of the bank layer.

[0034] The slope can include a first sloped surface surrounding a recess at one or more of the first subpixel and the second subpixel.

[0035] The first hue of visible light may be red visible light having a wavelength between 595 nm and 740 nm.

[0036] The second hue of visible light may be green visible light having a wavelength of 495 nm to 595 nm.

[0037] The third hue of visible light may be blue visible light having a wavelength between 450 nm and 495 nm.

[0038] The overcoat layer may include a first inclined surface in two or more types of subpixels among the first to third subpixels, and angles of the first inclined surfaces included in each type of subpixel may be different from each other, and distances between the second inclined surface and the third inclined surface may be different from each other in each type of subpixel.

[0039] The overcoat layer may include a first inclined surface in at least two types of subpixels among the first to third subpixels, and the heights of the first inclined surfaces included in each type of subpixel may be different from each other. Effect of the Invention

[0040] According to one aspect of the present invention, it is possible to provide a display panel having excellent luminous efficiency and a display panel with little color shift due to viewing angle. [Brief description of the drawings]

[0041] [Figure 1] 1 is a schematic system configuration diagram of a display device according to an embodiment of the present invention. [Diagram 2] FIG. 1 is a diagram illustrating a system of a display device according to an embodiment of the present invention. [Diagram 3] 1 is a diagram showing a structure of a sub-pixel when the panel in an embodiment of the present invention is an OLED (Organic Light Emitting Diode) panel. [Figure 4] FIG. 2 is a cross-sectional view of a display panel according to an embodiment of the present invention. [Diagram 5] 11 is a diagram showing how light emitted from a sub-pixel of a display panel is reflected by a second inclined surface in an embodiment of the present invention. [Figure 6] FIG. 6 is an enlarged view of a portion of the subpixel shown in FIG. 5. [Figure 7] 3 is a diagram showing an aperture region, a non-aperture region, a first light-emitting region, and a second light-emitting region that can be included in a display panel in an embodiment of the present invention. [Figure 8] FIG. 2 is a diagram showing the progression of light emitted from a subpixel of a display panel in an embodiment of the present invention. [Figure 9] FIG. 2 is a cross-sectional view of a display panel according to an embodiment of the present invention. [Figure 10] FIG. 10 is a diagram showing a portion of the display panel shown in FIG. [Figure 11] 1 is the first data showing the degree of image quality degradation due to the viewing angle of a display panel in an embodiment of the present invention. [Figure 12] 2 is a second document showing the degree of image quality degradation due to the viewing angle of a display panel in an embodiment of the present invention. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0042] Hereinafter, some embodiments of the present invention will be described in detail with reference to the drawings. When referring to components in each drawing, the same reference numerals are used for the same components even if they are shown in different drawings. In addition, when describing the present invention, if it is determined that a detailed description of related known configurations or functions may obscure the gist of the present invention, the detailed description may be omitted.

[0043] In addition, when describing components of the present invention, terms such as first, second, A, B, (a), (b), etc. may be used. Such terms are intended to distinguish the components from other components, and do not limit the nature, order, sequence, or number of the components. When a component is described as being "coupled", "bonded", or "connected" to another component, it should be understood that the component can be directly coupled or connected to the other component, but that there can also be other components "intervening" between the components, or that each component can be "coupled", "bonded", or "connected" through the other components. When a component is described as being "located on" or formed "on" another component, it should be understood that the component can be located on the surface of the other component in contact with the surface, but that there can also be other components between the components.

[0044] FIG. 1 is a schematic system configuration diagram of a display device according to an embodiment of the present invention.

[0045] The display device in the embodiment of the present invention includes a display device having a display panel, a lighting device, a lighting fixture, a lighting system, a light-emitting device, a light-emitting fixture, a light-emitting system, etc. For convenience of explanation, the following description will be centered on a display device. However, the following description can also be applied to various other display devices such as a lighting device and a light-emitting device.

[0046] As shown in FIG. 1, a display device according to an embodiment of the present invention can include a panel PNL for displaying an image or outputting light, and a driving circuit for driving such a panel PNL.

[0047] A number of data lines DL and a number of gate lines GL are arranged on the panel PNL, and a number of sub-pixels SP defined by the number of data lines DL and the number of gate lines GL can be arranged in a matrix type.

[0048] In the panel PNL, a number of data lines DL and a number of gate lines GL may be arranged crossing each other. For example, a number of gate lines GL may be arranged in rows or columns, and a number of data lines DL may be arranged in columns or rows. In the following, for convenience of explanation, it is assumed that a number of gate lines GL are arranged in rows, and a number of data lines DL are arranged in columns.

[0049] In addition to the multiple data lines DL and multiple gate lines GL, other types of signal wirings can be arranged on the panel PNL depending on the subpixel structure, etc. For example, driving voltage wirings, reference voltage wirings, common voltage wirings, etc. can be arranged.

[0050] The panel PNL can be various types of panels such as a Liquid Crystal Display (LCD) panel, an Organic Light Emitting Diode (OLED) panel, etc.

[0051] The type of signal wiring arranged on the panel PNL can be changed depending on the subpixel structure or the type of panel (e.g., LCD panel, OLED panel), etc. In this specification, the signal wiring can be considered as a concept including an electrode to which a signal is applied.

[0052] The panel PNL may include an active area (A / A) where an image (video) is displayed and a non-active area (N / A) which is an outer area of ​​the active area (A / A) and where no image is displayed. Here, the non-active area (N / A) is also called a bezel area.

[0053] In the active area (A / A), a large number of sub-pixels SP for displaying images are arranged.

[0054] In the non-active area (N / A), a pad section to which the data driver DDR is electrically connected is disposed, and a number of data link lines for connecting the pad section and a number of data lines DL may be disposed. Here, the number of data link lines may be portions of the number of data lines DL extended to the non-active area (N / A) or may be separate patterns electrically connected to the number of data lines DL.

[0055] Also, in the non-active area (N / A), wiring related to gate driving may be arranged to transmit a voltage (signal) required for gate driving to the gate driver GDR through a pad part to which the data driver DDR is electrically connected. For example, the wiring related to gate driving may include a clock wiring for transmitting a clock signal, a gate voltage wiring for transmitting a gate voltage (VGH, VGL), a gate driving control signal wiring for transmitting various control signals required for generating a scan signal, etc. The wiring related to gate driving is arranged in the non-active area (N / A) unlike the gate line GL arranged in the active area (A / A).

[0056] The drive circuit can include a data driver DDR that drives a number of data lines DL, a gate driver GDR that drives a number of gate lines GL, and a controller CTR that controls the data driver DDR and the gate driver GDR.

[0057] The data driver DDR is capable of driving a large number of data lines DL by outputting data voltages to the large number of data lines DL.

[0058] The gate driver GDR is capable of driving a large number of gate lines GL by outputting scan signals to the gate lines GL.

[0059] The controller CTR can control the driving operations of the data driver DDR and the gate driver GDR by supplying various control signals (DCS (Data Control Signal) and GCS (Gate Control Signal)) necessary for the driving operations of the data driver DDR and the gate driver GDR. The controller CTR can also supply video data (DATA) to the data driver DDR.

[0060] The controller CTR starts scanning according to the timing realized in each frame, converts the input video data input from the outside to match the data signal format used in the data driver DDR, outputs the converted video data (DATA), and controls the data drive in accordance with the scan.

[0061] In order to control the data driver DDR and the gate driver GDR, the controller CTR receives input from an external source, such as a host system, generates various control signals, and outputs timing signals such as a vertical synchronization signal, a horizontal synchronization signal, an input data enable (DE) signal, and a clock signal (CLK) to the data driver DDR and the gate driver GDR.

[0062] For example, the controller CTR outputs various gate control signals (GCS: Gate Control Signals) including a gate start pulse (GSP: Gate Start Pulse), a gate shift clock (GSC: Gate Shift Clock), a gate output enable (GOE: Gate Output Enable) signal, etc. to control the gate driver GDR.

[0063] In addition, the controller CTR outputs various data control signals (DCS: Data Control Signals) including a source start pulse (SSP: Source Start Pulse), a source sampling clock (SSC: Source Sampling Clock), a source output enable (SOE: Source Output Enable) signal, etc. to control the data driver DDR.

[0064] The controller CTR may include a timing controller used in conventional display technology or another timing controller, thereby enabling other control functions to be further realized.

[0065] The controller CTR may be realized as a unit separate from the data driver DDR, or may be integrated with the data driver DDR and realized as an integrated circuit.

[0066] The data driver DDR receives image data (DATA) from the controller CTR and supplies data voltages to the data lines DL, thereby driving the data lines DL. Here, the data driver DDR is also called a source driver.

[0067] The data driver DDR can transmit and receive various signals to and from the controller CTR via various interfaces.

[0068] The gate driver GDR sequentially drives the gate lines GL by sequentially supplying scan signals to the gate lines GL. Here, the gate driver GDR is also called a scan driver.

[0069] The gate driver GDR sequentially supplies a scan signal, such as an on voltage or an off voltage, to a number of gate lines GL under the control of the controller CTR.

[0070] When a specific gate line is opened by the gate driver GDR, the data driver DDR converts the video data (DATA) received from the controller CTR into an analog data voltage and supplies it to a number of data lines DL.

[0071] The data driver DDR may be located on only one side (e.g., the upper or lower side) of the panel PNL, or may be located on both sides (e.g., the upper and lower sides) of the panel PNL depending on the driving method or panel design method.

[0072] The gate driver GDR may be located on only one side (e.g., the left or right side) of the panel PNL, or may be located on both sides (e.g., the left and right sides) of the panel PNL depending on the driving method or panel design method.

[0073] The data driver DDR can be realized by including one or more source driver integrated circuits (SDICs).

[0074] Each source driver integrated circuit SDIC may include a shift register, a latch circuit, a digital to analog converter (DAC), an output buffer, etc. The data driver DDR may further include one or more analog to digital converters (ADC).

[0075] Each source driver integrated circuit SDIC can be connected to a bonding pad of the panel PNL in a TAB (Tape Automated Bonding) type or COG (Chip On Glass) type, or can be directly arranged on the panel PNL. Each source driver integrated circuit SDIC can also be integrated and arranged on the panel PNL. Also, each source driver integrated circuit SDIC can be realized as a COF (Chip On Film) type. In this case, each source driver integrated circuit SDIC is mounted on a circuit film and can be electrically connected to a data line DL in the panel PNL through this circuit film.

[0076] The gate driver GDR may include a number of gate drive circuits GDC, each of which may correspond to a respective one of the gate lines GL.

[0077] Each gate driving circuit GDC can include a shift register, a level shifter, or the like.

[0078] Each gate driving circuit GDC can be connected to a bonding pad of the panel PNL in a TAB (Tape Automated Bonding) type or a COG (Chip On Glass) type. Also, each gate driving circuit GDC can be realized in a COF (Chip On Film) type. In this case, each gate driving circuit GDC is mounted on a circuit film and can be electrically connected to a gate line GL in the panel PNL through this circuit film. Also, each gate driving circuit GDC can be realized in a GIP (Gate In Panel) type and can be built in the panel PNL. That is, each gate driving circuit GDC can be directly formed in the panel PNL.

[0079] FIG. 2 is a diagram illustrating a display system according to an embodiment of the present invention.

[0080] Referring to FIG. 2, in a display device according to an embodiment of the present invention, the data driver DDR can be realized in a COF (Chip On Film) type among various types (TAB, COG, COF, etc.), and the gate driver GDR can be realized in a GIP (Gate In Panel) type among various types (TAB, COG, COF, GIP, etc.).

[0081] The data driver DDR can be realized by one or more source driver integrated circuits SDIC. In FIG. 2, the data driver DDR is realized by multiple source driver integrated circuits SDIC.

[0082] When the data driver DDR is realized in the COF type, each source driver integrated circuit SDIC realizing the data driver DDR can be mounted on the source side circuit film SF.

[0083] One side of the source side circuit film SF can be electrically connected to a pad portion (a group of pads) present in a non-active area (N / A) of the panel PNL.

[0084] On the source side circuit film SF, wiring for electrically connecting the source driver integrated circuit SDIC and the panel PNL can be disposed.

[0085] The display device may include one or more source printed circuit boards SPCB for circuit connections between multiple source driver integrated circuits SDIC and other devices, and a control printed circuit board CPCB for mounting control components and various electrical devices.

[0086] The other side of the source side circuit film SF on which the source driver integrated circuit SDIC is mounted can be connected to one or more source printed circuit boards SPCB.

[0087] That is, the source side circuit film SF on which the source driver integrated circuit SDIC is mounted can be electrically connected to the non-active area (N / A) of the panel PNL on one side and electrically connected to the source printed circuit board SPCB on the other side.

[0088] A controller CTR for controlling the operations of the data driver DDR and the gate driver GDR can be disposed on the control printed circuit board CPCB.

[0089] In addition, although not shown, a power management integrated circuit (PMIC: Power Management IC) that supplies various voltages or currents to the panel PNL, data driver DDR, and gate driver GDR, etc., or controls the various voltages or currents supplied thereto, can be further arranged on the control printed circuit board CPCB.

[0090] The source printed circuit board SPCB and the control printed circuit board CPCB can be connected in a circuit form by at least one connecting member CBL, which can be realized, for example, by a flexible printed circuit (FPC), a flexible flat cable (FFC), etc.

[0091] One or more of the source printed circuit board SPCB and the control printed circuit board CPCB can be integrated and realized on one printed circuit board.

[0092] When the gate driver GDR is realized as a GIP (Gate In Panel), a number of gate driving circuits GDC included in the gate driver GDR can be directly formed on a non-active area (N / A) of the panel PNL.

[0093] Each of the multiple gate driving circuits GDC can output a corresponding scan signal (SCAN) to a corresponding gate line GL arranged in the active area (A / A) of the panel PNL.

[0094] The numerous gate drive circuits GDC arranged on the panel PNL can be supplied with various signals required for generating scan signals (clock signal, high level gate voltage (VGH), low level gate voltage (VGL), start signal (VST), reset signal (RST), etc.) via wiring related to gate drive arranged in the non-active area (N / A).

[0095] Wiring related to gate driving arranged in the non-active area (N / A) can be electrically connected to a source side circuit film SF arranged closest to a plurality of gate driving circuits GDC.

[0096] FIG. 3 is a diagram showing a structure of a sub-pixel SP in a case where the panel PNL in the embodiment of the present invention is an OLED (Organic Light Emitting Diode) panel.

[0097] Referring to FIG. 3, each sub-pixel SP in a panel PNL, which is an OLED panel, can be realized including an organic light emitting diode (OLED), a driving transistor DRT for driving the OLED, a switching transistor O-SWT electrically connected between a first node N1 of the driving transistor DRT and a corresponding data line DL, and a storage capacitor Cst electrically connected between the first node N1 and a second node N2 of the driving transistor DRT.

[0098] An organic light emitting diode (OLED) can be formed by an anode electrode, an organic light emitting layer, and a cathode electrode.

[0099] 3, an anode electrode (also called a pixel electrode) of the OLED can be electrically connected to a second node N2 of the driving transistor DRT, and a ground voltage (EVSS) can be applied to a cathode electrode (also called a common electrode) of the OLED.

[0100] Here, the base voltage (EVSS) may be, for example, a ground voltage, or a voltage higher or lower than the ground voltage. Also, the base voltage (EVSS) may be variable depending on the driving state. For example, the base voltage (EVSS) may be set to be different between the image driving mode and the sensing driving mode.

[0101] The driving transistor DRT drives the organic light emitting diode (OLED) by supplying a driving current to the organic light emitting diode (OLED).

[0102] The driving transistor DRT may include a first node N1, a second node N2, and a third node N3.

[0103] The first node N1 of the driving transistor DRT may be a gate node and may be electrically connected to a source node or a drain node of the switching transistor O-SWT. The second node N2 of the driving transistor DRT may be a source node or a drain node and may be electrically connected to an anode electrode (or a cathode electrode) of an organic light emitting diode (OLED). The third node N3 of the driving transistor DRT may be a drain node or a source node, to which a driving voltage (EVDD) may be applied and may be electrically connected to a driving voltage line (DVL) that supplies the driving voltage (EVDD).

[0104] The storage capacitor Cst is electrically connected between the first node N1 and the second node N2 of the driving transistor DRT, and is capable of maintaining a data voltage (Vdata) corresponding to the image signal voltage or a voltage corresponding thereto for one frame time (or a fixed time).

[0105] A drain node or a source node of the switching transistor O-SWT is electrically connected to a corresponding data line DL, a source node or a drain node of the switching transistor O-SWT is electrically connected to a first node N1 of the driving transistor DRT, and a gate node of the switching transistor O-SWT is electrically connected to a corresponding gate line GL to apply a scan signal (SCAN).

[0106] The on-off operation of the switching transistor O-SWT can be controlled by a scan signal SCAN input to the gate node through a corresponding gate line.

[0107] The switching transistor O-SWT is turned on by a scan signal SCAN to transmit a data voltage Vdata supplied from a corresponding data line DL to a first node N1 of the driving transistor DRT.

[0108] Meanwhile, the storage capacitor Cst may be an external capacitor intentionally provided outside the driving transistor DRT, instead of a parasitic capacitor (e.g., Cgs, Cgd) that is an internal capacitor present between the first node N1 and the second node N2 of the driving transistor DRT. Each of the driving transistor DRT and the switching transistor O-SWT may be an n-type transistor or a p-type transistor.

[0109] 3 is a 2T (Transistor) 1C (Capacitor) structure, which is an example for explanation, and may further include one or more transistors or one or more capacitors. Alternatively, each of the multiple subpixels may have the same structure, and some of the multiple subpixels may have different structures.

[0110] FIG. 4 is a cross-sectional view of a display panel in an embodiment of the present invention.

[0111] Referring to FIG. 4, the display panel in an embodiment of the present invention may include a substrate SUB, an overcoat layer OC located on the substrate, a first anode electrode ANO1 located on the overcoat layer OC, a second anode electrode ANO2 located on the overcoat layer OC, a third anode electrode ANO3 located on the overcoat layer OC, a bank layer BNK located on the overcoat layer OC and the first to third anode electrodes ANO1, RE2, RE3, a first organic light-emitting layer EL1 located on a portion of the first anode electrode, a second organic light-emitting layer EL2 located on a portion of the second anode electrode, a third organic light-emitting layer EL3 located on a portion of the third anode electrode, and a cathode electrode CAT located on the organic light-emitting layers and the bank layer.

[0112] The substrate SUB is partitionable into a first sub-pixel SP1, a second sub-pixel SP2, and a third sub-pixel SP3.

[0113] The first sub-pixel SP1 may emit visible light of a first color, the second sub-pixel SP2 may emit visible light of a second color, and the third sub-pixel SP3 may emit visible light of a third color.

[0114] The overcoat layer OC can thus be referred to as a layer that flattens the pattern layer formed on the substrate to enable pixel formation. The overcoat layer OC can include a convex portion CONV and a concave portion CONC connected by a slope SLO.

[0115] The convex portion CONV can be thicker than the concave portion CONC. In distinguishing the concave portion CONC from the convex portion CONV, the thicknesses of the concave portion CONC and the convex portion CONV mean the thickness of the overcoat layer OC, and the thicknesses of the concave portion CONC and the convex portion CONV can be, for example, the thickness of the overcoat layer OC measured between the protective film PAS formed directly below the overcoat layer OC and the electrode ANO formed directly above the overcoat layer OC in each region, and can be the thickest value measured excluding the portion where the contact hole or the like is introduced.

[0116] 4, the thickness (T1) of the recessed portion CONC may be thinner than the thickness (T2) of the protruding portion CONV. Thus, in a cross section of the display panel, the recessed portion CONC may be recognized as a flat area of ​​the overcoat layer OC, and the protruding portion CONV may be recognized as a protruding area.

[0117] Due to the difference in thickness, a slope SLO is formed between the convex portion CONV and the concave portion CONC, and the convex portion CONV and the concave portion CONC can be connected by the slope SLO. The slope SLO can include a first slope SLO1 surrounding the concave portion CONC in one or more subpixels among the first to third subpixels SP1, SP2, and SP3. The one or more subpixels can mean that the subpixels are classified according to the hue of the light emitted from the subpixels, and the subpixels are classified according to the hue of the light emitted from the subpixels. For example, if a display panel includes a red subpixel, a green subpixel, and a blue subpixel, the display panel can be expressed as including three types of subpixels.

[0118] The first inclined surface SLO1 may refer to an inclined surface of the inclination surrounding the recess CONC among the inclinations SLO formed between the convex portion CONV and the recess CONC of the overcoat layer OC. Therefore, in the display panel shown in FIG. 4, the first sub-pixel SP1 and the second sub-pixel SP2 include the first inclined surface SLO1 since they include the inclination surrounding the recess. On the other hand, the third sub-pixel SP3 does not include the first inclined surface SLO1 since it does not include the inclination surrounding the recess.

[0119] Since the protrusions CONV surround the recesses CONC, the recesses CONC can be located between the protrusions CONV in the cross section of the display panel.

[0120] The overcoat layer OC including the convex portion CONV, the concave portion CONC, and the sloped portion SLO can be formed, for example, through a photolithography process using a half-tone mask.

[0121] The shape of the recess CONC is not particularly limited, but may be, for example, a circle or a polygon such as a rectangle, a pentagon, or an octagon. The protrusion CONV can form a side wall that surrounds the recess CONC and covers the side surface of the recess CONC having the shape.

[0122] On the overcoat layer OC may be located a first anode electrode ANO1, a second anode electrode ANO2, and a third anode electrode ANO3 formed along a surface of the overcoat layer OC.

[0123] The first anode electrode ANO1, the second anode electrode ANO2, and the third anode electrode ANO3 are formed along the surface of the overcoat layer OC, which means that they are formed on the overcoat layer OC with a thickness that is considered to be uniform, taking into account thickness deviations due to deviations in a given process.

[0124] The first anode electrode ANO1, the second anode electrode ANO2, and the third anode electrode ANO3 are located apart from each other and are capable of transmitting signals to each sub-pixel independently.

[0125] As described above, the overcoat layer OC may include a first inclined surface SLO1 surrounding the recess CONC in one or more of the first to third subpixels SP1 to SP3. Therefore, when the anode electrode is formed along the surface of the first inclined surface SLO1, which is a part of the surface of the overcoat layer OC, the anode electrode may also include an inclined surface. In the present application, the inclined surface of the anode electrode thus formed may be referred to as a second inclined surface SLO2.

[0126] Furthermore, since the first anode electrode ANO1, the second anode electrode ANO2, and the third anode electrode ANO3 are formed along the surface of the overcoat layer OC, the second inclined surface SLO2 can be configured to surround the anode electrodes formed on the recess CONC of the overcoat layer OC.

[0127] The first to third anode electrodes may be electrically connected to the transistor TR through contact holes (not shown).

[0128] The anode electrode may be an electrode including a reflective electrode. The anode electrode may include a conductive metal oxide layer including indium tin oxide (ITO) and a reflective metal layer including silver. For example, the anode electrode may include a first ITO layer located on the overcoat layer, a reflective metal layer including silver located on the first ITO layer, and a second ITO layer located on the reflective metal layer.

[0129] The anode electrode can function as an anode electrode in a display panel.

[0130] The bank layer BNK may include a bank open part BNKO located at each center of the first to third subpixels SP1, SP2, and SP3. The bank open part means an opening where the anode electrode at the bottom of the bank layer is exposed, and when referring to FIG. 4, the area indicated by "OPN" may be understood as the bank open part BNKO. The bank open part BNKO refers to an opening provided in the bank layer, and the anode electrode is exposed by the bank open part BNKO, and an organic light emitting layer and a cathode electrode may be sequentially stacked on the exposed anode electrode. Therefore, the bank open part BNKO is provided at each center of the subpixels from which light is emitted, and light may be emitted from the subpixels.

[0131] The first organic light-emitting layer EL1 can be located on a portion of the first anode electrode ANO1 located in the bank open portion BNKO, the second organic light-emitting layer EL2 can be located on a portion of the second anode electrode ANO1 located in the bank open portion BNKO, and the third organic light-emitting layer EL3 can be located on a portion of the third anode electrode ANO3 located in the bank open portion BNKO.

[0132] The first to third organic light emitting layers EL1, EL2, and EL3 are layers in which holes and electrons injected through the positive and negative electrodes are recombined to form excitons, and the excitons emit light as they relax, so they can be located on the anode electrodes ANO1, RE2, and RE3 exposed at the bank open portion BNKO. The anode electrodes ANO1, RE2, and RE3 can be anodes.

[0133] The cathode electrode CAT may be located on the organic light emitting layers EL1, EL2, EL3 and the bank layer BNK. The display panel may be a top emission type in which light emitted from the organic light emitting layers EL1, EL2, EL3 is emitted through the cathode electrode CAT. Therefore, the cathode electrode CAT may be a transparent electrode having excellent transmittance for light in the visible light range, and the bank layer BNK may function as a layer that divides the opening area OPN and the non-opening area NOP of the display panel.

[0134] As described above, the display panel of the present invention can be divided into an opening region OPN and a non-opening region NOP by the bank layer BNK. The opening region OPN can correspond to the bank open portion BNKO, and the non-opening region NOP can correspond to the bank layer BNK excluding the bank open portion. The opening region OPN and the non-opening region NOP can be located in the active region (A / A) of the display panel.

[0135] In this regard, when one region corresponds to another region, it means that the one region and the other region are considered to be identical in size, area, shape, etc., when taking into account errors that may occur during the product manufacturing process.

[0136] Since the anode electrodes ANO1, RE2, RE3, bank layer BNK, organic light-emitting layers EL1, EL2, EL3, and cathode electrode CAT are positioned on the overcoat layer OC as described above, light can be emitted within the opening region OPN where the anode electrodes ANO1, RE2, RE3, organic light-emitting layers EL1, EL2, EL3, and cathode electrode CAT are sequentially stacked within the bank open portion BNKO.

[0137] The display panel in the embodiment of the present invention may include a buffer layer BUF, an interlayer insulating film INF, a protective layer PAS, a transistor TR, storage capacitors C1, C2, an auxiliary electrode AE ​​(which may also be referred to as an auxiliary wiring), and a pad region.

[0138] A buffer layer BUF may be disposed on a substrate SUB, and a transistor TR and storage capacitors C1 and C2 may be formed on the buffer layer BUF.

[0139] The interlayer insulating film INF may be located over the gate electrode GATE of the transistor TR, the semiconductor layer ACT, the first storage capacitor electrode C1 of the storage capacitor, and the first pad electrode P1 of the pad region.

[0140] The protective layer PAS may be formed to protect electrical circuit elements such as the auxiliary electrodes AE, the storage capacitors C1, C2, and the transistors TR.

[0141] The transistor TR can include a semiconductor layer ACT, a gate insulating film GI, a gate electrode GATE, a source electrode S, and a drain electrode D. A transistor as a specific example of the present invention will be described below, but the positional relationship of each component of the transistor may be other than that known in the field of the present invention.

[0142] The semiconductor layer ACT can be formed on the buffer layer BUF.

[0143] The gate insulating film GI is formed on the semiconductor layer ACT, and the gate electrode GATE is formed on the gate insulating film GI, so that the gate insulating film GI can be located between the semiconductor layer ACT and the gate electrode GATE.

[0144] The source electrode S and the drain electrode D are each in contact with one end of the semiconductor layer ACT and can be disposed apart from each other. The drain electrode D can be connected to the anode electrode ANO through a contact hole.

[0145] The transistor TR functions as a drive transistor DRT included in the panel, and is capable of driving an OLED included in the panel.

[0146] 4, storage capacitors C1 and C2 may be disposed in the active region (A / A). The storage capacitors C1 and C2 may include a first storage capacitor electrode C1 disposed in the same layer as the gate electrode GATE and a second storage capacitor electrode C2 disposed in the same layer as the source electrode S and the drain electrode D, but the structure of the storage capacitors C1 and C2 of the present invention is not limited thereto.

[0147] In addition, the display panel according to the embodiment of the present invention may include a pad area disposed in the non-active area, and a number of pad electrodes P1 and P2 may be disposed in the pad area.

[0148] For example, a first pad electrode P1 can be disposed on a number of insulating films (BUF, GI) disposed in the pad region. An interlayer insulating film INF exposing a part of the upper surface of the first pad electrode P1 can be disposed on the first pad electrode P1. A second pad electrode P2 in contact with the first pad electrode P1 can be disposed on the first pad electrode P1 and the interlayer insulating film INF.

[0149] Although not shown in FIG. 4, the second pad electrode P2 can be electrically connected to various circuit films.

[0150] 5 is a diagram showing the propagation of light emitted from a sub-pixel of a display panel in an embodiment of the present invention, the sub-pixel in FIG 5 includes a first inclined surface SLO1, a second inclined surface SLO2, and a third inclined surface SLO3.

[0151] 5, light L emitted from the organic light emitting layer EL is not directional and is emitted in various directions. The organic light emitting layer EL may be any one of the first organic light emitting layer EL1 to the third organic light emitting layer EL3, and is an organic light emitting layer included in a subpixel including the first inclined surface SLO1 to the third inclined surface SLO3 as described above. A part of the light L emitted from the organic light emitting layer EL is totally reflected while traveling from a layer with a high refractive index (not shown) to a layer with a low refractive index (not shown), and can travel toward the third inclined surface S3 of the bank layer BNK.

[0152] The bank layer BNK can be formed of a material having a predetermined transmittance for light in the visible light wavelength band. Therefore, light emitted toward the third inclined surface S3 of the bank layer BNK can pass through the third inclined surface S3 of the bank layer BNK and reach the second inclined surface S3 of the anode electrode ANO. The anode electrode ANO is also one of the first anode electrode ANO1 to the third anode electrode ANO3, and should be understood as an anode electrode included in the subpixel including the first to third inclined surfaces.

[0153] The light that reaches the second inclined surface S2 of the anode electrode ANO is reflected by the second inclined surface S2 and travels toward the third inclined surface S3 of the bank layer, and can be extracted to the outside of the display panel. Therefore, in the display panel of the present invention, the second inclined surface S2 of the anode electrode formed on the first inclined surface S1 as described above allows the light emitted from the organic light-emitting layer EL to travel toward the upper part of the display panel, thereby improving the luminous efficiency of the display panel.

[0154] FIG. 6 is an enlarged view of a portion of the subpixel shown in FIG.

[0155] 6, the angle between the recess CONC and the first inclined surface SLO1 is indicated as angle θ, the distance between the second inclined surface SLO2 and the third inclined surface SLO3 is indicated as distance d, and the height of the first inclined surface SLO1 is indicated as height h. The display panel according to the embodiment of the present invention can achieve excellent luminous efficiency by adjusting two or more of the angle θ, the distance d, and the height h. For example, the display panel according to the present invention can have specific values ​​of the angle θ and the distance d, or can have specific values ​​of the angle θ, the distance d, and the height h.

[0156] The angle θ between the bottom surface of the recess CONC and the first inclined surface SLO1 is set to be 27° or more or 45° or more. When the angle θ has a large value, the second reflecting surface SLO2 can effectively reflect the light emitted from the organic light emitting layer EL formed on the anode electrode ANO exposed in the opening region BNKO. The upper limit of the range of the angle θ is not particularly limited, but when the angle θ has a large value, cracks and disconnections may occur in the anode electrode ANO formed on the overcoat layer, so the angle θ can be set to, for example, 80° or less, 70° or less, or 65° or less.

[0157] A distance d between the second inclined surface SLO2 and the third inclined surface SLO3 can be defined as a distance from the second inclined surface SLO2 to the third inclined surface SLO3 measured in a direction parallel to the first region A1 of the overcoat layer. The distance d can be 3.2 μm or less, 2.6 μm or less, or 2.0 μm or less. The smaller the distance d, the more the aperture region OPN of the display panel can be expanded, and the light path of the light reflected by the second inclined surface S2 and extracted to the outside of the display panel can be shortened to improve the luminous efficiency. Therefore, the lower limit of the distance d is not particularly limited, but for example, the lower limit of the distance d can be 0.1 μm or more, 0.3 μm or more, or 0.5 μm or more.

[0158] By adjusting the range of the distance d as described above, it is possible to provide a display panel having a wide aperture area and excellent luminous efficiency.

[0159] The height h of the first inclined surface SLO1 means the difference between the thickness (T1') of the recessed portion CONC connected to the first inclined surface SLO1 and the thickness (T2') of the protruding portion. The thickness (T1') of the recessed portion CONC can be the thickness of the recessed portion CONC measured at the portion where the first inclined surface SLO1 starts, and the thickness (T2') of the protruding portion can be the thickness of the protruding portion measured at the portion where the first inclined surface SLO2 ends.

[0160] The height h can be 0.7 μm or more, 1.2 μm or more, 1.4 μm or more, or 2 μm or more. Since the second inclined surface SLO2 can reflect the light emitted from the organic light-emitting layer EL more effectively as the height h is larger, and can increase the luminous efficiency, the upper limit of the height h is not particularly limited, but can be, for example, 10 μm or less or 5 μm or less.

[0161] As described above, by adjusting the distance d, the angle θ, and the height h, the display panel of the present invention not only has improved luminous efficiency but also can include a first luminous region and a second luminous region when the organic luminescent layer emits light.

[0162] FIG. 7 is a diagram showing an aperture region, a non-aperture region, a first light-emitting region, and a second light-emitting region included in a display panel in an embodiment of the present invention.

[0163] Fig. 7(a) is a micrograph of a display panel including an aperture region OPN and a non-aperture region NOP having a specific shape, and Fig. 7(b) is a micrograph taken when the organic light-emitting layers EL1, EL2, and EL3 of the display panel emit light. All of the sub-pixels shown in Fig. 7(a) include a first inclined surface SLO1 to a third inclined surface SLO3.

[0164] Referring to FIG. 7, the display panel in an embodiment of the present invention may include a first light-emitting area LEA1 and a second light-emitting area LEA2 from which visible light is emitted when the organic light-emitting layer emits light, and a first non-light-emitting area NEA1 and a second non-light-emitting area NEA2.

[0165] The second light-emitting area LEA2 is included in the sub-pixel including the first inclined surface SLO1 to the third inclined surface SLO3, and the sub-pixel not including the first inclined surface SLO1 to the third inclined surface SLO3 includes only the first light-emitting area and does not include the second light-emitting area. Therefore, all the sub-pixels illustrated in the display panel of FIG. 7 include the first to third inclined surfaces SLO3.

[0166] The first light-emitting region LEA1 may have a shape corresponding to the shape of the opening region OPN. The shape of a certain component corresponds to the shape of another component means that the shape of the certain component is the same as that of the other component, or the same shape but different size, or the shape of the certain component is formed by transferring the shape of the other component. Therefore, the shape of the first light-emitting region LEA1 can be understood as being substantially the shape of the opening region OPN transferred by the light emitted from the organic light-emitting layers EL1, EL2, and EL3 located in the opening region OPN.

[0167] The shape of the opening region OPN is not particularly limited, but may be, for example, a circle or a polygon such as a rectangle, a pentagon, an octagon, etc. Referring to Fig. 7(a), the opening region OPN has a shape corresponding to an octagon.

[0168] The first light-emitting region LEA1 may have a shape corresponding to the opening region OPN. Referring to Fig. 7(b), it can be seen that the first light-emitting region LEA1 has a shape corresponding to the shape of the opening region OPN shown in Fig. 7(a).

[0169] The second light-emitting region LEA2 does not overlap with the first light-emitting region LEA1 and may have a shape corresponding to the edge shape of the first light-emitting region LEA1. As shown in Fig. 7(b), the second light-emitting region LEA2 has the same shape as the edge of the first light-emitting region LEA1 but different size, so it can be said that the second light-emitting region LEA2 has a shape corresponding to the edge shape of the first light-emitting region LEA1.

[0170] The second light emitting area LEA2 may be a closed curve having the same shape as the edge of the first light emitting area LEA1. Alternatively, the second light emitting area LEA2 may have a shape in which a part of the closed curve is interrupted. Whether the second light emitting area LEA2 is interrupted can be determined depending on the wavelength of visible light emitted by the organic light emitting layer included in the subpixel.

[0171] At least one subpixel can be distinguished by the first non-light-emitting region NEA1. Referring to Fig. 7(b), the first non-light-emitting region NEA1 can separate the second light-emitting regions LEA2 from each other. That is, the first non-light-emitting region NEA1 can be a region between the second light-emitting regions LEA2 in the non-opening region NOP.

[0172] That is, the first non-light emitting region NEA1 can be a region where no light emission occurs substantially. The first non-light emitting region NEA1 can correspond to a part of the non-opening region NOP where the second light emitting region LEA2 is not formed.

[0173] The second non-light emitting area NEA2 may be an area in which no light is substantially emitted while separating the first light emitting area LEA1 and the second light emitting area LEA2 formed by one sub-pixel.

[0174] The shape of the second non-light-emitting area NEA2 can be determined by the shapes of the first light-emitting area LEA1 and the second light-emitting area LEA2. For example, if the first light-emitting area LEA1 is an octagon and the second light-emitting area LEA2 is also an octagonal closed curve, the second non-light-emitting area NOP2 can be formed into an octagon by the first light-emitting area LEA1 and the second light-emitting area LEA2.

[0175] Although the second non-emitting area NEA2 is expressed as non-emitting, due to its characteristics of being present between the emitting areas LEA1 and LEA2, some light may be sensed on the photograph, in particular light having a hue similar to the wavelength band of visible light emitted from the sub-pixels. Therefore, the second non-emitting area NEA2 should be understood as an area where no light is emitted at all, or an area that separates the first emitting area LEA2 and the second emitting area LEA2, and where weaker light is observed than in these two emitting areas.

[0176] As described above, the second light-emitting area LEA2 can be realized by adjusting the ranges of the angle θ, the distance d, and the height h. Therefore, the display panel in the embodiment of the present invention can have excellent light-emitting efficiency by adjusting the ranges of the angle θ, the distance d, and the height h, and can include the first light-emitting area LEA1 and the second light-emitting area LEA2.

[0177] The second light-emitting region LEA2 is presumably formed by light traveling along the path described in Fig. 5. The subpixel shown in Fig. 5 includes not only the first light-emitting region LEA1 but also the second light-emitting region LEA2 formed by light reflected by the second inclined surface S2, so that the light-emitting efficiency can be improved. The display panel of the present invention can have excellent light-emitting efficiency by including the first inclined surface SLO1 surrounding the recess CONC in the overcoat layer as described above in at least one of the first to third subpixels.

[0178] The second light-emitting region LEA2 can be located surrounding the first light-emitting region LEA1. This is presumably because the second light-emitting region LEA2 is formed by light reflected by the second inclined surface SLO2 of the anode electrode ANO formed on the first inclined surface SLO1 surrounding the recess CONC.

[0179] Also, the second light-emitting region LEA2 may be located in the non-aperture region NOP. As described above, the second light-emitting region LEA2 is formed of light reflected by the second inclined surface SLO2 located in the non-aperture region NOP, so that the whole or a part of the second light-emitting region LEA2 may be located in the non-aperture region NOP.

[0180] The light forming the first light-emitting region LEA1 and the second light-emitting region LEA2 may have substantially different color coordinates because the light paths are different and the layers through which the light forms are different, as shown in FIG. 5. That is, the light forming the second light-emitting region LEA2 passes through the bank layer BNK formed in the non-opening region NOP, while the light forming the first light-emitting region LEA1 does not pass through the bank layer. The bank layer BNK can absorb light of a part of the wavelength band of the light forming the second light-emitting region LEA2, so the light forming the second light-emitting region LEA2 may have color coordinates different from the light forming the first light-emitting region LEA1. Here, different color coordinates may mean that there is a difference that is considered to be different when considering a general error in color coordinate measurement.

[0181] Although the second non-emitting area NEA2 is expressed as non-emitting, due to its characteristics of being present between the emitting areas LEA1 and LEA2, some light may be sensed on the photograph, in particular light having a hue similar to the wavelength band of visible light emitted from the sub-pixels. Therefore, the second non-emitting area NEA2 should be understood as an area where no light is emitted at all, or an area that separates the first emitting area LEA2 and the second emitting area LEA2, and where weaker light is observed than in the two emitting areas.

[0182] As can be seen from Fig. 7(b), the first light-emitting region and the second light-emitting region can each be formed in a plurality of numbers according to the number of sub-pixel regions included in the display panel. Therefore, the second light-emitting region adjacent to the first light-emitting region should be understood as a light-emitting region included in the same sub-pixel region, and should be understood as referring to the second light-emitting region adjacent to the first light-emitting region among the plurality of second light-emitting regions. This is because the second light-emitting region adjacent to a certain first light-emitting region exists in one sub-pixel region and is a light-emitting region formed from light emitted from the same organic light-emitting layer.

[0183] 8 is a diagram showing the progression of light emitted from a sub-pixel of a display panel in an embodiment of the present invention. Unlike the sub-pixels shown in Figures 5 and 6, the sub-pixel does not include a first inclined surface SLO1 to a third inclined surface SLO3. Therefore, unlike the sub-pixels shown in Figures 5 and 6, the second light-emitting region LEA2 is not formed, and only the first light-emitting region LEA1 is formed.

[0184] 5 includes a first light-emitting region LEA1 and a second light-emitting region LEA2, and the light emitted from the second light-emitting region LEA2 has a different color coordinate from the light emitted from the first light-emitting region LEA1. This difference in color coordinate is caused by the difference in optical paths of the light constituting the first light-emitting region LEA1 and the light constituting the second light-emitting region LEA2. That is, the second light-emitting region LEA2 has a different optical path, so a shift in color coordinate occurs.

[0185] The inventors of the present application have found that the shift of the color coordinates is affected by the wavelength band of the light emitted from the organic light emitting layer. Therefore, in order to prevent the quality of the display panel from deteriorating due to the shift of the color coordinates, for example, in a display panel including subpixels of a first color to a third color, one or more subpixels may include a first inclined surface SLO1, one or more of the first subpixel and the second subpixel may include the first inclined surface SLO1, or one or more of the first subpixel and the second subpixel may include the first inclined surface SLO1, and the third subpixel may not include the first inclined surface. The subpixel including the first inclined surface SLO1 may have a structure as shown in FIG. 5, and the subpixel not including the first inclined surface SLO1 may have a structure as shown in FIG. 8.

[0186] The sub-pixel having the structure shown in FIG. 8 can be a sub-pixel that emits light in a wavelength band with a large degree of color shift due to the formation of the second light-emitting region.

[0187] For example, the visible light of a first hue emitted from a first subpixel may be red visible light, the visible light of a second hue emitted from a second subpixel may be green visible light, and the visible light of a third hue emitted from a third subpixel may be blue visible light.

[0188] The red visible light means visible light generally recognized as red when observed with the naked eye or through a photographic device, and may be visible light having a wavelength of, for example, 595 nm to 740 nm. The green visible light means visible light generally recognized as green when observed with the naked eye or through a photographic device, and may be visible light having a wavelength of, for example, 495 nm to 595 nm. The blue visible light means visible light generally recognized as blue when observed with the naked eye or through a photographic device, and may be visible light having a wavelength of, for example, 450 nm to 495 nm.

[0189] As described above, the display panel of the present invention does not include the first inclined surface in the sub-pixels emitting hues with a large degree of color shift due to the formation of the second light-emitting region, and includes the first inclined surface in the sub-pixels emitting hues with a small degree of color shift, thereby achieving excellent luminous efficiency, little degradation in quality due to viewing angle, and excellent color reproduction rate.

[0190] In addition, the display panel of the present invention can adjust the angle θ, distance d, and height h to be different depending on the color of light emitted by the sub-pixel.

[0191] In the display panel according to an embodiment of the present invention, the overcoat layer may include a first inclined surface in two or more types of subpixels among the first to third subpixels, and the angles of the first inclined surfaces included in each type of subpixel may be different from each other, and the distances between the second inclined surface and the third inclined surface may be different from each other in each type of subpixel.

[0192] In addition, when the display panel includes the first inclined surfaces in two or more types of subpixels among the first to third subpixels, the heights of the first inclined surfaces included in each type of subpixel may be different from each other. When a subpixel emitting light of a certain color is referred to as one type of subpixel, each type of subpixel may refer to a subpixel type emitting a different color.

[0193] Referring to FIG. 4, the display panel includes the first inclined surface SLO1 in the first subpixel SP1 and the second subpixel SP2, and therefore includes the first inclined surface in at least two subpixels among the first to third subpixels. In addition, since the first subpixel SP1 and the second subpixel SP2 emit light of different colors, the angle (θ) of the first inclined surface included in the first subpixel SP1 and the angle (θ) of the first inclined surface included in the second subpixel SP2 can be adjusted to be different in consideration of the characteristics of the light of different colors. In addition, the distance (d) between the second inclined surface and the third inclined surface can be adjusted so that the value measured in the first subpixel SP1 is different from the value measured in the second subpixel SP2. The height (h) of the first inclined surface included in the first subpixel SP1 and the height (h) of the first inclined surface included in the second subpixel SP2 can also be adjusted so that the height (h) is different between the first subpixel SP1 and the second subpixel SP2. As described above, when the angle θ, the distance d, and the height h are adjusted to be different according to the properties of the light emitted from each subpixel, it is possible to maximize the light extraction efficiency.

[0194] FIG. 9 is a cross-sectional view of a display panel in an embodiment of the present invention.

[0195] 9, the organic light-emitting layer EL is formed extending from the anode electrode ANO exposed at the bank open portion BNKO onto the bank layer BNK, and the cathode electrode CAT can be located on the organic light-emitting layer EL. Although FIG. 9 shows the organic light-emitting layer EL covering the entire surface of the bank layer BNK, it is also possible for the organic light-emitting layer EL to be formed extending from the bank open portion (BNKO=OPN) onto only a part of the bank layer BNK.

[0196] When the organic light-emitting layer EL is formed not only in the opening region OPN where the bank layer BNK is not formed, but also in the non-opening region NOP where the bank layer BNK is formed, the area of ​​the organic light-emitting layer EL where light is emitted can be maximized. When the organic light-emitting layer EL is formed only in the opening region OPN, the organic light-emitting layer EL may not be formed or may be incompletely formed around the opening region OPN due to process limitations. However, as described above, when the organic light-emitting layer EL is formed on the bank layer BNK as well, the problem caused by the process limitations can be solved.

[0197] FIG. 10 is a diagram showing a portion of the display panel shown in FIG.

[0198] Referring to FIG. 10, the thickness (t1) of the organic light-emitting layer EL formed on the anode electrode ANO may be thicker than the thickness (t2) of the portion formed on the third inclined surface SLO3 of the bank layer BNK.

[0199] The difference in thickness of the organic light-emitting layer may be caused by the third inclined surface SLO3 of the bank layer BNK. The organic light-emitting layer EL can be formed by, for example, a thermal evaporation process, which is a physical vapor deposition method, but the thickness of the evaporated thin film may be thin on an inclined surface such as the third inclined surface SLO3 due to the characteristics of the thermal evaporation process.

[0200] When the thickness of a portion of the organic light-emitting layer becomes thin, the density of carriers increases in the electrode adjacent to the thin organic light-emitting layer, which may cause deterioration of the organic light-emitting layer. However, in the display panel of the present invention, as shown in Figure 10, the bank layer BNK exists between the anode electrode EL and the organic light-emitting layer EL in the portion where the organic light-emitting layer EL has a thin thickness (t2), so that the above-mentioned problem can be prevented.

[0201] Table 1 below shows the results of observing whether or not the second light-emitting region appears in a subpixel including a first inclined surface according to changes in angle θ, distance d, and height h. In Table 1 below, the subpixel observed for the presence or absence of the second light-emitting region has the structure shown in FIG.

[0202] [Table 1]

[0203] Referring to Table 1, it can be seen that the second light emitting region is realized when the angle θ is 27° or more, 35° or more, or 45° or more, the height h is 0.7 μm or more, 1.0 μm or more, or 1.4 μm or more, and the distance d is 3.2 μm or less. Therefore, the sub-pixel including the first inclined surface exhibits excellent light emitting efficiency since the second light emitting region is formed.

[0204] Table 2 below shows the luminous efficiency, image quality degradation due to viewing angle, and color reproduction ratio for the examples and comparative examples.

[0205] [Table 2]

[0206] Examples 4 to 6 and Comparative Example 4 are display panels including three types of subpixels, namely, red, green, and blue subpixels. In Comparative Example 4, none of the three types of subpixels includes a first inclined surface, and each subpixel has a structure similar to that shown in FIG. 8. In Example 4, only the red subpixel includes the first inclined surface, in Example 5, only the green subpixel includes the first inclined surface, and in Example 6, both the red and green subpixels include the first inclined surface. In particular, Example 5 has the structure of FIG. 4, and Examples 4 and 5 are the same as Example 6, except that only one type of subpixel has a first inclined surface.

[0207] The degradation of image quality due to the viewing angle listed in Table 2 is shown in Fig. 11 and Fig. 12. Fig. 11(a) and Fig. 12(a) relate to the display panel of Comparative Example 4, Fig. 11(b) and Fig. 12(b) relate to Example 4, Fig. 11(c) and Fig. 12(c) relate to Example 5, and Fig. 11(d) and Fig. 12(d) relate to Example 6.

[0208] Referring to Table 2, FIGS. 11, and 12, it can be seen that the display panels of Examples 4 to 6, in which at least one of the red subpixel and the green subpixel includes the first inclined surface and the blue subpixel does not include the first inclined surface, have superior luminous efficiency and less degradation in image quality due to viewing angle than the subpixel of Comparative Example 4 in which none of the subpixels includes the first inclined surface.

[0209] The above description is merely illustrative of the technical idea of ​​the present invention, and various modifications and variations are possible within the scope of the essential characteristics of the present invention, if one has ordinary knowledge in the technical field to which the present invention belongs. In addition, the embodiments disclosed in the present invention are for the purpose of explanation, and do not limit the technical idea of ​​the present invention, and therefore such embodiments do not limit the scope of the technical idea of ​​the present invention. The scope of protection of the present invention should be interpreted according to the claims, and all technical ideas within the scope equivalent thereto should be interpreted as being included in the scope of the present invention. [Explanation of symbols]

[0210] OC overcoat layer ANO1, ANO2, ANO3 anode electrodes EL1, EL2, EL3 organic light-emitting layer BNK Bank Layer CAT cathode electrode SLO1 1st slope SLO2 2nd slope SLO3 3rd slope CONC Concave CONV Convex SLO slope area OPN opening area NOP non-opening area SP1 1st subpixel SP2 Second subpixel SP3 3rd subpixel LEA1 First light emitting area LEA2 Second light emitting area NEA1 First non-luminous area NEA2 Second non-luminous area

Claims

1. A display device, comprising: A substrate including an active area including a plurality of subpixels. Equipped with Each subpixel includes an organic light emitting diode and is electrically connected to a transistor disposed on the substrate; The first subpixel includes at least two light-emitting regions, at least one non-light-emitting region between the at least two light-emitting regions, and a sloped region; The second subpixel includes only one light-emitting area.

2. The display of claim 1 further comprising an overcoat layer disposed over said transistors in said active area of ​​said substrate.

3. The display of claim 2 , wherein the first subpixel comprises at least one recess in the overcoat layer.

4. The display device of claim 1 , wherein the first subpixel includes a first light-emitting region and a second light-emitting region surrounding the first light-emitting region.

5. 5. The display device of claim 4, further comprising an aperture region located within the active region and a non-aperture region located within the active region, the first light-emitting region having a shape corresponding to a shape of the aperture region.

6. The display device according to claim 5 , wherein the second light-emitting region is located on the non-aperture region.

7. The display device according to claim 4 , wherein the second light-emitting region has a shape corresponding to a shape of an edge of the first light-emitting region.

8. The display device of claim 4 , wherein the light forming the second light-emitting region has a different color coordinate than the light forming the first light-emitting region.

9. The display device of claim 3 , wherein the overcoat layer includes the sloped region surrounding the recess in the first subpixel.

10. The display device of claim 4 , wherein the first light-emitting region does not overlap with the second light-emitting region.

11. The display device of claim 4 , wherein the first light-emitting region has a different size than the second light-emitting region.

12. The display device of claim 4 , wherein the second subpixel comprises a third light-emitting region.

13. 13. The display of claim 12, wherein the first light-emitting region of the first sub-pixel emits light of a different color than the third light-emitting region of the second sub-pixel.

14. The display device of claim 12 , wherein the non-aperture region further includes a first non-light-emitting region surrounding the second light-emitting region of the first sub-pixel and the third light-emitting region of the second sub-pixel.

15. The display device of claim 14 , wherein the first subpixel includes a second non-emissive region, and the second non-emissive region is located between the first non-emissive region and the second non-emissive region.

16. The first subpixel includes a first light-emitting region and a second light-emitting region, The second light emitting region is located surrounding the first light emitting region, The display device according to claim 1 , wherein the second light-emitting region includes a first inclined region to a third inclined region.

Images