Array substrate and display device

Abstract

An array substrate and a display device are disclosed. The array substrate includes a substrate and a plurality of pixel units provided on the substrate. Each pixel unit includes a pixel electrode, a first common electrode provided at a distance from the pixel electrode such that an orthogonal projection on the substrate and an orthogonal projection of the pixel electrode on the substrate at least partially overlap, and at least one second common electrode provided in the same layer as the first common electrode such that an orthogonal projection on the substrate and an orthogonal projection of the pixel electrode on the substrate at least partially overlap. The first common electrode and the second common electrode are insulated from each other.

Description

[Technical field]

[0001] The present invention relates to the field of display technology, and more particularly to an FFS (fringe-field switching) type array substrate and a display device. [Background technology]

[0002] 2. Description of the Related Art With the continuous improvement of information technology and living standards, people's requirements for display image quality, such as color gamut, are increasing.

[0003] For example, RGBW technology can increase the display brightness of liquid crystal displays (LCDs) and reduce the power consumption of LCDs. However, the challenge in adopting this mode is that the purity and saturation of single colors is reduced, and the screen accuracy of the same resolution does not reach that of RGB screens. In applications that need to guarantee screen accuracy, improving the color gamut is crucial. Although several technologies have been proposed in the past, there is still room for improvement. Summary of the Invention

[0004] According to the present invention, an array substrate and a display device for improving the color gamut of a display device are provided.

[0005] In order to solve the above problems, according to one aspect of the present invention, a substrate and a plurality of pixel units provided on the substrate such that a plurality of data lines and a plurality of scan lines are formed to cross each other, Each of the pixel units comprises: A pixel electrode; a first common electrode provided at a distance from the pixel electrode such that an orthogonal projection of the pixel electrode on the substrate at least partially overlaps with an orthogonal projection of the pixel electrode on the substrate; at least one second common electrode provided in the same layer as the first common electrode such that an orthogonal projection on the substrate and an orthogonal projection of the pixel electrode on the substrate at least partially overlap each other; a first common electrode line connected to the first common electrode and a second common electrode line connected to the second common electrode, the first common electrode line and the second common electrode line configured to supply different signals; An array substrate is provided in which the first common electrode and the second common electrode are insulated from each other.

[0006] According to one embodiment of the present invention, the number of the second common electrodes is two, The two second common electrodes are arranged on both sides of the first common electrode along the extending direction of the data lines or the extending direction of the scan lines.

[0007] In order to solve the above problems, according to another aspect of the present invention, there is provided a substrate, a plurality of pixel units provided on the substrate, Each of the pixel units comprises: A pixel electrode; a first common electrode provided at a distance from the pixel electrode such that an orthogonal projection of the pixel electrode on the substrate at least partially overlaps with an orthogonal projection of the pixel electrode on the substrate; at least one second common electrode provided in the same layer as the first common electrode such that an orthogonal projection on the substrate and an orthogonal projection of the pixel electrode on the substrate at least partially overlap each other; An array substrate is provided in which the first common electrode and the second common electrode are insulated from each other.

[0008] According to an embodiment of the present invention, the first common electrode and the second common electrode are provided between the pixel electrode and the substrate.

[0009] According to an embodiment of the present invention, the pixel electrode is disposed between the substrate and the first and second common electrodes.

[0010] According to an embodiment of the present invention, the first common electrode is formed in a mirror-symmetric structure along a virtual plane perpendicular to the substrate, The second common electrode is provided outside the first common electrode.

[0011] According to an embodiment of the present invention, the pixel units are formed by intersecting a plurality of data lines and a plurality of scan lines, The number of the second common electrodes is two; The two second common electrodes are arranged on both sides of the first common electrode in the extending direction of the data lines.

[0012] According to an embodiment of the present invention, the two second common electrodes are formed to have a mirror-symmetric structure with respect to each other along the imaginary plane.

[0013] According to one embodiment of the present invention, the pixel electrode includes a plurality of first branch electrodes spaced apart from each other, A slit is formed between adjacent first branch electrodes, The angle between the extension direction of the first branch electrode located on one side of the imaginary plane and the imaginary plane is the same as the angle between the extension direction of the first branch electrode located on the other side of the imaginary plane and the imaginary plane.

[0014] According to an embodiment of the present invention, the pixel electrode further includes two first base electrodes, One of the first trunk electrodes is connected to one end of the first branch electrodes, The other of the first trunk electrodes is connected to the other ends of the plurality of first branch electrodes.

[0015] According to an embodiment of the present invention, the pixel electrode further includes an elongated electrode connected between one of the two first trunk electrodes and a control element.

[0016] According to one embodiment of the present invention, the plurality of first branch electrodes are provided in a mirror symmetric manner on opposite sides of the imaginary plane.

[0017] According to an embodiment of the present invention, the first common electrode and the second common electrode are formed in a mirror-symmetric structure along an imaginary plane perpendicular to the substrate.

[0018] According to an embodiment of the present invention, the pixel units are formed by intersecting a plurality of data lines and a plurality of scan lines, The number of the second common electrodes is two; The two second common electrodes are arranged on both sides of the first common electrode in the extending direction of the scan lines.

[0019] According to an embodiment of the present invention, the first common electrode and the two second common electrodes each have a plurality of second branch electrodes spaced apart from each other, A slit is formed between adjacent second branch electrodes, The angle between the extension direction of the second branch electrode located on one side of the imaginary plane and the imaginary plane is the same as the angle between the extension direction of the second branch electrode located on the other side of the imaginary plane and the imaginary plane.

[0020] According to an embodiment of the present invention, the first common electrode and the two second common electrodes each further include two second base electrodes, one of the second trunk electrodes in the first common electrode is connected to one end of the plurality of second branch electrodes in the first common electrode, the other second trunk electrode in the first common electrode is connected to the other ends of the plurality of second branch electrodes in the first common electrode, one of the second trunk electrodes in the second common electrode is connected to one end of the plurality of second branch electrodes in the second common electrode, The other second trunk electrode in the second common electrode is connected to the other ends of the plurality of second branch electrodes in the second common electrode.

[0021] According to one embodiment of the present invention, the pixel electrodes are formed in a mirror-symmetric structure along the imaginary plane.

[0022] According to one embodiment of the present invention, the pixel electrode further includes a first common electrode line connected to the first common electrode and a second common electrode line connected to the second common electrode, the first common electrode line and the second common electrode line being configured to supply different signals.

[0023] According to an embodiment of the present invention, a first pressure difference exists between the pixel electrode and the first common electrode, a second pressure difference exists between the pixel electrode and the second common electrode; The absolute value of the first pressure difference is greater than the absolute value of the second pressure difference.

[0024] In order to solve the above problem, according to another aspect of the present invention, there is provided a display device including a counter substrate, a liquid crystal layer, and the above array substrate, The counter substrate and the array substrate are disposed opposite each other with a gap therebetween, A display device is provided in which the liquid crystal layer is provided between the counter substrate and the array substrate. Effect of the Invention

[0025] According to the array substrate and display device of the present invention, the first common electrode is provided at a distance from the pixel electrode so that the orthogonal projection on the substrate and the orthogonal projection of the pixel electrode on the substrate at least partially overlap, the second common electrode is provided in the same layer as the first common electrode so that the orthogonal projection on the substrate and the orthogonal projection of the pixel electrode on the substrate at least partially overlap, and the first common electrode and the second common electrode are insulated from each other. This makes it possible to improve the color gamut of low and medium gradations when maintaining the light transmittance, and to slightly lower the color gamut of 255 gradations and improve the color gamut of low and medium gradations when improving the light transmittance. [Brief description of the drawings]

[0026] In order to more clearly describe the technical means in the embodiments of the present invention, the following briefly describes the drawings that need to be used in the description of the embodiments. Obviously, the drawings in the following description are only some embodiments of the present invention, and those skilled in the art can obtain other drawings based on these drawings without creative efforts.

[0027] [Figure 1] 1 is a schematic diagram showing a plan view of an array substrate according to a first embodiment of the present invention. [Figure 2A] 2 is a schematic diagram showing contours of pixel electrodes and different common electrodes of the array substrate in FIG. 1; [Figure 2B] FIG. 2 is a schematic diagram showing wiring for applying chip-on-film to different common electrodes of the array substrate in FIG. 1. [Diagram 3] FIG. 11 is a schematic diagram showing a plan view of an array substrate according to a second embodiment of the present invention. [Figure 4A] 4 is a schematic diagram showing contours of pixel electrodes and different common electrodes of the array substrate in FIG. 3; FIG. [Figure 4B] FIG. 4 is a schematic diagram showing wiring for applying chip-on-film to different common electrodes of the array substrate in FIG. 3. [Diagram 5] FIG. 2 is a schematic diagram showing input signals of two common electrodes according to an embodiment of the present invention. [Figure 6] FIG. 13 is a schematic diagram showing another input signal of two common electrodes according to an embodiment of the present invention. [Figure 7] 1 is a schematic diagram showing a color gamut shape of an array substrate according to a first embodiment of the present invention; [Figure 8] FIG. 11 is a schematic diagram showing a color gamut shape of an array substrate according to a second embodiment of the present invention. [Figure 9] FIG. 2 is a schematic diagram showing color gamut curves of two common electrodes according to an embodiment of the present invention; [Figure 10] FIG. 2 is a schematic diagram showing a plan view of an array substrate having a single common electrode. [Figure 11] 11 is a schematic diagram showing a cross section of the array substrate taken along line III-III' in FIG. 10. [Figure 12]FIG. 2 is a schematic diagram showing a first color gamut comparison between an array substrate with multiple common electrodes and an array substrate with a single common electrode. [Figure 13] FIG. 11 is a schematic diagram showing a second color gamut comparison between an array substrate with multiple common electrodes and an array substrate with a single common electrode. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0028] Hereinafter, the technical means in the embodiments of the present invention will be described clearly and completely with reference to the drawings in the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments that a person skilled in the art can obtain without paying creative labor are all within the protection scope of the present invention.

[0029] In addition, in the description of this specification, the orientations or positional relationships indicated by terms such as "center," "longitudinal," "lateral," "length," "width," "thickness," "up," "down," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inside," "outside," "clockwise," "counterclockwise," etc. are based on the orientations or positional relationships shown in the drawings, and are for the convenience and simplification of the description of the present invention, and do not indicate or imply that the devices or elements shown have a specific orientation or are configured and operate in a specific orientation, and therefore cannot be understood as limiting the present invention.

[0030] It should be noted that in the description of this specification, the terms "first" and "second" are for descriptive purposes only and cannot be understood as indicating or implying a relative importance or the number of technical features being described. Thus, features qualified as "first" and "second" may explicitly or implicitly include one or more of said features. In the description of the present invention, "plurality" means two or more than two unless otherwise limited.

[0031] In this specification, many different embodiments or examples are provided to realize different structures of the present invention. In order to simplify the disclosure of the present invention, components and settings of specific examples are described below. Of course, they are merely examples and do not limit the present invention. In addition, in the present specification, symbols and / or reference characters may be repeated in different examples, but such repetition does not itself indicate a relationship between the various embodiments and / or settings discussed for the purpose of simplicity and clarity. In addition, the examples of various specific processes and materials provided in this specification may allow those skilled in the art to recognize the application of other processes and / or the use of other materials.

[0032] In a liquid crystal display device, in order to guarantee the screen accuracy, it is extremely important to improve the color gamut. Examples thereof are given below, but are not limited thereto.

[0033] According to one aspect of the present invention, there is provided an array substrate, such as, but not limited to, a fringe-field switching (FFS) type array substrate that can be applied to a liquid crystal display device having a plurality of display domains.

[0034] The following describes an embodiment of the array substrate, but the present invention is not limited to this.

[0035] In the first embodiment, as shown in FIG. 1 and FIG. 2A, the array substrate includes a substrate U and a plurality of pixel units E provided on the substrate U. Each pixel unit E includes a pixel electrode P, a first common electrode MC, and at least one second common electrode (SC1 and / or SC2). The number of the second common electrodes may be one or more. The pixel electrode P is provided, for example, on a first electrode layer L1. The first common electrode MC is provided at a distance from the pixel electrode P so that the orthogonal projection on the substrate U and the orthogonal projection of the pixel electrode P on the substrate U at least partially overlap. The second common electrode (SC1 and / or SC2) is provided in the same layer as the first common electrode MC, for example, on a second electrode layer L2. For example, the second common electrode (SC1 and / or SC2) is located outside the first common electrode MC along the extension direction of the data line D so that the orthogonal projection on the substrate U and the orthogonal projection of the pixel electrode P on the substrate U at least partially overlap. Here, the first common electrode MC and the second common electrode (SC1 and / or SC2) are insulated from each other.

[0036] For example, as shown in FIG. 1 and FIG. 2A, the substrate U may be a plate material, such as glass, suitable for providing many material layers on which the array substrate is provided, for example, for stacking different material layers, such as conductive layers, insulating layers, and passivation layers. For example, insulating layers may be provided between different conductive layers (e.g., electrode layers) so that the different conductive layers are insulated from each other. Here, for the sake of simplicity, only exemplary configurations related to the characteristics of the embodiments of the present invention are illustrated. For example, only one pixel unit E is described as an example, but the relevant description is not limited thereto and can be applied to multiple pixel units.

[0037] In addition, the different material layers can be reasonably configured as different components according to actual needs, such as data lines, scan lines, common lines, common electrodes, thin film transistors, pixel electrodes, etc. In the following, the description is mainly given by taking two second common electrodes as an example, but is not limited thereto, and the related description can also be applied to one or more second common electrodes.

[0038] For example, as shown in Fig. 1, the array substrate may further include a plurality of data lines D and a plurality of scanning lines (also called gate lines) A. The plurality of data lines D and the plurality of scanning lines A cross each other to form a plurality of pixel units E. Each pixel unit E has a pixel electrode P, a first common electrode MC, two second common electrodes SC1 and SC2, and a thin film transistor T. The thin film transistor T can control the electric field of the pixel unit E so as to control the shape of the liquid crystal material in the space to complete the function of the array substrate.

[0039] In the first embodiment, as shown in FIG. 1 and FIG. 2A, the array substrate is configured in a horizontal slit FFS mode. The first electrode layer L1 and the second electrode layer L2 are different conductive layers. The first electrode layer L1 is configured to have the pixel electrode P. The second electrode layer L2 is configured to have the first common electrode MC and the two second common electrodes SC1, SC2. The first common electrode MC and the two second common electrodes SC1, SC2 are located between the pixel electrode P and the substrate U. As shown in FIG. 1 and FIG. 2A, the circular area in FIG. 1 is an enlarged cross-sectional view of the line I-I' in FIG. 1, and indicates that the first common electrode MC and the second common electrode SC1 are located under the pixel electrode P. Taking two second common electrodes as an example, the two second common electrodes SC1, SC2 are provided in the same layer, so that the first common electrode MC and the two second common electrodes SC1, SC2 are located under the pixel electrode P, but not limited thereto.

[0040] For example, in the first embodiment, as shown in FIG. 1 and FIG. 2A, the first common electrode MC may be configured as one main common electrode (MAIN COM). The two second common electrodes SC1 and SC2 may be regarded as two sub common electrodes (SUB COM). The first common electrode MC is formed in a mirror-symmetric structure along a virtual plane N perpendicular to the substrate U. For example, the first common electrode MC is formed in a trapezoidal structure that is mirror-symmetric along the virtual plane N, but is not limited thereto. The two second common electrodes SC1 and SC2 may be provided symmetrically on both sides of the first common electrode MC. For example, the two second common electrodes SC1 and SC2 are arranged on both sides of the first common electrode MC along the extending direction of the data line D. The two second common electrodes SC1 and SC2 are formed in a mirror-symmetric structure to each other along the virtual plane N. For example, the two second common electrodes SC1 and SC2 are formed in a trapezoidal structure that is mirror-symmetric to each other along the virtual plane N, but is not limited thereto, and may be formed in other shapes. Therefore, by adopting a configuration of one main common electrode and two sub-common electrodes, it is possible to reduce the coupling effect on adjacent pixel electrodes along the scanning line direction due to different common voltages, and thus reduce signal crosstalk.

[0041] Therefore, in the first embodiment, as shown in FIG. 1 and FIG. 2A, the pixel electrode P is formed in a mirror-symmetric structure along the virtual plane N. For example, the pixel electrode P has a plurality of first branch electrodes Y spaced apart from each other. A slit is formed between adjacent first branch electrodes Y. An angle θ1 between an extension direction F11 of the first branch electrode Y located on one side of the virtual plane N and the virtual plane N is the same as an angle θ1 between an extension direction F12 of the first branch electrode Y located on the other side of the virtual plane N and the virtual plane N. For example, the extension direction (F11, F12) of the first branch electrode Y refers to a direction extending along one side edge of the first branch electrode Y or a direction extending along a virtual center line in the middle of both sides of the first branch electrode Y. The angle refers to an angle between the extension direction of the first branch electrode Y and the virtual plane N at the same distance from the virtual plane N toward both sides. In addition, the characteristics of the plurality of first branch electrodes (e.g., electrode width or slit width) can be finely adjusted as necessary. In one example, the plurality of first branch electrodes Y are provided on both opposing sides of the virtual plane N in a mirror symmetrical manner.

[0042] For example, the shape (width, extension direction, etc.) of the slit between adjacent branch electrodes Y may correspond to the layout of the first common electrode MC and the two second common electrodes SC1, SC2. For example, there may be an electrode gap between the first common electrode MC and a single second common electrode (SC1 or SC2), and the extension direction of the electrode gap may be the same as the extension direction of the slit between adjacent branch electrodes Y. The width of the slit closest to the electrode gap is larger than the width of the other slits. The width of the slit closest to the electrode gap is larger than the width of the electrode gap, but is not limited thereto.

[0043] For example, the pixel electrode P may further include two first trunk electrodes Z. One of the first trunk electrodes Z is connected to one end of the plurality of first branch electrodes Y, and the other first trunk electrode Z is connected to the other end of the plurality of first branch electrodes Y. For example, the two first trunk electrodes Z are parallel to each other. The pixel electrode P may further include an elongated electrode X. The elongated electrode X is connected between one of the two first trunk electrodes Z and a control element (e.g., a thin film transistor T), so that the control element can transmit a signal to control the pixel electrode P so that the display effects of different display domains are controlled.

[0044] In one application example, as shown in Fig. 2A, the array substrate may further include a first common electrode line Ma and a second common electrode line Sa that can be used to transmit different signals. The first common electrode line Ma is connected to the first common electrode MC, and the second common electrode line Sa is connected to the second common electrodes SC1 and SC2. The first common electrode line Ma and the second common electrode line Sa are configured to supply different signals.

[0045] 2A and 2B, taking the chip-on-film (COF) technology as an example, in an active display area AA in an area where the array substrate K1 and the color film substrate K2 overlap, many first common electrodes MC are connected to the first common electrode line Ma, and many second common electrodes SC1 and SC2 are connected to the second common electrode line Sa. For example, the first common electrode line Ma and the second common electrode line Sa may be configured to supply different signals, such as different signals from many gold bumps GB in an area where the array substrate K1 and the color film substrate K2 do not overlap.

[0046] In the second embodiment, as shown in FIG. 3 and FIG. 4A, the array substrate includes a substrate U' and a plurality of pixel units E' provided on the substrate U'. Each pixel unit E' includes a pixel electrode P', a first common electrode MC', and at least one second common electrode (SC1' and / or SC2'). The pixel electrode P' is provided, for example, on a first electrode layer L1'. The first common electrode MC' is provided at a distance from the pixel electrode P' so that the orthogonal projection on the substrate U' and the orthogonal projection of the pixel electrode P' on the substrate U' at least partially overlap. The second common electrode SC1' or SC2' is provided in the same layer as the first common electrode MC', for example, on a second electrode layer L2'. The second common electrode SC1' or SC2' is located outside the first common electrode MC' along the extension direction of the scanning line A so that the orthogonal projection on the substrate U' and the orthogonal projection of the pixel electrode P' on the substrate U' at least partially overlap.

[0047] For example, as shown in FIG. 3 and FIG. 4A, the substrate U' may be a plate material, such as glass, suitable for providing many material layers of the array substrate, and is intended to provide different material layers, such as conductive layers, insulating layers, and passivation layers, stacked together. For example, insulating layers may be provided between different conductive layers (e.g., electrode layers) so that the different conductive layers are insulated from each other. Here, for the sake of simplicity, only exemplary configurations related to the characteristics of the embodiments of the present invention are illustrated. For example, only one pixel unit E' is described as an example, but the description is not limited thereto, and the related description can also be applied to multiple pixel units.

[0048] For example, as shown in Fig. 3, the array substrate may further include a plurality of data lines D and a plurality of scan lines A. The plurality of data lines D and the plurality of scan lines A cross each other to form a plurality of pixel units E'. Each pixel unit E' has a pixel electrode P', a first common electrode MC', two second common electrodes SC1' and SC2', and a thin film transistor. The thin film transistor can control the electric field of the pixel unit to control the shape of the liquid crystal material in the space to complete the function of the array substrate.

[0049] In the second embodiment, as shown in FIG. 3 and FIG. 4A, the array substrate is configured in a vertical slit FFS mode. The first electrode layer L1' and the second electrode layer L2' are different conductive layers. The first electrode layer L1' is configured to have the pixel electrode P', and the second electrode layer L2' is configured to have the first common electrode MC' and the two second common electrodes SC1', SC2'. The pixel electrode P' is located between the substrate P' and the first common electrode MC' and the second common electrode (SC1' and / or SC2'). For example, the first common electrode MC' and the second common electrode SC1' and / or SC2' are formed in a mirror symmetrical structure along a virtual plane N' perpendicular to the substrate. As shown in FIG. 3 and FIG. 4A, the circular area in FIG. 3 is an enlarged cross-sectional view of the II-II' line in FIG. 3, and indicates that the first common electrode MC' and the two second common electrodes SC1' and SC2' are below the pixel electrode P'. Taking two second common electrodes as an example, the two second common electrodes SC1', SC2' are arranged in the same layer, so that the first common electrode MC' and the two second common electrodes SC1', SC2' are located below the pixel electrode P', but are not limited to this.

[0050] For example, in the second embodiment, as shown in FIG. 3 and FIG. 4A, the first common electrode MC' may be configured as one main common electrode (MAIN COM). The two second common electrodes SC1', SC2' may be regarded as two sub common electrodes (SUB COM). For example, the two second common electrodes SC1', SC2' are arranged on both sides of the first common electrode MC' along the extending direction of the scan line A. The first common electrode MC' and the two second common electrodes SC1', SC2' are each formed in a mirror-symmetric structure along a virtual plane N' (e.g., located on a common line) perpendicular to the substrate U'. For example, the first common electrode MC' and the two second common electrodes SC1', SC2' each have a plurality of second branch electrodes spaced apart from each other. For example, the first common electrode MC' has a plurality of second branch electrodes Y1' spaced apart, and the two second common electrodes SC1', SC2' each have a plurality of second branch electrodes Y2' spaced apart, and slits are formed between adjacent second branch electrodes (Y1' and Y2').

[0051] Taking the first common electrode MC' as an example, the angle θ2 between the extension direction F21 of the second branch electrode Y1' located on one side of the virtual plane N' and the virtual plane N' is the same as the angle θ2 between the extension direction F22 of the second branch electrode Y1' located on the other side of the virtual plane N' and the virtual plane. For example, the extension direction (F21, F22) of the second branch electrode Y1' means a direction extending along one side edge of the second branch electrode Y1' or a direction extending along a virtual center line in the middle of both sides of the second branch electrode Y1'. In FIG. 3, for convenience of explanation, only the main extension direction of the second branch electrode Y1' is shown by a straight broken line, and the angle means an angle between the extension direction of the second branch electrode Y1' and the virtual plane N' at the same distance from the virtual plane N' on both sides. The related explanation is also applicable to the two second common electrodes SC1', SC2'.

[0052] In one example, the second branch electrodes (Y1', Y2') are provided in mirror symmetry on both opposing sides of the virtual plane N'. The characteristics (width, extension direction, etc.) of the first common electrode MC' and the second branch electrodes (Y1', Y2') of the two second common electrodes SC1', SC2' can be fine-tuned as necessary to form a specific layout. For example, but not limited to, the multiple slits formed in the first common electrode MC' are uniformly distributed, and the single slit formed in the second common electrodes SC1', SC2' is adjacent to the first common electrode MC'.

[0053] For example, the first common electrode MC' further includes two second trunk electrodes Z1', and the two second common electrodes SC1', SC2' further include two second trunk electrodes Z2'. One of the second trunk electrodes Z1' of the first common electrode MC' is connected to one end of the second branch electrodes Y1' of the first common electrode MC', and the other of the second trunk electrodes Z1' is connected to the other end of the second branch electrodes Y1' of the first common electrode MC'. In order to form different display domains, one of the second trunk electrodes Z2' of the second common electrodes (SC1', SC2') is connected to one end of the second branch electrodes Y2' of the second common electrode (SC1', SC2'), and the other of the second trunk electrodes Z2' is connected to the other end of the second branch electrodes Y2' of the second common electrode (SC1', SC2').

[0054] Therefore, the structure of the two sub-common electrodes can reduce the coupling effect on the data line signals on both sides caused by different common voltages, thereby reducing signal crosstalk.

[0055] Therefore, in the second embodiment, as shown in Figures 3 and 4A, the pixel electrode P' is formed in a mirror-symmetric structure along the imaginary plane N' to correspond to the mirror-symmetric structure of the first common electrode MC' and the two second common electrodes SC1', SC2'.

[0056] In one application example, as shown in Fig. 4A, the array substrate may further include a first common electrode line Ma' and a second common electrode line Sa' that can be used to transmit different signals. The first common electrode line Ma' is connected to the first common electrode MC', and the second common electrode line Sa' is connected to the second common electrodes SC1' and SC2'. The first common electrode line Ma' and the second common electrode line Sa' are configured to supply different signals.

[0057] 4, taking the chip-on-film technology as an example, in an active display area AA in an area where the array substrate K1 and the color film substrate K2 overlap, many first common electrodes MC' are connected to the first common electrode line Ma', and many second common electrodes SC1' and SC2' are connected to the second common electrode line Sa'. For example, the first common electrode line Ma' and the second common electrode line Sa' may be configured to supply different signals, such as different signals from many gold bumps GB in an area where the array substrate K1 and the color film substrate K2 do not overlap.

[0058] In addition, during use of the array substrate, the first common electrode and the two second common electrodes can fine-tune the color gamut by different power supply configurations. For simplicity of explanation, only the first common electrode MC and the two second common electrodes SC1, SC2 (shown in FIGS. 1 and 2A) according to the first embodiment will be described as an example. The related explanations are also applicable to the first common electrode MC' and the two second common electrodes SC1', SC2' (shown in FIGS. 3 and 4A) according to the second embodiment.

[0059] For example, in a power supply configuration, for example, many electrodes of the array substrate are connected to appropriate power sources. In one example, as shown in FIG. 5, taking four frames as an example, the first, second, third, and fourth frames are respectively "+", "-", "+", and "-" inversion potentials. VMC and VSC denote the voltages of the first and second common electrodes (i.e., main common electrode and sub common electrode), respectively. As can be seen from the figure, there is a voltage difference between the voltage VMC of the first common electrode and the voltage VSC of the second common electrode. For example, in the potential inversion process of different frames, the voltage VMC of the first common electrode and the voltage VSC of the second common electrode both change voltage polarity. That is, the voltage VMC of the first common electrode and the voltage VSC of the second common electrode are configured in an alternating current (A / C) format. The absolute value of the voltage amplitude of the voltage VMC of the first common electrode is greater than the absolute value of the voltage amplitude of the voltage VSC of the second common electrode. Thereby, a first pressure difference exists between the pixel electrode and the first common electrode, a second pressure difference exists between the pixel electrode and the second common electrode, and the absolute value of the first pressure difference is greater than the absolute value of the second pressure difference. Regardless of whether the display state is a low-mid gradation or a high gradation, the pressure difference always exists, and the color gamut can be fine-tuned by different power supply configurations, including but not limited to the above.

[0060] For example, in another example, as shown in FIG. 6, taking four frames as an example, the first, second, third and fourth frames are respectively "+", "-", "+" and "-" inversion potentials. VMC and VSC respectively denote the voltages of the first and second common electrodes. As can be seen from the figure, there is a voltage difference between the voltage VMC of the first common electrode and the voltage VSC of the second common electrode. For example, in the potential inversion process of different frames, the voltage VMC of the first common electrode changes the voltage polarity, and the voltage VSC of the second common electrode does not change the voltage polarity. That is, the voltage VMC of the first common electrode is configured in an alternating current (A / C) format, and the voltage VSC of the second common electrode is configured in a direct current (D / C) format. The absolute value of the voltage amplitude of the voltage VMC of the first common electrode is greater than the absolute value of the voltage amplitude of the voltage VSC of the second common electrode. As a result, a first pressure difference exists between the pixel electrode and the first common electrode, a second pressure difference exists between the pixel electrode and the second common electrode, and the absolute value of the first pressure difference is greater than the absolute value of the second pressure difference. Regardless of whether the display state is a low or mid-gradation or a high gradation state, a pressure difference always exists, and the color gamut can be fine-tuned by different power supply configurations.

[0061] Taking red (R), green (G) and blue (B) sub-pixels as an example, the color gamut shapes of the red, green and blue sub-pixels in the array substrate of the first embodiment are shown from left to right in Figures 2A and 7. For example, the left part indicates that the color gamut of the red sub-pixel in the display area R1 of the first common electrode MC is higher than the color gamut of the display areas R21 and R22 of the two second common electrodes SC1 and SC2, the middle part indicates that the color gamut of the green sub-pixel in the display area G1 of the first common electrode MC is higher than the color gamut of the display areas G21 and G22 of the two second common electrodes SC1 and SC2, and the right part indicates that the color gamut of the blue sub-pixel in the display area B1 of the first common electrode MC is higher than the color gamut of the display areas B21 and B22 of the two second common electrodes SC1 and SC2.

[0062] Similarly, taking red (R), green (G) and blue (B) sub-pixels as an example, the color gamut shapes of the red, green and blue sub-pixels in the array substrate of the second embodiment are shown from left to right as shown in Figures 4A and 8. For example, the left part indicates that the color gamut of the red sub-pixel in the display area R1' of the first common electrode MC' is higher than the color gamut of the display areas R21' and R22' of the two second common electrodes SC1' and SC2', the middle part indicates that the color gamut of the green sub-pixel in the display area G1' of the first common electrode MC' is higher than the color gamut of the display areas G21' and G22' of the two second common electrodes SC1' and SC2', and the right part indicates that the color gamut of the blue sub-pixel in the display area B1' of the first common electrode MC' is higher than the color gamut of the display areas B21' and B22' of the two second common electrodes SC1' and SC2'. However, without being limited thereto, the above description can be further applied to other sub-pixel configurations, such as, for example, RGBW configuration, to fine-tune the color gamut through different common electrode feeding configurations.

[0063] In addition, the array substrate according to the embodiment of the present invention includes a plurality of types of common electrodes, and in this embodiment, only two types of common electrodes are described as an example in order to fine-tune the color gamut by two types of power supply configurations, but are not limited thereto. For example, taking the above-mentioned two types of common electrodes as an example, the plurality of types of common electrodes may be n types of common electrodes, where n can be selected as a positive integer of 2 or more, such as n=2, 3, 4, .... Taking n=3 as an example, the second electrode layer may be configured to have one first common electrode, two second common electrodes, and two third common electrodes. The first common electrode is located between two of the second common electrodes, the two third common electrodes are located on both sides of the first common electrode, and the two second common electrodes are located between the first common electrode and the two third common electrodes. According to the above description, the remaining configurations of the plurality of types of common electrodes can be understood. For example, the first common electrode is located between two of the second common electrodes, and the remaining common electrode groups (e.g., two third common electrodes, two fourth common electrodes, ...) are located on both sides of the first common electrode so as to be sequentially arranged in parallel outside the two second common electrodes, but details are omitted.

[0064] Hereinafter, color gamut expressions of an array substrate having a plurality of types of common electrodes according to an embodiment of the present invention will be exemplified, but are not limited thereto.

[0065] 9 is a schematic diagram showing color gamut curves of an array substrate having multiple types of common electrodes according to an embodiment of the present invention. For example, curve C1 shows the relationship between the transmittance (Tr) of the first common electrode and the voltage, curve C2 shows the relationship between the transmittance of the second common electrode and the voltage, where curve C1 shows that the first common electrode covers 82% of the total color gamut, and curve C2 shows that the second common electrode covers 65% of the total color gamut.

[0066] The color gamut effect of the array substrate with multiple common electrodes according to the above embodiment of the present invention will be described below. In contrast, as shown in Figure 10, the array substrate 9 with a single common electrode includes a single pixel electrode 91 and a single common electrode 92. Here, the cross-sectional schematic diagram of the line III-III' is shown in Figure 11, where the common electrode 92 is below the pixel electrode 91.

[0067] For example, in terms of color gamut enhancement, curve C3 indicates the relationship between color gamut and grayscale of the array substrate with the single common electrode, and curve C4 indicates the relationship between color gamut and grayscale of the array substrate with multiple types of common electrodes according to the embodiment of the present invention, as shown in Fig. 12. As shown by curves C3 and C4, the array substrate with multiple types of common electrodes according to the embodiment of the present invention can improve the color gamut of low and medium grayscales while maintaining the transmittance, compared with the array substrate with a single common electrode.

[0068] For example, in the representation of RGBW display effect, curve C5 shows the relationship between color gamut and gray scale of the array substrate with the single common electrode, and curve C6 shows the relationship between color gamut and gray scale of the array substrate with multiple types of common electrodes according to the above embodiment of the present invention, as shown in Fig. 13. As shown in curves C5 and C6, the array substrate with multiple types of common electrodes according to the above embodiment of the present invention can slightly reduce the color gamut of 255 gray scales and improve the color gamut of low and medium gray scales when improving the transmittance, compared with the array substrate with a single common electrode.

[0069] According to another aspect of the present invention, a display device such as a liquid crystal display device is provided. For example, the display device includes an opposing substrate, a liquid crystal layer, and the array substrate. The opposing substrate and the array substrate are disposed opposite each other with a gap therebetween, and the liquid crystal layer is disposed between the opposing substrate and the array substrate. The implementation and beneficial effects of the array substrate have been described above, so details will be omitted.

[0070] According to the array substrate and the display device of the above embodiment of the present invention, the first common electrode is provided at a distance from the pixel electrode so that the orthogonal projection on the substrate and the orthogonal projection of the pixel electrode on the substrate at least partially overlap, the second common electrode is provided in the same layer as the first common electrode so that the orthogonal projection on the substrate and the orthogonal projection of the pixel electrode on the substrate at least partially overlap, and the first common electrode and the second common electrode are insulated from each other. This makes it possible to improve the color gamut of low and medium gradations when maintaining the light transmittance, and to slightly lower the color gamut of 255 gradations and improve the color gamut of low and medium gradations when improving the light transmittance.

[0071] The above describes the embodiments of the present invention in detail, and the present specification describes the principles and embodiments of the present invention by applying specific examples. The above description of the embodiments is only to facilitate understanding of the technical means of the present invention and its core idea, and those skilled in the art can still modify the technical means described in each of the above embodiments or replace some of the technical features with equivalents, and it should be understood that these modifications or replacements do not deviate from the essence of the corresponding technical means from the scope of the technical means of each of the embodiments of the present invention.

Claims

1. A substrate; a plurality of pixel units provided on the substrate such that a plurality of data lines and a plurality of scan lines are formed to cross each other, Each of the pixel units comprises: A pixel electrode; a first common electrode provided at a distance from the pixel electrode such that an orthogonal projection of the pixel electrode on the substrate at least partially overlaps with an orthogonal projection of the pixel electrode on the substrate; at least one second common electrode provided in the same layer as the first common electrode such that an orthogonal projection on the substrate and an orthogonal projection of the pixel electrode on the substrate at least partially overlap each other; a first common electrode line connected to the first common electrode and a second common electrode line connected to the second common electrode, the first common electrode line and the second common electrode line configured to supply different signals; The first common electrode and the second common electrode are insulated from each other, the number of the second common electrodes is two; The two second common electrodes are arranged on both sides of the first common electrode along the extending direction of the data lines or the extending direction of the scan lines. Array board.

2. A substrate; a plurality of pixel units provided on the substrate, Each of the pixel units comprises: A pixel electrode; a first common electrode provided at a distance from the pixel electrode such that an orthogonal projection of the pixel electrode on the substrate at least partially overlaps with an orthogonal projection of the pixel electrode on the substrate; at least one second common electrode provided in the same layer as the first common electrode such that an orthogonal projection on the substrate and an orthogonal projection of the pixel electrode on the substrate at least partially overlap each other; The first common electrode and the second common electrode are insulated from each other, the first common electrode and the second common electrode are formed in a mirror-symmetric structure along a virtual plane perpendicular to the substrate, The pixel units are formed by intersecting a plurality of data lines and a plurality of scan lines, the number of the second common electrodes is two; The two second common electrodes are arranged on both sides of the first common electrode along an extending direction of the scan lines.

3. The first common electrode and the two second common electrodes each have a plurality of second branch electrodes spaced apart from each other, A slit is formed between adjacent second branch electrodes, an angle between an extension direction of the second branch electrode located on one side of the imaginary plane and the imaginary plane is equal to an angle between an extension direction of the second branch electrode located on the other side of the imaginary plane and the imaginary plane; The array substrate according to claim 2 .

4. The first common electrode and the two second common electrodes each further include two second base electrodes, one of the second trunk electrodes in the first common electrode is connected to one end of the plurality of second branch electrodes in the first common electrode, the other second trunk electrode in the first common electrode is connected to the other end of the plurality of second branch electrodes in the first common electrode, one of the second trunk electrodes in the second common electrode is connected to one end of the plurality of second branch electrodes in the second common electrode, the other second trunk electrode in the second common electrode is connected to the other end portions of the plurality of second branch electrodes in the second common electrode; 4. The array substrate according to claim 3.

5. The pixel electrodes are formed in a mirror-symmetric structure along the imaginary plane. The array substrate according to claim 2 .

6. A substrate; a plurality of pixel units provided on the substrate, Each of the pixel units comprises: A pixel electrode; a first common electrode provided at a distance from the pixel electrode such that an orthogonal projection of the pixel electrode on the substrate at least partially overlaps with an orthogonal projection of the pixel electrode on the substrate; at least one second common electrode provided in the same layer as the first common electrode such that an orthogonal projection on the substrate and an orthogonal projection of the pixel electrode on the substrate at least partially overlap each other; The first common electrode and the second common electrode are insulated from each other, The pixel units are formed by intersecting a plurality of data lines and a plurality of scan lines, the number of the second common electrodes is two; The two second common electrodes are arranged on both sides of the first common electrode along the extending direction of the data lines.

7. the first common electrode and the second common electrode are provided between the pixel electrode and the substrate; 7. The array substrate according to claim 2 or 6.

8. The pixel electrode is provided between the substrate and the first common electrode and the second common electrode.

7. The array substrate according to claim 2 or 6.

9. the first common electrode is formed in a mirror-symmetric structure along a virtual plane perpendicular to the substrate, The second common electrode is provided outside the first common electrode along an extension direction of the data lines or an extension direction of the scanning lines.

7. The array substrate according to claim 2 or 6.

10. The two second common electrodes are formed in a mirror-symmetric structure along a virtual plane perpendicular to the substrate.

7. The array substrate according to claim 6.

11. The pixel electrode has a plurality of first branch electrodes spaced apart from one another, A slit is formed between adjacent first branch electrodes, an angle between an extension direction of a first branch electrode located on one side of a virtual plane perpendicular to the substrate and the virtual plane is equal to an angle between an extension direction of a first branch electrode located on the other side of the virtual plane and the virtual plane; 7. The array substrate according to claim 6.

12. The pixel electrode further includes two first backbone electrodes, One of the first trunk electrodes is connected to one end of the first branch electrodes, The other first trunk electrode is connected to the other ends of the plurality of first branch electrodes. The array substrate according to claim 11 .

13. The pixel electrode further includes an elongated electrode connected between one of the two first trunk electrodes and a control element. The array substrate according to claim 12.

14. The first branch electrodes are provided in a mirror symmetric manner on both sides of the imaginary plane. The array substrate according to claim 11 .

15. The first common electrode and the second common electrode are formed in a mirror-symmetric structure along a virtual plane perpendicular to the substrate.

7. The array substrate according to claim 2 or 6.

16. a first pressure difference exists between the pixel electrode and the first common electrode; a second pressure difference exists between the pixel electrode and the second common electrode; The absolute value of the first pressure difference is greater than the absolute value of the second pressure difference. The array substrate according to claim 15 .

17. A display device comprising a counter substrate, a liquid crystal layer, and the array substrate according to claim 1, 2 or 6, The counter substrate and the array substrate are disposed opposite each other with a gap therebetween, The liquid crystal layer is provided between the counter substrate and the array substrate. Display device.

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