gaming machines

Abstract

To facilitate design and maintenance for performance light emission drive, and to make board configuration efficient.SOLUTION: A game machine includes: an LED; light emission drive means; and light emission control means for generating drive data of each color to be supplied to the light emission drive means as serial data arranged in a specific order and outputting it from a serial output circuit. The LED includes a first type chip and a second type chip different from the first type chip.SELECTED DRAWING: Figure 28

Description

[Technical Field]

[0001] The present invention relates to a gaming machine and to a technique that contributes to improving the performance of the gaming machine. [Background technology]

[0002] In pinball and rotary gaming machines, various devices such as LCD screens, speakers, LEDs, gadgets, vibrators, and blowers are used to enhance the gaming experience. The following patent documents disclose techniques for controlling various performance actions. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2014-64693 Summary of the Invention [Problem to be solved by the invention]

[0004] In these gaming machines, circuit design, board pattern wiring, software design, etc. are carried out according to the type of LED and other elements used, and driver chips, etc., but the use of a wide variety of elements makes the design more difficult.In addition, since many engineers are involved in the design of each part, as the machine becomes more complex, design errors become more likely to occur. Therefore, the present invention proposes a configuration that can obtain effective dramatic effects without incurring design difficulties. [Means for solving the problem]

[0005] The gaming machine of the present invention comprises a full-color LED chip and A plurality of light emission driving means belonging to one serial data system to which serial data is commonly supplied, all of which are The drive current for each color of the full-color LED chip is assigned to multiple drive current terminals in a specific color order. are A plurality of light emission driving means; The plurality ofa light emission control means for generating the drive data of each color to be supplied to the light emission drive means as serial data arranged in the specific color order and outputting the serial data from a serial output circuit, wherein the light emission control means generates the serial data without rearranging the color order for the drive data of each color read from a storage means in which the drive data of each color is stored in the specific color order, and outputs the serial data from the serial output circuit; At least one of the plurality of light emission driving means Each drive current terminal; Drive current supply destination Each color terminal of the full-color LED chip but, Correlation where the assigned colors do not match when placed in an opposing state The pattern wiring for light emission drive, which electrically connects each drive current terminal and each color terminal, has a length closer to the full-color LED chip side than the center point of the pattern wiring length between the terminals. Wiring is done to match the assigned color relationships. There are. [Effects of the Invention]

[0006] The configuration of the gaming machine of the present invention makes it possible to realize ease and efficiency in the design and maintenance of gaming machines that provide a variety of effects, and is also effective in reducing errors during design. [Brief explanation of the drawings]

[0007] [Figure 1] 1 is a front perspective view showing the appearance of a gaming machine according to an embodiment of the present invention; [Figure 2] 1 is a diagram showing the configuration of a gaming board of a gaming machine according to an embodiment; [Figure 3] 2 is a block diagram showing the control configuration of the gaming machine according to the embodiment; [Figure 4] An explanatory diagram of an example of a preview performance in an embodiment. [Figure 5] 1 is a perspective view of a gaming machine according to an embodiment with the door open. [Figure 6] 1 is an oblique view of an embodiment of the gaming machine with the inner frame open. FIG. [Figure 7] FIG. 2 is an explanatory diagram of the board arrangement on the back side of the game board according to the embodiment. [Figure 8] An explanatory diagram of the board arrangement of the door and inner frame of the gaming machine of the embodiment. [Figure 9] 10 is an explanatory diagram of the board arrangement of the inner frame of the gaming machine of the embodiment. FIG. [Figure 10] FIG. 2 is an explanatory diagram of the arrangement of various devices. [Figure 11] FIG. 2 is a block diagram of the connection configuration of the board. [Figure 12] FIG. 10 is a circuit diagram of the upper right LED board 600 of the side unit. [Figure 13] FIG. 10 is a circuit diagram of the upper right LED board 600 of the side unit. [Figure 14] FIG. 10 is a circuit diagram of the upper right LED board 600 of the side unit. [Figure 15] FIG. 10 is a circuit diagram of the upper right LED board 600 of the side unit. [Figure 16] FIG. 10 is a circuit diagram of the upper right LED board 600 of the side unit. [Figure 17] FIG. 10 is a circuit diagram of the upper right LED board 600 of the side unit. [Figure 18] FIG. 10 is a circuit diagram of the lower right LED board 620 of the side unit. [Figure 19] FIG. 10 is a circuit diagram of the lower right LED board 620 of the side unit. [Figure 20] FIG. 10 is a circuit diagram of the LED board 630 on the side unit. [Figure 21] FIG. 10 is a circuit diagram of a button LED board 660. [Figure 22] FIG. 10 is a circuit diagram of a button LED board 660. [Figure 23] FIG. 7 is a circuit diagram of an LED substrate 780. [Figure 24] FIG. 10 is a circuit diagram of an LED substrate 790. [Figure 25] FIG. 10 is a circuit diagram of an LED substrate 920. [Figure 26] 10 is an explanatory diagram of the terminals of the LED driver 631. FIG. [Figure 27] 10 is an explanatory diagram of the terminals of the LED driver 921. FIG. [Figure 28] FIG. 10 is an explanatory diagram of transmission of a light emission control signal by serial data. [Figure 29] FIG. 10 is an explanatory diagram of the facing state of Type 1A. [Figure 30] FIG. 10 is an explanatory diagram of the opposing state of Type 1B. [Figure 31] FIG. 10 is an explanatory diagram of the facing state of Type 2A. [Figure 32] FIG. 10 is an explanatory diagram of the facing state of Type 2B. [Figure 33] FIG. 10 is an explanatory diagram of the facing state of Type 3A. [Figure 34] FIG. 10 is an explanatory diagram of the opposing state of Type 3B. [Figure 35] FIG. 10 is an explanatory diagram of the opposing state of Type 4A. [Figure 36] FIG. 10 is an explanatory diagram of the opposing state of Type 4B. [Figure 37] FIG. 10 is an explanatory diagram of the facing state of Type 5A. [Figure 38] FIG. 10 is an explanatory diagram of the opposing state of Type 5B. [Figure 39] FIG. 10 is an explanatory diagram of the opposing state of Type 6A. [Figure 40] FIG. 10 is an explanatory diagram of the opposing state of Type 6B. [Figure 41] 10 is an explanatory diagram of the pattern of the surface layer of the LED substrate 630 on the side unit. FIG. [Figure 42] 10 is an explanatory diagram of the pattern of the back surface layer of the LED substrate 630 on the side unit. FIG. [Figure 43] 10 is an explanatory diagram of light emission drive current wiring of the LED substrate 630 on the side unit. FIG. [Figure 44] 9 is an explanatory diagram of the pattern of the surface layer of the LED substrate 920. FIG. [Figure 45] 10 is an explanatory diagram of the pattern of the back surface layer of the LED substrate 920. FIG. [Figure 46] 10 is an explanatory diagram of light emission drive current wiring of the LED substrate 920. FIG. [Figure 47] 9 is an explanatory diagram of an example of wiring between an LED driver 921 and an LED 2 on the other side. [Figure 48] 9 is an explanatory diagram of an example of wiring between an LED driver 921 and an LED 4 on the other side. [Figure 49] 10 is an explanatory diagram of an example of wiring between an LED driver 921 and an LED 7 on the other side. [Figure 50] 9 is an explanatory diagram of an example of wiring between an LED driver 921 and an LED 10 on the other side. [Figure 51] 10 is an explanatory diagram of an example of wiring between an LED driver 921 and an LED 11 on the other side. [Figure 52] 9 is an explanatory diagram of an example of wiring between an LED driver 921 and an LED 14 on the other side. [Figure 53] 9 is an explanatory diagram of an example of wiring for an LED driver 921 and an LED2 on the same surface. [Figure 54] 9 is an explanatory diagram of an example of wiring for an LED driver 921 and an LED 4 on the same surface. [Figure 55] 9 is an explanatory diagram of an example of wiring between an LED driver 921 and an LED 7 on the same surface. [Figure 56] 9 is an explanatory diagram of an example of wiring between an LED driver 921 and an LED 10 on the same surface. [Figure 57] 9 is an explanatory diagram of an example of wiring between an LED driver 921 and an LED 11 on the same surface. [Figure 58] 9 is an explanatory diagram of an example of wiring for an LED driver 921 and an LED 14 on the same surface. [Figure 59] FIG. 10 is an explanatory diagram of an example of wiring for matching the relationship of assigned colors. [Figure 60] FIG. 10 is an explanatory diagram of an example of wiring for matching the relationship of assigned colors. DETAILED DESCRIPTION OF THE INVENTION

[0008] Hereinafter, embodiments of the present invention will be described in the following order with reference to the accompanying drawings. <1. Structure of the gaming machine> <2. Control configuration of gaming machine> [2.1 Main control board] [2.2 Performance control board] <3. Overview of operation> [3.1 Game Status] [3.2 Game with changing symbols] [3.3 About winning] [3.4 Production] <4. Opening and closing structure and board layout> <5. Circuit Board> [5.1 Connection status of each board] [5.2 Side unit upper right LED board 600] [5.3 Side unit bottom right LED board 620] [5.4 Side unit LED board 630] [5.5 Button LED board 660] [5.6 LED board 780] [5.7 LED board 790] [5.8 LED board 920] <6. LED driver terminal configuration> <7. LED driver and LED pattern wiring> [7.1 Transmission of light emission control signals] [7.2 LED driver and full-color LED chip facing each other] [7.3 Specific examples of wiring in the case of matching opposite relationships] [7.4 Specific examples of wiring when the opposite relationship is mismatched and the wiring is on different sides] [7.5 Specific examples of wiring when opposite connections are not identical but on the same side] 8. Characteristic Configuration and Effects of the Embodiments <9.Other>

[0009] <1. Structure of the gaming machine> The structure of a pachinko gaming machine 1 as an embodiment of the present invention will be described with reference to Figures 1 and 2. Figure 1 is a perspective view of the front side showing the appearance of the pachinko gaming machine 1, and Figure 2 is a view showing the front side of a game board 3 that the pachinko gaming machine 1 has. The pachinko gaming machine 1 has a frame member, a door member that is provided so as to be able to open and close relative to the frame member, and an exchange member that is attached so as to be able to be exchanged relative to the frame member. The pachinko gaming machine 1 described below has an inner frame 2 as a component equivalent to a frame member, a door 6 as a component equivalent to a door member, and a gaming board 3 as a component equivalent to a replacement member.

[0010] The pachinko gaming machine 1 shown in Figure 1 (hereinafter sometimes abbreviated as "gaming machine 1") has a picture-frame-shaped inner frame 2 attached to the front of a wooden outer frame 4 so that it can be opened and closed, a gaming board 3 (see Figure 2) mounted in a gaming board storage frame (not shown) attached to the back of the inner frame 2, and a gaming area 3a formed on the surface of this gaming board 3 faces the opening of the inner frame 2. The gaming board 3 can be called an exchangeable part because it can be attached and detached to the inner frame 2 exchangeably. A door 6 supporting transparent glass is provided at the front of the game area 3a. Also, various control boards (see FIG. 3) for controlling game operations are provided at the rear side of the game board 3.

[0011] On the front side (player side) of the door 6, a side unit 10 is formed as a decorative unit that surrounds the entire periphery of the game board 3 or a part of it, for example. The side unit 10 itself is given a decorative shape that matches the theme of the gaming machine 1, and may be equipped with LEDs, accessories, and other presentation elements inside, thereby achieving a presentation effect that conveys the atmosphere of the game to the player. This side unit 10 is a unit that is attached to the door 6 in an interchangeable manner.

[0012] A key cylinder (not shown) for unlocking the door is provided on the front side of the door 6; by inserting a key into this key cylinder and operating it to one side, the locked state of the door 6 relative to the inner frame 2 can be released, allowing the door 6 to be opened to the front; and by operating it to the other side, the locked state of the inner frame 2 relative to the outer frame 4 can be released, allowing the inner frame 2 to be opened to the front.

[0013] A front operation panel 7 is disposed below the door 6 and is pivotally supported on the inner frame 2 by a hinge (not shown) so as to be able to be opened and closed freely. An upper tray unit 8 is provided on the front operation panel 7, and this upper tray unit 8 is formed with an upper tray 9 for storing the discharged gaming balls.

[0014] The upper tray unit 8 is also provided with a ball removal button 14 for removing game balls stored in the upper tray 9 downward from the gaming machine 1, a ball lending button 11 for requesting the game ball lending device (not shown) to dispense game balls, and a card return button 12 for requesting the return of any valuable medium inserted into the game ball lending device. Additionally, an effect button 13 (operation means) that can be operated by a player is provided on the upper tray unit 8. This effect button 13 becomes operable (input acceptable) when a built-in lamp (button LED 75) lights up during a predetermined input acceptance period, and it is possible to bring about a change in the effect by performing a predetermined operation (pressing, repeatedly pressing, long pressing, etc.) while the built-in lamp is lit. The upper tray unit 8 is also provided with controls such as a cross key 15a that allows users such as players and hall staff to select various items and give direction instructions, and a decision button 15b that allows users to decide on a selected item.

[0015] Further, on the right end side of the front operation panel 7, a firing operation handle 15 for operating the firing device 32 (see FIG. 3) is provided.

[0016] Also Door 6 On both sides of the upper part of the gun and on the upper side of the firing operation handle 15, speakers 46 are provided to produce sound effects (sound effects). Door 6 Only the top two speakers 46 are shown. The plurality of speakers 46 allows so-called stereophonic sound reproduction or multi-channel sound reproduction for sounds related to the performance.

[0017] Furthermore, a plurality of decorative lamps 45 (for example, full-color LEDs for light effects: see FIG. 3) that create a light effect through light decoration are provided in appropriate positions on the door 6. A plurality of full-color LEDs (light effects LEDs) as the decorative lamps 45 are provided around the pachinko gaming machine 1, for example, on the periphery of the door 6 or inside the side unit 10.

[0018] The configuration of the game board 3 will be described with reference to FIG. The illustrated game board 3 has a ball guide rail 5 attached in a ring shape as a board surface partition member to guide the launched game balls, and the approximately circular area surrounded by this ball guide rail 5 is the game area 3a, while the four corners are non-game areas.

[0019] Approximately in the center of this game area 3a, there is provided a liquid crystal display device (LCD) 36 which is capable of independently displaying (variable display and stationary display) multiple types of decorative patterns (for example, left pattern (corresponding to the left display area), middle pattern (corresponding to the middle display area), right pattern (corresponding to the right display area)) using numbers, characters, symbols, etc. in, for example, three (left, middle, right) display areas (pattern variable display areas). This liquid crystal display device 36 displays various effects as images, in addition to the changing display operation of decorative symbols, under the control of the effect control board 30 described later.

[0020] Also, within the gaming area 3a, a center ornament 48 is provided in a manner that surrounds the display surface of the liquid crystal display device 36 at a distance. The center ornament 48 is provided along the front side of the gaming board 3, and protects the display surface of the liquid crystal display device 36 from surrounding gaming balls, and also functions as a flow path sorting means that enables the flow path of the gaming balls to be sorted to the left or right depending on the strength or stroke length of the gaming ball's launch. In this embodiment, the center ornament 48 is disposed in the approximate center of the play area 3a so that flow paths for game balls are formed on both upper sides (left and right sides) of the play area 3a due to the presence of the center ornament 48. Game balls shot into the upper side of the play area 3a by the launching device 32 are sorted to the left and right at the upper side of the armor frame portion 48b, and flow down either the left flow path 3b on the left side of the center ornament 48 or the right flow path 3c on the right side.

[0021] In addition, the non-play area at the bottom of the game board 3 is a display area for various functions, and is provided with a special pattern display device 38a (first special pattern display means) and a special pattern display device 38b (second special pattern display means) using dot displays. The various function display sections including the special symbol display devices 38a and 38b are shown enlarged in FIG.

[0022] The special symbol display devices 38a, 38b are configured to execute a special symbol variable display game by varying the display operation of "special symbols" represented by dot displays. The liquid crystal display device 36 is configured to variably display decorative symbols by images in synchronization with the variable display of special symbols by the special symbol display devices 38a, 38b, and to execute a decorative symbol variable display game together with various preview effects (effect images) (these symbol variable display games will be explained in detail later).

[0023] The various function display section also includes a composite display device (LED display for reserved composite display) 38c, which is made up of dot displays similar to the special symbol display devices 38a and 38b. It is called a composite because it is a reserved, time-saving, and high-probability composite display device (hereinafter simply referred to as the "composite display device") that has five display functions: displaying special symbols 1 and 2, the number of reserved balls for normal symbols, and notifying the status when the variable time-saving function is in operation (during time-saving) and when in a high-probability state (during high probability).

[0024] The various function display section is also provided with a composite display device 38d, which is also made up of dot displays. In this composite display device 38d, a round number display is performed to notify the specified number of rounds (maximum number of rounds) related to a jackpot by a combination of the on / off states of four LEDs. For example, the specified number of rounds (maximum number of rounds) related to a jackpot is notified by a combination of the on / off states of four LEDs. In addition, in the composite display device 38d, a normal symbol variable display game is executed by a variable display operation of a normal symbol represented by one LED as a normal symbol display. Furthermore, the composite display device 38d is configured to display right-hit information using three LEDs.

[0025] A start hole 34 (first special symbol start hole: first start means) is provided inside the center ornament 48 in Fig. 2. A detection sensor 34a (start hole sensor 34a, see Fig. 3) that detects the passage of the game ball is formed inside the start hole 34. In addition, a start port 35 (second special pattern start port: second start means) that opens and closes is provided in the right flow path 3c, and a detection sensor 35a (start port sensor 35a: see Figure 3) that detects the passage of the game ball is formed inside.

[0026] The first special symbol starting hole 34 is a winning hole related to the starting condition of the variable display operation of the first special symbol (hereinafter, the first special symbol is referred to as "special symbol 1" and sometimes abbreviated as "special symbol 1") in the special symbol display device 38a, and is configured as a fixed winning rate winning device that does not have a starting hole opening / closing means (means for opening or enlarging the starting hole). In this embodiment, due to the action of a game ball falling direction changing member (for example, a game nail, a windmill 44, a center ornament 48, etc.) in the game area 3a, the starting hole 34 is configured so that game balls flowing down the left flow path 3b can easily enter (win) the ball, but it is configured so that game balls flowing down the right flow path 3c can hardly or cannot enter.

[0027] The starting port 35 is a winning port related to the starting conditions for the variable display operation of the second special pattern (hereinafter, the second special pattern will be referred to as "special pattern 2" and sometimes abbreviated as "special pattern 2") in the special pattern display device 38b, and the winning area of ​​this starting port 35 is configured to be able to open and close between an open state in which a winning is possible and a closed state in which a winning is not possible.

[0028] The start opening 35 is a winning opening related to the start conditions for the variable display operation of the special symbol 2 in the special symbol display device 38b, and is configured as a variable start opening whose opening and closing is controlled by the normal electric device 41. The normal electric accessory 41 is controlled to an open state that allows a game ball to enter the starting hole 35 and a closed state that makes it difficult or impossible for a game ball to enter the starting hole 35.

[0029] Two general winning openings 43 are provided on the left and right lower sides of the game area 3a, and a general winning opening sensor 43a for detecting the passage of a gaming ball is formed inside each of them. Additionally, within the area of ​​the game board, movable accessories (not shown) that create visual effects are arranged in positions that do not interfere with the flow of the game balls.

[0030] Additionally, diagonally above the normal electric device 41, i.e., above the middle of the right flow path 3c, there is provided a normal symbol start port 37 (third start means) consisting of a passage gate (specific passage area) through which game balls can pass. This normal symbol start port 37 is a winning port related to the variable display operation of the normal symbol on the composite display device 38d, and inside it is formed a normal symbol start port sensor 37a (see FIG. 3) that detects game balls passing through. Note that in this embodiment, the normal symbol start port 37 is formed only on the right flow path 3c side, and not on the left flow path 3b side. However, the present invention is not limited to this, and it may be formed only on the left flow path 3b, or on both flow paths.

[0031] A special variable prize winning device 52 (special electric device) is provided midway along the path from the normal pattern starting port 37 in the right flow path 3c, which is configured to be able to open or expand the large prize winning port 50 using an opening door 52b, and inside it is formed a large prize winning port sensor 52a (see Figure 3) which detects game balls that have entered the large prize winning port 50. Around the big prize opening 50, there are provided a guide section 55 and a windmill 53 which function to guide the game balls flowing down in the direction of the big prize opening 50.

[0032] The process of the game ball entering the big prize opening 50 is as follows. The gaming ball passes through the free movement area between the upper surface of the center ornament 48 and the ball guide rail 5 and then passes through the right flow path 3c, and is guided in the direction of the big prize opening 50 by the guide section 55. If the big prize opening 50 is in an open state (big prize opening open state), the gaming ball is guided into the big prize opening 50.

[0033] In the gaming machine 1 of this embodiment, when the player aims the launch position toward the special variable winning device 52 (when the player aims so that the gaming ball passes through the right flow path 3c), the gaming ball is difficult to guide or cannot be guided toward the starting hole 34. Therefore, if the "big winning hole closed state", it is difficult or impossible for the gaming ball to enter the starting hole 34. In addition, when the game state is entered with the electric support state described below, the starting port 35 operates in an opening and closing pattern that is more advantageous than in the normal state.

[0034] In this embodiment, the type of hitting technique that is advantageous for the player varies depending on the game state. Specifically, in a game state that includes a "no electric support state" described below, a "left hit" that aims the game ball to pass through the left flow path 3b is considered advantageous, and in a game state that includes a "electric support state" described below, a "right hit" that aims the game ball to pass through the right flow path 3c is considered advantageous.

[0035] In the gaming machine 1 of this embodiment, when a winning ball is won in a winning hole other than the normal symbol start hole 37 among the various winning holes provided in the gaming area 3a, the number of prize balls per winning ball promised for each winning hole (for example, 3 balls for start hole 34 or start hole 35, 13 balls for the large prize hole 50, and 10 balls for the general prize hole 43) is paid out from the gaming ball payout device 19 (see FIG. 3). Gaming balls that do not win in the above winning holes are discharged from the gaming area 3a through the outlet hole 49.

[0036] Here, "winning" refers to a game ball being drawn into a winning opening, or, if the winning opening is a gate-type winning opening (e.g., normal symbol start opening 37) rather than a winning opening that draws in game balls, a game ball passing through the gate. In practice, when a game ball is detected by the winning detection switch formed for each winning opening, that winning opening is considered to have "won." The winning ball is also referred to as a "winning ball." Note that, since a game ball entering a winning opening will be detected by the winning detection switch, unless otherwise specified, the term "winning" may be used in this specification to refer to a game ball entering a winning opening, regardless of whether the game ball is detected by the winning detection switch.

[0037] <2. Control configuration of gaming machine> The configuration (control configuration) for realizing the gaming operation control of the gaming machine 1 will be described with reference to the block diagram of FIG. The gaming machine 1 of this embodiment is configured to include a main control board (main control means) 20 that comprehensively controls all game operations (game operation control), a presentation control board 30 (presentation control means) that receives presentation control commands from the main control board 20 and comprehensively controls the execution control (appearance control) of presentations by the presentation means, a payout control board (payout control means) 29 that controls the payout of prize balls, and a power supply board (power supply control means (not shown)) that generates and supplies the power required for the gaming machine 1 from an external power source (not shown). In FIG. 3, the power supply routes to each part are omitted.

[0038] [2.1 Main control board] The main control board 20 is equipped with a microprocessor that incorporates a CPU (Central Processing Unit) 20a (main control CPU), as well as a ROM (Read Only Memory) 20b (main control ROM) that stores a control program that describes the game operation control procedures, as well as various data necessary for game operation control, and a RAM (Random Access Memory) 20c (main control RAM) that functions as a work area and buffer memory, and as a whole constitutes a microcomputer.

[0039] Although not shown, the main control board 20 also includes a CTC (Counter Timer Circuit) for implementing periodic interrupts, a function for generating pulse outputs at fixed intervals (bit rate generator), and a time measurement function, an interrupt controller circuit that performs interrupt enable / disable functions such as timer interrupts that issue interrupt signals to the main control CPU 20a, a reset circuit that can detect power-on / power-off and power supply abnormalities and output a system reset signal to reset the main control CPU 20a, a watchdog timer (WDT) circuit that monitors for abnormal operation of the control program, an IAT (Inhibit Outside Designated Area) circuit that monitors whether the program is being executed correctly within a preset address range, and a counter circuit for generating random numbers within a certain range in hardware.

[0040] The counter circuit is comprised of a random number generation circuit that generates random numbers and a sampling circuit that samples random numbers from the random number generation circuit at predetermined timing, and functions as a 16-bit counter as a whole. The main control CPU 20a sends instructions to the sampling circuit according to the processing status to obtain the number indicated by the random number generation circuit as a random number value for internal lottery (random number for determining jackpot (size of random number: 65536)), and uses this random number value for the jackpot lottery. Note that the random number for internal lottery is obtained by adding a software random number value generated by appropriate software processing and a hard random number value to prevent cheating such as aiming for a jackpot.

[0041] Connected to the main control board 20 are a start gate sensor 34a that detects winning (ball entry) into start gate 34, a start gate sensor 35a that detects winning into start gate 35, a normal pattern start gate sensor 37a that detects passage through normal pattern start gate 37, a special prize gate sensor 52a that detects winning into special prize gate 50, a general prize gate sensor 43a that detects winning into general prize gate 43, and an OUT monitoring switch 49a that detects game balls (out balls) discharged from outlet 49, and the main control board 20 is capable of receiving detection signals output from these. Based on the detection signals from each sensor, the main control board 20 is able to determine which prize gate the game ball has entered.

[0042] In addition, the main control board 20 is connected to a normal electric role solenoid 41c for controlling the opening and closing of the movable wing piece of the starting opening 35, and a large prize opening solenoid 52c for controlling the opening and closing of the opening door 52b of the large prize opening 50, and the main control board 20 is capable of transmitting control signals for controlling these.

[0043] Furthermore, the main control board 20 is connected to a special symbol display device 38a and a special symbol display device 38b, and the main control board 20 is capable of transmitting control signals for controlling the display of special symbols 1 and 2. Furthermore, the main control board 20 is connected to a composite display device 38c, and is capable of transmitting control signals for controlling the display of the number of reserved symbols and the status display.

[0044] In addition, a composite display device 38d is connected to the main control board 20, and the main control board 20 is capable of transmitting control signals for controlling the display of the normal pattern display, right-hit display, and round display displayed on the composite display device 38d.

[0045] Furthermore, an external centralized terminal board 21 for the frame is connected to the main control board 20, and the main control board 20 is capable of transmitting predetermined game information (e.g., jackpot information, number of winning balls information, pattern change execution information, etc.) to a hall computer HC installed outside the gaming machine via the external centralized terminal board 21 for the frame. The hall computer HC is an information processing device (computer device) that monitors game information from the main control board 20 and comprehensively manages the operating status of the gaming machines in the pachinko hall.

[0046] Furthermore, a payout control board (payout control unit) 29 is connected to the main control board 20, and when it is necessary to pay out prize balls, a control command regarding the payout (a payout control command specifying the number of prize balls) can be sent to the payout control board 29.

[0047] A launch control board (launch control unit) 28 that controls the launch device 32, and a game ball payout device (game ball payout means) 19 that pays out game balls are connected to the payout control board 29. The main role of this payout control board 29 is to receive payout control commands from the main control board 20, control the payout of prize balls by the game ball payout device 19 based on the payout control commands, and send status signals to the main control board 20.

[0048] The game ball payout device 19 is provided with a supply shortage detection sensor 19a that detects a shortage of game balls and a ball counting sensor 19b that detects the game balls (prize balls) to be paid out, and the payout control board 29 is capable of receiving these detection signals. The game ball payout device 19 is also provided with a payout motor 19c that drives a ball payout mechanism (not shown) for paying out game balls, and the payout control board 29 is capable of transmitting a control signal for controlling the payout motor 19c.

[0049] Furthermore, the payout control board 29 is connected to a fullness detection sensor 60 (in this embodiment, a detection sensor that detects the storage state of game balls stored in the upper tray 9) that detects whether the upper tray 9 is full of game balls, and a front door open sensor 61 (for example, a detection sensor that detects the open state of the door 6 or inner frame 2).

[0050] The payout control board 29 can transmit various status signals to the main control board 20 based on detection signals from the full detection sensor 60, the front door open sensor 61, the out-of-supply detection sensor 19a, and the ball count sensor 19b. These status signals include a ball jam signal indicating a full state, a door open signal indicating that at least the inner frame 2 is open, an out-of-supply signal indicating a shortage of game balls from the game ball payout device 19, a count error signal indicating a shortage of prize balls or an abnormality in the ball count sensor 19b, and a payout completion signal indicating the completion of the payout operation. Based on these status signals, the main control board 20 monitors the open state of the inner frame 2 (door open error), whether the payout operation of the game ball payout device 19 is normal (out-of-supply error), and whether the upper tray 9 is full (ball jam error).

[0051] Furthermore, the payout control board 29 is connected to a launch control board 28, which is capable of transmitting an authorization signal to the launch control board 28 to authorize launching. Based on the authorization signal output from the payout control board 29, the launch control board 28 controls the energization of a launch solenoid (not shown) provided in the launcher 32, thereby realizing the launch of a gaming ball by operating the launch operation handle 15. Specifically, the launch of a gaming ball is permitted under the following conditions: a launch authorization signal is output from the payout control board 29 (launch authorization signal ON state), a touch sensor provided on the launch operation handle 15 detects that the player is touching the handle, and a launch stop switch (not shown) provided on the launch operation handle 15 has not been operated. Therefore, when the launch authorization signal is not output (launch authorization signal OFF state), the launch operation is not executed even if the launch operation handle 15 is operated, and the gaming ball is not launched. Furthermore, the strength of the launch of the gaming ball can be changed depending on the amount of operation of the launch operation handle 15. Furthermore, when the payout control board 29 detects the above-mentioned ball jam error, it sends a ball jam signal to the main control board 20 and stops outputting the launch permission signal to the launch control board 28 (launch permission signal OFF), and controls the firing operation to stop until the upper tray 9 is no longer full. In addition, the payout control board 29 outputs a launch permission signal to the launch control board 28 on the condition that the main control board 20 has instructed the launch permission.

[0052] A RAM clear switch 98 is connected to the main control board 20, and detection signals from these switches can be received.

[0053] The RAM clear switch 98 is, for example, a push button switch for inputting an instruction to initialize a predetermined area of ​​the main control RAM 20c.

[0054] The RAM clear switch 98 is turned on / off in response to the operation of a RAM clear button that is provided so as to be operable when the inner frame 2 is open. The RAM clear switch 98 is provided at an appropriate location inside the gaming machine 1. For example, it is disposed on the main control board 20.

[0055] Furthermore, a performance indicator 97 is connected to the main control board 20. The performance indicator 97 is configured to have, for example, a 7-segment display, and functions as a display means capable of displaying performance information (described later). The performance indicator 97 is mounted, for example, at an easily visible position on the main control board 20.

[0056] (Performance display) The main control board 20 is capable of transmitting a control signal to the performance display 97 to cause the performance display 97 to display predetermined performance information. Performance information is information that pachinko halls and relevant authorities want to confirm, and typical examples include information regarding the presence or absence of illegal prize ball cheating, such as excessive prize balls in the gaming machine 1, and the original ball output performance of the gaming machine 1. Therefore, unlike preview effects, the performance information itself is information that is not directly related to the progress of the game itself when a player is enjoying the game.

[0057] For this reason, the performance display 97 is provided inside the gaming machine 1, for example, on the main control board 20, payout control board 29, launch control board 28, the relay board, the performance control board 30, or in the board case (protective cover that protects the board), in a position where the display information can be seen when the inner frame 2 is in the open state.

[0058] Here, the performance information may specifically include the following information:

[0059] (1) Information (specific ratio information) based on the value (α / β) obtained by dividing the total number of payout balls paid out as a result of winning during a specific state (total number of prize balls during a specific state: α) by the total number of balls discharged from the game area 3a during the specific state (number of balls discharged during a specific state: β) can be adopted as performance information. The "total number of payouts" is the total number of game balls (prize balls) paid out when a ball enters a prize slot (starting slot 34, starting slot 35, general prize slot 43, large prize slot 50). In this embodiment, the number of payouts is 3 for starting slot 34 or starting slot 35, 13 for large prize slot 50, and 10 for general prize slot 43. Furthermore, which state is adopted as the specific state can be determined as appropriate depending on the state under which performance information is desired to be grasped. In the case of this embodiment, any of the normal state, the potential probability state, the time-saving state, the probability variable state, and the state during a jackpot game can be adopted. Furthermore, multiple types of states may be used as the measurement target. For example, the normal state and the probability variable state, or all game states except during a jackpot game, etc., and the type to be measured can be determined as appropriate. Furthermore, the period during the specific state may be a period during which the probability of winning a jackpot is either low or high. In addition, the total number of payouts may be calculated by excluding one or more specific winning ports from the measurement target (total number of payouts excluding specific winning ports). For example, the total number of payouts may be calculated by excluding the large winning port 50 from the measurement target among the winning ports.

[0060] (2) Alternatively, the total number of payouts, the total number of payouts excluding specific winning slots, or the total number of balls that have been released may be measured, and the measurement results may be used as performance information.

[0061] In this embodiment, the total number of dispensed balls in the normal state (number of dispensed balls in normal state) and the total number of balls out in the normal state (number of out balls in normal state) are measured in real time, and the value obtained by dividing the number of dispensed balls in normal state by the number of out balls in normal state and multiplying this value by 100 (value calculated as number of dispensed balls in normal state ÷ number of out balls in normal state × 100) is displayed as performance information (hereinafter referred to as "normal state ratio information"). Note that the displayed value at this time is rounded to one decimal place. Therefore, the data on the number of payouts during normal play, the number of outs during normal play, and the normal play ratio information are stored (memorized) in the corresponding areas of the main control RAM 20c (the storage area for the total number of prize balls during specific play, the storage area for the number of outs during specific play, and the specific ratio information storage area). However, rather than simply measuring continuously and displaying performance information, measurement is temporarily terminated when the total number of out balls reaches a predetermined number (e.g., 60,000). This specified number is not the total number of out balls during normal play, but the total number of out balls during all play states (including during winning play) (hereinafter referred to as the "number of outs in all states"). This number of outs in all states is also measured in real time and stored in the corresponding areas of the main control RAM 20c (the storage area for the number of outs in all states). For ease of explanation, the storage area for the total number of prize balls during specific play, the storage area for the number of outs during specific play, the specific ratio information storage area, and the storage area for the number of outs in all states will be abbreviated as the "measurement information storage area."

[0062] Then, the normal time ratio information at the end point is stored in a predetermined area (performance display storage area) of the main control RAM 20c (the current normal time ratio information is stored), and then the measurement information storage area (the number of balls dispensed during normal time, the number of balls out during normal time, and the number of balls out under all conditions) is cleared, and measurement begins again (measurement of the number of balls dispensed during normal time, the number of balls out during normal time, the normal time ratio information, and the number of balls out under all conditions begins).The performance display 97 then displays the previous normal time ratio information (measurement history information) and the normal time ratio information currently being measured. Note that the configuration is not limited to the previous information, and history from the time before that or the time before that (three times before) may also be displayed, and the number of previous times of information to be displayed can be determined as appropriate.

[0063] (Performance control command) Depending on the processing status, the main control board 20 can transmit various performance control commands, including information about the special symbol variation display game and information about errors, to the performance control board 30. However, in order to prevent fraudulent activities such as cheating, the main control board 20 is configured for one-way communication, where it can only transmit signals to the performance control board 30 and cannot receive signals from the performance control board 30.

[0064] Here, the performance control command defines its function using a two-byte structure consisting of a one-byte mode (MODE) and a one-byte event (EVENT). To distinguish between MODE and EVENT, Bit 7 of MODE is ON and Bit 7 of EVENT is OFF. When this information is transmitted as valid, a strobe signal is output corresponding to each mode (MODE) and event (EVENT). That is, when there is a command to transmit, the main control CPU 20a sets and outputs mode (MODE) information for transmitting the command to the performance control board 30, and transmits the first strobe signal a predetermined time after this setting. Furthermore, after a predetermined time has passed since transmitting this strobe signal, it sets and outputs event (EVENT) information, and transmits a second strobe signal a predetermined time after this setting. The strobe signal is controlled to an active state by the main control CPU 20a for a predetermined period of time to ensure that the performance control CPU 30a can receive commands reliably.

[0065] [2.2 Performance control board] The performance control board 30 is equipped with a microprocessor that incorporates a performance control CPU 30a, and is composed mainly of a microcomputer that is equipped with a performance control ROM 30b that stores the performance data required for performance control processing, and a performance control RAM 30c that functions as a work area and buffer memory.In addition, it is equipped with an audio control unit (sound source IC), an RTC (Real Time Clock) function unit, a counter circuit, an interrupt controller circuit, a reset circuit, a WDT circuit, etc., which control the overall performance operation.

[0066] The performance control CPU 30a performs calculations for various performance operations and controls each performance means based on the performance control program and performance control commands received from the main control unit 20. In the case of the pachinko gaming machine 1 of this embodiment, the performance means are the liquid crystal display device 36 (main liquid crystal display device 36M, sub liquid crystal display device 36S), the light display device 45a, the sound generating device 46a, and movable role objects not shown.

[0067] The performance control ROM 30b stores a control program for the performance operation by the performance control CPU 30a and various data required for performance operation control. The performance control RAM 30c is used as a work area used by the performance control CPU 30a for various calculation processes, a table data area, a buffer area for various input / output data and processing data, etc. The performance control board 30 is configured to have, for example, a one-chip microcomputer and its peripheral circuits mounted on it, but various configurations are possible for the performance control board 30. For example, in addition to the microcomputer, it may also have an interface circuit with each section, a random number generation circuit that generates random numbers for lottery use in performances, a CTC for counting various times, a watchdog timer (WDT) circuit, an interrupt controller circuit that gives an interrupt signal to the performance control CPU 30a, and the like.

[0068] The main roles of this performance control board 30 are to receive performance control commands from the main control unit 20, select and decide on performances based on the performance control commands, control the display of the LCD display device 36 (supply of display data), control the sound output of the sound generating device 46a, control the light emission of the light display device 45a (LED), and control the operation of the movable body role device (drive control of the movable body role device motor 80c).

[0069] This performance control board 30 also functions as a control device for the liquid crystal display device 36, so the performance control board 30 also has the functions of a so-called VDP (Video Display Processor), image ROM, and VRAM (Video RAM), and the performance control CPU 30a also functions as a liquid crystal control unit. VDP refers to the function that controls all video output processes, such as image expansion and image drawing. Image ROM refers to memory that stores image data (performance image data) that the VDP uses for image development processing. VRAM is an image memory area that temporarily stores image data developed by the VDP.

[0070] With this configuration, the performance control board 30 generates various image data based on commands from the main control unit 20 and outputs it to the main liquid crystal display device 36M and the sub liquid crystal display device 36S. As a result, various performance images are displayed on the main liquid crystal display device 36M and the sub liquid crystal display device 36S. 2 is the "main liquid crystal display device 36M." The sub liquid crystal display device 36S is not shown in FIG.

[0071] Furthermore, the performance control board 30 has an audio control section (for example, sound controller 230 in FIG. 4) for an audio generating device 46a including multiple speakers 46, and the audio signals output by the audio control section are amplified by an amplifier section 46d and supplied to the speakers 46. Note that while the sound controller 230 as the audio control section will be described as being built into the performance control board 30, the audio control section may also use a sound source IC separate from the performance control board 30. Also connected to the performance control board 30 are a lamp driver unit 45d that functions as a light display control unit for the light display device 45a, which includes decorative lamps 45 and various LEDs, and a motor driver unit 80d (motor drive circuit) that functions as a drive control unit for the movable body role motor 80c that operates the movable body (not shown). The performance control board 30 issues instructions to the lamp driver unit 45d and motor driver unit 80d to control the light display operation of the light display device 45a and the operation of the movable body role motor 80c. For example, the performance control board 30 is equipped with a serial output circuit 30d, which generates serial data that controls the light display operation and the operation of the movable body role motor 80c, and supplies it to the lamp driver unit 45d and motor driver unit 80d.

[0072] The performance control board 30 is also connected to an origin switch 81 and a position detection sensor 82 for monitoring the operation of the movable props. The origin switch 81 is composed of, for example, a photointerrupter, and detects whether the movable body role motor 80c is at the origin position. The origin position is, for example, a position where the movable body is not normally exposed on the board surface of Figure 2. The performance control board 30 is capable of determining whether the movable body role motor 80c is at the origin position based on the detection information of this origin switch 81. In addition, the performance control board 30 controls the operation mode while monitoring the current operating position of the movable role object (for example, the amount of movement from the origin position) based on the detection information from the position detection sensor 82. Furthermore, the performance control board 30 monitors malfunctions in the operation of the movable role object based on the detection information from the position detection sensor 82, and if a malfunction occurs, it detects it as an error.

[0073] In addition, the performance control board 30 is connected to the switches for the performance button 13, cross key 15a, and decision button 15b, which are shown as operation unit 17 in the figure, i.e., the operation detection switches for the performance button 13, cross key 15a, and decision button 15b, and the performance control board 30 is capable of receiving operation detection signals from the performance button 13, cross key 15a, and decision button 15b, respectively.

[0074] Furthermore, the performance control board 30 is provided with a handle sensor 83 (touch sensor) for detecting whether or not the firing operation handle 15 shown in Fig. 1 is being touched by a user such as a player. Based on the detection information of this handle sensor 83, the performance control board 30 is able to determine whether or not the firing operation handle 15 is being touched by a user.

[0075] Based on the performance control command sent from the main control unit 20, the performance control board 30 selects (determines) a performance pattern by lottery or uniquely from multiple types of performance patterns prepared in advance, and controls various performance means at the required timing to produce the desired performance. This realizes the display of a performance image on the liquid crystal display device 36 corresponding to the performance pattern, the playback of sound from the speaker 46, and the lighting and flashing of the decorative lamps 45 and LEDs, and the chronological development of various performance patterns (such as decorative symbol variation display operations and preview performances), thereby realizing a "performance scenario" in the broad sense.

[0076] Here, for the performance control command, the performance control board 30 (performance control CPU 30a) receives and analyzes it by generating an interrupt process based on the input of the above-mentioned strobe signal sent by the main control unit 20 (main control CPU 20a). Specifically, the performance control CPU 30a executes a control program for command reception interrupt processing based on the input of the above-mentioned strobe signal, and in the interrupt process realized by this, it obtains the performance control command and analyzes the command content. In this case, if an interrupt occurs based on the input of a strobe signal, the performance control CPU 30a interrupts the interrupt processing based on another interrupt (a timer interrupt processing that is executed periodically) even if that processing is in progress, and performs command reception interrupt processing, and even if other interrupts occur at the same time, the command reception interrupt processing is given priority.

[0077] <3. Overview of operation> Next, an outline of the gaming operation of the gaming machine 1 realized by the above-described control configuration (FIG. 3) will be described.

[0078] [3.1 Game Status] The gaming machine 1 is configured to be able to set a plurality of types of gaming states in addition to a jackpot game, which is a special gaming state. To facilitate understanding of this embodiment, first, various gaming states will be described.

[0079] In the gaming machine 1, a game progresses in one of the game states that combines either a low probability state or a high probability state with either a non-time-shortening state or a time-shortening state.

[0080] The low probability state is a state in which the probability of winning the jackpot lottery is relatively low, and the high probability state is a state in which the probability of winning the jackpot lottery is relatively high. The non-time-shortening state is a state in which it is relatively difficult for a gaming ball to enter the starting hole 35, and the time-shortening state is a state in which it is relatively easy for a gaming ball to enter the starting hole 35. For example, the opening time of the starting hole 35 when the regular winning lottery is won is set longer in the time-shortening state than in the non-time-shortening state. However, if it is easier for a gaming ball to enter the starting hole 35 in the time-shortening state than in the non-time-shortening state, the time-shortening state may, for example, have a higher probability of winning the regular winning lottery or a shorter fluctuation time of the regular symbol than in the non-time-shortening state.

[0081] In this embodiment, the "normal state" refers to a low probability state and a non-time-saving state, and corresponds to the initial state.

[0082] [3.2 Game with changing symbols] The variable symbol display game will now be described.

[0083] (Special pattern change display game) In the pachinko gaming machine 1 of this embodiment, a "jackpot lottery" is conducted by random number lottery on the main control board 20 based on a predetermined starting condition, specifically, based on the game ball entering (winning) the start hole 34 or the start hole 35. Based on the lottery result, the main control board 20 variably displays special patterns 1 and 2 on the special pattern display devices 38a and 38b to start the special pattern variable display game, and after a predetermined time has passed, the result is derived and displayed on the special pattern display device, thereby ending the special pattern variable display game.

[0084] In this embodiment, the jackpot lottery based on winning at starting hole 34 and the jackpot lottery based on winning at starting hole 35 are conducted separately and independently. For this reason, the jackpot lottery result for starting hole 34 is derived on the special pattern display device 38a side, and the jackpot lottery result for starting hole 35 is derived on the special pattern display device 38b side. Specifically, on the special pattern display device 38a side, on the condition that a gaming ball has entered starting hole 34, special pattern 1 is variably displayed and a first special pattern variable display game is started, while on the special pattern display device 38b side, on the condition that a gaming ball has entered starting hole 35, special pattern 2 is variably displayed and a second special pattern variable display game is started. Then, when the special pattern variable display game is started on the special pattern display device 38a or the special pattern display device 38b, after a predetermined variable display time has elapsed, if the result of the jackpot lottery is a "jackpot", the special pattern being displayed in a static state will be displayed in a predetermined "jackpot" mode, or in a predetermined "miss" mode otherwise, thereby deriving the game result (jackpot lottery result).

[0085] For convenience of explanation, the first special symbol change display game on the special symbol display device 38a side will be referred to as "special symbol change display game 1," and the second special symbol change display game on the special symbol display device 38b side will be referred to as "special symbol change display game 2." Unless otherwise necessary, "special symbol 1" and "special symbol 2" will be simply referred to as "special symbols" (sometimes abbreviated to "special symbols"), and "special symbol change display game 1" and "special symbol change display game 2" will be simply referred to as "special symbol change display games."

[0086] (Decorative pattern changing game) Furthermore, when the above-mentioned special symbol variation display game is started, the decorative symbol variation display game is started by variably displaying decorative symbols (game symbols for dramatic effects) on the main liquid crystal display device 36M, and various effects are developed in association with this. When the special symbol variation display game ends, the decorative symbol variation display game also ends, and a predetermined special symbol indicating the result of the jackpot lottery is displayed on the special symbol display device, and a decorative symbol reflecting the result of the jackpot lottery is derived and displayed on the main liquid crystal display device 36M. In other words, the result of the special symbol variation display game is reflected and displayed by the decorative symbol variation display game for dramatic effects, including the variably displaying operation of the decorative symbols.

[0087] Therefore, for example, if the result of the special symbol variation display game is a "jackpot" (if the result of the jackpot lottery is a "jackpot"), an effect that reflects that result will be developed in the decorative symbol variation display game. Then, when the special symbol is stopped and displayed in a display mode that indicates a jackpot (for example, the 7-segment display shows "7") on the special symbol display device, the decorative symbols are stopped and displayed in a display mode that reflects the "jackpot" in each of the "left," "center," and "right" display areas on the main liquid crystal display device 36M (for example, three decorative symbols are displayed as "7," "7," and "7") in each of the "left," "center," and "right" display areas.

[0088] When this "jackpot" occurs, specifically, the special pattern change display game ends, followed by the decorative pattern change display game, and as a result, the pattern form of the "jackpot" is derived and displayed, and then the large prize opening solenoid 52c of the special variable prize winning device 52 is activated and the opening door 52b opens and closes in a predetermined pattern, thereby opening and closing the large prize opening 50, and a special game state (jackpot game) which is more advantageous to the player than the normal game state is generated. In this jackpot game, the opening door 52b opens or expands the prize area until the opening time of the large prize opening has elapsed for a predetermined time (maximum opening time: for example, 29.8 seconds) or until the number of game balls that have entered the large prize opening (prize balls entering the large prize opening 50) reaches a predetermined number (maximum number of prizes: the upper limit of the number of prize balls allowed for the opening or expanded prize opening with one operation of the device: for example, 9), and when either of these conditions is met, the large prize opening is closed. This "round game" is repeated for a predetermined number of rounds (for example, up to 16 rounds).

[0089] When the jackpot game starts, an opening effect is first performed to notify the player that the jackpot has started, and after the opening effect ends, round games are played multiple times up to a predetermined number of rounds. After the specified number of rounds have ended, an ending effect is performed to notify the player that the jackpot has ended, thereby ending the jackpot game.

[0090] Regarding the information necessary to execute the decorative pattern change display game, first, the main control board 20 conducts a jackpot lottery that includes a 'win / lose lottery (win / lose type lottery)' to draw whether there will be a jackpot or a 'loss', and a 'pattern lottery (win type (win type) lottery)' to draw the type of jackpot if there is a jackpot, and the type of loss if there is a loss, based on the game ball entering (winning) the start port 34 or the start port 35, specifically, on the condition that the game ball is detected by the start port sensor 34a or the start port sensor 35a and the start condition (start condition related to the special pattern) is met (if there is only one type of loss, there is no need to draw a type lottery for the loss, so that lottery can be omitted), and based on the lottery result information, determines the change pattern of the special pattern and the special pattern (hereinafter referred to as the 'special stop pattern') to be finally stopped and displayed depending on the type of win.

[0091] Then, the main control board 20 transmits a "variation pattern designation command" including at least special symbol variation pattern information (for example, information on the jackpot lottery result and the variation time of the special symbols) to the performance control board 30 as a performance control command that specifies the processing state. This sends basic information required for the decorative symbol variation display game to the performance control board 30. In this embodiment, in order to increase the variety of performances, a "decorative symbol designation command" including special stop symbol information (symbol lottery result information (information on the type of win)) is also transmitted to the performance control board 30.

[0092] The special symbol variation pattern information can include information specifying whether or not a specific preview effect (such as a "reach effect" or "pseudo consecutive effect" described below) will occur. Specifically, the variation patterns of the special symbols are roughly divided into a "win variation pattern" in the case of a win and a "miss variation pattern" in the case of a miss, depending on the result of the jackpot lottery. These variation patterns include, for example, a "reach variation pattern" that specifies the occurrence of a reach effect (described below), a "normal variation pattern" that does not specify the occurrence of a reach effect, a "reach variation pattern with pseudo consecutive effects" that specifies the occurrence (overlapping occurrence) of a pseudo consecutive effect and a reach effect, and a "normal variation pattern with pseudo consecutive effects" that specifies the occurrence of a pseudo consecutive effect but does not specify the occurrence of a reach effect. Note that, in order to ensure the duration of the reach effect or pseudo consecutive effect, the variation time of a variation pattern that specifies a reach effect or pseudo consecutive effect is usually set to be longer than that of a normal variation pattern.

[0093] Based on information contained in the effect control commands (here, the variation pattern designation command and the decorative symbol designation command) sent from the main control board 20, the effect control board 30 determines the effect content (effect scenario, such as preview effects) to be developed in chronological order during the decorative symbol variation display game and the decorative symbols (decorative stop symbols) to be ultimately displayed. The effect control board 30 then executes the decorative symbol variation display game by displaying the decorative symbols in a variable manner according to a time schedule based on the variation pattern of the special symbols. As a result, the decorative symbols displayed by the main LCD display device 36M are displayed in a variable manner in time with the variable display of the special symbols by the special symbol display devices 38a and 38b, so that the duration of the special symbol variation display game and the duration of the decorative symbol variation display game are substantially the same. The effect control board 30 also controls the main LCD display device 36M, the light display device 45a, or the sound generating device 46a in accordance with the effect scenario to develop various effects in the decorative symbol variation display game. This allows the main liquid crystal display device 36M to reproduce images (image effects), reproduce sound effects (sound effects), and light and flash the decorative lamps 45, LEDs, etc. (light effects).

[0094] In this way, the special symbol variation display game and the decorative symbol variation display game have an inseparable relationship, and the display results of the special symbol variation display game are reflected in the decorative symbol variation display game, so these two symbol variation display games can be considered as equivalent symbol games. In this specification, unless otherwise necessary, the above two symbol variation display games may be simply referred to as "pattern variation display games."

[0095] (Normal pattern change display game) Furthermore, in the gaming machine 1, when a gaming ball passes (wins) through the normal symbol starting hole 37, a "auxiliary win lottery" is conducted by random number lottery on the main control board 20. Based on the result of this lottery, the normal symbol represented by the LED is displayed variably on the composite display device 38d to start the normal symbol variable display game, and after a certain time has passed, the result is displayed as a combination of lit and unlit LEDs. For example, if the result of the normal symbol variable display game is a "auxiliary win," the normal symbol display section of the composite display device 38d is displayed as a static display in a specific lighting state (for example, all two LEDs 39 are lit, or of the LEDs representing a "circle" and an "x," only the LED on the "circle" side is lit).

[0096] When this "auxiliary win" occurs, the normal electric accessory solenoid 41c (see Figure 3) is activated, which opens the movable wing piece and opens or enlarges the starting hole 35, making it easier for game balls to flow in (starting hole open state), creating an auxiliary game state (hereinafter referred to as "normal electric open game") that is more advantageous to the player than the normal game state. In this normal electric open game, the movable wing piece opens or enlarges the winning area until the opening time of the starting hole 35 has elapsed for a predetermined time (e.g., 0.2 seconds) or until the number of game balls that have entered the starting hole 35 reaches a predetermined number (e.g., 4), and when either of these conditions is met, the starting hole 35 is closed, and this operation is repeated a predetermined number of times (e.g., up to twice).

[0097] (Regarding reservations) In this embodiment, when a winning entry occurs in the start slot 34, 35, or 37 during a special / decorative symbol change display game, a normal symbol change display game, a jackpot game, or a normal power-on game, i.e., when a detection signal is input from the start slot sensor 34a, 35a, or 37a and the corresponding start condition (symbol game start condition) is met, this data is reserved and stored as data related to the right to start the change display game, up to a predetermined maximum number of reserved data (e.g., up to four), excluding data related to the change display. This reserved data not used for the change display operation, or the game balls related to this reserved data, are also referred to as "activated reserved balls." To inform the player of the number of activated reserved balls, a dedicated reserved ball indicator (not shown) located in an appropriate location on the gaming machine 1 or a reserved ball indicator displayed as an icon image on the LCD display 36 (main LCD display 36M or sub LCD display 36S) is illuminated.

[0098] In this embodiment, up to four activation reserved balls for each of special symbol 1, special symbol 2, and normal symbol are reserved and stored in the corresponding storage area of ​​the main control RAM 20c, and are reserved as the number of times the special symbol or normal symbol changes. Note that there is no particular limit on the maximum number of activation reserved balls (maximum reserved memory number) for special symbol 1, special symbol 2, and normal symbol. Also, all or part of the maximum reserved memory number for each symbol may be different, and the number can be determined appropriately depending on the gameplay.

[0099] [3.3 About winning] Next, a "win" in the gaming machine 1 will be described. In the gaming machine 1 of this embodiment, a jackpot lottery (winning lottery) is conducted for multiple types of winnings. In this example, the winning types include, for example, "normal 4R," "normal 6R," "probable 6R," and "probable 10R" belonging to the jackpot type. The above notation "R" means the specified number of rounds (maximum number of rounds).

[0100] The type of jackpot is the hit that triggers the activation of the conditional device. Here, the "conditional device" refers to a device whose operation is a necessary condition for the activation of the consecutive device for playing rounds, and which is activated when a specific combination of special symbols is displayed or when the game ball passes through a specific area inside the jackpot opening.

[0101] The probability variable state is a so-called "number cut probability variable machine (ST machine)" that ends the high probability state and transitions to a low probability state when the special symbol variation display game has been executed a predetermined number of times (for example, 70 times: the specified ST number of times) without winning a jackpot type, and when the specified ST number of times has been completed, the next game will transition to a normal state. However, it may also be a "general probability variable machine" that continues until the next jackpot is won.

[0102] The number of times the special symbol variation display game is executed may be the total number of times the special symbol variation display game 1 and the special symbol variation display game 2 are executed (the total number of changes in special symbol 1 and special symbol 2), or it may be the number of times either one of them is executed (for example, the number of times the special symbol variation display game 2 is executed). In addition, the number of times the time-saving state is executed is not limited to 60 times or 100 times, and can be determined appropriately depending on the gameplay. In addition, there is no particular restriction on the type of winning to be set, and it can be determined appropriately.

[0103] In this example, similar to the jackpot types, multiple types of "losses" are provided. Specifically, three types of losses, "loss 1," "loss 2," and "loss 3," are provided. As mentioned above, if the result of the lottery is a "lose," a lottery for the type of loss will be held in the pattern lottery.

[0104] [3.4 Production] (Performance mode) Next, the presentation modes (presentation states) will be explained. The gaming machine 1 of this embodiment is provided with a plurality of presentation modes for producing presentations related to the game state, and is configured to be able to switch between these presentation modes. Specifically, a normal presentation mode, a time-saving presentation mode, a potential probability presentation mode, and a probability variable presentation mode are provided, which correspond to the normal state, the time-saving state, the potential probability state, and the probability variable state, respectively. In each presentation mode, the background display as the background of the decorative pattern variation display screen is displayed with a different background presentation, so that the player can understand what game state he or she is currently in.

[0105] The presentation control board 30 (presentation control CPU 30a) has a functional unit (presentation state transition control means) that controls transitions between multiple presentation modes. The presentation control board 30 (presentation control CPU 30a) is configured to grasp the current game state and control transitions between multiple presentation modes in a manner that maintains consistency with the game state managed by the main control board 20 based on specific presentation control commands sent from the main control board 20 (main control CPU 20a), specifically, presentation control commands that include game state information managed by the main control board 20. Examples of such specific presentation control commands include a variation pattern designation command, a decorative symbol designation command, and a game state designation command sent when a change occurs in the game state.

[0106] (Preview performance) Next, the preview effects will be explained. The effect control board 30 is configured to be able to control the appearance of various "preview effects" related to the current presentation mode and the result of the jackpot lottery, based on the contents of the presentation control command from the main control board 20, specifically, based on at least the variation pattern information included in the variation pattern designation command. Such preview effects suggest (preview) the expected probability of winning a particular type of win (hereinafter referred to as "expected probability of winning"), and act as "hype effects" to heighten the player's anticipation of winning. Typical preview effects include "reach effects," "pseudo consecutive effects," and even "predictive preview effects." The effect control board 30 functions as a preview effect control means capable of controlling the execution (appearance) of these effects.

[0107] "Reach effect" refers to an effect mode accompanying a reach state (variable display mode accompanying a reach state: reach variation pattern), and more specifically, an effect mode in which the final game result is derived and displayed via a reach state. Reach effects include multiple types of reach effects associated with the probability of winning. For example, there are some in which the probability of winning is relatively higher than when a normal reach effect appears. Such reach effects are called 'super reach effects'. Many of these "super reaches" have a relatively longer presentation time (variation time) than normal reaches to increase the expectation of winning. Furthermore, normal reaches and super reaches include multiple types of reach effects. In this example, super reaches include multiple types of reach effects, namely Super Reach 1, 2, 3, and 4, and the probability of winning of these Super Reaches 1 to 4 has the following relationship: "Super Reach 1 < Super Reach 2 < Super Reach 3 < Super Reach 4."

[0108] "Pseudo consecutive effects" refers to an effect mode accompanied by a pseudo continuous change display state (pseudo consecutive changes) of decorative symbols, and "pseudo consecutive changes" refers to a change display mode in which, during a decorative symbol change display game, some or all of the decorative symbols are temporarily stopped, and then a change display operation of the decorative symbols is executed again from that temporary stop state, and this display operation is repeated once or multiple times. In this respect, it differs from the "prediction notice effect (continuous notice effect)" described below, which is developed across multiple symbol change display games. The occurrence rate (appearance rate) of such "pseudo consecutive effects" is basically set so that the more pseudo changes there are, the higher the probability of winning. For example, depending on the number of pseudo changes, effects that stimulate expectations such as a super reach are more likely to be selected.

[0109] "Prediction prediction effect" (hereinafter sometimes abbreviated as "prediction prediction" or "prediction effect") refers to an effect that notifies the player of the possibility of being controlled to an advantageous state before the variable display of the symbol to be judged is carried out based on the results of the prediction judgment. "Advantageous state" means a state that is advantageous to the player. Specifically, the pre-reading effect in this example is performed in a presentation mode that can notify the winning expectation in advance of an activation reserved ball (an unconsumed activation reserved ball) that has not yet been used for the execution of a pattern change display game (the operation of displaying the variation of special patterns), by mainly utilizing the reserved display mode and the background presentation of the pattern change display game that is executed first, before the activation reserved ball is used for the pattern change display game. In addition to the above-mentioned "reach presentation," various presentations such as the so-called "SU (step-up) notice presentation," "timer notice presentation," "revival presentation," and "premium notice presentation" are generated in the pattern change display game, to liven up the game content.

[0110] Here, with reference to FIG. 4, the "hold change notice effect" will be described as an example of the above-mentioned look-ahead notice effect. In the gaming machine 1 of this embodiment, the upper display area of ​​the screen of the main liquid crystal display device 36M is provided with a display area for displaying the decorative symbol change display game (a display area for displaying decorative symbol change display effects and preview effects), and the lower display area of ​​the screen is provided with a reserved display area 76 (reserved display sections a1 to d1) that displays the number of activated reserved balls on the special symbol 1 side, and a reserved display area 77 (reserved display sections a2 to d2) that displays the number of activated reserved balls on the special symbol 2 side. The presence or absence of activated reserved balls is notified by a predetermined reserved display mode. Figure 5 shows an example in which the presence or absence of activated reserved balls is indicated by a lit state (activated reserved ball present: "○ (white circle)" shown in the figure) or an unlit state (no activated reserved ball present: dashed circle shown in the figure), and information regarding the current number of activated reserved balls is notified.

[0111] The display (reserved display) indicating the presence or absence of activated reserved balls is displayed sequentially in the order of occurrence (winning order), and in each reserved display area 76, 77, the leftmost activated reserved ball is displayed as the activated reserved ball that occurred first on the time axis (i.e., the oldest) among all activated reserved balls in that reserved display. Also, to the left of the reserved display areas 76, 77, a changing display area 78 is provided to indicate the activated reserved ball currently being used in the special symbol variable display game. In this embodiment, the changing display area 78 is configured to display an image in which the icon of the game-in-progress reserved ball K currently being used in the game is placed on the icon of the seat J. That is, when the variable display of special symbol 1 or special symbol 2 begins, the icon (icon image) of the oldest reserved ball a1 or a2 displayed in the reserved display area 76, 77 moves to the icon of the seat J in the changing display area 78 as the icon of the game-in-progress reserved ball K, and this state is maintained for a predetermined display time.

[0112] When an activated pending ball occurs, the main control board 20 sends a "pending addition command" to the performance control board 30, which specifies the advance reading judgment information related to the jackpot lottery result and the number of activated pending balls at the time of advance reading judgment (the number of currently existing activated pending balls, including the activated pending ball that has occurred this time) (see steps S1309 to S1312 in Figure 28). In this embodiment, the above-mentioned reserve addition command is composed of two bytes, and the reserve addition command is composed of data on the upper byte side that enables the number of active reserved balls to be identified at the time of the pre-reading judgment, and data on the lower byte side that enables the pre-reading judgment information to be identified.

[0113] As can be understood from the above explanation, in this embodiment, when a winning entry occurs in the start hole 34 or the start hole 35 and a new reserved ball is generated, a jackpot lottery is held for the symbol variation display game related to the reserved ball as a pre-reading judgment for the reserved ball. As will be described later, the main control board 20 reserves and stores information representing the result of the jackpot lottery held as such a pre-reading judgment in a corresponding storage area of ​​the main control RAM 20c. The information on the jackpot lottery result obtained at the time of the look-ahead judgment is used to select (lottery) the pattern variation pattern in the pattern variation display game, and can be said to be "variation pattern selection information." Therefore, it can be said that the main control board 20 performs the look-ahead judgment and reserves and stores the "variation pattern selection information" obtained as a result in a predetermined area of ​​the main control RAM 20c.

[0114] When the performance control board 30 receives the above-mentioned hold addition command sent by the main control board 20, it performs performance control processing for the "pre-reading notice performance" as part of the display control processing related to the above-mentioned hold display based on the pre-reading judgment information contained therein. Specifically, it performs a "pre-reading notice lottery" to draw whether or not the pre-reading notice performance can be executed, and if it is won, it makes the pre-reading notice performance appear.

[0115] Here, the pre-reading judgment information is specifically game information obtained by pre-reading the jackpot lottery result (jackpot lottery result at the start of the variation) executed when the activation reserved ball is provided to the pattern variation display game in the main control board 20 and the variation pattern at the start of the variation. That is, this information includes at least information that pre-reads and judges the lottery result at the start of the variation (pre-reading win / loss information), and can also include information that pre-reads and judges the pattern lottery result (pre-reading pattern information) and information that pre-reads and judges the variation pattern at the start of the variation (pre-reading variation pattern information). The information included in the reserved addition command to be sent to the performance control board 30 can be determined appropriately depending on the content to be notified in the pre-reading notice. In this example, the pending addition command includes pre-reading winning / losing information, pre-reading pattern information, and pre-reading variation pattern information.

[0116] It should be noted that the "pre-read fluctuation pattern" obtained by the pre-read judgment when the activation pending ball occurs does not necessarily have to be the "fluctuation pattern at the start of fluctuation" itself obtained when the activation pending ball is actually used for the fluctuation display operation. For example, to explain a representative case where the fluctuation pattern at the start of fluctuation is a fluctuation pattern that specifies "Super Reach 1", in this case, it is possible to specify that the content specified by the pre-read fluctuation pattern is not the type of reach performance itself called "Super Reach 1", but rather its essential "Super Reach type".

[0117] In this embodiment, if the advance notice lottery is won, a "hold display change" advance notice performance (also referred to as a "hold change notice") is performed in which the hold icon that is the subject of the advance notice among the hold icons in the hold display sections a1 to d1, a2 to d2 is changed from the white of the normal hold display (normal hold display mode) to a hold display (special hold display mode) with a notice display of blue, green, red, or a danger pattern (or special colors or patterns such as rainbow colors). In Figure 5, the hatched reserved ball in the reserved display section b1 is shown as an example of a change to a special reserved display. Here, the display of the reserved icon in blue, green, red, and danger pattern indicates a higher probability of winning in this order, and the display of the reserved icon in danger pattern is a premium reserved icon that indicates an extremely high probability of winning a jackpot.

[0118] (Direction means) Various effects in the gaming machine 1 are produced by the effect means provided in the gaming machine 1. These effect means may be any stimulus transmission means capable of producing effects by appealing to human senses, such as sight, hearing, or touch. Representative examples include light-generating means (light display device 45a: light effect means) such as decorative lamps 45 and LED devices, sound-generating devices (sound generating device 46a: sound effect means) such as speakers 46, effect display devices (display means) such as the main LCD display device 36M and the sub-LCD display device 36S, pressure devices that transmit contact pressure to the operator's body, wind pressure devices that apply wind pressure to the player's body, and movable gadgets that produce visual effects through their movement. Here, effect display devices, like image display devices, are visually appealing displays, but differ from image display devices in that they also include devices that do not rely on images (e.g., 7-segment displays). The term "image display device" primarily refers to a type that produces effects by displaying images; devices that produce effects through means other than images, such as 7-segment displays, are included within the concept of effect display devices.

[0119] <4. Opening and closing structure and board layout> The configuration shown in Figure 3 is actually realized via multiple boards. Below, we will explain the arrangement of some of the boards installed in the gaming machine 1. We will also explain the opening and closing structure of the gaming machine 1 in relation to the installation position of the boards.

[0120] FIG. 5 shows the door 6 in an open state. When the door 6 is opened, the inner frame 2 and the game board 3 attached to the inner frame 2 are directly exposed. The board arranged on the door 6 and the board arranged on the inner frame 2 are connected by wiring using a harness as a transmission line H8.

[0121] The gaming machine 1 is also configured so that the inner frame 2 can be opened relative to the outer frame 4. Figure 6 shows the state in which the inner frame 2 is open. When the inner frame 2 is opened, the game board 3 attached to the inner frame 2 is also released from the outer frame 4. Figure 6 shows the state in which the back cover 18 attached to the position on the back side of the game board 3 is visible. Although the game board 3 is not shown in Figure 6, the back side of the game board 3 is exposed when the back cover 18 is removed (opened). In reality, the back cover 18 is transparent or semi-transparent, so the back side of the game board 3 can be seen in the state shown in Figure 6. The game board 3 can also be removed from the inner frame 2.

[0122] Thus, the gaming machine 1 is broadly composed of an outer frame 4, an inner frame 2 attached to the outer frame 4, a gaming board 3 attached to the inner frame 2, and a door 6 located in front of the gaming board 3 and the inner frame 2. Various boards are attached to either the gaming board 3, the inner frame 2, or the door 6.

[0123] Figure 7 shows the positions of some of the boards attached to the game board 3. Note that Figure 7 shows the boards attached to the back side of the play area 3a when the game board 3 is viewed from the rear side. Therefore, the right side of the figure is the left side when the game board 3 is viewed from the front side. In the figure, the outline of the frame of the game board 3 is shown with a dashed line to indicate the position.

[0124] As shown in the figure, on the back side of the game board 3, the performance control board 30 is placed slightly above the center, and the main control board 20 is placed below that. In addition, a liquid crystal control board 901 is placed so as to overlap with the performance control board 30, and a ROM board 902 and a liquid crystal interface board 903 are placed nearby.

[0125] An LED connection board 700 is disposed on the left side of the rear surface of the game board 3, and a power supply module board 904 is disposed near the top thereof. In addition, an upper connection board 905 is disposed above the game board 3.

[0126] Near the main control board 20, a relay board 760, a decorative board 740, a left backside relay board 720, a game board connection board 906, a bottom backside relay board 800, and a frame LED relay board 840 are arranged.

[0127] Furthermore, LED boards 780 and 790 and a decorative board 820 are available as boards that are attached to movable accessories (not shown) that are attached to the game board.

[0128] 8 shows the positions of some of the circuit boards attached to the door 6 as seen from the front side of the gaming machine 1. As a guide to the positions of the components inside the gaming machine 1, the door 6, the effect button 13, the firing operation handle 15, and the upper speaker 46 are shown by dashed lines.

[0129] A relay board 550 is provided above the door 6 . Similarly, a side unit upper LED board 630 is provided above the door 6, a side unit upper right LED board 600 is provided at the top right of the door 6, and a side unit lower right LED board 620 is provided below that. The side unit upper right LED board 600, side unit lower right LED board 620, and side unit upper LED board 630 are attached inside the side unit 10 (see FIG. 1), and when the side unit 10 is attached to the door 6, each board is positioned as shown in FIG.

[0130] A frame left LED board 907 is disposed at the upper left side of the door 6, and a frame left lower LED board 908 is disposed below it. In addition, a front frame LED connection board 500 is disposed below the door 6. In addition, a button LED connection board 640 is arranged at the bottom right, and a button LED board 660 is arranged inside the performance button 13.

[0131] Next, we will explain the position of the board attached to the inner frame 2. Figure 9 is a view of the gaming machine 1 as seen from the back. Most of the back side of the gaming machine 1 is protected by a transparent or semi-transparent back cover 18. Below this rear side, a power supply board 300 and a dispensing control board 29 are arranged in front and behind. Also, an inner frame LED relay board 400 is attached to the lower right side when viewed from the rear side.

[0132] 10 shows the positions of various devices arranged on the door 6 and the game board 3. The outlines of the game board 3 and the door 6 are shown by dashed lines to indicate the position of each device.

[0133] 10, the devices provided in the side unit 10 of the door 6 are a side unit device 101, a side unit lower right movable object position detection switch 102, a side unit lower right movable object motor 103, a side unit upper right movable object motor 104, a side unit upper right movable object solenoid 105, a blower 106, and photocouplers PC1F, PC2F, and PC3F, which are arranged at the positions shown in the figure. The photocouplers PC1F, PC2F, and PC3F are attached to the side unit lower right LED board 620.

[0134] In addition, in Figure 10, the devices attached to the game board 3 include a lower rear movable object upper position detection switch 120, a lower rear movable object right position detection switch 121, a distribution position detection switch 122, a lower front movable object position detection switch 123, a lower front movable object motor 124, a lower rear movable object left position detection switch 125, a lower rear movable object left motor 126, a lower rear movable object lower right position detection switch 127, a lower rear movable object lower left position detection switch 128, an upper movable object left motor 129, an upper movable object left position detection switch 130, a left movable object motor 131, an upper movable object position detection switch 132, an upper movable object right motor 133, a left movable object position detection switch 134, and a lower rear movable object right motor 135, each of which is arranged at the positions shown in the figure.

[0135] 7, 8, and 9 are merely a portion of the boards provided in the gaming machine 1. In particular, they illustrate the main boards that will be the subject of the following explanation. Furthermore, the devices shown in FIG. 10 are only a part of the devices provided in the gaming machine 1.

[0136] <5. Board connection configuration> [5.1 Connection status of each board] The connection configuration of each board arranged as described above will be explained, and the supply path of the power supply voltage will be mentioned.

[0137] FIG. 11 shows an example of the boards arranged on the game board 3, the inner frame 2, and the door 6, respectively. In this case, the boards mounted on the game board 3 are the main control board 20, the performance control board 30, the frame LED relay board 840, the LED connection board 700, the back left relay board 720, the decorative board 740, the relay board 760, the LED board 780, the LED board 790, the relay board 910, and the LED board 920. The boards mounted on the inner frame 2 include a power supply board 300, a dispensing control board 29, and an inner frame LED relay board 400. The boards mounted on the door 6 include a front frame LED connection board 500, a relay board 550, a side unit upper right LED board 600, a side unit lower right LED board 620, a side unit upper LED board 630, a button LED connection board 640, and a button LED board 660.

[0138] Each of these boards is a part of the boards mounted on the gaming machine 1, and there are various types of boards other than those shown in the figure that are mounted on the gaming board 3, inner frame 2, and door 6. This Figure 11 shows the connection system of selected boards for use in explaining the technology as an embodiment of the present invention, and does not show all of the boards.

[0139] The power supply board 300 is a board that supplies DC voltage as operating power to each part based on AC input power. The main control board 20, the performance control board 30, and the payout control board 29 are as described in Figure 3.

[0140] The front frame LED connection board 500 is a board for supplying operation control signals and power supply voltage to the LEDs provided on the door 6, the motors of the movable bodies, the solenoids, the blowers, and other performance means.

[0141] The side unit upper right LED board 600, the side unit lower right LED board 620, and the side unit upper LED board 630 are boards arranged inside the side unit 10, and constitute a drive control system for the LEDs and the modes of the movable props. These boards also constitute a detection system that transmits detection signals from the motor position sensors, touch sensors, and various other sensors to the performance control board 30. As described above, the side unit 10 is attached to the door 6 as one of the decorative units, and the side unit 10 is detachable and replaceable with respect to the door 6. The side unit upper right LED board 600, the side unit lower right LED board 620, and the side unit upper LED board 630 are detachable along with the side unit 10. When the side unit 10 is mounted and the relay board 550 and the transmission line H10 of the upper right LED board 600 of the side unit are connected, the electrical configuration shown in FIG. 11 is obtained.

[0142] The button LED board 660 configures the LEDs in the effect buttons 13 and their light emission drive system, and also includes circuits for transferring detection signals from various detection sensors. The button LED connection board 640 relays control signals and power supply voltage to the button LED board 660, and also transfers detection signals from various sensors.

[0143] The inner frame LED relay board 400 relays signals between the frame LED relay board 840, which is connected to the performance control board 30, and the front frame LED connection board 500, and also performs the necessary signal processing and generates and supplies power supply voltage. The frame LED relay board 840 relays the signal path between the inner frame LED relay board 400 and the performance control board 30.

[0144] The LED boards 780 and 790 are mounted with LEDs on the game board 3 and drive the LEDs to emit light. The relay board 760 relays the LED light emission drive signals. The LED boards 780 and 790 and the relay board 760 are attached to the movable accessory. The decorative board 740 relays and drives other LED boards. The rear left relay board 720 performs relaying. The LED board 920 is equipped with an LED. Relay board 910 will be broadcasting live. The LED connection board 700 performs various signal processing required to drive the light emission of performance means such as LEDs and motors based on control signals from the performance control board 30.

[0145] These boards are electrically connected by harnesses and cables via transmission lines H. "Transmission lines H" is a general term for the transmission lines H1, H2, ... H31 shown in the figure. In each transmission line H, the individual wiring paths that transmit signals, power supply voltages, etc. are also simply called "lines." A transmission line H refers to a set of one or more lines. The transmission line H includes various forms such as a flexible harness, a flexible substrate, a wire harness, etc. The transmission line H may be an integrated line of multiple lines, or individual lines may be bound together with a binder, tape, etc. Furthermore, when connectors are directly connected to each other, the terminals of the connectors become the transmission line H. In other words, even when there is no wire material such as a harness, it is included in the "transmission line H". That is, the transmission line H does not refer to a specific type or shape, but rather refers broadly to anything that forms electrical wiring between substrates, etc.

[0146] The power supply board 300 and the dispensing control board 29 are connected by a transmission line H1. The power supply board 300 and the inner frame LED relay board 400 are connected by a transmission line H3. These transmission lines H1 and H3 are formed by harnesses or the like arranged within the inner frame 2.

[0147] The power supply board 300 and the performance control board 30 are connected by a transmission line H2. The dispensing control board 29 and the main control board 20 are connected by a transmission line H4. The inner frame LED relay board 400 and the frame LED relay board 840 are connected by a transmission line H7. These transmission lines H2, H4, and H7 are formed by harnesses or the like that connect the inner frame 2 and the game board 3 across each other.

[0148] The main control board 20 and the performance control board 30 are connected by a transmission line H5. The performance control board 30 and the frame LED relay board 840 are connected by a transmission line H6. The performance control board 30 and the LED connection board 700 are connected by a transmission line H20. The LED connection board 700 and the rear left relay board 720 are connected by a transmission line H21. The rear left relay board 720 and the decorative board 740 are connected by a transmission line H22. The decorative substrate 740 and the relay substrate 760 are connected by a transmission line H23. The transmission line H23 may be a flexible cable for connection to the relay substrate 760 attached to the movable accessory. The relay board 760 and the LED board 780 are connected by a transmission line H24. The LED board 780 and the LED board 790 are connected by a transmission line H25. The LED connection board 700 and the relay board 910 are connected by a transmission line H30. The relay board 910 and the LED board 920 are connected by a transmission line H31. These transmission lines H5, H6, H20, H21, H22, H23, H24, H25, H30, and H31 are formed by harnesses arranged within the game board 3.

[0149] The inner frame LED relay board 400 and the front frame LED connection board 500 are connected by a transmission line H8. This transmission line H8 is formed by a harness or the like that connects the inner frame 2 and the door 6 across the space between them.

[0150] The front frame LED connection board 500 and the relay board 550 are connected by a transmission line H9. The relay board 550 and the side unit upper right LED board 600 are connected by a transmission line H10. The side unit upper right LED board 600 and the side unit lower right LED board 620 are connected by a transmission line H11. The side unit upper right LED board 600 and the side unit upper LED board 630 are connected by a transmission line H12. The front frame LED connection board 500 and the button LED connection board 640 are connected by a transmission line H15. The button LED connection board 640 and the button LED board 660 are connected by a transmission line H16. These transmission lines H9, H10, H11, H12, H15, and H16 are formed by harnesses or the like arranged inside the door 6.

[0151] Between these boards, the transmission lines mentioned above carry out the transmission of control signals for effects such as LED illumination, motor-driven operation of movable props, sound output, sensor signals for performance control, and even power supply voltage.

[0152] Here, FIG. 11 shows a serial output circuit 30d in the performance control board 30 that outputs light emission drive data as serial data mainly for the performance of LED light emission operation. As previously explained in Fig. 3, output control board 30 generates serial data for controlling the operation of the optical display and movable body accessory motor 80c, and supplies this data to lamp driver section 45d and motor driver section 80d from serial output circuit 30d. In Fig. 11, serial output circuit 30d outputs two lines of serial data via transmission lines H20 and H6.

[0153] The serial output circuit 30d outputs drive data for effects to be supplied to the boards on the gaming board 3 via the transmission line H20 to the LED connection board 700. The drive data for effects includes light emission drive data for controlling LED light emission, motor drive data for operating motors for movable role objects, etc. The serial output circuit 30d also outputs drive data for effecting the display to the frame LED relay board 840 via the transmission line H6. In this way, the performance control board 30 outputs drive data by serial data, which can be broadly divided into drive data to the game board 3 side and drive data to the frame / door side.

[0154] [5.2 Side unit upper right LED board 600] Below, we will explain the circuit configuration of some of the boards shown in Figure 11. In particular, we will explain the circuit configuration of boards equipped with LED drivers and full-color LED chips. The boards that fall under this category and will be explained below are the side unit upper right LED board 600, the side unit lower right LED board 620, the side unit upper LED board 630, the button LED board 660, the LED board 780, the LED board 790, and the LED board 920.

[0155] The transmission lines H1 to H31 may be collectively referred to as "transmission line H." Furthermore, the connectors shown in each figure are collectively referred to as "connector CN." In this specification, "connector CN" refers to the connector terminal components provided on the board. The terminal portion for connector connection formed at the end of the transmission line H will be called the "transmission line end." The "connector CN" is connected to the "transmission line end." Alternatively, the "connector CN" may be directly connected to another connector CN of a corresponding shape.

[0156] For the purpose of explanation, the terms "upstream" and "downstream" are used, but in terms of data and control signals, the main control board 20 is the most upstream, followed by the performance control board 30, and the "downstream" direction is from the performance control board 30 toward the actual performance devices such as LEDs and motors. With regard to the power supply voltage, power supply board 300 is the most upstream, and is "downstream" toward the actual performance device.

[0157] First, we will explain the inner frame 2 and the board on the door 6 side. The side unit upper right LED board 600 will be described with reference to Figures 12, 13, 14, 15, 16, and 17. These figures show the circuit configurations provided on the side unit upper right LED board 600 separately.

[0158] The side unit upper right LED board 600 is equipped with connectors such as connector CN1E in FIG. 12, connector CN7E in FIG. 13, connectors CN2E and CN3E in FIG. 14, and connectors CN4E, CN5E, and CN6E in FIG.

[0159] 12 is connected to the end of a transmission line H10 that connects to the connector of the relay board 550 shown in FIG. This connector CN1E has 20 terminals, numbered "1" to "20," from pin 1 to pin 20, and the terminal assignments are as follows:

[0160] The four pins, pins 3, 9, 11, and 16, are ground terminals. The first pin is the terminal for 5V DC voltage (DC5VB). The two pins, pins 5 and 7, are terminals for 12V DC voltage (DC12VB).

[0161] The second pin is assigned as the serial data signal S_IN_DATAx, the fourth pin as the load signal S_IN_LOAD, and the sixth pin as the clock signal S_IN_CLK.

[0162] Pin 8 is assigned as the enable signal ENABLE_L, pin 10 is assigned as the clock signal CLK_P, pin 12 is assigned as the reset signal RESET_P, pin 13 is assigned as the clock signal CLK_M, pin 14 is assigned as the serial data signal DATA_P, pin 15 is assigned as the reset signal RESET_M, pin 17 is assigned as the serial data signal DATA_M, pin 18 is assigned as the general-purpose drive signal 1, pin 19 is assigned as the enable signal ENABLE_M, and pin 20 is assigned as the general-purpose drive signal 2.

[0163] Here, the serial data signal S_IN_DATAx is serial data that is obtained by converting signals from various sensors obtained on the downstream board into serial data and then transmitted upstream, ultimately to the performance control board 30. The clock signal S_IN_CLK and the load signal S_IN_LOAD are supplied from the performance control board 30 to the inner frame LED relay board 400, and are further sent to downstream boards such as the front frame LED connection board 500. These are used for serial data transmission operations from the downstream side.

[0164] The enable signal ENABLE_L, clock signal CLK_P, reset signal RESET_P, clock signal CLK_M, serial data signal DATA_P, and signals supplied from the performance control board 30 are used to control the driving of the performance devices.

[0165] The connector CN7E in Fig. 13 is connected to a sensor in the side unit device 101 shown in Fig. 10, and a sense signal SENS2X is input to the third pin. This sensor 101S is, for example, a sensor that detects a player's operation of the side unit device 101. The sense signal SENS2X of the sensor 101S is pulled up by a 5V DC voltage (DC5V) via a resistor R64E. A 12V DC voltage (DC12VB) is applied to the first pin as a power supply voltage on the sensor 101S side of the side unit device 101. The second pin is used as a ground terminal.

[0166] The connector CN2E in FIG. 14 is a six-terminal connector to which the transmission line end of the transmission line H12 that connects to the LED board 630 on the downstream side unit is connected. Pins 1 to 6 of this connector CN2E are assigned as a ground terminal, a terminal for the clock signal CLK, a terminal for the serial data signal DATA, a terminal for the reset signal RESET, a ground terminal, and a terminal for 12V DC voltage (DC12VB).

[0167] The connector CN3E is connected to the end of a transmission line H11 that connects the connector CN3E to the lower right LED board 620 of the downstream side unit. This connector CN3E has 16 terminals, numbered from pin 1 to pin 16, as indicated by the numbers "1" to "16."

[0168] The first pin is the terminal for 5V DC voltage (DC5VB). Pins 8 and 13 are ground terminals. Pin 15 is the terminal for the 12V motor drive voltage (MOT12V). A Zener diode D11E is connected between pin 15 and ground as a protection circuit.

[0169] The second pin is assigned as the clock signal CLK, the third pin is assigned as the sense signal SENS1X, the fourth pin is assigned as the serial data signal DATA, the fifth pin is assigned as the sense signal SENS_A, the sixth pin is assigned as the reset signal RESET, the seventh pin is assigned as the sense signal SENS_B, and the ninth pin is assigned as the sense signal SENS_C. As shown in FIG. 13, the sense signal SENS1X is pulled up by a 5V DC voltage (DC5V) via a resistor R13E. The sense signals SENS_A, SENS_B, and SENS_C are also pulled up by a 5V DC voltage (DC5V) via resistors R29E, R27E, and R21E, respectively.

[0170] Furthermore, the connector CN3E in FIG. 14 has the 10th pin assigned as the motor drive signal MOT1- / 2, the 12th pin assigned as the motor drive signal MOT1- / 1, the 14th pin assigned as the motor drive signal MOT1-2, and the 16th pin assigned as the motor drive signal MOT1-1. Zener diodes D10E, D12E, D13E, and D14E are connected between pins 10, 12, 14, and 16 and ground, respectively, as protection circuits.

[0171] 16 is connected to the side unit upper right movable motor 104 (see FIG. 10). The first pin of this connector CN4E is a terminal for a 12V motor drive voltage (MOT12V), and the second pin is a terminal for a vibration control signal L_VIB.

[0172] The connector CN5E is connected to the side unit upper right movable solenoid 105 (see FIG. 10). The first pin of this connector CN5E is a terminal for a 12V motor drive voltage (MOT12V), and the second pin is a terminal for a solenoid control signal L_SOL_01.

[0173] The connector CN6E is connected to the blower 106 (see FIG. 10) on the side unit. The first pin of this connector CN6E is a terminal for a 12V motor drive voltage (MOT12V), and the second pin is a terminal for the blower control signal L_BRO.

[0174] The conductor points P1 and P2 on the housings of the connectors CN2E, CN3E, CN4E, CN5E, CN6E, and CN7E are connected to ground for mounting strength.

[0175] The power supply voltage for this side unit upper right LED board 600 will be described. The side unit upper right LED board 600 is equipped with the following ICs: a buffer circuit 601 in Fig. 13, a buffer circuit 604 in Fig. 14, and a buffer circuit 607 in Fig. 16. These buffer circuits 601, 604, and 607 are Schmitt trigger buffers with eight CMOS circuits, and buffer signals input to pins 2 (A1 terminal) to 9 (A8 terminal), i.e., perform signal compensation (restore degraded H / L signal waveforms), and output the signals from pins 18 (Y1 terminal) to 11 (Y8 terminal), respectively. That is, a signal input to the A1 terminal is buffered and output from the Y1 terminal, a signal input to the A2 terminal is buffered and output from the Y2 terminal, and so on, and a signal input to the A8 terminal is buffered and output from the Y8 terminal. Buffering refers to signal compensation processing such as signal amplification and waveform shaping, but since it primarily targets pulse signals as digital data, it has a greater connotation of waveform shaping. Below, these processes will be referred to as "buffering" or "signal compensation."

[0176] A 5V DC voltage (DC5V) is used as the power supply voltage for these buffer circuits 601, 604, and 607. The 5V DC voltage (DC5V) is the voltage on the positive side of a capacitor C1E via a fuse F1E, with respect to a 5V DC voltage (DC5VB) supplied from the first pin of a connector CN1E in FIG.

[0177] 13 are mounted as ICs, and the power supply voltage for these is also 5V DC (DC5V). The P / S conversion circuits 602 and 603 are CMOS 8-bit shift registers that have 8-bit parallel input / output, serial input, and serial output, and perform parallel-to-serial conversion of data. When the P / S CONT terminal is low, the eight terminals Q / D1 to Q / D8 become parallel outputs, and data from the SI terminal is stored in each register at the rising edge of the input waveform to the CK terminal and output to the Q / D1 to Q / D8 terminals. In addition, by setting the CLR / LOAD terminal to low, each register is reset asynchronously with the input to the CK terminal. When the P / S CONT terminal is high, the eight terminals Q / D1 to Q / D8 become parallel inputs, and when the CLR / LOAD terminal is low, the input data of terminals Q / D1 to Q / D8 is stored in each register asynchronously with the CK terminal input.

[0178] Furthermore, an LED driver 605 shown in FIG. 15 and an S / P conversion circuit (LED driver) 606 shown in FIG. 16 are mounted as ICs, and the power supply voltage for these is a 12V DC voltage (DC12VB) supplied from the 5th and 7th pins of the connector CN1E. In this case, the 12V DC voltage (DC12VB) is taken out as a voltage on the positive electrode side of the capacitor C2E via the fuse F2E from the fifth and seventh pins of the connector CN1E in FIG.

[0179] Furthermore, motor drivers 608 and 609 shown in FIG. 16 are mounted as ICs, and these use a 12V motor drive voltage (MOT12V) and a 12V DC voltage (DC12VS) as power supply voltages.

[0180] The 12V motor drive voltage (MOT12V) is separated from the 12V DC voltage (DC12VB). 17, the anode side of a Schottky barrier diode D8E is connected to the line of a 12V DC voltage (DC12VB). A resistor R23E, capacitors C10E and C11E, and a chip varistor 611 are connected in parallel between the cathode side of the Schottky barrier diode D8E and ground. With this configuration, the 12V motor drive voltage (MOT12V) is isolated as a power supply voltage with overvoltage protection. As shown in the figure, the 12V DC voltage (DC12VS) is separated from the 12V DC voltage (DC12VB) using a circuit consisting of a diode D7E, a resistor R17E, and a capacitor C8E.

[0181] The flow of various signals in the side unit upper right LED board 600 will be described below. The connector CN1E in Figure 12 receives the load signal S_IN_LOAD, clock signal S_IN_CLK, enable signal ENABLE_L (reset signal RESET_M), clock signal CLK_P, reset signal RESET_P, and serial data signal DATA_P from the upstream relay board 550, and these signals are supplied to the buffer circuit 601 in Figure 13 via damping resistors R66E, R9E, R11E, and R12E, where they are compensated. In addition, the signal paths of these signals are provided with protection circuits, as shown in Figure 12, consisting of resistor R3E and Zener diode D2E, resistor R6E and Zener diode D3E, resistor R66E and Zener diode D15E, resistor R9E and Zener diode D6E, resistor R11E and Zener diode D5E, and resistor R12E and Zener diode D15E.

[0182] The clock signal CLK_P, serial data signal DATA_P, and reset signal RESET_P are compensated by buffer circuit 601, and then output as clock signal CLK_A, serial data signal DATA_A, and reset signal RESET_A, and input to buffer circuit 604 in Fig. 14. In this case, the clock signal CLK_A is input to terminals A1 and A5, the serial data signal DATA_A to terminals A2 and A6, and the reset signal RESET_A to terminals A3 and A7. The signals that have been buffered and output from the Y1, Y2, and Y3 terminals are then output as a clock signal CLK, a serial data signal DATA, and a reset signal RESET from the connector CN2E via damping resistors R18E, R19E, and R20E. Furthermore, the signals that have been buffered and output from the Y5, Y6, and Y7 terminals are output from the connector CN3E via damping resistors R24E, R25E, and R26E as a clock signal CLK, a serial data signal DATA, and a reset signal RESET.

[0183] 14 are each branched into two systems before being input to the buffer circuit 604, and are then buffered separately. These are then output from connectors CN2E and CN3E to separate boards as the clock signal CLK, the serial data signal DATA, and the reset signal RESET, respectively. Therefore, the buffer circuit 604 performs buffering while branching into two systems, enabling appropriate buffering after each branch. Furthermore, the clock signal CLK, serial data signal DATA, and reset signal RESET output from connectors CN2E and CN3E in this way are originally the clock signal CLK_P, serial data signal DATA_P, and reset signal RESET_P input from connector CN1E in Fig. 12. As described above, these are buffered by buffer circuit 601 in Fig. 13, output as clock signal CLK_A, serial data signal DATA_A, and reset signal RESET_A, and then branched into two systems at buffer circuit 604 in Fig. 14. In other words, by buffering the signals before branching, attenuation in the transmission path up to that point is compensated for before branching. This ensures a stable signal supply when distributing a common signal to two boards.

[0184] The clock signal CLK_A, serial data signal DATA_A, and reset signal RESET_A output from the buffer circuit 601 in FIG. 13 are also supplied to the LED driver 605 in FIG. The LED driver 605 outputs a light emission drive current according to the clock signal CLK_A, the serial data signal DATA_A, and the reset signal RESET_A.

[0185] The LED driver 605 has 24 drive current terminals DI from terminal 16 to terminal 45. This allows a maximum of 24 systems of drive current to flow, but this LED driver 605 uses 14 terminals: terminals 16, 17, 18, 20, 21, 22, 23, 24, 25, 27, 28, 29, 32, and 33. As shown in the figure, the other drive current terminals DI are connected to ground.

[0186] The 14 drive current terminals DI are assigned in order from terminal 16 to terminal 33 as "N", "N", "N", "N", "N", "G", "R", "B", "G", "R", "B", "G", "R", and "B". "N" indicates that it is assigned to the drive current for a single-color LED chip. "G" indicates that it is assigned to the drive current for the green LED of a full-color LED chip. "R" indicates that it is assigned to the drive current for the red LED of a full-color LED chip. "B" indicates that it is assigned to the drive current for the blue LED of a full-color LED chip. The same is true for the LED drivers in the other figures.

[0187] In the LED driver 605, when it comes to assignment to the full-color LED chips only, the specific color order of "G", "R", and "B" is repeated in the order of the terminal numbers.

[0188] These 14 drive current terminals DI are connected to eight LED circuits formed as the light-emitting unit 612, respectively, and pass light-emitting drive current. The eight LED circuits include five LED circuits using single-color LED chips and three LED circuits using full-color LED chips. As shown in the figure, each LED circuit of the light emitting unit 612 is made up of two or three LED chips (LED1, LED2, . . . ) connected in series and a resistor element.

[0189] In the system corresponding to the drive current terminal DI of terminal 16, single-color LED chips LED1, LED2, and LED3 are connected in series. In the system corresponding to the drive current terminal DI of terminal 17, single-color LED chips LED4, LED5, and LED6 are connected in series. In the system corresponding to the drive current terminal DI of terminal 18, single-color LED chips LED7, LED8, and LED9 are connected in series. In the system corresponding to the drive current terminal DI of terminal 20, single-color LED chips LED10 and LED11 are connected in series. In the system corresponding to the drive current terminal DI of terminal 21, single-color LED chips LED12 and LED13 are connected in series.

[0190] In the systems corresponding to the drive current terminals DI of terminals 22, 23, and 24, full-color LED chips LED14 and LED15 are connected in series. In the systems corresponding to the drive current terminals DI of terminals 25, 27, and 28, full-color LED chips LED16 and LED17 are connected in series. In the systems corresponding to the drive current terminals DI of terminals 29, 32, and 33, full-color LED chips LED18 and LED19 are connected in series. In this example, LED14 to LED19 are all full-color LED chips of the same model number.

[0191] For full-color LED chips, the anodes of the three LED elements are marked with "GA," "RA," and "BA." These indicate the anodes of the green LED, red LED, and blue LED, respectively. The same applies to the full-color LED chips in the other figures.

[0192] The LED circuits of each system are connected in parallel, a 12V DC voltage (DC12VB) is applied to the anode side of each, and the cathode side is connected to the drive current terminal DI. Therefore, depending on the voltage at the drive current terminal DI, a light emission drive current flows from the 12V DC voltage (DC12VB) side to the drive current terminal DI side via the LED circuit. For example, by PWM controlling the voltage of each drive current terminal DI based on a drive control signal (especially a serial data signal DATA), each LED circuit emits an amount of light according to the pulse duty of the corresponding drive current terminal DI. In the case of a full-color LED chip, a variety of emitted colors can be obtained by controlling the light intensity (gradation) of each of G, R, and B.

[0193] In the configuration of this side unit upper right LED board 600, the clock signal CLK_P, serial data signal DATA_P, and reset signal RESET_P input from connector CN1E in Fig. 12 are buffered by buffer circuit 601 in Fig. 13 and then branched. The buffered clock signal CLK_A, serial data signal DATA_A, and reset signal RESET_A are supplied as one branch to LED driver 605 in Fig. 15. The other branch is supplied to buffer circuit 604 in Fig. 14, where it is further branched and buffered before being transmitted to downstream boards from connectors CN2E and CN3E. In this case, the signal for controlling light emission drive is buffered in the buffer circuit 601 and then branched for transmission to the LED driver 605 and downstream boards, thereby ensuring stable transmission and making the buffer circuit configuration more efficient.

[0194] The clock signal CLK_A, serial data signal DATA_A, and reset signal RESET_M output from the buffer circuit 601 in FIG. 13 are supplied to the S / P conversion circuit 606 in FIG. This S / P conversion circuit 606 is configured using a chip that serves as an LED driver. The LED driver is a device that outputs a light-emitting drive current according to a clock signal CLK_L and a serial data signal DATA_L, but in this case, it is used primarily for serial / parallel conversion to drive the motor. In other words, the LED driver chip is used as part of the motor driving means.

[0195] The S / P conversion circuit 606, which is composed of an LED driver chip, is a device that outputs a light-emitting drive current according to a clock signal CLK_A, a serial data signal DATA_A, and a reset signal RESET_M, but in this case, it functions primarily as a serial / parallel conversion circuit for driving a motor. Like the LED driver 605 in FIG. 15 above, the S / P conversion circuit 606 has 24 drive current terminals DI and can output drive currents in 24 systems, but in this case, it uses seven terminals: terminals 17, 18, 20, 21, 22, 23, and 24. As shown in the figure, the other output terminals are connected to ground. The outputs of the seven drive current terminals DI are buffered by a buffer circuit 607 and then supplied to input terminals IN2, IN3, and IN4 of a motor driver 608 and input terminals IN1, IN2, IN3, and IN4 of a motor driver 609.

[0196] The seven drive current terminals DI are connected to a 5V DC voltage (DC5V) via resistors R60E, R61E, R62E, R56E, R57E, R58E, and R59E. This is to allow current to flow through the drive current terminals DI using the 5V DC voltage (DC5V) as a power supply.

[0197] The motor driver 608 outputs a blower control signal L_BRO, a solenoid control signal L_SOL01, and a vibration control signal L_VIB from output terminals OUT2, OUT3, and OUT4 based on signals from input terminals IN2, IN3, and IN4. These blower control signal L_BRO, solenoid control signal L_SOL01, and vibration control signal L_VIB are supplied to connectors CN6E, CN5E, and CN4E, respectively.

[0198] The motor driver 609 outputs motor drive signals MOT1-1, MOT1-2, MOT1- / 1, and MOT1- / 2 from output terminals OUT1, OUT2, OUT3, and OUT4 based on signals from input terminals IN1, IN2, IN3, and IN4. These motor drive signals MOT1-1, MOT1-2, MOT1- / 1, and MOT1- / 2 are supplied to connector CN3E in FIG. Therefore, the circuit from the LED driver 605 to the motor driver 609 forms a circuit system within the side unit upper right LED board 600 that generates a motor drive signal for the side unit lower right LED board 620 on the downstream side.

[0199] The load signal S_IN_LOAD and clock signal S_IN_CLK input from connector CN1E in FIG. 12 are compensated by buffer circuit 601 in FIG. 13 via damping resistors R3E and R6E, and then input to the CLR / LOAD terminal and CK terminal of P / S conversion circuits 602 and 603, respectively, to control the parallel / serial conversion process. In the P / S conversion circuits 602 and 603, when a 5V DC voltage (DC5V) is applied to the P / S CONT terminal, the P / S CONT terminal is set to H, and the eight terminals Q / D1 to Q / D8 are set as parallel inputs.

[0200] At the parallel input terminals Q / D1 to Q / D8 of the P / S conversion circuit 603, sense signal SENS_C is input to the Q / D1 terminal, sense signal SENS_B to the Q / D2 terminal, sense signal SENS_A to the Q / D4 terminal, sense signal SENS1X to the Q / D4 terminal, and sense signal SENS2X to the Q / D5 terminal. The Q / D6, Q / D7, and Q / D8 terminals are connected to ground. The sense signals SENS_A, SENS_B, SENS_C, and SENS1X are input from a connector CN3E, and the sense signal SENS2X is input from a connector CN7E.

[0201] The P / S conversion circuit 603 converts the input sense signals SENS_A, SENS_B, SENS_C, SENS1X, and SENS2X into serial data (serial data signal SDT3) and outputs it from the Q8C terminal. This serial data signal SDT3 is input to the SI terminal of the P / S conversion circuit 602.

[0202] Of the parallel input terminals Q / D1 to Q / D8 of the P / S conversion circuit 602, a 5V DC voltage (DC5V) is applied to the Q / D1 terminal, Q / D2 terminal, and Q / D8 terminal, and the others are connected to ground. The P / S conversion circuit 602 converts the serial data signal SDT3 from the P / S conversion circuit 603 input to the SI terminal and the logic (H / L) of the Q / D1 to Q / D8 terminals together into serial data (serial data signal SDT4) and outputs it from the Q8 terminal. This serial data signal SDT4 is input to the buffer circuit 601 and buffered. This output is transmitted upstream from the connector CN1E via the damping resistor R1E in FIG. 12 as the serial data signal S_IN_DATAx from the upper right LED board 600 of the side unit.

[0203] As described above, the side unit upper right LED board 600 has the following configuration. An enable signal ENABLE_L (reset signal RESET_M), a clock signal CLK_P, a reset signal RESET_P, and a serial data signal DATA_P are input and buffered by a buffer circuit 601. The buffered signals are then used to light an LED, generate a motor drive signal, or are transferred downstream.

[0204] The clock signal S_IN_CLK and the load signal S_IN_LOAD are supplied to P / S conversion circuits 602 and 603 via a buffer circuit 601 and are used for parallel / serial conversion processing. The various sense signals SENS_A, SENS_B, SENS_C, SENS1X, and SENS2X are all converted into serial data to generate the serial data signal S_IN_DATAx. This serial data signal S_IN_DATAx is then sent upstream. Although we will not go into detail, this serial data signal S_IN_DATAx is further converted into serial data along with other sense signals in the front frame LED connection board 500 and is then transmitted to the performance control board 30 via the inner frame LED relay board 400.

[0205] Connector CN1E receives 12V DC voltage (DC12VB) and 5V DC voltage (DC5VB) as operating power. The 12V motor drive voltage (MOT12V) and 12V DC voltage (DC12VS) used to generate motor drive signals are separated from the 12V DC voltage (DC12VB). · 12V DC voltage (DC12VB) and 5V DC voltage (DC5VB) are supplied to the downstream side as operating power supply voltage.

[0206] In addition to those mentioned above, as shown in FIGS. 12 to 17, electronic elements such as resistors R1E, ​​R2E, etc., capacitors C1E, C2E, etc., diodes (including Zener diodes) D1E, D2E, etc. are connected to required locations on the side unit upper right LED board 600. As shown in the figure, taps TP1E, TP2E, etc. are provided and used for connecting to required locations. Although not shown, capacitors are appropriately placed between the DC 5V or DC 12V power supply line and the ground to reduce power supply noise, etc.

[0207] [5.3 Side unit bottom right LED board 620] The side unit lower right LED board 620 will be described with reference to Figures 18 and 19. These figures show the circuit configuration provided on the side unit lower right LED board 620 separately.

[0208] The side unit lower right LED board 620 is equipped with connectors such as connectors CN1F, CN3F, and CN4F in FIG. 18 and connector CN2F in FIG.

[0209] The connector CN3F in FIG. 18 is connected to the end of the transmission line H11 that connects the connector CN3F to the connector CN3E of the upper right LED board 600 of the side unit in FIG. Therefore, this connector CN3F has 16 terminals, from the 1st pin to the 16th pin, as indicated by the numbers "1" to "16", and the terminal assignment is the same as that of the above-mentioned connector CN3E.

[0210] The connector CN1F is connected to the side unit lower right movable motor 103 shown in FIG. A 12V motor drive voltage (MOT12V) is applied to pins 3 and 4. The motor drive signals MOT1- / 2, MOT1- / 1, MOT1-2, and MOT1-1 input from connector CN3F are output from pins 1, 2, 5, and 6.

[0211] The connector CN4F is connected to the side unit lower right movable object position detection switch 102 shown in FIG. Pin 1 is the 12V DC voltage (DC12VB) terminal, Pin 2 is the ground terminal, and Pin 3 is the input terminal for the sense signal SENS1X from the connected position detection switch.

[0212] 19 is connected to an LED board (not shown) arranged in the side unit 10. The first pin is a terminal for 12V DC voltage (DC12VB). The second to fifth pins are terminals for light emission drive signals.

[0213] The conductor points P1 and P2 on the housings of the connectors CN1F, CN2F, CN3F, and CN4F are connected to ground for mounting strength.

[0214] The power supply voltage for this side unit lower right LED board 620 will be described. Photocouplers PC1F, PC2F, and PC3F are mounted on the lower right LED board 620 of the side unit. The power supply voltage for these devices is a 5V DC voltage (DC5V), which is supplied from the first pin of the connector CN3F.

[0215] The LED driver 621 of FIG. 19 is mounted as an IC on the lower right LED board 620 of the side unit, and the power supply voltage for this is 12V DC voltage (DC12VB) supplied from the 11th pin of the connector CN1E. Also, the 12V motor drive voltage (MOT12V) output from the connector CN1F in FIG. 18 is supplied from the 15th pin of the connector CN3F.

[0216] The flow of various signals in the side unit lower right LED board 620 will be described. A clock signal CLK, a serial data signal DATA, and a reset signal RESET are input to the connector CN3F from the side unit upper right LED board 600, and these signals are supplied to the LED driver 621 in FIG. The LED driver 621 outputs a light emission drive current according to the clock signal CLK, the serial data signal DATA, and the reset signal RESET.

[0217] The LED driver 621 has 24 drive current terminals DI, but in this case, 12 terminals, namely, terminals 16, 17, 18, 20, 21, 22, 23, 24, 25, 27, 28, and 29, are used to drive the light emitting unit 622 to emit light.

[0218] Furthermore, four terminals, ie, terminals 39, 40, 41, and 43, are used to drive the LEDs on an LED board (not shown) connected to connector CN2F to emit light. As shown, the other drive current terminal DI is connected to ground.

[0219] The 12 drive current terminals DI corresponding to the light-emitting unit 622 are assigned "G", "R", "B", "G", "R", "B", "G", "R", "B", "G", "R", and "B" in order from terminal 16 to terminal 29. In other words, the assignment for the full-color LED chip is such that the specific color sequence of "G", "R", and "B" is repeated in the order of the terminal numbers.

[0220] These 12 drive current terminals DI are connected to the four systems of LED circuits formed as the light emitting section 622, respectively, and pass light emission drive current therethrough. As shown in the figure, each LED circuit of the light emitting section 622 is composed of one or three full-color LED chips connected in series and a resistor element.

[0221] A full-color LED chip LED1 is connected to the systems corresponding to the drive current terminals DI of terminals 16, 17, and 18. In the systems corresponding to the drive current terminals DI of terminals 20, 21, and 22, full-color LED chips LED2, LED3, and LED4 are connected in series. In the systems corresponding to the drive current terminals DI of terminals 23, 24, and 25, full-color LED chips LED5, LED6, and LED7 are connected in series. In the systems corresponding to the drive current terminals DI of terminals 27, 28, and 29, full-color LED chips LED8, LED9, and LED10 are connected in series. In this example, LED1 to LED10 are all full-color LED chips of the same model number.

[0222] The LED circuits of each system are connected in parallel, with a 12V DC voltage (DC12VB) applied to the anode side of each and the cathode side connected to the drive current terminal DI. Therefore, depending on the voltage of the drive current terminal DI, a light-emitting drive current flows from the 12V DC voltage (DC12VB) side to the drive current terminal DI side via the LED circuit. By PWM-controlling the voltage of each drive current terminal DI based on the serial data signal DATA, the amount of light emitted by the G, R, and B colors of the full-color LED chip can be controlled, resulting in a variety of emitted colors.

[0223] Terminals 39, 40, 41, and 43 of the LED driver 621 are connected to four systems of the light emission drive unit 623. The light emission drive unit 623 outputs light emission drive currents for the four systems from the connector CN2F.

[0224] Sense signals SENS_A, SENS_B, and SENS_C are obtained by photocouplers PC1F, PC2F, and PC3F in Fig. 18. These are sent to the upper right LED board 600 of the side unit from a connector CN3F. Furthermore, the sense signal SENS1X obtained from the connector CN4F is also sent from the connector CN3F to the upper right LED board 600 of the side unit. These sense signals SENS_A, SENS_B, SENS_C, and SENS1X are converted into serial data as described above.

[0225] In addition to those mentioned above, electronic elements such as resistors R1F, R2F, etc., capacitors C1F, C2F, etc. are connected to required locations on the side unit lower right LED board 620, as shown in FIGS. As shown in the figure, taps TP1F, TP2F, etc. are provided and used for connecting to required locations.

[0226] [5.4 Side unit LED board 630] The LED substrate 630 on the side unit will be described with reference to FIG. The LED board 630 on the side unit is equipped with a connector CN1T. The connector CN1T is connected to the end of a transmission line H12 that connects the connector CN1T to the connector CN2E of the upper right LED board 600 of the side unit in FIG.

[0227] Therefore, this connector CN1T has six terminals, from the first pin to the sixth pin, as indicated by the numbers "1" to "6", and the terminal assignment is the same as that of the above-mentioned connector CN2E. The conductor points P1 and P2 on the housing of the connector CN1T are connected to the ground for mounting strength.

[0228] An LED driver 631 is mounted as an IC on this side unit LED board 630, and as the power supply voltage for this, a 12V DC voltage (DC12VB) supplied from the sixth pin of the connector CN1T is used.

[0229] The flow of various signals will be explained below. A clock signal CLK, a serial data signal DATA, and a reset signal RESET are input to the connector CN1T from the side unit upper right LED board 600, and these signals are supplied to the LED driver 631. The LED driver 631 outputs a light emission drive current according to the clock signal CLK, the serial data signal DATA, and the reset signal RESET.

[0230] The LED driver 631 has 24 drive current terminals DI, but in this case, 15 terminals, namely, terminals 16, 17, 18, 20, 21, 22, 23, 24, 25, 27, 28, 29, 32, 33, and 34, are used to drive the light emission of the light emitting unit 632. As shown in the figure, the other drive current terminals DI are connected to ground.

[0231] The 15 drive current terminals DI corresponding to the light-emitting unit 632 are assigned "G", "R", "B", "G", "R", "B", "G", "R", "B", "G", "R", "B", "G", "R", and "B" in order from terminal 16 to terminal 34. In other words, the assignment to the full-color LED chip is such that the specific color sequence of "G", "R", and "B" is repeated in the order of the terminal numbers.

[0232] These 15 drive current terminals DI are connected to the five systems of LED circuits formed as the light emitting section 632, respectively, and pass light emission drive current therethrough. As shown in the figure, each LED circuit of the light emitting section 632 is composed of two full-color LED chips connected in series and a resistor element.

[0233] In the systems corresponding to the drive current terminals DI of terminals 16, 17, and 18, full-color LED chips LED1 and LED2 are connected in series. In the systems corresponding to the drive current terminals DI of terminals 20, 21, and 22, full-color LED chips LED3 and LED4 are connected in series. In the systems corresponding to the drive current terminals DI of terminals 23, 24, and 25, full-color LED chips LED5 and LED6 are connected in series. In the systems corresponding to the drive current terminals DI of terminals 27, 28, and 29, full-color LED chips LED7 and LED8 are connected in series. In the systems corresponding to the drive current terminals DI of the 32nd, 33rd, and 34th terminals, full-color LED chips LED9 and LED10 are connected in series. In this example, LED1 to LED10 are all full-color LED chips of the same model number.

[0234] The LED circuits of each system are connected in parallel, with a 12V DC voltage (DC12VB) applied to the anode side of each and the cathode side connected to the drive current terminal DI. Therefore, depending on the voltage of the drive current terminal DI, a light-emitting drive current flows from the 12V DC voltage (DC12VB) side to the drive current terminal DI side via the LED circuit. By PWM-controlling the voltage of each drive current terminal DI based on the serial data signal DATA, the amount of light emitted by the G, R, and B colors of the full-color LED chip can be controlled, resulting in a variety of emitted colors.

[0235] In addition to the above, electronic elements such as resistors R1T, R2T···, capacitors C1T, C2T···, etc. are connected to required locations on the side unit LED board 630 as shown in FIG. As shown in the figure, taps TP1T, TP2T, etc. are provided and used for connecting to required locations.

[0236] [5.5 Button LED board 660] The button LED board 660 will be described with reference to Figures 21 and 22. These figures show the circuit configuration provided on the button LED board 660 separately.

[0237] The button LED board 660 is equipped with the connector CN1H shown in FIG. The connector CN1H is connected to the end of a transmission line H16 that connects to the connector of the upstream button LED connection board 640 (see FIG. 11). Therefore, this connector CN1H has seven terminals, numbered "1" to "7," from pin 1 to pin 7, and the terminal assignments are as follows:

[0238] A 12V DC voltage (DC12VB) is applied to the third and seventh pins, which serves as the power supply voltage for the button LED board 660. The first and sixth pins are used as ground terminals. The second, fourth, and fifth pins are terminals for the clock signal CLK, the serial data signal DATA, and the reset signal RESET, respectively. In addition, the conductor points P1 and P2 on the housing of the connector CN1H are connected to ground for mounting strength.

[0239] This button LED board 660 is supplied with a 12V DC voltage (DC12VB) as a power supply voltage input to a connector CN1H. The button LED board 660 is equipped with an LED driver 661 of FIG. 21 and an LED driver 663 of FIG. 22 as ICs, and a 12V DC voltage (DC12VB) is used as the power supply voltage for these. The power supply voltage for the light emitting units 664 and 662 is also 12V DC voltage (DC12VB).

[0240] The flow of various signals in the button LED board 660 will be described. A clock signal CLK, a serial data signal DATA, and a reset signal RESET are input to the connector CN1H from the side unit upper right LED board 600, and these signals are supplied to the LED driver 661 via the chip resistor RA1H in FIG. The LED driver 661 outputs a light emission drive current according to the clock signal CLK, the serial data signal DATA, and the reset signal RESET.

[0241] The LED driver 661 has 24 drive current terminals DI as terminals 16, 17, 18, 20, 21, 22, 23, 24, 25, 27, 28, 29, 32, 33, 34, 36, 37, 38, 39, 40, 41, 43, 44, and 45, which are used to drive the light emitting unit 662 to emit light.

[0242] The 24 drive current terminals DI are assigned in the following order from terminal 16 to terminal 45: "G", "R", "B", "G", "R", "B", "G", "R", "B", "G", "R", "B", "G", "R", "B", "G", "R", "B", "G", "R", "B". In other words, the assignment for the full-color LED chip is a specific color sequence of "G", "R", "B" repeated in the order of the terminal numbers.

[0243] These 24 drive current terminals DI are connected to the eight systems of LED circuits formed as the light emitting section 662, respectively, and pass light emission drive current therethrough. As shown in the figure, each LED circuit of the light emitting section 622 is composed of two or three full-color LED chips connected in series and a resistor element.

[0244] In the systems corresponding to the drive current terminals DI of terminals 16, 17, and 18, full-color LED chips LED1 and LED2 are connected in series. In the systems corresponding to the drive current terminals DI of terminals 20, 21, and 22, full-color LED chips LED3, LED4, and LED5 are connected in series. In the systems corresponding to the drive current terminals DI of terminals 23, 24, and 25, full-color LED chips LED6, LED7, and LED8 are connected in series. In the systems corresponding to the drive current terminals DI of terminals 27, 28, and 29, full-color LED chips LED9 and LED10 are connected in series. In the systems corresponding to the drive current terminals DI of the 32nd terminal, the 33rd terminal, and the 34th terminal, full-color LED chips LED11, LED12, and LED13 are connected in series. In the systems corresponding to the drive current terminals DI of terminals 36, 37, and 38, full-color LED chips LED14, LED15, and LED16 are connected in series. In the systems corresponding to the drive current terminals DI of terminals 39, 40, and 41, full-color LED chips LED17 and LED18 are connected in series. In the systems corresponding to the drive current terminals DI of terminals 43, 44, and 45, full-color LED chips LED19 and LED20 are connected in series. In this example, LED1 to LED20 are all full-color LED chips of the same model number.

[0245] The LED circuits of each system are connected in parallel, with a 12V DC voltage (DC12VB) applied to the anode side of each and the cathode side connected to the drive current terminal DI. Therefore, depending on the voltage of the drive current terminal DI, a light-emitting drive current flows from the 12V DC voltage (DC12VB) side to the drive current terminal DI side via the LED circuit. By PWM-controlling the voltage of each drive current terminal DI based on the serial data signal DATA, the amount of light emitted by the G, R, and B colors of the full-color LED chip can be controlled, resulting in a variety of emitted colors.

[0246] The clock signal CLK, the serial data signal DATA, and the reset signal RESET are also supplied to the LED driver 663 in FIG. The LED driver 663 has 24 drive current terminals DI and can output drive currents in 24 systems, but in this case, 18 terminals, namely, terminals 16, 17, 18, 20, 21, 22, 23, 24, 25, 27, 28, 29, 32, 33, 34, 36, 37, and 38, are used to drive the light emitting unit 664 to emit light. As shown, the other drive current terminal DI is connected to ground.

[0247] These 18 drive current terminals DI are connected to the six LED circuits formed as the light emitting section 664, respectively, and pass light emission drive current therethrough.

[0248] As shown in the figure, each LED circuit in the light-emitting unit 664 is composed of two LEDs connected in series and a resistor. A Zener diode is connected in parallel to each LED. The LED circuits in each system are connected in parallel, and a 12V DC voltage (DC12VB) is applied to the anode side of each.

[0249] The LED21 and LED22 are connected in series to the 16th, 17th, and 18th terminals. The LED23 and LED24 are connected in series to the 20th, 21st, and 22nd terminals. The LED25 and LED26 are connected in series to the 23rd, 24th, and 25th terminals. The LED27 and LED28 are connected in series to the 27th, 28th, and 29th terminals. The LED29 and LED30 are connected in series to the 32nd, 33rd, and 34th terminals. The LEDs 31 and 32 are connected in series to the 36th, 37th, and 38th terminals.

[0250] The LED circuits of each system are connected in parallel, with a 12V DC voltage (DC12VB) applied to the anode side of each and a cathode side connected to the drive current terminal DI. Therefore, depending on the voltage of the drive current terminal DI, a light-emitting drive current flows from the 12V DC voltage (DC12VB) side to the drive current terminal DI side via the LED circuit. Gradation control is performed by PWM-controlling the voltage of each drive current terminal DI based on the serial data signal DATA.

[0251] In addition to the components mentioned above, as shown in FIGS. 21 and 22, the side unit lower right LED board 620 is connected with other electronic elements such as resistors R1H, R2H, etc., capacitors C1H, C2H, etc., diodes (including Zener diodes) D1H, D2H, etc. at required locations. As shown in the figure, taps TP1H, TP2H, etc. are provided and used for connecting to required locations.

[0252] [5.6 LED board 780] Next, the LED boards 780, 790, and 920 mounted on the gaming board 3 side will be described. First, the configuration of the LED substrate 780 is shown in Fig. 23. The LED substrate 780 is disposed inside a movable body (not shown), and serves as a substrate for LED light emission in the movable body portion.

[0253] The LED board 780 is equipped with connectors CN1N and CN2N. The connector CN1N is connected to the end of the transmission line H24 that connects to the connector of the upstream relay board 760 (see FIG. 11). This connector CN1N has a six-terminal configuration, with pins 1 to 6 numbered "1" to "6." The fourth and sixth pins are ground terminals. Pin 5 is the terminal for 5V DC voltage (DC5V). The first pin is the terminal for 12V DC voltage (DC12VB). The second pin is a terminal for the clock signal CLK, and the third pin is a terminal for the serial data signal DATA.

[0254] The connector CN2N is connected to the LED board 790 on the downstream side. The first pin is the terminal for 12V DC voltage (DC12VB). The fourth pin is the ground terminal. The second pin is a terminal for the clock signal CLK, and the third pin is a terminal for the serial data signal DATA.

[0255] The conductor points P1 and P2 on the housings of the connectors CN1N and CN2N are connected to the ground for mounting strength.

[0256] A buffer circuit 781, which is a triple buffer gate, is mounted on the LED board 780. A 5V DC voltage (DC5V) is used as the power supply voltage for this. The 5V DC voltage (DC5V) is supplied from the 5th pin of the connector CN1N.

[0257] Also mounted is an LED driver 782, which is supplied with a 12V DC voltage (DC12VB) as its power supply voltage. The 12V DC voltage (DC12VB) is supplied from the first pin of the connector CN1N.

[0258] The flow of various signals on the LED board 780 will be described. The clock signal CLK and serial data signal DATA supplied from the upstream relay board 760 to the connector CN1N are input to the buffer circuit 781 and buffered. They are then sent to the connector CN2N and transmitted to the downstream LED board 790.

[0259] The clock signal CLK and the serial data signal DATA are also supplied to an LED driver 782 . The LED driver 782 has 24 drive current terminals DI. Of these, 22 terminals, namely, terminals 16, 17, 18, 20, 21, 22, 23, 24, 25, 27, 28, 29, 32, 33, 34, 36, 37, 38, 39, 40, 41, and 43, are used to drive the light emitting unit 783 to emit light. As shown, the other drive current terminal DI is connected to ground.

[0260] The 22 drive current terminals DI are assigned as "G", "R", "B", "G", "R", "B", "G", "R", "B", "G", "R", "B", "G", "R", "B", "G", "R", "B", "N", "N", "N", and "N" in order from terminal 16 to terminal 43. In terms of assignments to full-color LED chips, the colors are assigned in a specific repeating order of "G", "R", and "B" in the order of the terminal numbers.

[0261] These 22 drive current terminals DI are connected to 10 LED circuits formed as the light-emitting unit 783, respectively, to pass light-emitting drive current. There are six systems consisting of full-color LED chip series circuits and four systems consisting of single-color LED chip series circuits. As shown in the figure, each LED circuit of the light emitting section 783 is composed of two or three LED chips connected in series and a resistor element.

[0262] In the systems corresponding to the drive current terminals DI of terminals 16, 17, and 18, full-color LED chips LED1 and LED2 are connected in series. In the systems corresponding to the drive current terminals DI of terminals 20, 21, and 22, full-color LED chips LED3 and LED4 are connected in series. In the systems corresponding to the drive current terminals DI of terminals 23, 24, and 25, full-color LED chips LED5 and LED6 are connected in series. In the systems corresponding to the drive current terminals DI of terminals 27, 28, and 29, full-color LED chips LED7 and LED8 are connected in series. In the systems corresponding to the drive current terminals DI of the 32nd, 33rd, and 34th terminals, full-color LED chips LED9 and LED10 are connected in series. In the systems corresponding to the drive current terminals DI of terminals 36, 37, and 38, full-color LED chips LED11 and LED12 are connected in series. In this example, LED1 to LED12 are all full-color LED chips of the same model number.

[0263] In the system corresponding to the drive current terminal DI of terminal 39, single-color LED chips LED14 and LED15 are connected in series. In the system corresponding to the drive current terminal DI of terminal No. 40, single-color LED chips LED16 and LED17 are connected in series. In the system corresponding to the drive current terminal DI of terminal 41, single-color LED chips LED18, LED19, and LED20 are connected in series. In the system corresponding to the drive current terminal DI of terminal No. 43, single-color LED chips LED22 and LED21 are connected in series.

[0264] The LED circuits of each system are connected in parallel, a 12V DC voltage (DC12VB) is applied to the anode side of each, and the cathode side is connected to the drive current terminal DI. Therefore, depending on the voltage at the drive current terminal DI, a light emission drive current flows from the 12V DC voltage (DC12VB) side via the LED circuit to the drive current terminal DI side. In the case of a full-color LED chip, the light intensity (gradation) of each of G, R, and B is controlled based on the serial data signal DATA, making it possible to obtain a variety of emitted colors.

[0265] As described above, the LED substrate 780 has the following configuration. The clock signal CLK and serial data signal DATA transmitted from the upstream side are transferred to the downstream side via a buffer circuit 781. The clock signal CLK and the serial data signal DATA are also used by the LED driver 782 to drive the light emitting unit 783 to emit light.

[0266] Connector CN1N receives 12V DC voltage (DC12VB) and 5V DC voltage (DC5V) as operating power. · 12V DC voltage (DC12VB) is supplied to the downstream side as the operating power supply voltage.

[0267] In addition to the above, as shown in FIG. 23, electronic elements such as resistors R1N, R2N, etc., capacitors C1N, C2N, etc. are connected to the LED board 780 at required locations. As shown in the figure, taps TP1N and TP2N are provided and used for connection to required locations.

[0268] [5.7 LED board 790] The LED substrate 790 is disposed inside a movable body (not shown) and serves as a substrate for LED light emission of the movable body portion. 24 shows the configuration of the LED board 790. The LED board 790 is equipped with a connector CN1X.

[0269] The connector CN1X is connected to the end of a transmission line H25 that connects with the connector CN2N of the LED board 780 in FIG. Therefore, this connector CN1X has a four-terminal configuration from the first pin to the fourth pin, as indicated by the numbers "1" to "4," and the terminal assignment is the same as that of the above-mentioned connector CN2N.

[0270] The conductor points P1 and P2 on the housing of the connector CN1X are connected to the ground for mounting strength.

[0271] An LED driver 791 is mounted on the LED board 790. A 12V DC voltage (DC12VB) is used as the power supply voltage for the LED driver 791. The 12V DC voltage (DC12VB) is supplied from the first pin of the connector CN1X.

[0272] The flow of various signals on the LED board 790 will be described. The clock signal CLK and the serial data signal DATA supplied from the upstream LED board 780 to the connector CN1X are supplied to an LED driver 791.

[0273] The LED driver 791 has 24 drive current terminals DI. Of these, 16 terminals, namely, terminals 16, 17, 18, 20, 21, 22, 23, 24, 25, 27, 28, 29, 32, 33, 34, and 36, are used to drive the light emitting unit 792 to emit light. As shown, the other drive current terminal DI is connected to ground.

[0274] The 16 drive current terminals DI are assigned as "G", "R", "B", "G", "R", "B", "G", "R", "B", "G", "R", "B", "N", "N", "N", and "N" in order from terminal 16 to terminal 43. In terms of assignments to full-color LED chips, the colors are assigned in a specific repeating order of "G", "R", and "B" in the order of the terminal numbers.

[0275] These 16 drive current terminals DI are connected to eight LED circuits formed as the light-emitting unit 792, respectively, to pass light-emitting drive current. Four of these are series circuits of full-color LED chips, and four are series circuits of single-color LED chips. As shown in the figure, each LED circuit of the light emitting section 792 is composed of two or three LED chips connected in series and a resistor element.

[0276] In the systems corresponding to the drive current terminals DI of terminals 16, 17, and 18, full-color LED chips LED1 and LED2 are connected in series. In the systems corresponding to the drive current terminals DI of terminals 20, 21, and 22, full-color LED chips LED3 and LED4 are connected in series. In the systems corresponding to the drive current terminals DI of terminals 23, 24, and 25, full-color LED chips LED5 and LED6 are connected in series. In the systems corresponding to the drive current terminals DI of terminals 27, 28, and 29, full-color LED chips LED7, LED8, and LED9 are connected in series. In this example, LED1 to LED9 are all full-color LED chips of the same model number.

[0277] In the system corresponding to the drive current terminal DI of terminal 32, single-color LED chips LED10 and LED11 are connected in series. In the system corresponding to the drive current terminal DI of terminal 33, single-color LED chips LED12 and LED13 are connected in series. In the system corresponding to the drive current terminal DI of terminal 34, single-color LED chips LED14 and LED15 are connected in series. In the system corresponding to the drive current terminal DI of terminal 36, single-color LED chips LED16 and LED17 are connected in series.

[0278] The LED circuits of each system are connected in parallel, with a 12V DC voltage (DC12VB) applied to the anode side of each and the cathode side connected to the drive current terminal DI. Therefore, depending on the voltage of the drive current terminal DI, a light-emitting drive current flows from the 12V DC voltage (DC12VB) side via the LED circuit to the drive current terminal DI side. In the case of a full-color LED chip, the light intensity (gradation) of each of G, R, and B is controlled based on the serial data signal DATA, allowing for a variety of emitted colors.

[0279] The above LED substrate 790 has the following configuration. A clock signal CLK and a serial data signal DATA transmitted from upstream are used by an LED driver 791 to drive a light emitting unit 792 to emit light.

[0280] Connector CN1X receives 12V DC voltage (DC12VB) and serves as the operating power source.

[0281] In addition to the above, electronic elements such as resistors R1X, R2X, etc., and capacitors C1X, C2X, etc. are connected to the LED board 790 at required locations as shown in Fig. 24. Also, taps TP1X and TP2X are provided as shown in the figure and are used for connection to required locations.

[0282] Note that an LED driver 791 and a light emitting unit 792 are mounted on the LED board 790, but no buffer circuit is mounted on it. For this reason, only a 12V DC voltage (DC12VB) is supplied from the connector CN2N of the LED board 780 in Fig. 23 to the connector CN1X of the LED board 790 in Fig. 24, and a 5V DC voltage (DC5V) is not supplied.

[0283] [5.8 LED board 920] The configuration of the LED substrate 920 is shown in FIG. The LED board 1600 is equipped with a connector CN1Y.

[0284] The connector CN1Y is connected to the end of a transmission line H31 that connects to a connector in an upstream relay board 910 (see FIG. 11).

[0285] This connector CN1Y has seven terminals numbered "1" to "12," from pin 1 to pin 12. Pins 1, 2, 4, 6, 7, and 8 are ground terminals, pin 3 is the serial data signal DATA terminal, pin 5 is the clock signal CLK terminal, and pins 9, 10, 11, and 12 are 12V DC voltage (DC12VB) terminals.

[0286] The conductor points P1 and P2 on the housing of the connector CN1W are connected to the ground for mounting strength.

[0287] An LED driver 921 is mounted on the LED board 920. As a power supply voltage for the LED driver 921, a 12V DC voltage (DC12VB) from a connector CN1Y is used.

[0288] The flow of various signals in the LED board 1600 will be described. The clock signal CLK and serial data signal DATA supplied from the upstream board to the connector CN1W are supplied to an LED driver 921. The LED driver 921 outputs a light emission drive current according to the clock signal CLK and the serial data signal DATA.

[0289] The LED driver 921 has 24 drive current terminals DI, of which 18 drive current terminals DI are used to drive the light emitting unit 922 to emit light, as terminals 17, 18, 19, 21, 22, 23, 24, 25, 26, 27, 28, 29, 31, 32, 33, 35, 36, and 37.

[0290] The 18 drive current terminals DI are assigned in the order "G", "R", "B", "G", "R", "B", "G", "R", "B", "G", "R", "B", "G", "R", "B", "G", "R", "B". In other words, the assignment for the full-color LED chip is a specific color sequence of "G", "R", "B" repeated in the order of the terminal numbers.

[0291] These 18 drive current terminals DI are connected to the six LED circuits formed as the light emitting section 922, respectively, and pass light emission drive current therethrough. As shown in the figure, each LED circuit of the light emitting section 622 is composed of one full-color LED chip, or two or three full-color LED chips connected in series, and a resistor element.

[0292] In the systems corresponding to the drive current terminals DI of terminals 17, 18, and 19, full-color LED chips LED2 and LED3 are connected in series. In the systems corresponding to the drive current terminals DI of terminals 21, 22, and 23, full-color LED chips LED4, LED5, and LED6 are connected in series. In the systems corresponding to the drive current terminals DI of terminals 24, 25, and 26, full-color LED chips LED7, LED8, and LED9 are connected in series. The LED 10, which is a full-color LED chip, is connected to the systems corresponding to the drive current terminals DI of terminals 27, 28, and 29. In the systems corresponding to the drive current terminals DI of the 31st terminal, the 32nd terminal, and the 33rd terminal, full-color LED chips LED11, LED12, and LED13 are connected in series. In the systems corresponding to the drive current terminals DI of terminals 35, 36, and 37, full-color LED chips LED14, LED15, and LED16 are connected in series. In this example, LED2 to LED16 are all full-color LED chips of the same model number.

[0293] The LED circuits of each system are connected in parallel, with a 12V DC voltage (DC12VB) applied to the anode side of each and the cathode side connected to the drive current terminal DI. Therefore, depending on the voltage of the drive current terminal DI, a light-emitting drive current flows from the 12V DC voltage (DC12VB) side to the drive current terminal DI side via the LED circuit. By PWM-controlling the voltage of each drive current terminal DI based on the serial data signal DATA, the amount of light emitted by the G, R, and B colors of the full-color LED chip can be controlled, resulting in a variety of emitted colors.

[0294] As described above, the LED substrate 920 has the following configuration. An LED driver 921 drives a light emitting unit 922 to emit light based on a clock signal CLK and a serial data signal DATA transmitted from upstream.

[0295] A 12V DC voltage (DC12VB) is received through the connector CN1Y and used as the operating power source for the LED driver 921 and the light emitting unit 922.

[0296] In addition to the components mentioned above, electronic elements such as resistors R1Y, R2Y, etc. and capacitors C1Y, C2Y, etc. are connected to required locations on the LED substrate 920 as shown in Fig. 25. Also, as shown in the figure, taps TP1Y, TP2Y, etc. are provided and used for connection to required locations.

[0297] <6. LED driver terminal configuration> So far, we have explained the circuit configuration of some of the boards in the gaming machine 1, but with regard to the boards explained, LED driver 605 in Figure 15, LED driver 621 in Figure 19, LED driver 631 in Figure 20, LED driver 661 in Figure 21, LED driver 663 in Figure 22, LED driver 782 in Figure 23, and LED driver 791 in Figure 24 use the same driver IC chip.

[0298] The terminal configuration of the driver IC chip will be explained with reference to FIG. 26A. The terminals of the driver IC chip (LED driver 631, etc.) are provided on each side of the rectangle, from terminal 1 (VREF) to terminal 12 (A1), from terminal 13 (A2) to terminal 24 (LEDG3), from terminal 25 (LEDB3) to terminal 36 (LEDR6), and from terminal 37 (LEDG6) to terminal 48 (SVCC).

[0299] Terminal 1 (VREF) is the 5V reference voltage output terminal. Terminal 2 (SCLK) is the input terminal for the clock signal CLK. Terminal 3 (SDATA) is an input terminal for the serial data signal DATA. Terminal 4 (SDEN) is an enable signal input terminal. Terminal 5 (CTLSCT) is a serial bus communication setting terminal, and the reference voltage from terminal 1, that is, H level, is input to set the specified mode. Terminal 6 (OUTSCT) is an output mode control terminal for the LED drive current, and in this example is set to L level by being connected to ground, and is set to a predetermined mode, for example, constant current output. Terminal 7 (RESET) is the input terminal for the reset signal RESET. Terminal 8 (RT1) is a resistor connection terminal for setting the reference current. In this example, resistor R1T is connected. Terminals 9 and 31 (NC) are dummy terminals (no internal connection). Terminal 10 (SGND) is the ground terminal.

[0300] Terminals 11 to 15 (A0 to A4) are address terminals for setting slave addresses. A 5-bit slave address can be set. When each of the terminals A0 to A4 is connected to ground, the bit is set to "0", and when connected to terminal 1 (VREF), the bit is set to "1".

[0301] The 16th to 45th terminals (excluding the 30th and 31st terminals) are provided with drive current terminals DI and ground terminals (PGND1 to PGND4).

[0302] Terminals 46 and 47 are test terminals and are connected to ground. As mentioned above, terminal 48 (SVCC) is the operating power supply terminal, and terminal 30 (VLED) is the protection terminal for the LED drive output.

[0303] Note that FIG. 26B shows the driver IC chip as seen from the backside for reference to FIG. 42 and the like to be described later.

[0304] A unique slave address is set for each LED driver, at least for the LED drivers to which the same serial data is sent. In this embodiment, since two systems of serial data are output from the serial output circuit 30d as shown in Fig. 11, a unique slave address is set for the LED drivers of the boards to which at least the system of serial data on the game board 3 side is sent, and a unique slave address is set for the LED drivers of the boards to which serial data on the inner frame 2 and door 6 side is sent. However, in this embodiment, the two serial data systems on the game board 3 side and the inner frame 2 and door 6 side are combined together so that no LED drivers have the same slave address.

[0305] The slave addresses of each LED driver set by terminals 11 to 15 (A0 to A4) are as follows, as can be seen from the wiring in each diagram. Note that terminal 11 (A0) is the LSB (least significant bit), and terminal 15 (A5) is the MSB (most significant bit). The following are listed in order from the MSB side: A4, A3, A2, A1, A0. LED driver 605:01001 in Figure 15 LED driver 621:11011 in Figure 19 LED driver 631:11000 in Figure 20 LED driver 661:10011 in Figure 21 LED driver 663:10100 in Figure 22 LED driver 782:00011 in Figure 23 LED driver 791:00010 in Figure 24

[0306] As the LED driver 921 in FIG. 25, a driver IC chip different from the driver IC chips described above is used. The terminal configuration of the driver IC chip employed as the LED driver 921 will be described with reference to FIG. 27A.

[0307] Although not illustrated, there are cases where an LED driver in the gaming machine 1 has a circuit mounted on a substrate (not shown) and uses the same driver IC chip as the LED driver 921. Furthermore, the LED driver 921 is a driver IC chip different from the LED driver 605 etc., but this is merely an example, and the same driver IC chip may be used.

[0308] The terminals of the driver IC chip (LED driver 921, etc.) are provided on each side of the rectangle, including terminals 1 (SVCC) to 12 (A1), terminals 13 (A2) to 24 (LEDR3), terminals 25 (LEDG3) to 36 (LEDG6), and terminals 37 (LEDB6) to 48 (SCLK).

[0309] Terminal 1 (SVCC) is the power supply terminal. Terminal 2 (VREF) is the output terminal for the 5V reference voltage. Terminal 3 (CTLSCT) is the setting terminal for serial signal control. Terminal 4 (CTLSCT) is the LED output method setting terminal. Terminal 5 (RESET) is the reset signal input terminal. Terminals 6 (Ilef_B), 7 (Ilef_G), and 8 (Ilef_R) are resistor connection terminals for setting the B, G, and R LED currents. Terminal 9 (SGND) is the ground terminal. Terminal 10 is a test terminal and is connected to ground.

[0310] Terminals 11 to 16 (A0 to A5) are address terminals for setting the slave address. In this case, the slave address can be set using 6 bits. When each of the terminals A0 to A5 is connected to ground, the corresponding bit is set to "0", and when connected to the second terminal (VREF), the corresponding bit is set to "1". Terminal 11 (A0) is the LSB (least significant bit), and terminal 15 (A5) is the MSB (most significant bit). Therefore, the slave address of the LED driver 921 is "000101", as can be seen from FIG. By using 5 bits instead of the MSB of the slave address, there is no problem even if the driver IC chips of Figures 26 and 27 are mixed within the gaming machine 1.

[0311] The 17th to 44th terminals (excluding the 34th terminal) are provided with a drive current terminal DI and ground terminals (PGND1 to PGND3) for LED output. Terminal 34 (LVCC) is the power supply terminal for the protection circuit for the LED output terminal.

[0312] Terminal 45 (SDO) is a dummy terminal. Terminal 46 (SDEN) is an input terminal for the enable signal. Terminal 47 (SDATA) is an input terminal for the serial data signal DATA. Terminal 48 (SCLK) is an input terminal for the clock signal CLK.

[0313] Note that FIG. 27B shows the driver IC chip as seen from the backside for reference to FIG. 45 and the like to be described later.

[0314] <7. LED driver and LED pattern wiring> [7.1 Transmission of light emission control signals] The transmission of light emission control signals in the gaming machine 1 will now be described. As explained in Fig. 11, the performance control board 30 transmits drive data for the LEDs and motors as serial data from the serial output circuit 30d to downstream boards. Specifically, this is a serial data signal DATA supplied to each of the above-mentioned boards.

[0315] If the serial data signal DATA is considered as light emission drive data for a full-color LED chip, the serial data signal DATA contains drive data for G, drive data for R, and drive data for B. The drive data for each color specifies, for example, 256 levels of light emission brightness using 8 bits for each color, and is transmitted in a predetermined serial data format along with the slave address and register address of each driver IC chip. The register address is the address of the register that stores the gradation value in the serial data signal DATA corresponding to the terminal number of the drive current terminal DI.

[0316] FIG. 28 shows a schematic diagram of the transfer of serial data signal DATA from the performance control board 30 to the LED driver. Drive data corresponding to various light emission patterns according to various performance scenarios is stored in ROM 30b of the performance control board 30. The performance control board 30 reads out the necessary drive data from a predetermined address in ROM 30b according to the performance scenario to be executed, converts it into serial data, and transmits it from the serial output circuit 30d to downstream boards.

[0317] In this case, as shown in the figure, the drive data for the full-color LED chips is stored in the ROM 30b in a specific color order of "G", "R", and "B". The drive data, which is read out in the order of "G," "R," and "B," is converted into serial data in the same color order and output.

[0318] In FIG. 28, LED drivers 110 and 111 are shown as destinations of serial data. The LED driver 110 is an LED driver that serves as a first light emission driving means. For example, the LED drivers 605, 621, 631, 661, 663, 782, and 791 correspond to this LED driver 110. The LED driver 111 represents an LED driver serving as a second light emission driving means. For example, the LED driver 921 corresponds to this LED driver 111.

[0319] Note that the first light emission driving means refers to an LED driver that drives a first-type chip, and the second light emission driving means refers to an LED driver that drives a second-type chip. In other words, they do not refer to LED drivers of different types or model numbers. The LED driver 631 etc. serving as the first light emission driving means has the configuration shown in Fig. 26, and the LED driver 921 serving as the second light emission driving means has the configuration shown in Fig. 27, but this is merely an example. For example, the driver IC having the configuration shown in Fig. 26 may be used as the LED driver 921.

[0320] It is assumed that LED driver 110 is mounted on substrate 112 and LED driver 111 is mounted on substrate 113 . The "◯" in the LED drivers 110 and 111 indicates the drive current terminal DI.

[0321] In both LED drivers 110 and 111, colors are assigned to the multiple drive current terminals DI in a specific color order of "G," "R," and "B" in ascending order of terminal number. Therefore, drive data transmitted as serial data is taken into registers in each of LED drivers 110 and 111 as data corresponding to each terminal in order.

[0322] 26 and 27, an arrow SC indicates the ascending order of terminal numbers. As can be seen from the circuit diagrams (FIGS. 15, 19, 20, 21, 22, 23, 24, and 25) of the LED drivers 605, 621, 631, 661, 663, 782, 791, and 921 illustrated in this embodiment, "G," "R," and "B" are assigned to the drive current terminals DI in the order of "G," "R," and "B" in the direction of the arrow SC.

[0323] Incidentally, the terminals designated as drive current terminals DI in FIGS. 26 and 27 are often given terminal names of specific colors by the manufacturer of the driver IC chip. For example, the 24 terminal names on a driver IC chip product datasheet are "LEDR1," "LEDG1," "LEDB1," ... "LEDR8," "LEDG8," "LEDB8," and so on. While these names appear to indicate an assignment of "R," "G," and "B" in that order, the assignment of colors to each terminal can be determined arbitrarily by the manufacturer of the gaming machine using the driver IC chip. For example, there is no problem in assigning "G" or "B" to "LEDR1." In this invention, if the product specifications name the terminals in ascending order of terminal number as "LEDR1," "LEDG1," "LEDB1," ... and assign G to "LEDR1" and R to "LEDG1" and B to "LEDB1," then the specific color order described above will be assigned to each drive current terminal DI. That is, the color assignment of the drive current terminals DI in this embodiment is not an assignment based on the terminal names in the product specifications, but an assignment set for connection to an actual full-color LED chip.

[0324] 28 shows full-color LED chips as a first-kind chip 115 and a second-kind chip 116. The first-kind chip 115 and the second-kind chip 116 are full-color LED chips in which the arrangement orders of the color terminals (for example, the cathode terminals of the colors) are different from each other. For example, in the state shown in the figure, the first type chip 115 faces the drive current terminal DI of the LED driver 110, and the color terminals thereof are arranged in the color order of "G," "R," and "B," while the second type chip 116 faces the drive current terminal DI of the LED driver 111, and the color terminals thereof are arranged in the color order of "B," "R," and "G."

[0325] The first-type chips 115 mounted on the substrate 112 are driven to emit light by the LED driver 110. When each color terminal (e.g., a cathode terminal of each color) of the first-type chips 115 faces the drive current terminal DI of the LED driver 110, the assigned colors are mutually related to each other. In other words, the drive current terminal DI assigned to "G" faces the cathode terminal of "G", the drive current terminal DI assigned to "R" faces the cathode terminal of "R", and the drive current terminal DI assigned to "B" faces the cathode terminal of "B". For this reason, in the figure, the lines connecting the drive current terminals DI of the LED driver 110 and the corresponding terminals of the first-type chip 115 do not intersect. This means that the pattern wiring of "G", "R", and "B" on the substrate 112 do not intersect.

[0326] The second-type chips 116 mounted on the substrate 113 are driven to emit light by the LED driver 111. When the color terminals (e.g., cathode terminals of the respective colors) of the second-type chips 116 face the drive current terminals DI of the LED driver 111, the assigned colors do not match. In this example, the drive current terminal DI assigned to "G" faces the cathode terminal of "B", the drive current terminal DI assigned to "R" faces the cathode terminal of "R", and the drive current terminal DI assigned to "B" faces the cathode terminal of "G". For this reason, in the figure, the lines connecting the drive current terminals DI of the LED driver 110 and the corresponding terminals (terminals of the same color) of the first-type chip 115 intersect. This means that the pattern wiring of "G", "R", and "B" on the substrate 112 intersect.

[0327] Although FIG. 28 shows only one serial data transmission line, it should be understood that this is one of the multiple serial data transmission lines shown in FIG. In addition, the serial data transmission path for LED driver 110 and the serial data transmission path for LED driver 111 may be considered to be separate serial data transmission systems. For example, LED driver 110 may be considered to be on the game board 3 side, and LED driver 111 may be considered to be on the inner frame 2 / door 6 side.

[0328] Here, the design circumstances of the gaming machine 1 will be explained. Many gaming machines 1 use multiple types of full-color LED chips within one model due to the commonality and reuse of parts, cost and inventory reasons, and so on. The type of full-color LED chip used varies for each part, such as the attacker, electric chute, handle, and side unit, and the arrangement of the R, G, and B terminals of the full-color LED chip may also differ depending on the LED manufacturer.

[0329] Meanwhile, during the development process, different staff members and departments are responsible for creating the LED light emission pattern data, the LED-related control programs, and the design of the circuit board on which the LEDs are mounted. During this development process, the design must take into account the different types of color LED chips that will be installed, i.e., the different arrangements of the R, G, and B terminals.

[0330] When creating LED light-emitting pattern data or programming to match the differences in the arrangement of the terminals on such full-color LED chips, human error is likely to occur. Therefore, in the gaming machine 1 of this embodiment, the color order in the ROM 30b, the color order in the serial data (serial data signal DATA), and the color order assigned to the drive current terminals DI in the LED drivers 110 and 111 are all set to a specific color order. In the example described so far, the specific color order is the order of "G", "R", and "B". This particular color sequence is a color sequence that matches the assigned colors with the terminals of the first-type chip 115 when they are opposed to the drive current terminals DI of the LED driver 111.

[0331] By doing so, the color sequence is unified from the ROM 30b to the first-type chip 115, making it less likely that human error will occur. However, the arrangement of the color terminals is different on the second type chip 116. Therefore, the difference in arrangement is absorbed by the pattern wiring on the substrate 113. As a result, the sequence of colors is unified at least from the ROM 30b to the LED drivers 110 and 111. Then, only the designer of the board on which the second-type chip 116 is mounted needs to design the pattern while paying attention to the color order in the mismatched state. This reduces the chance of human error during design, improves design efficiency, and is also suitable for maintenance work.

[0332] [7.2 LED driver and full-color LED chip facing each other] 29 to 40 below show, using an LED driver 5000 and various full-color LED chips 6000, 6001, 6002, 6003, 6004, and 6005 as models, cases where the mutual relationships between each drive current terminal DI of the LED driver and each color terminal of the full-color LED chip are in a matching state and cases where they are not matching, and examples of pattern wiring for each case are also shown.

[0333] 29 to 40 corresponds to either of the above-mentioned LED drivers 110 and 111, that is, an LED driver in which the drive current terminals DI are assigned in the order of "G," "R," and "B" in the order of terminal numbers indicated by the arrow SC. When the drive current terminals DI are viewed from the front with the chip top surface of the LED driver 5000 facing up, the drive current terminals DI are assigned in the order of "G," "R," and "B" from left to right. The full-color LED chips 6000, 6001, 6002, 6003, 6004, and 6005 are full-color LED chips in which the terminals for each color are arranged in different orders.

[0334] Furthermore, the relationship between each drive current terminal DI of the LED driver and each color terminal of the full-color LED chip when they are facing each other depends not only on the arrangement of each drive current terminal DI and the terminals of the full-color LED chip, but also on whether the LED driver and full-color LED chip are on the same side of the board or on different sides. From these perspectives, we will show cases where the assigned colors match and where they do not match when they are facing each other.

[0335] In each figure, the LED driver 5000 is arranged on the front surface of the substrate, and the full-color LED chip is arranged on either the front surface or the back surface. The chips and wiring on the front side of the substrate are shown by solid lines, and the chips and wiring on the back side are shown by dashed lines. Below we will explain "Type 1A" to "Type 6B." Types marked with "A" are cases where the LED driver and full-color LED chip are placed on the same surface, while types marked with "B" are cases where the LED driver and full-color LED chip are placed on different surfaces.

[0336] Figure 29 (Type 1A) The LED driver 5000 and the full-color LED chip 6000 are disposed on the same surface of the substrate. When looking at the cathode terminals of the full-color LED chip 6000 from the front, the letters are arranged as "G", "R", and "B" from left to right. In this case, if the terminals are placed opposite each other, the color arrangement will not match, as shown in the bottom of the figure. Therefore, wiring to accommodate the mismatch is required. As an example, as shown in the figure, a through hole TH is provided in the middle of some of the pattern wiring (G, R in this example) from the LED driver 5000, wiring like the dashed line is formed on the back surface of the board, and cross wiring CRS that crosses the front and back surfaces makes the color sequence correspond to the full-color LED chip 6000. Then, pattern wiring is formed that returns to the front surface side using the through hole TH and reaches each terminal of the full-color LED chip 6000. The relationship between the assigned colors of this type 1A is an example of the relationship between the second light emission driving means (LED driver 111) and the second kind of chip 116 in FIG.

[0337] Figure 30 (Type 1B) The LED driver 5000 and the full-color LED chip 6000 are disposed on different sides of the substrate. When the cathode terminal of the full-color LED chip 6000 is viewed from the front, the letters are arranged as "G," "R," and "B" from left to right. However, since it is the back side, if the back side is considered as the top, the letters are arranged as "B," "R," and "G" from left to right. In this case, when the terminals are placed opposite each other, the color arrangement matches, as shown at the bottom of the figure. Therefore, as shown in the figure, the G, R, and B pattern wirings from the LED driver 5000 are led to the back surface via through holes TH, and pattern wirings are formed on the back surface that lead to the respective terminals of the full-color LED chip 6000. The relationship between the assigned colors of this type 1B is an example of the relationship between the first light emission driving means (LED driver 110) and the first kind of chip 115 in FIG.

[0338] Figure 31 (Type 2A) The LED driver 5000 and the full-color LED chip 6001 are disposed on the same surface of the substrate. When the cathode terminals of the full-color LED chip 6001 are viewed from the front, the letters "G", "B", and "R" are arranged from left to right. In this case, if the terminals are placed opposite each other, the color arrangement will not match, as shown at the bottom of the figure. Therefore, wiring to accommodate the mismatch is required. As an example, as shown in the figure, a through hole TH is provided in the middle of a portion of the pattern wiring (G in this example) from the LED driver 5000, and cross wiring CRS that intersects the front and back surfaces is formed using wiring on the back surface of the substrate, so that the color sequence corresponds to the full-color LED chip 6001. Then, pattern wiring is formed that returns to the front surface using the through hole TH and reaches each terminal of the full-color LED chip 6001. The relationship between the assigned colors of this type 2A is an example of the relationship between the second light emission driving means (LED driver 111) and the second kind of chip 116 in FIG.

[0339] Figure 32 (Type 2B) The LED driver 5000 and the full-color LED chip 6001 are disposed on different sides of the substrate. Since the full-color LED chip 6001 is on the back side, when the cathode terminals are viewed from the front, the letters "R", "B", and "G" are arranged from left to right. If the terminals are placed opposite each other, the color arrangement will not match, as shown at the bottom of the figure. Therefore, wiring to accommodate the mismatch is required. As an example, as shown in the figure, the G, R, and B pattern wiring from the LED driver 5000 is led to the back surface by through holes TH, but by shifting the position of the through holes TH for each pattern wiring, cross wiring CRS is formed and the color sequence corresponds to the full-color LED chip 6001. Then, pattern wiring is formed to reach each terminal of the full-color LED chip 6001. The relationship between the assigned colors of this type 2B is an example of the relationship between the second light emission driving means (LED driver 111) and the second kind of chip 116 in FIG.

[0340] Figure 33 (Type 3A) The LED driver 5000 and the full-color LED chip 6002 are disposed on the same side of the substrate. When the cathode terminals of the full-color LED chip 6002 are viewed from the front, the letters "B", "G", and "R" are arranged from left to right. In this case, if the terminals are placed opposite each other, the color arrangement will not match as shown at the bottom of the figure, and wiring to accommodate the mismatch will be required. As an example, as shown in the figure, a through hole TH is provided in the middle of a portion of the pattern wiring (G in this example) from the LED driver 5000, and a cross wiring CRS is formed with wiring on the back surface of the substrate to correspond to the color sequence of the full-color LED chip 6002. Then, the through hole TH is used to return to the front surface, forming pattern wiring that reaches each terminal of the full-color LED chip 6002. The relationship between the assigned colors of this type 3A is an example of the relationship between the second light emission driving means (LED driver 111) and the second kind of chip 116 in FIG.

[0341] Figure 34 (Type 3B) The LED driver 5000 and the full-color LED chip 6002 are located on different sides of the substrate. Since the full-color LED chip 6002 is on the back side, when the cathode terminals are viewed from the front, the letters "R", "G", and "B" are arranged from left to right. If the terminals are placed opposite each other, the color arrangement will be mismatched, as shown at the bottom of the figure, and wiring to accommodate the mismatch will be required. As an example, as shown in the figure, the G, R, and B pattern wiring from the LED driver 5000 is led to the back surface by through holes TH, and by devising the position of the through holes TH, cross wiring CRS is formed to correspond to the color sequence of the full-color LED chip 6002. Then, pattern wiring is formed to reach each terminal of the full-color LED chip 6002. The relationship between the assigned colors of this type 3B is an example of the relationship between the second light emission driving means (LED driver 111) and the second kind of chip 116 in FIG.

[0342] Figure 35 (Type 4A) The LED driver 5000 and the full-color LED chip 6003 are disposed on the same surface of the substrate. When the cathode terminals of the full-color LED chip 6003 are viewed from the front, the letters "B", "R", and "G" are arranged from left to right. In this case, when the terminals are placed opposite each other, the color arrangement matches, as shown at the bottom of the figure. Therefore, as shown in the figure, the G, R, and B pattern wirings from the LED driver 5000 may be formed so as to directly reach the respective terminals of the full-color LED chip 6003 . The relationship between the assigned colors of this type 4A is an example of the relationship between the first light emission driving means (LED driver 110) and the first kind of chip 115 in FIG.

[0343] Figure 36 (Type 4B) The LED driver 5000 and the full-color LED chip 6003 are disposed on different sides of the substrate. Since the full-color LED chip 6003 is on the back side, when the cathode terminals are viewed from the front, the letters "G", "R", and "B" are arranged from left to right. If the terminals are placed opposite each other, the color arrangement will be mismatched, as shown at the bottom of the figure, and wiring to accommodate the mismatch will be required. As an example, as shown in the figure, the G, R, and B pattern wiring from the LED driver 5000 is led to the back surface by through holes TH, and by devising the position of the through holes TH, cross wiring CRS is formed to correspond to the color sequence of the full-color LED chip 6003. Then, pattern wiring is formed to reach each terminal of the full-color LED chip 6003. The relationship between the assigned colors of this type 4B is an example of the relationship between the second light emission driving means (LED driver 111) and the second kind of chip 116 in FIG.

[0344] Figure 37 (Type 5A) The LED driver 5000 and the full-color LED chip 6004 are disposed on the same side of the substrate. When the cathode terminals of the full-color LED chip 6004 are viewed from the front, the letters "R", "G", and "B" are arranged from left to right. In this case, if the terminals are placed opposite each other, the color arrangement will not match as shown at the bottom of the figure, and wiring to accommodate the mismatch will be required. As an example, as shown in the figure, a through hole TH is provided in the middle of a portion of the pattern wiring (B in this example) from the LED driver 5000, and a cross wiring CRS is formed with wiring on the back surface of the substrate to correspond to the color sequence of the full-color LED chip 6004. Then, the through hole TH is used to return to the front surface, and pattern wiring is formed to reach each terminal of the full-color LED chip 6004. The relationship between the assigned colors of this type 5A is an example of the relationship between the second light emission driving means (LED driver 111) and the second kind of chip 116 in FIG.

[0345] Figure 38 (Type 5B) The LED driver 5000 and the full-color LED chip 6004 are located on different sides of the substrate. Since the full-color LED chip 6004 is on the back side, when the cathode terminals are viewed from the front, the letters "B", "G", and "R" are arranged from left to right. If the terminals are placed opposite each other, the color arrangement will be mismatched, as shown at the bottom of the figure, and wiring to accommodate the mismatch will be required. As an example, as shown in the figure, the G, R, and B pattern wiring from the LED driver 5000 is led to the back surface by through holes TH, and by devising the position of the through holes TH, cross wiring CRS is formed to correspond to the color sequence of the full-color LED chip 6004. Then, pattern wiring is formed to reach each terminal of the full-color LED chip 6004. The relationship between the assigned colors of this type 5B is an example of the relationship between the second light emission driving means (LED driver 111) and the second kind of chip 116 in FIG.

[0346] Figure 39 (Type 6A) The LED driver 5000 and the full-color LED chip 6005 are disposed on the same side of the substrate. When viewing the cathode terminals of the full-color LED chip 6005 from the front, the letters are arranged as "R", "B", and "G" from left to right. In this case, if the terminals are placed opposite each other, the color arrangement will not match as shown at the bottom of the figure, and wiring to accommodate the mismatch will be required. As an example, as shown in the figure, a through hole TH is provided in the middle of a portion of the pattern wiring (R in this example) from the LED driver 5000, and cross wiring CRS is formed with wiring on the back side of the board to correspond to the color sequence of the full-color LED chip 6005. Then, the through hole TH is used to return to the front side, and pattern wiring leading to each terminal of the full-color LED chip 6005 is formed. The relationship between the assigned colors of this type 6A is an example of the relationship between the second light emission driving means (LED driver 111) and the second kind of chip 116 in FIG.

[0347] Figure 40 (Type 6B) The LED driver 5000 and the full-color LED chip 6005 are located on different sides of the substrate. The full-color LED chip 6005 is on the back side, so when you look at the cathode terminals from the front, they are arranged in the order of "G", "B", and "R" from left to right. If the terminals are placed opposite each other, the color arrangement will be mismatched, as shown at the bottom of the figure, and wiring to accommodate the mismatch will be required. As an example, as shown in the figure, the G, R, and B pattern wiring from the LED driver 5000 is led to the back surface by through holes TH, but by shifting the position of the through holes TH for each pattern wiring, cross wiring CRS is formed and the color sequence corresponds to the full-color LED chip 6005. Then, pattern wiring leading to each terminal of the full-color LED chip 6005 is formed. The relationship between the assigned colors of this type 6B is an example of the relationship between the second light emission driving means (LED driver 111) and the second kind of chip 116 in FIG.

[0348] [7.3 Specific examples of wiring in the case of matching opposite relationships] If the color assignment order of the drive current terminal DI of the LED driver 5000 is fixed to, for example, "G," "R," and "B," there are 12 possible color arrangements when facing the LED chip, from Type 1A to Type 6B. Here, a specific example will be described in which assigned colors match in an opposing relationship, such as type 1B in FIG. 30 and type 4A in FIG.

[0349] A specific example is the LED board 630 on the side unit. FIG. 41 shows the conductor pattern on the front surface layer of the LED substrate 630 on the side unit, and FIG. 42 shows the conductor pattern on the back surface layer.

[0350] The back surface layer in Figure 42 is shown as a perspective view seen from the front surface layer side in Figure 41, and the conductor pattern and board control number are shown in a state that is reversed left to right from the state in which the back surface of the board is normally viewed. Component identification numbers printed on the board are omitted from Figures 41 and 42. The part shown as "○○+xxx△" actually displays the board control number.

[0351] On the front surface layer in FIG. 41 and the back surface layer in FIG. 42, a ground pattern 633 as a solid ground and pattern wiring that realizes the circuit configuration in FIG. 20 are formed. "pLED1" to "pLED10" in FIG. 41 (surface layer) indicate positions (pads) where LED1 to LED10, which are full-color LED chips in FIG. 20, are respectively arranged. In FIG. 42 (back surface layer), "p631" indicates the position (pad) where the LED driver 631 is arranged, and "pCN1T" indicates the position (pad) where the connector CN1T is arranged.

[0352] The LED driver 631 placed at "p631" is the square chip component described in FIG. 26A. The LED driver 631 is placed on the back surface layer, and since FIG. 42 is shown as a perspective view from the front surface layer, the terminal numbers are as shown enlarged in the figure, as if the LED driver 631 were viewed from the back. FIG. 26B shows the assignment of each terminal as viewed from the back. As described above, the colors assigned to the drive current terminals DI from terminal 16 to terminal 34 are "G," "R," and "B" in order of decreasing terminal number.

[0353] 20, which are full-color LED chips arranged in "pLED1" to "pLED10," are arranged in the order of "G," "R," and "B" from left to right when the cathode terminals are viewed from the front. In this case, LED1 to LED10 are arranged on a different side from the LED driver 631. Therefore, the relationship corresponds to Type 1B in FIG. 30 shows an example in which the LED driver 5000 is the front layer and the full-color LED chip 6000 is the back layer, which is the opposite of the side unit LED board 630. However, which is the front layer and which is the back layer has no effect on the relationship of the assigned colors when they are facing each other. What matters is whether they are on the same surface or different surfaces. Therefore, the side unit LED board 630 can be said to have a relationship equivalent to Type 1B in FIG.

[0354] As can be seen from FIG. 20, in the side unit LED substrate 630, each drive current terminal DI is connected to the cathode terminal of LED1, LED3, LED5, LED7, and LED9, respectively. 43 shows the wiring between the LED driver 631 on the back surface layer and LED1, LED3, LED5, LED7, and LED9 on the side unit LED board 630. The full-color LED chips and pattern wiring on the front surface layer are shown with solid lines, and the LED driver 631 and pattern wiring on the back surface layer are shown with dashed lines. As a color allocation from the surface layer side, an enlarged schematic diagram of the color allocation from terminal 16 to terminal 34 of the LED driver 631 is shown, along with the color allocation of the cathode terminals of each full-color LED chip.

[0355] The "○" in the wiring in the diagram is a through hole TH. If all the symbols "TH" were added, the diagram would become too complicated and difficult to read, so only some are added.

[0356] As can be seen from Figure 43, terminals 16, 17, and 18, which are drive current terminals DI of LED driver 631, are connected to LED1, and these wirings are led from the back surface layer to the front surface layer side via through holes TH, and reach each cathode terminal of LED1 in parallel without crossing. The wiring between terminals 20, 21, and 22 and LED3 is similar. The same applies to the wiring between terminals 23, 24, and 25 and LED5, the wiring between terminals 27, 28, and 29 and LED7, and the wiring between terminals 32, 33, and 34 and LED9.

[0357] In this way, on the LED board 630 on the side unit, the LED driver 631 and the full-color LED chips (LED1, LED3, LED5, LED7, LED9) have the same relationship as the LED driver 110 and the first-type chips 115 in Fig. 28. Therefore, from the ROM 30b on the performance control board 30 to the full-color LED chips, the color order is maintained in the specific order of "G", "R", and "B".

[0358] Here, an example of the LED driver 631 and full-color LED chips on the upper LED board 630 of the side unit has been given, but the upper right LED board 600 of the side unit in FIG. 15, the lower right LED board 620 of the side unit in FIG. 19, the button LED board 660 in FIG. 21, the LED board 780 in FIG. 23, and the LED board 790 in FIG. 24 are also examples of a similar relationship between the LED driver and the full-color LED chips, that is, examples of Type 1B in FIG. 30 or Type 4A in FIG. 35.

[0359] Note that the side unit LED substrate 630 in Figures 41, 42, and 43 is an example in which the LED driver 631 and the full-color LED chips (LED1 to LED10) are mounted on different surfaces, and therefore corresponds to Type 1B in Figure 30. This side unit upper LED board 630, side unit upper right LED board 600, side unit lower right LED board 620, button LED board 660, LED board 780, LED board 790, etc. may have an LED driver and full-color LED chip mounted on the same surface, corresponding to Type 4A.

[0360] [7.4 Specific examples of wiring when the opposite relationship is mismatched and the wiring is on different sides] Next, a specific example of a case where the assigned colors do not match when the LED boards are facing each other will be described. As an example, an LED board 920 is used, which corresponds to Type 4B in FIG.

[0361] FIG. 44 shows the conductor pattern on the front surface layer of the LED substrate 920, and FIG. 45 shows the conductor pattern on the back surface layer. The back surface layer in Figure 45 is shown as a perspective view seen from the front surface layer side in Figure 44, and the conductor pattern and board control number are shown in a state that is reversed left to right from the state in which the back surface of the board is normally viewed. Also, the component identification numbers printed on the board are omitted from the illustration. The part shown as "○○+△××△" actually displays the board control number.

[0362] On the front surface layer in FIG. 44 and the back surface layer in FIG. 42, a ground pattern 926 as a solid ground and pattern wiring that realizes the circuit configuration in FIG. 25 are formed. "pLED2" to "pLED16" in FIG. 44 (surface layer) indicate the positions (pads) where LED2 to LED16, which are full-color LED chips in FIG. 25, are respectively arranged. In FIG. 45 (back surface layer), "p921" indicates the position (pad) where the LED driver 921 is arranged, and "pCN1Y" indicates the position (pad) where the connector CN1Y is arranged.

[0363] The LED driver 921 placed at "p921" is the square chip component described in FIG. 27A. The LED driver 921 is placed on the back surface layer, and FIG. 45 is shown as a perspective view from the front surface layer, so the terminal numbers are as seen from the back of the LED driver 921, as enlarged in the figure. FIG. 27B shows the assignment of each terminal as seen from the back. As described above, the colors assigned to the drive current terminals DI from terminal 17 to terminal 37 are "G," "R," and "B," in order of decreasing terminal number.

[0364] The full-color LED chips LED2 to LED16 in Figure 25, which are arranged in "pLED2" to "pLED16", are arranged in the order of "B", "R", and "G" from left to right when viewed from the front of the cathode terminals. This is shown schematically in the bottom of Figure 44. In this case, LED2 to LED16 are arranged on a different surface from the LED driver 921. Therefore, the relationship corresponds to Type 4B in FIG.

[0365] As can be seen from FIG. 25, on the LED substrate 920, the drive current terminals DI are connected to the cathode terminals of LED2, LED4, LED7, LED10, LED11, and LED14, respectively. 46 shows the wiring between the LED driver 921 on the back surface layer and LED2, LED4, LED7, LED10, LED11, and LED14 on the front surface layer of the LED substrate 920. The full-color LED chips and pattern wiring on the front surface layer are shown with solid lines, and the LED driver 921 and pattern wiring on the back surface layer are shown with dashed lines.

[0366] The "○" in the wiring in the diagram is a through hole TH. Here too, if all the symbols "TH" were added, the diagram would become too complicated and difficult to read, so only some are added.

[0367] 47 to 52 show the connections between the LED driver 921 and each of LED2, LED4, LED7, LED10, LED11, and LED14. These figures show, from the perspective of the surface layer side, the assigned colors of the drive current terminals DI of the LED driver 921 and the color assignments of the cathode terminals of the full-color LED chips.

[0368] The connection between LED driver 921 and LED2 in Fig. 46 is shown in Fig. 47A. Terminals 17, 18, and 19, which are drive current terminals DI of LED driver 921, are connected to the cathode terminals of LED2. The relationship between these terminals is a Type 4B relationship. Wiring from terminals 17, 18, and 19 of the LED driver 921 on the back surface layer is led to the front surface layer via through holes TH. Then, B wiring and R wiring are routed around on the front surface side of the through holes TH to form cross wiring CRS on both the front and back surfaces, and the color sequence corresponds to LED2. Then, pattern wiring is formed to reach each terminal of LED2. In the wiring example of Figure 47A, a through hole TH is formed at a position closer to the LED driver 921 than the midpoint CT of the wiring length between the LED driver 921 and LED2, forming a transition from the back surface layer to the front surface layer and a cross wiring CRS.

[0369] FIG. 47B shows a modified example of wiring, in which a through hole TH is formed at a position closer to the LED2 side than the center point CT, and a transition from the back surface layer to the front surface layer and a cross wiring CRS are formed.

[0370] Fig. 48A shows the connection between the LED driver 921 and LED4 in Fig. 46. Terminals 21, 22, and 23, which are drive current terminals DI of the LED driver 921, are connected to the cathode terminals of the LED4 in a type 4B relationship. Wiring from terminals 21, 22, and 23 of the LED driver 921 on the back surface layer is led to the surface layer via through holes TH. Then, cross wiring CRS is formed on the surface layer side of the through holes TH to correspond the color sequence to LED4, and pattern wiring leading to each terminal of LED4 is formed. In this wiring example, a through hole TH is formed at a position closer to the LED4 side than the center point CT of the wiring length between the LED driver 921 and the LED4, and a transition from the back surface layer to the front surface layer and a cross wiring CRS are formed.

[0371] FIG. 48B shows a modified example of wiring, in which a through hole TH is formed at a position closer to the LED driver 921 than the center point CT, and a transition from the back surface layer to the front surface layer and a cross wiring CRS are formed.

[0372] Fig. 49A shows the connection between the LED driver 921 and the LED 7 in Fig. 46. Terminals 24, 25, and 26, which are drive current terminals DI of the LED driver 921, are connected to the cathode terminals of the LED 7 in a type 4B relationship. Wiring from terminals 24, 25, and 26 of the LED driver 921 on the back surface layer is led to the surface layer via through holes TH. Then, cross wiring CRS is formed on the surface layer side of the through holes TH to correspond to the color sequence of the LEDs 7, and pattern wiring leading to each terminal of the LEDs 7 is formed. In this wiring example, a through hole TH is formed at a position closer to the LED driver 921 than the center point CT of the wiring length between the LED driver 921 and the LED 7, and a transition from the back surface layer to the front surface layer and a cross wiring CRS are formed.

[0373] FIG. 49B shows a modified example of wiring, in which a through hole TH is formed at a position closer to the LED 7 than the center point CT, and a transition from the back surface layer to the front surface layer and a cross wiring CRS are formed.

[0374] Fig. 50A shows the connection between the LED driver 921 and the LED 10 in Fig. 46. Terminals 27, 28, and 29, which are drive current terminals DI of the LED driver 921, are connected to the cathode terminals of the LED 10 in a type 4B relationship. Wiring from terminals 27, 28, and 29 of the LED driver 921 on the back surface layer is led to the surface layer via through holes TH. Then, cross wiring CRS is formed on the surface layer side of the through holes TH to correspond the color sequence to the LEDs 10, and pattern wiring leading to each terminal of the LEDs 10 is formed. In this wiring example, a through hole TH is formed at a position closer to the LED 10 than the center point CT of the wiring length between the LED driver 921 and the LED 10, and a transition from the back surface layer to the front surface layer and a cross wiring CRS are formed.

[0375] FIG. 50B shows a modified example of wiring, in which a through hole TH is formed at a position closer to the LED driver 921 than the center point CT, and a transition from the back surface layer to the front surface layer and a cross wiring CRS are formed.

[0376] Fig. 51A shows the connection between the LED driver 921 and the LED 11 in Fig. 46. Terminals 31, 32, and 33, which are drive current terminals DI of the LED driver 921, are connected to the cathode terminals of the LED 11 in a type 4B relationship. Wiring from terminals 31, 32, and 33 of the LED driver 921 on the back surface layer is led to the surface layer via through holes TH. Then, cross wiring CRS is formed on the surface layer side of the through holes TH to correspond the color sequence to the LEDs 11, and pattern wiring leading to each terminal of the LEDs 11 is formed. In this wiring example, a through hole TH is formed at a position closer to the LED 11 than the center point CT of the wiring length between the LED driver 921 and the LED 11, and a transition from the back surface layer to the front surface layer and a cross wiring CRS are formed.

[0377] FIG. 51B shows a modified example of wiring, in which a through hole TH is formed at a position closer to the LED driver 921 than the center point CT, and a transition from the back surface layer to the front surface layer and a cross wiring CRS are formed.

[0378] Fig. 52A shows the connection between the LED driver 921 and the LED 14 in Fig. 46. Terminals 35, 36, and 37, which are drive current terminals DI of the LED driver 921, are connected to the cathode terminals of the LED 14 in a type 4B relationship. Wiring from terminals 35, 36, and 37 of the LED driver 921 on the back surface layer is led to the surface layer via through holes TH. Then, cross wiring CRS is formed on the surface layer side of the through holes TH to correspond the color sequence to the LEDs 14, and pattern wiring leading to each terminal of the LEDs 14 is formed. In this wiring example, a through hole TH is formed at a position closer to the LED 11 than the center point CT of the wiring length between the LED driver 921 and the LED 14, forming a transition from the back surface layer to the front surface layer and a cross wiring CRS. In this case, however, the through hole TH can be considered to be approximately at the center of the wiring length.

[0379] FIG. 52B shows a modified example of wiring, in which a through hole TH is formed at a position closer to the LED driver 921 than the center point CT, and a transition from the back surface layer to the front surface layer and a cross wiring CRS are formed.

[0380] [7.5 Specific examples of wiring when opposite connections are not identical but on the same side] The above example of LED substrate 920 is a wiring example in which the LED driver 921 and the full-color LED chips (LED2 to LED16) are mounted on different surfaces. Here, as a modified example of LED substrate 920, a wiring example in which the LED driver 921 and the full-color LED chips are mounted on the same surface will be described with reference to Figs. 53 to 58. In other words, this is an example equivalent to Type 1A in Fig. 29.

[0381] In each figure, the LED driver 921 and the full-color LED chip are both shown as being on the surface layer, with solid lines, and dashed lines indicating the wiring on the back side.

[0382] The connection between the LED driver 921 and LED2 is shown in Fig. 53. Terminals 17, 18, and 19 of the LED driver 921 are connected to the cathode terminals of the LED2 in a type 1A relationship. The wiring from terminals 17, 18, and 19 of the LED driver 921 is led to the back surface layer side via through holes TH, forming cross wiring CRS. Then, via the wiring on the back surface layer, it is led to the front surface layer side via other through holes TH, forming pattern wiring that reaches each terminal of LED2.

[0383] 54 shows the connection between the LED driver 921 and the LED 4. The 21st, 22nd, and 23rd terminals of the LED driver 921 are connected to the cathode terminals of the LED 4 in a type 1A relationship. The wiring from terminals 21, 22, and 23 of the LED driver 921 is led to the back surface layer via through holes TH. In this case, the wiring on the back surface layer is passed through another through hole TH to reach the front surface layer. Here, cross wiring CRS is formed, and pattern wiring leading to each terminal of the LED 4 is formed.

[0384] 55 shows the connection between the LED driver 921 and the LED 7. Terminals 24, 25, and 26 of the LED driver 921 are connected to the cathode terminals of the LED 7 in a type 1A relationship. The wiring from terminals 24, 25, and 26 of the LED driver 921 is led to the back surface layer via through holes TH. Then, via the wiring on the back surface layer, it reaches the front surface layer via other through holes TH. Here, cross wiring CRS is formed, and pattern wiring leading to each terminal of the LED4 is formed.

[0385] The connection between the LED driver 921 and the LED 10 is shown in Figures 56A and 56B. 56A and 56B, terminals 27, 28, and 29 of the LED driver 921 are connected to the cathode terminals of the LEDs 10 in a Type 1A relationship. Wiring from terminals 27, 28, and 29 of the LED driver 921 is led to the back surface layer side via through holes TH, forming cross wiring CRS. Then, via the wiring on the back surface layer, it is led to the front surface layer side via other through holes TH, forming pattern wiring that reaches each terminal of the LEDs 10. Here, the example of FIG. 56A is an example in which the cross wiring CRS is formed on the LED driver 921 side of the center point CT of the wiring length. On the other hand, the example of FIG. 56B is an example in which the cross wiring CRS is formed on the LED 10 side of the center point CT of the wiring length.

[0386] The connection between the LED driver 921 and the LED 11 is shown in Figures 57A and 57B. 57A and 57B, terminals 31, 32, and 33 of the LED driver 921 are connected to the cathode terminals of the LEDs 11 in a Type 1A relationship. Wiring from terminals 31, 32, and 33 of the LED driver 921 is led to the back surface layer side via through holes TH, forming cross wiring CRS. Then, via the wiring on the back surface layer, it is led to the front surface layer side via other through holes TH, forming pattern wiring that reaches each terminal of the LEDs 11. Here, the example of FIG. 57A is an example in which the cross wiring CRS is formed on the LED driver 921 side of the center point CT of the wiring length. On the other hand, the example of FIG. 57B is an example in which the cross wiring CRS is formed on the LED 10 side of the center point CT of the wiring length.

[0387] The connection between the LED driver 921 and the LEDs 14 is shown in Figure 58. Terminals 35, 36, and 37 of the LED driver 921 are connected to the cathode terminals of the LEDs 14 in a Type 1A relationship. Wiring from terminals 35, 36, and 37 of the LED driver 921 is led to the back surface layer side via through holes TH, forming cross wiring CRS. Then, via wiring on the back surface layer, it is led to the front surface layer side via other through holes TH, forming pattern wiring that reaches each terminal of the LEDs 10.

[0388] 53 to 58, the wiring from the LED driver 921 is led to the wiring on the back surface layer via a through hole TH near the LED driver 921. Then, cross wiring CRS is formed at either the through hole TH or the through hole TH that returns to the front surface layer, so that the color sequence matches the color terminals of the full-color LED chip.

[0389] So far, we have explained specific examples where the relationship between the LED driver and full-color LED chip is type 4A, 4B, or 1A, but boards where the relationship between the LED driver and full-color LED chip is type 1B, 2A, 2B, 3A, 3B, 5A, 5B, 6A, or 6B are also possible. In such cases, as explained in the explanation of each type, the assigned colors can be matched by using cross wiring CRS.

[0390] 8. Characteristic Configuration and Effects of the Embodiments The gaming machine 1 according to the embodiment has been described so far. This gaming machine 1 has the following configurations (Configuration A1-1) to (Configuration A9-2).

[0391] (Configuration A1-1) The gaming machine 1 is Full color LED chips and a light emission driving means for allocating a driving current for each color of the full-color LED chip to a plurality of driving current terminals in a specific color order; a light emission control means for generating drive data for each color to be supplied to the light emission drive means as serial data arranged in the specific color order and outputting the serial data from a serial output circuit; A gaming machine having: The full-color LED chip is A first type chip; a second-type chip having a different arrangement order of color terminals from that of the first-type chip; Including, The light emission driving means a first light emission driving means for allocating the driving currents of the respective colors of the full-color LED chip to a plurality of driving current terminals in the specific color order; a second light emission driving means for allocating the driving currents of the respective colors of the full-color LED chip to a plurality of driving current terminals in the specific color order; Including, Each drive current terminal of the second light emission drive means and each color terminal of the second type chip have a mutual relationship in which the assigned colors do not match when they are in an opposing state, a first light emission driving pattern wiring that electrically connects each driving current terminal of the first light emission driving means to each color terminal of the first type chip; a second light emission driving pattern wiring that electrically connects each driving current terminal of the second light emission driving means to each color terminal of the second type chip; and In the second light emission drive pattern wiring, wiring is performed to match the relationship between the assigned colors for each drive current terminal of the second light emission drive means and each color terminal of the second-kind chip.

[0392] The correspondence between this (Configuration A1-1) and the components of each configuration described later and the gaming machine 1 of the embodiment is as follows.

[0393] Light emission control means: performance control board 30 First type chip: the first type chip 115 in FIG. 28, LED1 to LED10 on the LED substrate 630 on the side unit, etc. Second-type chips: the second-type chips 116 in FIG. 28, LED2 to LED16 on the LED substrate 920, etc. First light emission driving means: the LED driver 110 in FIG. 28, the LED driver 631 on the LED board 630 on the side unit, etc. Second light emission driving means: the LED driver 111 in FIG. 28, the LED driver 921 of the LED board 920, etc. First light emission driving pattern wiring: wiring between the LED driver 631 and LED1, LED3, LED5, LED7, and LED9 shown in FIG. 43 Second light emission driving pattern wiring: wiring between the LED driver 921 and LED2, LED4, LED7, LED10, LED11, and LED14 shown in FIG. 46 Specific color order: "G", "R", "B" order

[0394] The first light emission driving means and the second light emission driving means do not necessarily have to be LED drivers with different model numbers. In the embodiment, the LED driver 631 etc. and the LED driver 921 are different IC chips, but this is just an example. For example, the LED driver 921 may be the same driver IC as the LED driver 631, as shown in FIG. The first light emission driving means and the second light emission driving means refer to means in which the order of allocation of colors to the drive current terminals DI is the same, regardless of whether the chip types / model numbers are the same. As a concept of the invention, the LED driver that drives the first kind of chip is the first light emission driving means, and the LED driver that drives the second kind of chip is the second light emission driving means.

[0395] With the above (Configuration A1-1), even if multiple types of full-color LEDs with different color sequences are used in the gaming machine 1, the order of assigned colors can be standardized in the process of reading drive data from ROM 30b, serializing it, transmitting the serial signal, and connecting it to the LED driver terminals. This is convenient for each stage of development and design, and reduces the likelihood of errors. If the order of colors that affect the wiring differs between the driver terminals and the full-color LED chip terminals, this can be addressed by aligning the wiring on the board. The fact that the color order of the light emission drive data from ROM 30b to the LED driver terminals is common also leads to more efficient maintenance.

[0396] Note that "wiring to match the assigned color relationship" refers to wiring to match the assigned colors of electrically connected terminals. In other words, it refers to adjusting the left-right relationship of the R, G, and B wiring so that the drive current terminal DI assigned to G is connected to the cathode terminal of G, the drive current terminal DI assigned to R is connected to the cathode terminal of R, and the drive current terminal DI assigned to B is connected to the cathode terminal of B.

[0397] Furthermore, the gaming machine 1 of the embodiment has the following (Configuration A1-2) in addition to (Configuration A1-1).

[0398] (Configuration A1-2) The second light emission driving pattern wiring includes a pattern wiring including cross wiring using different layers of the substrate.

[0399] For example, as shown in FIGS. 47 to 52, the relationship of assigned colors is matched in the cross wiring CRS. This allows the relationship between the assigned colors of each drive current terminal of the second light-emission drive means and each color terminal of the second-type chip to match with a simple wiring pattern on the board, as it eliminates the need to use jumper wires or run long, wraparound wiring.

[0400] In addition, by providing cross wiring CRS using different layers of the substrate in at least a part of the second light emission driving pattern wiring on the substrate, it is effective in simplifying the wiring pattern. Of course, all of the second light emission driving pattern wirings on one substrate may be cross wiring CRS using different layers of the substrate.

[0401] Furthermore, the gaming machine 1 of the embodiment has the following (Configuration A1-3) in addition to (Configuration A1-1) or in addition to (Configuration A1-1) and (Configuration A1-2).

[0402] (Configuration A1-3) The full-color LED chips connected in series to the drive current terminals of the first light-emitting drive means or the second light-emitting drive means are chips in which the color terminals are arranged in the same order and on the same surface of the substrate.

[0403] That is, in the LED driver of the embodiment, the LEDs connected to one terminal are of the same type. For example, as can be seen from Figures 20 and 41, a plurality of full-color LED chips are connected in series to the drive current terminal DI of the LED driver 631, which is the first light emission drive means, and these chips have the same color terminal arrangement order and are arranged on the same surface of the substrate. As can be seen from Figures 25 and 44, one or more full-color LED chips are connected in series to the drive current terminal DI of LED driver 921, which is the second light emission drive means. In a system in which multiple full-color LED chips are connected in series, the chips are arranged in the same order of color terminals and are placed on the same surface of the substrate.

[0404] When multiple LEDs are connected in series from one drive current terminal DI as shown above, the wiring pattern on the board can be simplified by arranging the color terminals of each full-color LED chip connected in series in the same order and on the same surface of the board. This is because wiring (cross wiring CRS) for matching the assigned color relationships is not required in the area where the anode and cathode terminals of multiple full-color LED chips connected in series are connected to each other.

[0405] Furthermore, the gaming machine 1 of the embodiment has the following (Configuration A1-4) in addition to any one of (Configuration A1-1), (Configuration A1-2), and (Configuration A1-3).

[0406] (Configuration A1-4) The drive current terminals of the first light emission drive means and the color terminals of the first type chips have a mutual relationship in which the assigned colors match when they are opposed to each other.

[0407] That is, when looking at the first light emission drive means, for example, LED driver 631 on LED substrate 630 on side unit, and the first type chips, for example, LED1 to LED10 on LED substrate 630 on side unit, they correspond to Type 1B, and have a mutual relationship in which the assigned colors match when they are placed facing each other. In this case, the wiring between LED driver 631 and LED1, LED3, LED5, LED7, and LED9 (see FIG. 43), which corresponds to the first light emission drive pattern wiring, does not require cross wiring CRS to match the assigned color relationship.

[0408] In this way, on the first light emission drive pattern wiring side, the assigned colors are mutually related when the LED driver and the first type chip are placed facing each other, so the order of assigned colors can be standardized in the readout of drive data from ROM 30b, serialization, serial signal transmission, LED driver terminals, and even full-color LED chips. Therefore, with such a board, design errors are less likely to occur, and the effect of (Configuration A1-1) can be enhanced.

[0409] Note that the drive current terminals of the first light-emission drive means and the color terminals of the first-type chips may have a mutual relationship in which the assigned colors do not match when they are placed opposite each other. For example, this may be the case when LED1 to LED10 on the side unit LED board 630 are full-color LED chips of different model numbers, and their relationship with the LED driver 631 is Type 2B, Type 3B, or the like. In this case, the wiring between the LED driver 631 and LED1, LED3, LED5, LED7, and LED9, which corresponds to the first light-emission drive pattern wiring, is also crossed by CRS wiring to match the assigned color relationship, as with the second light-emission drive pattern wiring. This allows at least the effect of (Configuration A1-1) to be achieved.

[0410] (Configuration A2) The gaming machine 1 is Full color LED chips and a light emission driving means for allocating a driving current for each color of the full-color LED chip to a plurality of driving current terminals in a specific color order; a light emission control means for generating drive data for each color to be supplied to the light emission drive means as serial data arranged in the specific color order and outputting the serial data from a serial output circuit; A gaming machine having: The full-color LED chip is A first type chip; a second-type chip having a different arrangement order of color terminals from that of the first-type chip; Including, The light emission driving means a first light emission driving means to which a plurality of driving current terminals are assigned in the specific color order to drive currents for the full-color LED chips, and to which only the first-type chips are connected as the full-color LED chips; a second light emission driving means to which a plurality of driving current terminals are assigned in the specific color order to drive currents for the full-color LED chips, and to which only the second-type chips are connected as the full-color LED chips; Including, Each driving current terminal of the first light emission driving means and each color terminal of the first type chip have a mutual relationship in which the assigned colors match when they are in an opposing state, Each drive current terminal of the second light emission drive means and each color terminal of the second type chip have a mutual relationship in which the assigned colors do not match when they are in an opposing state, a first light emission driving pattern wiring that electrically connects each driving current terminal of the first light emission driving means to each color terminal of the first type chip; a second light emission driving pattern wiring that electrically connects each driving current terminal of the second light emission driving means to each color terminal of the second type chip; and In the second light emission drive pattern wiring, wiring is performed to match the relationship between the assigned colors for each drive current terminal of the second light emission drive means and each color terminal of the second-kind chip.

[0411] In this case (Configuration A2), the first light emission driving means is connected to only first type chips as full-color LED chips, and the second light emission driving means is connected to only second type chips as full-color LED chips.

[0412] As can be seen from FIG. 41, the full-color LED chips LED1 to LED10 in the LED driver 631 of the LED substrate 630 on the side unit, which corresponds to the first light emission driving means, are all first-type chips. As can be seen from FIG. 44, the full-color LED chips LED2 to LED16 in the LED driver 921 of the LED substrate 920, which corresponds to the second light emission driving means, are all second-type chips.

[0413] This (Configuration A2) not only provides the same effect as the above-mentioned (Configuration A1-1), but also eliminates the need to provide cross-wiring CRS from a certain LED driver to some full-color LED chips and no cross-wiring CRS to other full-color LED chips by using the same type of full-color LED chips driven by one LED driver. This allows for simple wiring from the LED driver and also contributes to reducing design errors.

[0414] In addition to this (Configuration A2), any of the features of (Configuration A1-2) and (Configuration A1-3) described above may be provided, and in that case, the effects of these features will also be added.

[0415] (Configuration A3) The gaming machine 1 is Full color LED chips and a light emission driving means for allocating a driving current for each color of the full-color LED chip to a plurality of driving current terminals in a specific color order; a light emission control means for generating drive data for each color to be supplied to the light emission drive means as serial data arranged in the specific color order and outputting the serial data from a serial output circuit; A gaming machine having: The full-color LED chip is A first type chip; a second-type chip having a different arrangement order of color terminals from that of the first-type chip; Including, The light emission driving means a first light emission driving means for allocating the driving currents of the respective colors of the full-color LED chip to a plurality of driving current terminals in the specific color order; a second light emission driving means for allocating the driving currents of the respective colors of the full-color LED chip to a plurality of driving current terminals in the specific color order; Including, Each driving current terminal of the first light emission driving means and each color terminal of the first type chip have a mutual relationship in which the assigned colors match when they are in an opposing state, Each drive current terminal of the second light emission drive means and each color terminal of the second type chip have a mutual relationship in which the assigned colors do not match when they are in an opposing state, a first substrate on which only the first-type chips are mounted as the full-color LED chips and on which first-type light-emission driving pattern wiring is provided, the first-type light-emission driving pattern wiring electrically connecting each driving current terminal of the first-type light-emission driving means to each color terminal of the first-type chips; a second substrate on which only the second-type chips are mounted as the full-color LED chips and on which second-type light-emission driving pattern wiring is provided that electrically connects each driving current terminal of the second light-emission driving means to each color terminal of the second-type chips; and In the second light emission drive pattern wiring, wiring is performed to match the relationship between the assigned colors for each drive current terminal of the second light emission drive means and each color terminal of the second-kind chip.

[0416] The first substrate in this (configuration A3) is, for example, the LED substrate 630 on the side unit, and the second substrate is the LED substrate 920. The side unit LED substrate 630 is equipped with full-color LED chips LED1 to LED10, all of which are first-type chips, as can be seen from FIG. The LED substrate 920 is equipped with full-color LED chips LED2 to LED16, all of which are second-type chips, as can be seen from FIG.

[0417] This (Configuration A3) not only achieves the same effect as the above-mentioned (Configuration A1-1), but also allows for the use of multiple types of full-color LEDs by simply correcting the arrangement on the second substrate using pattern wiring from the second light-emitting driving means. Since type 1 and type 2 chips are not mixed on the same board, it is easier for board designers to design and mistakes are less likely to occur. For example, for staff designing the pattern of a certain board, if the full-color LED chips mounted on that board are only Type 1 chips, they do not need to consider cross-wiring CRS, and if the full-color LED chips mounted on that board are only Type 2 chips, they only need to consider cross-wiring CRS for all of them.

[0418] In addition to this (Configuration A3), any of the features of (Configuration A1-2), (Configuration A1-3), and (Configuration A2) described above may be provided, and in that case, the effects of these features will also be added.

[0419] (Configuration A4-1) The gaming machine 1 is Full color LED chips and a light emission driving means for allocating a driving current for each color of the full-color LED chip to a plurality of driving current terminals in a specific color order; a light emission control means for generating the drive data for each color stored in a storage means to be supplied to the light emission drive means as serial data arranged in the specific color order and outputting the serial data from a serial output circuit; A gaming machine having: The full-color LED chip is A first type chip; a second-type chip having a different arrangement order of color terminals from that of the first-type chip; Including, the storage means stores the drive data for each color for the first type chips and the drive data for each color for the second type chips in a common color order; The light emission driving means a first light emission driving means for allocating the driving currents of the respective colors of the full-color LED chip to a plurality of driving current terminals in the specific color order; a second light emission driving means for allocating the driving currents of the respective colors of the full-color LED chip to a plurality of driving current terminals in the specific color order; Including, Each drive current terminal of the second light emission drive means and each color terminal of the second type chip have a mutual relationship in which the assigned colors do not match when they are in an opposing state, a first light emission driving pattern wiring that electrically connects each driving current terminal of the first light emission driving means to each color terminal of the first type chip; a second light emission driving pattern wiring that electrically connects each driving current terminal of the second light emission driving means to each color terminal of the second type chip; and In the second light emission drive pattern wiring, wiring is performed to match the relationship between the assigned colors for each drive current terminal of the second light emission drive means and each color terminal of the second-kind chip.

[0420] An example of this light emission control means is the performance control board 30, which has a ROM 30b and a serial output circuit 30d that correspond to storage means. Note that the storage means may be an external memory of the performance control board 30.

[0421] As described in the explanation of Figure 28, the performance control board 30 generates the drive data for each color stored in ROM 30b to be supplied to the LED driver as serial data arranged in a specific color order and outputs it from the serial output circuit 30d. In the ROM 30b, the drive data for each color for the first-type chips 115 and the drive data for each color for the second-type chips 116 are stored in a common color order.

[0422] This allows the algorithms for writing the drive data to be stored and generating serial data to be standardized regardless of the type of full-color LED chip installed, making it extremely easy to design the performance control board 30 and create software for it. In other words, even if multiple types of full-color LEDs with different color sequences are used, the order of each assigned color can be standardized from the readout of drive data from ROM, serialization, serial signal transmission, to the drive current terminal DI of the LED driver. This makes each stage of development and design convenient and reduces the likelihood of errors. If the order of colors that affect the wiring differs between the drive current terminal DI of the LED driver and the terminal of the full-color LED chip, this can be addressed by aligning the wiring on the board.

[0423] Furthermore, the gaming machine 1 of the embodiment has the following (Configuration A4-2) in addition to (Configuration A4-1).

[0424] (Configuration A4-2) The light emission control means generates serial data for the drive data for each color read from the storage means without rearranging the color order, and outputs the serial data from the serial output circuit.

[0425] If the storage means (for example, ROM 30b) is also configured to store the drive data for each color in a specific color order corresponding to the first-type chip 115, the data can be read out and output as serial data without changing the order. This improves the ease of design and is effective in reducing human error.

[0426] In addition to the above (Configuration A4-1), if possible from a configuration standpoint, any of the above-mentioned components (Configuration A1-2), (Configuration A1-3), (Configuration A1-4), (Configuration A2), and (Configuration A3) may be provided, in which case the effects of those components will also be added.

[0427] (Configuration A5-1) The gaming machine 1 is Full color LED chips and a light emission driving means for allocating a driving current for each color of the full-color LED chip to a plurality of driving current terminals in a specific color order; a light emission control means for generating drive data for each color to be supplied to the light emission drive means as serial data arranged in the specific color order and outputting the serial data from a serial output circuit; A gaming machine having: The full-color LED chip is A first type chip; a second-type chip having a different arrangement order of color terminals from that of the first-type chip; Including, The light emission driving means a first light emission driving means for allocating the driving currents of the respective colors of the full-color LED chip to a plurality of driving current terminals in the specific color order; a second light emission driving means for allocating the driving currents of the respective colors of the full-color LED chip to a plurality of driving current terminals in the specific color order; Including, Each drive current terminal of the second light emission drive means and each color terminal of the second type chip have a mutual relationship in which the assigned colors do not match when they are in an opposing state, a first light emission driving pattern wiring that electrically connects each driving current terminal of the first light emission driving means to each color terminal of the first type chip; a second light emission driving pattern wiring that electrically connects each driving current terminal of the second light emission driving means to each color terminal of the second type chip; and The pattern wiring for second light emission drive includes wiring that matches the relationship between assigned colors on the second type chip side relative to the midpoint of the pattern wiring length between each drive current terminal of the second light emission drive means and each color terminal of the second type chip.

[0428] As an example of the second light emission drive pattern wiring, the wiring between the LED driver 921 and the full-color LED chip on the LED substrate 920 will be considered (see FIG. 25 and FIGS. 44 to 52). 50A, 51A, and 52A show the center point CT of the pattern wiring length between the terminals. The cross wiring CRS is formed on the full-color LED chip (LED10, LED11, LED14) side of this center point CT. In the examples of FIGS. 47B, 48A, and 49B, the cross wiring CRS is formed on the LED2, LED4, and LED7 side of the center point CT. In the examples of FIGS. 54, 56B, and 57B, the cross wiring CRS is formed on the LED10, LED11 side of the center point CT.

[0429] This configuration means that in the vicinity of the LED driver 921, the three wires of G, R, and B run in a parallel pattern over a section of relatively long wire length. This makes it easier to understand the wiring for the light-emitting drive current near the driver where wiring is densely packed, and has the advantage of making it easier to check the wiring during design and maintenance. Therefore, the same effect as that of the above-mentioned (Configuration A1-1) can be made more pronounced. In particular, in the case of wiring for full-color LED chips such as LED10, LED11, and LED14 that are relatively far from the LED driver 921, such a configuration is preferable because it improves the visibility of the pattern wiring during design and the like.

[0430] Furthermore, it is not necessary that all of the second light-emission driving pattern wirings be wired so that the assigned colors match on the second-type chip side from the center point of the pattern wiring length between the terminals, but it is preferable that at least part of the second light-emission driving pattern wirings be wired so that the assigned colors match. For example, of the six second light emission driving pattern wirings shown in Fig. 46, the four second light emission driving pattern wirings extracted and shown in Fig. 48A, 50A, 51A, and 52A are wired so that the relationship of assigned colors matches on the second type chip side from the center point CT. Even if only a portion of the second light emission driving pattern wirings fall into this category, the wiring can be easily checked, and the above effect is effective. Of course, all of the second light emission drive pattern wirings on one board may be wired so that the relationship of assigned colors is consistent on the second type chip side from the center point CT.

[0431] The center point CT of the wiring length may be set to a point halfway along the entire length of each of the G, R, and B wirings, but the above effect can be obtained even if it is not set so strictly. The center point CT may be considered for each individual G, R, and B wiring, but for example, it may be the center point of the middle wiring among G, R, and B, for example, the R wiring in the case of Figures 50A, 51A, and 52A, or it may be considered based on the G wiring or the B wiring.

[0432] Furthermore, the gaming machine 1 of the embodiment has the following (Configuration A5-2) in addition to (Configuration A5-1).

[0433] (Configuration A5-2) The pattern wiring for second light emission drive includes wiring that matches the relationship of assigned colors between each drive current terminal of the second light emission drive means and each color terminal of the second type chip on the second type chip side of the 1 / 3 point on the second type chip side of the pattern wiring length between the terminals.

[0434] 50A and 51A show a 1 / 3 point TT on the type 2 chip side. A cross wiring CRS that matches the relationship between assigned colors is formed on the LED10 and LED11 side of this 1 / 3 point TT. This is to form the cross wiring CRS at a position farther away from the LED driver 921 than in the above (Configuration A5-1), and has the effect of lengthening the three parallel wirings, which makes the effect of the above (Configuration A5-1) more pronounced.

[0435] Furthermore, the gaming machine 1 of the embodiment has the following (Configuration A5-3) in addition to (Configuration A5-1) and (Configuration A5-2).

[0436] (Configuration A5-3) The second light emission driving means and the second type chip are arranged on the same surface of a substrate.

[0437] 57B and 58B show examples in which an LED driver 921, which is the second light emission driving means, and LED10 and LED11, which are second-type chips, are arranged on the same surface of an LED substrate 920. In these cases, the cross wiring CRS is formed on the LED10, LED11 side of the center point CT, and further on the LED10, LED11 side of the 1 / 3 point TT.

[0438] In particular, when the LED driver 921 and the full-color LED chip are on the same surface of the board, making the wiring in the vicinity of the LED driver 921 parallel makes it easier for designers to recognize the wiring, which is a great advantage at the time of design.

[0439] Furthermore, the gaming machine 1 of the embodiment has the following (Configuration A5-4) in addition to (Configuration A5-1), (Configuration A5-2), or (Configuration A5-3).

[0440] (Configuration A5-4) The wiring that matches the relationship of assigned colors is cross wiring that uses a surface or layer different from the surface on the substrate on which the second light-emission driving means is arranged.

[0441] For example, in each of the examples of FIGS. 48A, 50A, 51A, 52A, 57B, and 58B, the cross wiring CRS is formed using a surface different from the surface on which the LED driver 921 is arranged. The correspondence between the assigned colors can be corrected by leading the wiring to a surface different from the LED driver 921 using a through hole and leading it to the full-color LED chip via wiring on the other surface or via a through hole and wiring. Although the LED substrate 920 is a substrate that does not have an inner layer, if a multilayer substrate having a surface layer, one or more inner layers, and a back surface layer is used, the cross wiring CRS may be formed using the inner layer.

[0442] Furthermore, the gaming machine 1 of the embodiment has the following (Configuration A5-5) in addition to (Configuration A5-1), (Configuration A5-2), (Configuration A5-3), or (Configuration A5-4).

[0443] (Configuration A5-5) The drive current terminals of the first light emission drive means and the color terminals of the first type chips have a mutual relationship in which the assigned colors match when they are opposed to each other.

[0444] In other words, in (Configuration A5-1) to (Configuration A5-4), each drive current terminal DI of the LED driver 631, which is the first light emission drive means, and LED1 to LED10 on the LED substrate 630 on the side unit, which is the first type chip, are in an opposing relationship as in Type 4A, and their assigned colors match.

[0445] As a result, the color order of the drive data in ROM30b, the color order of the serial data, and the output of the LED driver are all in a common order that matches the color order of the terminals of the first type chips, and the order for the second type chips is adjusted by the wiring on the board. Therefore, the design can be made with the awareness that only the parts that use LEDs other than the first type chips need to be reordered by wiring, reducing human error.

[0446] In addition to the above (Configuration A5-1) to (Configuration A5-5), if possible from a configuration standpoint, any of the above (Configuration A1-2) to (Configuration A4-2) may be provided, in which case the effects of these will also be added.

[0447] (Configuration A6) The gaming machine 1 is Full color LED chips and a light emission driving means for allocating a driving current for each color of the full-color LED chip to a plurality of driving current terminals in a specific color order; a light emission control means for generating drive data for each color to be supplied to the light emission drive means as serial data arranged in the specific color order and outputting the serial data from a serial output circuit; A gaming machine having: The full-color LED chip is A first type chip; a second-type chip having a different arrangement order of color terminals from that of the first-type chip; Including, The light emission driving means a first light emission driving means for allocating the driving currents of the respective colors of the full-color LED chip to a plurality of driving current terminals in the specific color order; a second light emission driving means for allocating the driving currents of the respective colors of the full-color LED chip to a plurality of driving current terminals in the specific color order; Including, Each drive current terminal of the second light emission drive means and each color terminal of the second type chip have a mutual relationship in which the assigned colors do not match when they are in an opposing state, a first substrate provided with first light emission driving pattern wiring that electrically connects each drive current terminal of the first light emission driving means to each color terminal of the first type chip; a second substrate provided with second light emission driving pattern wiring that electrically connects each drive current terminal of the second light emission driving means to each color terminal of the second type chip; and the second substrate has the second light emission driving means mounted on a first surface and the second type chip mounted on a second surface; The second light emission driving pattern wiring includes wiring that matches the relationship between assigned colors on the second surface side for each drive current terminal of the second light emission driving means and each color terminal of the second type chip depending on the formation position of through holes.

[0448] As an example of the second light emission drive pattern wiring, the wiring between the LED driver 921 and the full-color LED chip on the LED substrate 920 will be considered (see FIG. 25 and FIGS. 44 to 52). In all of Figures 47A, 47B, 48A, 48B, 49A, 49B, 50A, 50B, 51A, 51B, 52A, and 52B, wiring (cross wiring CRS) is used to match the assigned color relationships on the second surface side (in these examples, the surface layer side) depending on the formation position of the through hole TH.

[0449] In other words, by shifting the formation position of the through holes TH for the three wirings of G, R, and B, the color order on the other side via the through holes TH is aligned with the arrangement of the second type chip. 47B, for example, the wiring continuing from LED driver 921 on the back surface layer is such that the B wiring reaches the leftmost position on the drawing, followed by the R wiring, and the G wiring reaches the rightmost position on the drawing, and in this state through-holes TH are formed for each. Then, on the front surface layer, at the exit of through-hole TH, the positional relationship of B, R, and G already matches the allocation of the cathode terminal of LED2.

[0450] In this way, the position of the through-holes TH can easily change the order of the three wiring lines G, R, and B. For example, by shifting the position of the through-holes for each of R, G, and B, it is possible to match the relationship between the assigned colors while keeping the three wiring lines running parallel on both the first and second surfaces. Therefore, in addition to the same effect as the above (Configuration A1-1), it is possible to promote simplification of the wiring.

[0451] Furthermore, the above effects can be achieved by wiring at least a portion of the second light emission drive pattern wiring on the substrate in such a way that the relationship between the assigned colors on the second surface side is matched depending on the formation position of the through holes. Of course, all of the second light emission drive pattern wirings on one board may be wired so that the relationship of assigned colors matches on the second surface side depending on the positions at which the through holes are formed.

[0452] In addition to the above (Configuration A6), if possible from a structural standpoint, any of the above (Configuration A1-2) to (Configuration A5-5) may be provided, and in that case, the effects of these will also be added.

[0453] (Configuration A7-1) The gaming machine 1 is Full color LED chips and a light emission driving means for allocating a driving current for each color of the full-color LED chip to a plurality of driving current terminals in a specific color order; a light emission control means for generating drive data for each color to be supplied to the light emission drive means as serial data arranged in the specific color order and outputting the serial data from a serial output circuit; A gaming machine having: The full-color LED chip is A first type chip; a second-type chip having a different arrangement order of color terminals from that of the first-type chip; Including, The light emission driving means a first light emission driving means for allocating the driving currents of the respective colors of the full-color LED chip to a plurality of driving current terminals in the specific color order; a second light emission driving means for allocating the driving currents of the respective colors of the full-color LED chip to a plurality of driving current terminals in the specific color order; Including, Each drive current terminal of the second light emission drive means and each color terminal of the second type chip have a mutual relationship in which the assigned colors do not match when they are in an opposing state, a first substrate provided with first light emission driving pattern wiring that electrically connects each drive current terminal of the first light emission driving means to each color terminal of the first type chip; a second substrate provided with second light emission driving pattern wiring that electrically connects each drive current terminal of the second light emission driving means to each color terminal of the second type chip; and the second substrate has the second light emission driving means mounted on a first surface; The second light emission driving pattern wiring includes wiring in which the relationship between the assigned colors is matched by cross wiring using a layer other than the first surface for each drive current terminal of the second light emission driving means and each color terminal of the second type chip.

[0454] As an example of the second substrate and the second light emission drive pattern wiring, the wiring between the LED driver 921 and the full-color LED chips on the LED substrate 920 will be examined (see FIGS. 25, 44 to 52, and 53 to 58). In all of Figures 47A, 47B, 48A, 48B, 49A, 49B, 50A, 50B, 51A, 51B, 52A, and 52B, an LED driver 921 is mounted on the first surface (in this case, the back surface layer), and wiring is performed to match the assigned color relationships using cross wiring CRS using a layer other than the first surface (in this case, the front surface layer).

[0455] In addition, in all of Figures 53, 54, 55, 56A, 56B, 57A, 57B, and 58, an LED driver 921 is mounted on the first surface (in this case, the front surface layer), and wiring is performed to match the assigned color relationships using cross wiring CRS using a layer other than the first surface (in this case, the back surface layer).

[0456] With this configuration, it is not necessary to correct the left-right relationship due to the wraparound of some of the G, R, and B wiring on the layer on which the LED driver 921 is mounted. By using a surface (layer) different from the LED driver mounting surface, where wiring tends to be dense, it is relatively easy to align the wiring pattern with the terminals of the full-color LED chip, and it is also possible to alleviate the congestion of the wiring pattern around the LED driver.

[0457] Incidentally, the wiring examples in Figures 53 to 58 are examples of Type 1A, in which three wires, G, R, and B, are each led to the second surface, but if the LED driver 921 and the full-color LED chip are on the same surface, as shown in Figure 29, only some of the three wires may be led to the second surface to form cross wiring CRS. The same applies to Type 2A in Fig. 31, Type 3A in Fig. 33, Type 5A in Fig. 37, and Type 6A in Fig. 39. In other words, all three lines of G, R, and B may be led out to the second surface, or only some of them. A configuration in which all three lines are led out to the second surface side as in Figs. 53 to 58 is effective in alleviating the congestion of wiring on the LED driver mounting surface.

[0458] Although the LED substrate 920 is a substrate that does not have an inner layer, if a multilayer substrate having a surface layer, one or more inner layers, and a back surface layer is used, the cross wiring CRS may be formed using the inner layer.

[0459] Furthermore, the gaming machine 1 of the embodiment has the following (Configuration A7-2) in addition to (Configuration A7-1).

[0460] (Configuration A7-2) The second substrate has the second type chip mounted on the first surface.

[0461] In other words, the second light emission driving means and the second type chip are on the same surface. The wiring examples in FIGS. 53 to 58 are examples in which the LED driver 921 and the full-color LED chip are on the same surface. In this case, forming the cross wiring CRS on the second surface is more suitable for reducing the congestion of wiring on the first surface.

[0462] Furthermore, the gaming machine 1 of the embodiment has the following (Configuration A7-3) in addition to (Configuration A7-1).

[0463] (Configuration A7-3) The second substrate has the second type chip mounted on a second surface different from the first surface.

[0464] In other words, the second light emission driving means and the second type chip are on different surfaces. The wiring examples in FIGS. 44 to 54 are examples in which the LED driver 921 and the full-color LED chip are on different sides. In this case, forming the cross wiring CRS using the second surface is suitable for reducing the congestion of wiring on the arrangement surface of the LED driver 921.

[0465] In addition to the above (Configuration A7-1) to (Configuration A7-3), if possible from a structural standpoint, any of the above (Configuration A1-2) to (Configuration A6) may be provided, in which case the effects of these will also be added.

[0466] (Configuration A8) The gaming machine 1 is Full color LED chips and a light emission driving means for allocating a driving current for each color of the full-color LED chip to a plurality of driving current terminals in a specific color order; a light emission control means for generating drive data for each color to be supplied to the light emission drive means as serial data arranged in the specific color order and outputting the serial data from a serial output circuit; A gaming machine having: The full-color LED chip is A first type chip; a second-type chip having a different arrangement order of color terminals from that of the first-type chip; Including, The light emission driving means a first light emission driving means for allocating the driving currents of the respective colors of the full-color LED chip to a plurality of driving current terminals in the specific color order; a second light emission driving means for allocating the driving currents of the respective colors of the full-color LED chip to a plurality of driving current terminals in the specific color order; Including, Each drive current terminal of the second light emission drive means and each color terminal of the second type chip have a mutual relationship in which the assigned colors do not match when they are in an opposing state, a first substrate provided with first light emission driving pattern wiring that electrically connects each drive current terminal of the first light emission driving means to each color terminal of the first type chip; a second substrate provided with second light emission driving pattern wiring that electrically connects each drive current terminal of the second light emission driving means to each color terminal of the second type chip; and the second substrate has the second light emission driving means mounted on a first surface; The pattern wiring for the second light emission drive is wired so that the relationship between the assigned colors on the second surface side matches the relationship between each drive current terminal of the second light emission drive means and each color terminal of the second type chip depending on the position of the through hole, and the position of the through hole includes a position closer to the second light emission drive means than the center position of the wiring length of the pattern wiring between the drive current terminal of the second light emission drive means and the corresponding terminal of the second type chip.

[0467] As an example of the second substrate and the second light emission drive pattern wiring, the wiring between the LED driver 921 and the full-color LED chips on the LED substrate 920 will be examined (see FIGS. 25, 44 to 52, and 53 to 58). In each of the examples in Figures 47A, 48B, 49A, 50B, 51B, 52B, 53, 55, 56A, 57A, and 58, the crossing wiring CRS is formed at the position where the through hole TH is formed, which is on the LED driver 921 side of the center point CT, and the crossing wiring CRS matches the relationship between the assigned colors.

[0468] This configuration has the effect of forming the through-hole TH as close as possible to the LED driver 921 and leading the wiring from the drive current terminal DI of the LED driver 921 to another surface of the board in a short distance. This makes it possible to alleviate the congestion of wiring around the LED driver 921. By avoiding the congestion of wiring and improving the visibility of the wiring around the LED driver 921, it is possible to obtain the advantage of making it easier to check the wiring during design and maintenance. Therefore, the same effect as that of the above-mentioned (Configuration A1-1) can be made more pronounced.

[0469] The above effects can be obtained by forming through holes in at least a part of the second light emission driving pattern wiring on the board in a position close to the LED driver 921 and wiring that matches the relationship of assigned colors. This is because even a part of the second light emission driving pattern wiring can help alleviate wiring congestion. Of course, for all the second light emission drive pattern wirings on one board, the through holes may be formed in positions close to the LED driver 921, and the wiring may be performed so that the relationship between the assigned colors is consistent.

[0470] In addition to the above (Configuration A8), if possible from a structural standpoint, any of the above (Configuration A1-2) to (Configuration A7-3) may be provided, and in that case, the effects of these will also be added.

[0471] (Configuration A9-1) The gaming machine 1 is Full color LED chips and a light emission driving means for allocating a driving current for each color of the full-color LED chip to a plurality of driving current terminals in a specific color order; a light emission control means for generating drive data for each color to be supplied to the light emission drive means as serial data arranged in the specific color order and outputting the serial data from a serial output circuit; A gaming machine having: The serial output circuit outputting at least a first series of serial data in which the drive data for each color is arranged in the specific color order, and a second series of serial data in which the drive data for each color is arranged in the specific color order; The full-color LED chip is A first type chip; a second-type chip having a different arrangement order of color terminals from that of the first-type chip; Including, The light emission driving means a first light emission driving means for allocating the driving currents of the respective colors of the full-color LED chip to a plurality of driving current terminals in the specific color order; a second light emission driving means for allocating the driving currents of the respective colors of the full-color LED chip to a plurality of driving current terminals in the specific color order; Including, Each drive current terminal of the second light emission drive means and each color terminal of the second type chip have a mutual relationship in which the assigned colors do not match when they are in an opposing state, a first light emission driving pattern wiring that electrically connects each driving current terminal of the first light emission driving means to each color terminal of the first type chip; a second light emission driving pattern wiring that electrically connects each driving current terminal of the second light emission driving means to each color terminal of the second type chip; and In the second light emission drive pattern wiring, wiring is performed to match the relationship between the assigned colors for each drive current terminal of the second light emission drive means and each color terminal of the second-kind chip.

[0472] As shown in Figure 11, the serial output circuit 30d of the performance control board 30 is configured to transmit a first system of serial data to the board on the game board 3 side, and to transmit a second system of serial data to the boards on the inner frame 2 and door 6 side.

[0473] The serial data of the first and second systems are serial data of drive data in a specific color order, for example, "G", "R", and "B". As the first light emission driving means for driving the first kind of chips, in addition to the LED driver 631, the LED drivers 605, 621, 631, 661, 663, 782, and 791 are exemplified. The LED driver 921 is exemplified as the second light emission driving means for driving the second kind of chip. Of these, the LED drivers 782, 791, and 921 are on the game board side.

[0474] In this example, the serial data transmission system on the gaming board 3 side has the configuration shown in Fig. 28. That is, the LED drivers 782 and 791 correspond to the LED driver 110 in Fig. 28, and the LED driver 921 corresponds to the LED driver 111 in Fig. 28.

[0475] On the other hand, in terms of the serial data transmission system for the inner frame 2 and the board on the door 6 side, the LED drivers 605, 621, 631, 661, and 663 are all first light emission driving means corresponding to the first type chips. However, the second type chip may be mounted on the front frame LED connection board 500 or another board (not shown), and second light emission driving means for driving the chip may be mounted thereon.

[0476] In other words, each of the multiple serial data transmission systems may be a system that includes a board equipped with a first-type chip and a board equipped with a second-type chip, or, for example, some systems may include only boards equipped with a first-type chip or only boards equipped with a second-type chip. In these cases, by making the color order common for all systems from ROM 30b to the drive current terminal DI of the LED driver, it is possible to realize design efficiency and make mistakes less likely to occur.

[0477] Furthermore, the gaming machine 1 of the embodiment has the following (Configuration A9-2) in addition to (Configuration A9-1).

[0478] (Configuration A9-2) The serial output circuit is a circuit that transmits one of the first and second system serial data to a board on the frame side, and transmits the other to a board on the game board side.

[0479] By having one serial data transmission system on the game board 3 side and the other serial data transmission system on the inner frame 2 and door 6 side, it becomes easier to understand the serial data transmission design from the performance control board 30 to each board on the game board 3 side, and the serial data transmission design from the performance control board 30 to each board on the inner frame 2 and door 6 side, which also promotes design efficiency.

[0480] However, for example, it is possible that all of the boards on the game board 3 side are equipped with second-type chips, while all of the boards on the inner frame 2 and door 6 side are equipped with first-type chips, as in the example embodiment. In other words, the LED drivers on the boards on the inner frame 2 and door 6 side are all configured as first light emission drive means, and the LED drivers on each board on the game board 3 side are all configured as second light emission drive means.

[0481] By dividing the wiring into the game board 3 side and the inner frame 2 and door 6 side in this way, the overall wiring configuration becomes easier to understand. That is, in the serial data transmission system on the gaming board 3 side, the color sequence is aligned by the wiring on the board, and in the serial data transmission systems on the inner frame 2 and door 6 side, the color sequence can be designed and maintained with the understanding that it is common from ROM 30b to the full-color LED chip. This makes it possible to create a gaming machine that is easy for designers and engineers to understand and less prone to mistakes.

[0482] In addition to the above (Configuration A9-1) and (Configuration A9-2), if possible from a structural standpoint, any of the above (Configuration A1-2) to (Configuration A8) may be provided, in which case the effects of these will also be added.

[0483] <9.Other> The above describes the embodiments, but each of the configuration examples from (Configuration A1-1) to (Configuration A9-2) above can be combined in various ways, and by combining them in any way, it is possible to create a gaming machine 1 that combines the effects described in each configuration. In addition, it is possible to combine the configurations and operations described in the embodiments. Furthermore, the various specific examples given are merely one mode for realizing each configuration, and various specific examples that are not specifically shown are also possible.

[0484] The full-color LED chip used is a chip having LEDs of the three primary colors G, R, and B, but the present invention is also effective when other types of full-color LED chips are used, such as chips having LEDs of G, R, B, and W (white).

[0485] In the embodiment, the specific color order is set to "G", "R", and "B", but this is just one example. The specific color order may be set mainly depending on the terminal configuration of the full-color LED chips to be mounted. In other words, determining the specific color order so that there are as many full-color LED chips and LED drivers as possible that are in the relationship of first-type chips and first light-emission driving means is advantageous in terms of ease of design and reduction of errors.

[0486] Furthermore, in the embodiment, the cathode terminal of the full-color LED chip is connected to the LED driver, but the present invention is also effective in a configuration in which the anode terminal is connected to the LED driver.

[0487] In the embodiment, an example has been described in which the relationship between assigned colors is matched by cross wiring CRS using multiple surfaces (layers) of the board. There are other wiring examples for matching the relationship between assigned colors.

[0488] 59A shows an example in which two full-color LED chips 6005 are connected in series to a certain drive current terminal DI of the LED driver 5000. Consider Type 6A in FIG. In this case, however, the cathode terminal of the full-color LED chip 6005 is connected to the drive current terminal DI via resistors R100, R101, and R102.

[0489] The relationship between this LED driver 5000 and full-color LED chip 6005 is such that the assigned colors do not match when they are placed facing each other as described in Fig. 39. In this case, on an actual board, wiring such as that shown in Fig. 59B is possible.

[0490] In Fig. 59B, the three drive current terminals DI of the LED driver 5000 are assigned in the order of "G", "R", and "B" in the direction of the arrow SC, which indicates the order of terminal numbers. Wiring from these three drive current terminals DI is connected to pads at one end of resistors R100, R101, and R102. The resistors R100, R101, and R102 are indicated by dashed lines, and the pads are painted black. In this case, the wiring from the pad on the other end of resistor R101 is formed to pass under resistor R100, so that it matches the assigned colors of the cathode terminal of the full-color LED chip 6010 (in the order of "G", "B", and "R" from the bottom of the figure). For example, wiring can be performed in such a way that the relationship between assigned colors is matched at the connection points of resistors on the wiring.

[0491] In some cases, the resistor pads are extended to other layers by through holes TH. In this case, one end of the resistor can be used in the same way as the through holes TH described above to form crossover wiring CRS.

[0492] For example, FIG. 60 shows an example of wiring between an LED driver 5000 and a full-color LED chip 6003, assuming Type 4B in FIG. In this case, the wiring from these three drive current terminals DI is connected to the pads at one end of the resistors R100, R101, and R102. The pads at the other ends of the resistors R100, R101, and R102 are electrically connected to the back surface layer via through holes (not shown). In this case, by shifting the arrangement of the resistors R100, R101, and R102 as shown in the figure, the colors on the back surface layer match the assigned colors of the cathode terminals of the full-color LED chip 6030 (in the order of "B," "R," and "G" from the bottom of the figure). This also results in wiring that matches the assigned color relationship at the resistor connection points.

[0493] Even when wiring is performed to match the relationship between assigned colors at the resistor placement section as described above, the advantages described in the examples of the positions of the through holes TH (Figures 46 to 58) can be obtained by placing the resistor near the LED driver or near the full-color LED chip.

[0494] Furthermore, although the embodiment has been described using a pachinko gaming machine, the present invention can also be applied to reel-type gaming machines such as so-called slot gaming machines. In the case of a slot machine, it also has a frame member, a door member that is provided so as to be able to open and close relative to the frame member, and an exchange member that is attached so as to be able to be exchanged relative to the frame member. For example, a slot machine has a frame housing as a component equivalent to the frame member, a door as a component equivalent to the door member, and a reel unit as a component equivalent to the replacement component. For example, the frame housing constitutes the main body of the slot machine, and the reel unit is attached to the frame housing directly or via sheet metal or the like by screws. The door is attached to the frame housing in an openable and closable manner. In such slot machine-type gaming machines, full-color LED chips are used in frame members, door members, replacement members, etc. In such cases, the configuration examples of the full-color LED chips and LED drivers, as well as the wiring between them, as explained in each configuration example, can be adopted. [Explanation of symbols]

[0495] 1. Gaming machines 300 Power Supply Board 400 Inner frame LED relay board 500 Front frame LED connection board 550 relay board 600 Side unit upper right LED board 620 Side unit lower right LED board 625 LED board 630 Side unit upper LED board 631 LED Driver 640 Button LED connection board 660 Button LED board 661,663 700 LED connection board 720 Left relay board on the back of the panel 740 Decorative PCB 760 Relay board 780 LED board 790 LED board 800 Relay board under the panel 820 Decorative board 920 LED board 921 LED Driver

Claims

[Claim 1] A full-color LED chip, a plurality of light emission drive means belonging to one serial data system to which serial data is commonly supplied, all of which have a plurality of drive current terminals to which drive currents for the respective colors of the full-color LED chips are assigned in a specific color order; a light emission control means for generating drive data for each color to be supplied to the plurality of light emission drive means as serial data arranged in the specific color order and outputting the serial data from a serial output circuit; A gaming machine having: the light emission control means generates the serial data for the drive data for each color read from the storage means in which the drive data for each color is stored in the specific color order without rearranging the color order, and outputs the serial data from the serial output circuit; At least one of the plurality of light emission drive means has a mutual relationship in which the assigned colors do not match when each drive current terminal and each color terminal of the full-color LED chip to which the drive current is supplied are opposed to each other, and the light emission drive pattern wiring electrically connecting each drive current terminal and each color terminal is wired to match the assigned color relationship on the full-color LED chip side from the center point of the pattern wiring length between the terminals. Gaming machine.

Images