Light-emitting diode display device

Abstract

To provide a light-emitting diode display device with improved luminous efficiency and lifespan. [Solution] The present invention provides a light-emitting diode display device comprising: a substrate on which pixels including light-emitting regions and non-light-emitting regions are defined; a first insulating layer located on the upper part of the substrate; a step compensation pattern located on the first insulating layer and corresponding to the light-emitting region; a second insulating layer covering the step compensation pattern; a first electrode located on the second insulating layer and corresponding to the step compensation pattern; and a pixel defining film located on the second insulating layer in the non-light-emitting region, covering the edge of the first electrode and having an opening corresponding to the center of the first electrode, wherein the step compensation pattern has the same shape as the opening.

Description

[Technical Field]

[0001] The present invention relates to a light-emitting diode display device, and more particularly to a light-emitting diode display device with improved luminous efficiency and lifespan. [Background technology]

[0002] With the increasing size of display devices, there is a growing demand for flat-panel displays that occupy less space. Light-emitting display devices (LEDs), which utilize light-emitting diodes, have been developed as one type of flat-panel display element and are being adopted in a variety of fields.

[0003] Light-emitting diode (LED) display devices can be classified into organic light-emitting diode (OLED) display devices and inorganic light-emitting diode (INOLED) display devices.

[0004] For example, in an organic light-emitting diode (OLED) display device, holes from the anode and electrons from the cathode combine in the organic light-emitting layer to form excitons, resulting in an unstable excited state. Light is emitted when the OLED returns from this state to a stable ground state. [Overview of the project] [Problems that the invention aims to solve]

[0005] Conventionally, light-emitting diode (LED) display devices have a large number of electrodes and wiring for driving pixels, which reduces the luminous efficiency and lifespan of the LED display device. The present invention aims to solve the problem of reduced luminous efficiency and lifespan of LED display devices. [Means for solving the problem]

[0006] To solve the aforementioned problems, the present invention provides a light-emitting diode display device comprising: a substrate on which pixels including light-emitting regions and non-light-emitting regions are defined; a first insulating layer located on the upper part of the substrate; a step compensation pattern located on the first insulating layer and corresponding to the light-emitting region; a second insulating layer covering the step compensation pattern; a first electrode located on the second insulating layer and corresponding to the step compensation pattern; and a pixel definition film located on the second insulating layer in the non-light-emitting region, covering the edge of the first electrode and corresponding to the center of the first electrode, and having an opening, wherein the step compensation pattern has the same shape as the opening.

[0007] In the light-emitting diode display device of the present invention, the area of ​​the step compensation pattern is larger than the area of ​​the opening and smaller than the area of ​​the first electrode.

[0008] In the light-emitting diode display device of the present invention, the step compensation pattern is characterized by being island-shaped.

[0009] The present invention is characterized by further comprising a light-emitting layer located on the first electrode in the opening, and a second electrode covering the pixel definition film and the light-emitting layer in the opening.

[0010] In the light-emitting diode display device of the present invention, at least one end of the step compensation pattern is characterized in that it includes an extended portion that extends below the pixel definition film and protrudes from the first electrode.

[0011] In the light-emitting diode display device of the present invention, the second electrode is electrically connected to the stretched portion of the step compensation pattern.

[0012] In the light-emitting diode display device of the present invention, the pixel definition film and the second insulating layer are characterized in that contact holes corresponding to the stretched portion of the step compensation pattern are formed therein.

[0013] The second electrode is characterized by being connected to the extended portion of the step compensation pattern via the contact hole.

[0014] In the light-emitting diode display device of the present invention, the step compensation pattern is further characterized in that it includes an extended wiring portion that extends along a first direction.

[0015] The light-emitting diode display device of the present invention further includes a third insulating layer located between the substrate and the first insulating layer, and a first signal wiring located on the third insulating layer and extending along the first direction, wherein the extended wiring portion and the first signal wiring are spaced apart from each other in a second direction intersecting the first direction.

[0016] The light-emitting diode display device of the present invention further includes a second signal wiring located on the third insulating layer and extending along the first direction, wherein the extended wiring portion and the second signal wiring are spaced apart from each other in the second direction, and the extended wiring portion is located between the first signal wiring and the second signal wiring.

[0017] The present invention relates to a light-emitting diode display device, characterized in that the thickness of the step compensation pattern is greater than the thickness of the first signal wiring.

[0018] In the light-emitting diode display device of the present invention, the step compensation pattern has a first width in a second direction perpendicular to the first direction, and the extended wiring portion has a second width smaller than the first width.

[0019] In the light-emitting diode display device of the present invention, the first electrode has a single-layer structure of a transparent conductive oxide layer, and the step compensation pattern is used as a reflective layer for light transmitted through the first electrode.

[0020] The light-emitting diode display device of the present invention further includes a light-emitting layer located on the first electrode in the opening, a second electrode covering the pixel defining film and the light-emitting layer in the opening, and a color filter layer located above the second electrode.

[0021] The light-emitting diode display device of the present invention includes a step compensation pattern having the same shape as the first electrode in the opening of the pixel defining film below the first electrode of the light-emitting diode, and can prevent the problem that the flatness of the first electrode is reduced due to the step caused by the electrode and wiring below the light-emitting diode.

[0022] As a result, the light-emitting diode display device of the present invention has the effects of improving the light-emitting efficiency and lifespan and enabling low-power driving.

[0023] Also, the first electrode of the light-emitting diode in the light-emitting diode display device of the present invention has a single-layer structure of a transparent conductive oxide layer, and the step compensation pattern can function as a reflective layer. As a result, in the light-emitting diode display device in which the first electrode includes a transparent conductive oxide layer and a reflective layer, the problem of process defects that may occur in the etching process of the first electrode can be prevented.

[0024] Also, in the light-emitting diode display device of the present invention, the step compensation pattern extends to the lower part of the pixel defining film, and the second electrode of the light-emitting diode is connected to the step compensation pattern through a contact hole formed in the pixel defining film, thereby preventing the problem of voltage drop of the second electrode.

[0025] Also, the step compensation pattern in the light-emitting diode display device of the present invention includes an extension wiring part extending in one direction, so that the step compensation pattern can function as a signal wiring. As a result, the resistance of the signal wiring can be reduced by the step compensation pattern, and the problem of line width limitation of the signal wiring can be prevented by forming it in a layer different from other signal wirings.

Brief Description of the Drawings

[0026] [Figure 1] This is a schematic diagram showing a light-emitting diode display device according to the present invention. [Figure 2] This is a schematic circuit diagram showing the light-emitting diode display device according to the present invention. [Figure 3] This is a schematic plan view showing a light-emitting diode display device according to a first embodiment of the present invention. [Figure 4] This is a schematic cross-sectional view showing a light-emitting diode display device according to a first embodiment of the present invention. [Figure 5] This is a schematic plan view showing a light-emitting diode display device according to a second embodiment of the present invention. [Figure 6] This is a schematic cross-sectional view showing a light-emitting diode display device according to a second embodiment of the present invention. [Figure 7] This is a schematic cross-sectional view showing a light-emitting diode display device according to a third embodiment of the present invention. [Figure 8] This is a schematic plan view showing a light-emitting diode display device according to a fourth embodiment of the present invention. [Figure 9] This is a schematic cross-sectional view showing a light-emitting diode display device according to a fourth embodiment of the present invention. [Modes for carrying out the invention]

[0027] The terminology used in the embodiments of this invention has been selected, as far as possible, to be common terms widely used today, but may differ depending on the intent of the articulators, case law, the emergence of new technologies, etc. Where the applicant has arbitrarily selected specific terms, their meanings will be detailed. Therefore, terms used herein should be defined based on their meaning and the overall content of this disclosure.

[0028] Throughout the specification, if a part is described as "including" or "comprising" a certain component, unless otherwise specified, this does not exclude other components, but rather may include other components.

[0029] Throughout the specification, the expression "at least one of a, b, and c" may encompass "a alone," "b alone," "c alone," "a and b," "a and c," "b and c," or "all of a, b, and c." The advantages and features of the present invention, and how they are achieved, will become clearer with reference to the embodiments detailed with the drawings.

[0030] The shapes, areas, ratios, angles, and quantities disclosed in the drawings illustrating embodiments of the present invention are illustrative and the present invention is not limited thereto. When describing embodiments, if it is determined that a specific explanation of related prior art would obscure the gist of the embodiments, such detailed explanation will be omitted.

[0031] Wherever "equipped," "included," "possessed," "have," or "become" is used in this specification, other parts may be added. Furthermore, wherever a component is described in the singular form, it may be interpreted as plural unless otherwise explicitly stated. In interpreting components, a margin of error is included even without explicit mention.

[0032] For example, when describing the positional relationship between two components using terms such as "above," "above," "below," or "beside," one or more other components may be located between those two components. When an element or layer is described as "on" another element or layer, this includes all cases where another layer or other element is directly above or between it and the other element.

[0033] Furthermore, while terms such as "first" and "second" are used to distinguish the components, the components are not limited to these terms. Therefore, the first component mentioned below may also be the second component within the technical concept of the present invention.

[0034] The area, length, and thickness of each component described in the specification are illustrated for illustrative purposes only and do not necessarily limit the present invention to them.

[0035] The features of each of the multiple embodiments of the present invention can be combined or integrated partially or entirely, enabling a wide range of technically diverse interconnections and drives. Furthermore, each embodiment can be implemented independently of or in conjunction with one another.

[0036] Furthermore, the terms described later are defined in consideration of their function in implementing the present invention, and may differ depending on the intent or conventions of the user or operator. Therefore, these terms should be defined based on the overall content of this specification.

[0037] Unless otherwise specified, the transistors constituting the pixel circuit of the present invention may include at least one of the following: oxide thin film transistors (Oxide TFTs), amorphous silicon TFTs (a-Si TFTs), and low-temperature polysilicon TFTs (Low Temperature Polysilicon TFTs (LTPS TFTs).

[0038] Expressions such as "First," "Second," and "Third" are terms used to distinguish the configuration of each embodiment, and the embodiments are not limited to these terms. Therefore, the same term may refer to different configurations depending on the embodiment.

[0039] The present invention's light-emitting diode display device will now be described with reference to the drawings.

[0040] Figure 1 is a schematic diagram showing a light-emitting diode display device according to an embodiment of the present invention. The light-emitting diode display device may be an organic light-emitting diode (OLED display device) equipped with an organic light-emitting diode using an organic light-emitting material, or an inorganic light-emitting diode (OLED display device) equipped with an inorganic light-emitting diode using an inorganic light-emitting material (for example, quantum dots).

[0041] As shown in Figure 1, the light-emitting diode display device according to an embodiment of the present invention includes a timing control unit 120, a data drive unit 122, a first gate drive unit 124, a second gate drive unit 126, and a display panel 128.

[0042] The timing control unit 120 can generate video data, data control signals, and gate control signals using multiple timing signals such as video signals, data enable signals, horizontal synchronization signals, vertical synchronization signals, and clock signals input from an external system (not shown). The timing control unit 120 also inputs the generated video data and data control signals to the data drive unit 122, and the generated gate control signals to the first gate drive unit 124 and the second gate drive unit 126.

[0043] The data drive unit 122 generates a data signal (data voltage, Vda in Figure 2) using the data control signal and video data transmitted from the timing control unit 120, and applies the generated data signal to the data wiring DL of the display panel 128.

[0044] The first gate drive unit 124 and the second gate drive unit 126 generate gate signals (gate voltages, Vsc and Vse in Figure 2) using gate control signals transmitted from the timing control unit 120, and apply the generated gate signals Vsc and Vse to the gate wiring GL of the display panel 128.

[0045] Here, the first gate drive unit 124 and the second gate drive unit 126 are formed together on the substrate of the display panel 128 on which the gate wiring GL, data wiring DL, and pixel P are formed, and may be of the gate-in-panel (GIP) type, located in the non-display area NDA.

[0046] In the embodiment shown in Figure 1, the first gate drive unit 124 and the second gate drive unit 126 are arranged on both sides of the display panel 128 as an example, but in other embodiments, one gate drive unit may be arranged on one side of the display panel 128.

[0047] The display panel 128 includes a central display area DA and a non-display area NDA surrounding the display area DA, and displays images using gate signals Vsc, Vse and data signal Vda. The display panel 128 includes multiple pixels P, multiple gate lines GL, and multiple data lines DL arranged in the display area DA to display images.

[0048] Each of the multiple pixels P includes the first to fourth pixels SP1, SP2, SP3, and SP4, and the gate wiring GL and data wiring DL intersect with each other, defining the first to fourth pixels SP1 to SP4, and the first to fourth pixels SP1 to SP4 are connected to the gate wiring GL and data wiring DL, respectively. For example, each of the first to fourth pixels SP1 to SP4 may be a red pixel region, a green pixel region, a blue pixel region, and a white pixel region.

[0049] Each of the first pixel SP1 through the fourth pixel SP4 may include multiple transistors such as a switching transistor (Tsw in Figure 2), a driving transistor (Tdr in Figure 2), and a sensing transistor (Tse in Figure 2), as well as a storage capacitor (Cst in Figure 2) and a light-emitting diode (D in Figure 2).

[0050] Figure 2 shows the pixels of a light-emitting diode display device according to an embodiment of the present invention. It will be explained with reference to both Figure 1 and Figure 2.

[0051] As shown in Figure 2, each of the first to fourth pixels SP1 to SP4 of the light-emitting diode display device according to an embodiment of the present invention includes a switching transistor Tsw, a driving transistor Tdr, a sensing transistor Tse, a storage capacitor Cst, and a light-emitting diode D.

[0052] In Figure 2, each of the first pixel SP1 through the fourth pixel SP4 is a 3T1C, containing three transistors and one capacitor. Alternatively, each of the first pixel SP1 through the fourth pixel SP4 may be one of the following: 6T1C, containing six transistors and one capacitor; 7T1C, containing seven transistors and one capacitor; or 8T1C, containing eight transistors and one capacitor.

[0053] In Figure 2, the switching transistor Tsw, the driving transistor Tdr, and the sensing transistor Tse are all shown as negative (N) type in an example, but in other embodiments, at least one of the switching transistor Tsw, the driving transistor Tdr, and the sensing transistor Tse may be positive (P) type.

[0054] The switching transistor Tsw can perform switching based on the scan signal Vsc and transmit the data signal Vda to the first node N1.

[0055] The gate electrode of the switching transistor Tsw is connected to the gate wiring GL and receives the scan signal Vsc, the drain electrode of the switching transistor Tsw is connected to the data wiring DL and receives the data signal Vda, and the source electrode of the switching transistor Tsw can be connected to the first node N1.

[0056] The drive transistor Tdr is switched by the voltage at the first node N1, and can transmit a high-potential signal (high-potential voltage) Vdd to the second node N2.

[0057] The gate electrode of the drive transistor Tdr is connected to the first node N1, the drain electrode of the drive transistor Tdr is connected to the power supply wiring and receives a high potential signal Vdd, and the source electrode of the drive transistor Tdr can be connected to the second node N2.

[0058] The sensing transistor Tse is switched by the sensing signal (sensing voltage) Vse and can transmit the reference signal (reference voltage) Vre to the second node N2, or transmit the voltage of the second node N2 to the reference wiring.

[0059] The gate electrode of the sensing transistor Tse is connected to the gate wiring GL and receives the sensing signal Vse; the drain electrode of the sensing transistor Tse is connected to the reference wiring and receives the reference signal Vre, or transmits the voltage of the second node N2 to the reference wiring; and the source electrode of the sensing transistor Tse can be connected to the second node N2.

[0060] The storage capacitor Cst can maintain the data signal Vda supplied to the first node N1 for one frame and store the threshold voltage Vth of the drive transistor Tdr.

[0061] The first and second capacitor electrodes of the storage capacitor Cst can be connected to the first node N1 and the second node N2, respectively.

[0062] Light-emitting diode D can emit light with a brightness proportional to the current of the driving transistor Tdr.

[0063] The anode of light-emitting diode D is connected to the second node N2, and the cathode of light-emitting diode D is connected to the power supply wiring and can receive a low-potential signal Vss.

[0064] The source electrode of the switching transistor Tsw, the gate electrode of the driving transistor Tdr, and the first capacitor electrode of the storage capacitor Cst constitute the first node N1, and the source electrode of the driving transistor Tdr, the source electrode of the sensing transistor Tse, the second capacitor electrode of the storage capacitor Cst, and the anode of the light-emitting diode D can constitute the second node N2.

[0065] In this way, by driving the pixel circuits of the first pixel SP1 to the fourth pixel SP4, the light-emitting diode D can display an image with a brightness corresponding to the video data.

[0066] Figure 3 is a schematic plan view showing a light-emitting diode display device according to a first embodiment of the present invention.

[0067] Referring to Figure 3, the light-emitting diode display device 100 according to the first embodiment of the present invention includes a first pixel P1, a second pixel P2, a third pixel P3, a first signal wiring SL1 to a third signal wiring SL3 that cross the first pixel P1 and the third pixel P3 and extend in one direction, and a fourth signal wiring SL4 that crosses the second pixel P2 and extends alongside the first signal wiring SL1 to the third signal wiring SL3.

[0068] For example, the first pixel P1 may be a red pixel, the second pixel P2 may be a green pixel, and the third pixel P3 may be a blue pixel. The light-emitting diode display device 100 may further include a fourth pixel which is a white pixel.

[0069] The first pixel P1 and the third pixel P3 have the same shape, while the second pixel P2 may have a different shape from the first pixel P1 and the third pixel P3. However, the shapes of the first pixel P1 through the third pixel P3 are not limited to these.

[0070] The area of ​​the third pixel P3 may be larger than the areas of the first pixel P1 and the second pixel P2, and the area of ​​the first pixel P1 may be smaller than or the same as the area of ​​the second pixel P2. However, the areas of the first pixel P1 through the third pixel P3 are not limited to these.

[0071] The first pixel P1 and the third pixel P3 are arranged alternately along the first direction X, and the second pixel P2 is spaced apart from the pixel row containing the first pixel P1 and the third pixel P3 in the second direction Y, and is arranged along the first direction X. The second direction Y intersects the first direction X. For example, the second direction Y may be perpendicular to the first direction X.

[0072] In each of the first pixel P1 to the third pixel P3, the first electrode 160a of a light-emitting diode (D in Figure 2) is arranged in an island-like configuration.

[0073] Each of the first signal wires SL1 through SL4 extends along the second direction Y and is spaced apart from one another in the first direction X. The first signal wire SL1 is located between the second signal wire SL2 and the third signal wire SL3, and the fourth signal wire SL4 is located on one side of the second signal wire SL2 and on the other side of the third signal wire SL3.

[0074] The first signal wire SL1 is a high-potential signal wire for applying a high-potential signal (Vdd in Figure 2), and the second signal wire SL2 and the third signal wire SL3 can each be data wires (DL in Figure 1). The fourth signal wire SL4 can be a reference signal wire for applying a reference signal (Vre in Figure 2).

[0075] Figure 4 is a schematic cross-sectional view showing a light-emitting diode display device according to the first embodiment of the present invention, and shows the portion along the cutting line II' in Figure 3.

[0076] As shown in Figure 4, the light-emitting diode display device 100 includes a substrate 102 containing a pixel P, a pixel circuit layer located on the upper part of the substrate 102 corresponding to the pixel P and containing a first transistor T1 and a second transistor T2, a first insulating layer 150a located on the upper part of the pixel circuit layer, first signal wiring SL1 to third signal wiring SL3 located on the first insulating layer 150a, a second insulating layer 150b covering the first signal wiring SL1 to third signal wiring SL3, and a light-emitting diode D located on the second insulating layer 150b.

[0077] Multiple pixels P are defined on the substrate 102. The substrate 102 may be a glass substrate or a plastic substrate.

[0078] In one embodiment of the present invention, the substrate 102 may have a three-layer structure including a first polyimide film, a second polyimide film, and an interlayer inorganic film between the first polyimide film and the second polyimide film.

[0079] A first buffer layer 104 is provided on the substrate 102. The first buffer layer 104 serves to block moisture and oxygen from the outside.

[0080] A first light-shielding pattern 106 is provided on the first buffer layer 104. The first light-shielding pattern 106 serves to block incident light from below the substrate 102.

[0081] Furthermore, a first capacitor electrode 108 is provided on the first buffer layer 104. The first capacitor electrode 108 can be separated from the first light-shielding pattern 106.

[0082] A second buffer layer 110 is provided on the upper part of the substrate 102, covering the first light-shielding pattern 106 and the first capacitor electrode 108. The second buffer layer 110 serves to block moisture and oxygen from the outside.

[0083] A second capacitor electrode 112 corresponding to the first capacitor electrode 108 is provided on the second buffer layer 110. The second capacitor electrode 112 overlaps the first capacitor electrode 108, and the first capacitor electrode 108, the second buffer layer 110, and the second capacitor electrode 112 constitute a storage capacitor Cst.

[0084] A third buffer layer 114 is provided on the upper part of the substrate 102, covering the second capacitor electrode 112. The third buffer layer 114 serves to block moisture and oxygen from the outside.

[0085] A second light-shielding pattern 116 is provided on the third buffer layer 114. The second light-shielding pattern 116 serves to block light from below the substrate 102.

[0086] A fourth buffer layer 118 is provided on the upper part of the substrate 102, covering the second light-shielding pattern 116. The fourth buffer layer 118 serves to block moisture and oxygen from the outside.

[0087] A first semiconductor layer 130 and a second semiconductor layer 132 spaced apart from the first semiconductor layer 130 are provided on the fourth buffer layer 118. The first semiconductor layer 130 corresponds to the first light-shielding pattern 106, and the second semiconductor layer 132 corresponds to the second light-shielding pattern 116.

[0088] Each of the first semiconductor layer 130 and the second semiconductor layer 132 may contain one of the following: a polycrystalline semiconductor material, an amorphous semiconductor material, or an oxide semiconductor material.

[0089] In embodiments of the present invention, each of the first semiconductor layer 130 and the second semiconductor layer 132 can be formed from an oxide semiconductor material such as indium gallium zinc oxide (IGZO), zinc oxide (ZnO), tin oxide (SnO2), copper oxide (Cu2O), nickel oxide (NiO), indium tin zinc oxide (ITZO), or indium aluminum zinc oxide (IAZO).

[0090] In another embodiment of the present invention, the first semiconductor layer 130 and the second semiconductor layer 132 can each be formed from a polycrystalline semiconductor material such as polycrystalline silicon.

[0091] Furthermore, in other embodiments of the present invention, one of the first semiconductor layer 130 and the second semiconductor layer 132 may be formed from an oxide semiconductor material, and the other from a polycrystalline semiconductor material. In this case, the first semiconductor layer 130 and the second semiconductor layer 132 may be provided in different layers.

[0092] The first semiconductor layer 130 includes a first channel region 130a and first source regions 130b and first drain regions 130c on either side of the first channel region 130a. Each of the first source region 130b and the first drain region 130c is doped with an impurity.

[0093] The second semiconductor layer 132 includes a second channel region 132a and second source regions 132b and second drain regions 132c on either side of the second channel region 132a. Each of the second source region 132b and the second drain region 132c is doped with an impurity.

[0094] A gate insulating film 134 is provided above the fourth buffer layer 118, covering the first semiconductor layer 130 and the second semiconductor layer 132.

[0095] A first gate electrode 136 corresponding to the first channel region 130a of the first semiconductor layer 130, and a second gate electrode 138 corresponding to the second channel region 132a of the second semiconductor layer 132 are provided on the gate insulating film 134.

[0096] A first interlayer insulating film 140 is provided above the gate insulating film 134, covering the first gate electrode 136 and the second gate electrode 138.

[0097] A first source electrode 142a, a first drain electrode 142b, a second source electrode 144a, and a second drain electrode 144b are provided on the first interlayer insulating film 140, spaced apart from each other.

[0098] The first source electrode 142a and the first drain electrode 142b are connected to the first source region 130b and the first drain region 130c of the first semiconductor layer 130, respectively, via contact holes formed in the first interlayer insulating film 140 and the gate insulating film 134. The first source electrode 142a is also connected to the first capacitor electrode 108 via contact holes formed in the first interlayer insulating film 140, the gate insulating film 134, the fourth buffer layer 118, the third buffer layer 114, and the second buffer layer 110.

[0099] The second source electrode 144a and the second drain electrode 144b are connected to the second source region 132b and the second drain region 132c of the second semiconductor layer 132, respectively, via contact holes formed in the first interlayer insulating film 140 and the gate insulating film 134. The second source electrode 144a is also connected to the second capacitor electrode 112 via contact holes formed in the first interlayer insulating film 140, the gate insulating film 134, the fourth buffer layer 118, and the third buffer layer 114.

[0100] The first semiconductor layer 130, the first gate electrode 136, the first source electrode 142a, and the first drain electrode 142b constitute the first transistor T1, and the second semiconductor layer 132, the second gate electrode 138, the second source electrode 144a, and the second drain electrode 144b constitute the second transistor T2. The first transistor T1 and the second transistor T2 may each be thin-film transistors.

[0101] An insulating layer 150 is provided above the first interlayer insulating film 140, covering the first source electrode 142a, the first drain electrode 142b, the second source electrode 144a, and the second drain electrode 144b. In other words, the insulating layer 150 covers the first transistor T1 and the second transistor T2.

[0102] The insulating layer 150 may include a first insulating layer 150a located on the first source electrode 142a, the first drain electrode 142b, the second source electrode 144a, and the second drain electrode 144b, and a second insulating layer 150b located on the first insulating layer 150a. For example, the first insulating layer 150a and the second insulating layer 150b can be formed from the same material.

[0103] A connecting electrode 152 corresponding to the second source electrode 144a is provided on the first insulating layer 150a. The connecting electrode 152 can be connected to the second source electrode 144a through a contact hole formed in the first insulating layer 150a.

[0104] Furthermore, first signal wiring SL1 to third signal wiring SL3 are provided on the first insulating layer 150a. Each of the first signal wiring SL1 to third signal wiring SL3 is spaced apart from the connecting electrode 152. Also, the first signal wiring SL1 to third signal wiring SL3 are spaced apart from each other.

[0105] A second insulating layer 150b is provided on the first insulating layer 150a, covering the connecting electrode 152 and the first signal wiring SL1 to the third signal wiring SL3, and the first electrode 160a is provided on the second insulating layer 150b. The first electrode 160a is connected to the connecting electrode 152 through a contact hole formed in the second insulating layer 150b.

[0106] The first electrode 160a is formed separately for each pixel P. The first electrode 160a is the anode and may include a transparent conductive oxide layer and a reflective layer made of a conductive material with a relatively large work function, such as transparent conductive oxide (TCO).

[0107] The transparent conductive oxide layer can be formed from indium tin oxide (ITO), indium zinc oxide (IZO), indium tin zinc oxide (ITZO), tin oxide (SnO), zinc oxide (ZnO), indium copper oxide (ICO), and aluminum:zinc oxide (Al:ZnO, AZO). The reflective layer can be formed from silver (Ag), or an alloy of silver (Ag) with at least one of palladium (Pd), copper (Cu), indium (In), or neodymium (Nd), or an aluminum palladium copper (APC) alloy. For example, the first electrode 160a may have a two-layer structure of Ag / ITO or APC / ITO, or a three-layer structure of ITO / Ag / ITO or ITO / APC / ITO.

[0108] Furthermore, a pixel definition film 154 (bank) located at the boundary of the pixel P is provided on the second insulating layer 150b. The pixel definition film 154 may have an opening that covers the edge of the first electrode 160a while exposing the center of the first electrode 160a.

[0109] Although not shown in the diagram, a spacer can be provided on the pixel definition film 154.

[0110] The light-emitting layer 160b is provided while covering the first electrode 160a and the pixel definition film 154. The light-emitting layer 160b contacts the first electrode 160a at the opening of the pixel definition film 154. That is, the light-emitting layer 160b can be formed in contact with the upper surface of the first electrode 160a and the side and upper surfaces of the pixel definition film 154.

[0111] For example, the light-emitting layer 160b may comprise a light-emitting material layer containing a host and a dopant. Alternatively, the light-emitting material layer of the light-emitting layer 160b may include an inorganic light-emitting material such as a quantum dot. Furthermore, the light-emitting layer 160b may have a multilayer structure further comprising at least one of the following: a hole injection layer, a hole transport layer, an electron barrier layer, a hole barrier layer, an electron transport layer, or an electron injection layer.

[0112] A second electrode 160c is provided on the light-emitting layer 160b. The second electrode 160c can be formed from one of the following: indium tin oxide (ITO), indium zinc oxide (IZO), aluminum (Al), silver (Ag), copper (Cu), lead (Pb), magnesium (Mg), molybdenum (Mo), titanium (Ti), or alloys thereof, and may have a single-layer structure or a multilayer structure. The second electrode 160c may be a thin transparent electrode or a semi-transparent electrode.

[0113] The first electrode 160a, the light-emitting layer 160b, and the second electrode 160c constitute a light-emitting diode D. The light-emitting diode D can emit red light, green light, and blue light from its red, green, and blue pixels, respectively.

[0114] In the light-emitting diode display device 100, light from the light-emitting layer 160b passes through the second electrode 160c, and an image is displayed. In other words, the light-emitting diode display device 100 of the present invention is a top-emission type display device.

[0115] A capsule sealing layer 162 that suppresses moisture penetration is placed over the entire surface of the substrate 102 above the second electrode 160c. The capsule sealing layer 162 may have a multilayer structure including a first inorganic layer 162a, an organic layer 162b, and a second inorganic layer 162c that are arranged sequentially.

[0116] On the capsule sealing layer 162, a fifth buffer layer 164 is provided across the entire surface of the substrate 102. The fifth buffer layer 164 serves to block moisture and oxygen from the outside.

[0117] A bridge pattern 166 is provided on the fifth buffer layer 164. If the fifth buffer layer 164 is omitted, multiple bridge patterns 166 can be formed directly above the capsule sealing layer 162.

[0118] On multiple bridge patterns 166, a second interlayer insulating film 170 is provided over the entire surface of the substrate 102.

[0119] A touch electrode 172 is provided on the second interlayer insulating film 170. The touch electrode 172 includes a first touch electrode 172a spaced apart from each other and a second touch electrode 172b positioned between the first touch electrodes 172a. The second touch electrodes 172b are connected to each other via a bridge pattern 166 formed in the second interlayer insulating film 170.

[0120] On the first touch electrode 172a and the second touch electrode 172b, the first protective layer 174 is provided over the entire surface of the substrate 102.

[0121] A black matrix 175 is provided on the first protective layer 174. The black matrix 175 is located at the boundary of the pixel P and has an opening corresponding to the light-emitting diode D. That is, the opening of the black matrix 175 corresponds to the opening of the pixel definition film 154.

[0122] A color filter layer 177 corresponding to the openings of the black matrix 175 is provided on the first protective layer 174, and a second protective layer 179 is provided over the entire surface of the substrate 102 on the black matrix 175 and the color filter layer 177.

[0123] In the light-emitting diode display device 100 according to the first embodiment of the present invention, the first signal wiring SL1 to the third signal wiring SL3 correspond to pixels P and are arranged across pixels P, so that the limitations on the line width of the first signal wiring SL1 to the third signal wiring SL3 can be minimized.

[0124] However, because the first signal wiring SL1 to the third signal wiring SL3 are located below the first electrode 160a of the light-emitting diode D, with the second insulating layer 150b in between, the step caused by the first signal wiring SL1 to the third signal wiring SL3 can generate waves on the surfaces of the second insulating layer 150b and the first electrode 160a, respectively. As a result, a problem may occur in which the luminous efficiency and / or lifespan of the light-emitting diode D and the light-emitting diode display device 100 including it are reduced.

[0125] Figure 5 is a schematic plan view showing a light-emitting diode display device according to a second embodiment of the present invention.

[0126] As shown in Figure 5, the light-emitting diode display device 200 according to the second embodiment of the present invention includes a first pixel P1, a second pixel P2, a third pixel P3, first signal wiring SL1 to third signal wiring SL3 that cross the first pixel P1 and the third pixel P3 and extend in one direction, and a fourth signal wiring SL4 that crosses the second pixel P2 and extends alongside the first signal wiring SL1 to third signal wiring SL3.

[0127] For example, the first pixel P1 may be a red pixel, the second pixel P2 may be a green pixel, and the third pixel P3 may be a blue pixel. The light-emitting diode display device 200 may further include a fourth pixel which is a white pixel.

[0128] The first pixel P1 and the third pixel P3 have the same shape, while the second pixel P2 may have a different shape from the first pixel P1 and the third pixel P3. However, the shapes of the first pixel P1 through the third pixel P3 are not limited to these.

[0129] The area of ​​the third pixel P3 may be larger than the areas of the first pixel P1 and the second pixel P2, and the area of ​​the first pixel P1 may be smaller than or the same as the area of ​​the second pixel P2. However, the areas of the first pixel P1 through the third pixel P3 are not limited to these.

[0130] The first pixel P1 and the third pixel P3 are arranged alternately along the first direction X, and the second pixel P2 is spaced apart from the pixel row containing the first pixel P1 and the third pixel P3 in the second direction Y, and is arranged along the first direction X.

[0131] Each of the first signal wires SL1 through SL4 extends along the second direction Y and is spaced apart from one another in the first direction X. The first signal wire SL1 is located between the second signal wire SL2 and the third signal wire SL3, and the fourth signal wire SL4 is located on one side of the second signal wire SL2 and on the other side of the third signal wire SL3.

[0132] The first signal wire SL1 is a high-potential signal wire for applying a high-potential signal (Vdd in Figure 2), and the second signal wire SL2 and the third signal wire SL3 can each be data wires (DL in Figure 1). The fourth signal wire SL4 can be a reference signal wire for applying a reference signal (Vre in Figure 2).

[0133] In Figure 5, three signal lines SL1, SL2, and SL3 are arranged corresponding to the first pixel P1 and the third pixel P3, and one signal line SL4 is arranged corresponding to the second pixel P2. However, the arrangement of pixels P1, P2, P3 and signal lines SL1, SL2, and SL3 in the light-emitting diode display device 200 of the present invention is not limited to this.

[0134] In each of the first pixel P1 to the third pixel P3, the first electrode 260a of a light-emitting diode (D in Figure 2) is arranged in an island-like configuration.

[0135] Furthermore, a step compensation pattern 280 corresponding to the first electrode 260a is positioned below the first electrode 260a for each of the first pixels P1 to the third pixels P3.

[0136] Figure 6 is a schematic cross-sectional view of a light-emitting diode display device according to a second embodiment of the present invention, showing the portion along the cutting line II-II' in Figure 5.

[0137] As shown in Figure 6, the light-emitting diode display device 200 includes a substrate 202 containing a pixel P, a pixel circuit layer located on the upper part of the substrate 202 corresponding to the pixel P and containing a first transistor T1 and a second transistor T2, a first insulating layer 250a located on the upper part of the pixel circuit layer, first signal wiring SL1 to third signal wiring SL3 located on the first insulating layer 250a, a second insulating layer 250b covering the first signal wiring SL1 to third signal wiring SL3, a step compensation pattern 280 located on the second insulating layer 250b, a third insulating layer 250c located on the step compensation pattern 280, and a light-emitting diode D located on the third insulating layer 250c.

[0138] Multiple pixels P are defined on the substrate 202. The substrate 202 may be a glass substrate or a plastic substrate. For example, the substrate 202 may be any one of the following: a polyimide (PI) substrate, a polyethersulfone (PES) substrate, a polyethylene naphthalate (PEN) substrate, a polyethylene terephthalate (PET) substrate, or a polycarbonate (PC) substrate.

[0139] In one embodiment of the present invention, the substrate 202 may have a three-layer structure including a first polyimide film, a second polyimide film, and an interlayer inorganic film between the first polyimide film and the second polyimide film.

[0140] A first buffer layer 204 is provided on the substrate 202. The first buffer layer 204 serves to block moisture and oxygen from the outside. For example, the first buffer layer 204 is made of silicon oxide (SiO2) or silicon nitride (SiN x It can be formed from inorganic insulating materials such as ). Furthermore, the first buffer layer 204 may have a single-layer structure or a multilayer structure.

[0141] A first light-shielding pattern 206 is provided on the first buffer layer 204. The first light-shielding pattern 206 serves to block incident light from below the substrate 202.

[0142] Furthermore, a first capacitor electrode 208 is provided on the first buffer layer 204. The first capacitor electrode 208 can be separated from the first light-shielding pattern 206.

[0143] The first light-shielding pattern 206 and the first capacitor electrode 208 can be formed from the same material. For example, each of the first light-shielding pattern 206 and the first capacitor electrode 208 can be formed from a metallic material such as one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu), or an alloy thereof, and may have a single-layer structure or a multi-layer structure.

[0144] A second buffer layer 210 is provided on top of the substrate 202, covering the first light-shielding pattern 206 and the first capacitor electrode 208. The second buffer layer 210 serves to block moisture and oxygen from the outside. For example, the second buffer layer 210 is made of silicon oxide (SiO2) or silicon nitride (SiN xIt can be formed from inorganic insulating materials such as ). Furthermore, the second buffer layer 210 may be a single layer or a multilayer structure.

[0145] A second capacitor electrode 212 corresponding to the first capacitor electrode 208 is provided on the second buffer layer 210. For example, the second capacitor electrode 212 can be formed from a metallic material such as molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu), or an alloy thereof, and may have a single-layer structure or a multilayer structure.

[0146] The second capacitor electrode 212 overlaps the first capacitor electrode 208, and the first capacitor electrode 208, the second buffer layer 210, and the second capacitor electrode 212 constitute a storage capacitor Cst.

[0147] A third buffer layer 214 is provided on the upper part of the substrate 202, covering the second capacitor electrode 212. The third buffer layer 214 serves to block moisture and oxygen from the outside. For example, the third buffer layer 214 is made of silicon oxide (SiO2) or silicon nitride (SiN x It can be formed from inorganic insulating materials such as ). Furthermore, the third buffer layer 214 may be a single layer or a multilayer structure.

[0148] A second light-shielding pattern 216 is provided on the third buffer layer 214. The second light-shielding pattern 216 serves to block light from below the substrate 202. For example, the second light-shielding pattern 216 can be formed from a metallic material such as molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu), or an alloy thereof, and may be a single-layer or multi-layer structure.

[0149] A fourth buffer layer 218 is provided on the upper part of the substrate 202, covering the second light-shielding pattern 216. The fourth buffer layer 218 serves to block moisture and oxygen from the outside. For example, the fourth buffer layer 218 is made of silicon oxide (SiO2) or silicon nitride (SiN x It can be formed from inorganic insulating materials such as ). Furthermore, the fourth buffer layer 218 may be a single layer or a multilayer structure.

[0150] A first semiconductor layer 230 and a second semiconductor layer 232 spaced apart from the first semiconductor layer 230 are provided on the fourth buffer layer 218. The first semiconductor layer 230 corresponds to the first light-shielding pattern 206, and the second semiconductor layer 232 corresponds to the second light-shielding pattern 216.

[0151] Each of the first semiconductor layer 230 and the second semiconductor layer 232 may contain one of the following: a polycrystalline semiconductor material, an amorphous semiconductor material, or an oxide semiconductor material.

[0152] In embodiments of the present invention, each of the first semiconductor layer 230 and the second semiconductor layer 232 can be formed from an oxide semiconductor material such as indium gallium zinc oxide (IGZO), zinc oxide (ZnO), tin oxide (SnO2), copper oxide (Cu2O), nickel oxide (NiO), indium tin zinc oxide (ITZO), or indium aluminum zinc oxide (IAZO).

[0153] In another embodiment of the present invention, the first semiconductor layer 230 and the second semiconductor layer 232 can each be formed from a polycrystalline semiconductor material such as polycrystalline silicon.

[0154] Furthermore, in other embodiments of the present invention, one of the first semiconductor layer 230 and the second semiconductor layer 232 may be formed from an oxide semiconductor material, and the other from a polycrystalline semiconductor material. In this case, the first semiconductor layer 230 and the second semiconductor layer 232 may be provided in different layers.

[0155] The first semiconductor layer 230 includes a first channel region 230a and first source regions 230b and first drain regions 230c on either side of the first channel region 230a. Each of the first source region 230b and the first drain region 230c is doped with an impurity.

[0156] The second semiconductor layer 232 includes a second channel region 232a and second source regions 232b and second drain regions 232c on either side of the second channel region 232a. Each of the second source region 232b and the second drain region 232c is doped with an impurity.

[0157] A gate insulating film 234 is provided above the fourth buffer layer 218, covering the first semiconductor layer 230 and the second semiconductor layer 232. For example, the gate insulating film 234 is made of silicon oxide (SiO2) or silicon nitride (SiN x It can be formed from inorganic insulating materials such as ). Furthermore, the gate insulating film 234 may have a single-layer structure or a multi-layer structure.

[0158] A first gate electrode 236 corresponding to the first channel region 230a of the first semiconductor layer 230 and a second gate electrode 238 corresponding to the second channel region 232a of the second semiconductor layer 232 are provided on the gate insulating film 234. For example, each of the first gate electrode 236 and the second gate electrode 238 can be formed from a metallic material such as molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu), or an alloy thereof, and may be a single-layer structure or a multilayer structure.

[0159] Above the gate insulating film 234, a first interlayer insulating film 240 is provided, covering the first gate electrode 236 and the second gate electrode 238. The first interlayer insulating film 240 serves to block moisture and oxygen from the outside. For example, the first interlayer insulating film 240 is made of silicon oxide (SiO2) or silicon nitride (SiN xIt can be formed from any one of the following inorganic insulating materials, or from an organic insulating material such as photoacrylic or benzocyclobutene. Furthermore, the first interlayer insulating film 240 may be a single layer or a multilayer structure.

[0160] A first source electrode 242a, a first drain electrode 242b, a second source electrode 244a, and a second drain electrode 244b are provided on the first interlayer insulating film 240, spaced apart from each other.

[0161] The first source electrode 242a and the first drain electrode 242b are connected to the first source region 230b and the first drain region 230c of the first semiconductor layer 230, respectively, via contact holes formed in the first interlayer insulating film 240 and the gate insulating film 234. The first source electrode 242a is also connected to the first capacitor electrode 208 via contact holes formed in the first interlayer insulating film 240, the gate insulating film 234, the fourth buffer layer 218, the third buffer layer 214, and the second buffer layer 210.

[0162] The second source electrode 244a and the second drain electrode 244b are connected to the second source region 232b and the second drain region 232c of the second semiconductor layer 232, respectively, via contact holes formed in the first interlayer insulating film 240 and the gate insulating film 234. The second source electrode 244a is also connected to the second capacitor electrode 212 via contact holes formed in the first interlayer insulating film 240, the gate insulating film 234, the fourth buffer layer 218, and the third buffer layer 214.

[0163] The first source electrode 242a, the first drain electrode 242b, the second source electrode 244a, and the second drain electrode 244b can be located in the same layer and formed from the same material. For example, each of the first source electrode 242a, the first drain electrode 242b, the second source electrode 244a, and the second drain electrode 244b can be formed from a metallic material such as one of the following: molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu), or an alloy thereof. Furthermore, each of the first source electrode 242a, the first drain electrode 242b, the second source electrode 244a, and the second drain electrode 244b may have a single-layer structure or a multi-layer structure.

[0164] The first semiconductor layer 230, the first gate electrode 236, the first source electrode 242a, and the first drain electrode 242b constitute the first transistor T1, and the second semiconductor layer 232, the second gate electrode 238, the second source electrode 244a, and the second drain electrode 244b constitute the second transistor T2. The first transistor T1 and the second transistor T2 may each be thin-film transistors.

[0165] In Figure 6, the first gate electrode 236, the first source electrode 242a, and the first drain electrode 242b are located on the upper part of the first semiconductor layer 230, and the second gate electrode 238, the second source electrode 244a, and the second drain electrode 244b are located on the upper part of the second semiconductor layer 232. That is, each of the first transistor T1 and the second transistor T2 has a coplanar structure. Alternatively, in each of the first transistor T1 and the second transistor T2, the gate electrode can be located on the lower part of the semiconductor layer, and the source electrode and drain electrode can be located on the upper part of the semiconductor layer. That is, each of the first transistor T1 and the second transistor T2 can have an inverse staggered structure.

[0166] An insulating layer 250 is provided above the first interlayer insulating film 240, covering the first source electrode 242a, the first drain electrode 242b, the second source electrode 244a, and the second drain electrode 244b. That is, the insulating layer 250 covers the first transistor T1 and the second transistor T2.

[0167] The insulating layer 250 includes a first insulating layer 250a located on the first source electrode 242a, the first drain electrode 242b, the second source electrode 244a, and the second drain electrode 244b, a second insulating layer 250b located on the first insulating layer 250a, and a third insulating layer 250c located on the second insulating layer 250b. Each of the first insulating layer 250a to the third insulating layer 250c can be formed from an organic insulating material such as photoacrylic or benzocyclobutene. For example, the first insulating layer 250a, the second insulating layer 250b, and the third insulating layer 250c can be formed from the same material.

[0168] First signal wiring SL1 to third signal wiring SL3 are provided on the first insulating layer 250a. Each of the first signal wiring SL1 to third signal wiring SL3 extends along the second direction Y and is spaced apart from each other in the first direction X. The first signal wiring SL1 is a high-potential signal wiring for applying a high-potential signal (Vdd in Figure 2), and each of the second signal wiring SL2 and third signal wiring SL3 may be data wiring (DL in Figure 1).

[0169] Each of the first signal wiring SL1 to the third signal wiring SL3 can be formed from a metallic material such as molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu), or an alloy thereof. Furthermore, each of the first signal wiring SL1 to the third signal wiring SL3 may have a single-layer structure or a multi-layer structure.

[0170] A second insulating layer 250b is provided on top of the first insulating layer 250a, covering the first signal wiring SL1 to the third signal wiring SL3.

[0171] A connecting electrode 252 corresponding to the second source electrode 244a is provided on the second insulating layer 250b. The connecting electrode 252 can be connected to the second source electrode 244a via contact holes formed in the first insulating layer 250a and the second insulating layer 250b.

[0172] Furthermore, a step compensation pattern 280 is provided on the second insulating layer 250b. The step compensation pattern 280 separates the first signal wiring SL1 to the third signal wiring SL3 from the connecting electrode 252.

[0173] The first signal wiring SL1 to the third signal wiring SL3 are provided corresponding to the pixel P, and the first signal wiring SL1 to the third signal wiring SL3 cause waves to be generated in the second insulating layer 250b. That is, the steps caused by the first signal wiring SL1 to the third signal wiring SL3 reduce the surface flatness of the second insulating layer 250b.

[0174] In the light-emitting diode display device 200 of the present invention, a step compensation pattern 280 corresponding to the first signal wiring SL1 to the third signal wiring SL3 covers the surface of the waves generated in the second insulating layer 250b and compensates for the step caused by the first signal wiring SL1 to the third signal wiring SL3.

[0175] In one embodiment of the present invention, each of the first signal wiring SL1 to the third signal wiring SL3 has a first thickness, and the step compensation pattern 280 may have a second thickness greater than the first thickness.

[0176] Each of the connecting electrode 252 and the step compensation pattern 280 can be formed from a metallic material such as one of the following: molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu), or an alloy thereof. Furthermore, each of the connecting electrode 252 and the step compensation pattern 280 may have a single-layer structure or a multi-layer structure.

[0177] In Figure 6, the connecting electrode 252 is provided on the second insulating layer 250b. Alternatively, the connecting electrode 252 may be provided on the first insulating layer 250a and covered by the second insulating layer 250b.

[0178] A third insulating layer 250c is provided on the connecting electrode 252 and the step compensation pattern 280, and a first electrode 260a is provided on the third insulating layer 250c. The first electrode 260a is connected to the connecting electrode 252 through a contact hole formed in the third insulating layer 250c.

[0179] The first electrode 260a is formed separately for each pixel P. The first electrode 260a is the anode and may include a transparent conductive oxide layer and a reflective layer made of a conductive material with a relatively large work function, such as transparent conductive oxide (TCO).

[0180] The transparent conductive oxide layer can be formed from indium tin oxide (ITO), indium zinc oxide (IZO), indium tin zinc oxide (ITZO), tin oxide (SnO), zinc oxide (ZnO), indium copper oxide (ICO), and aluminum:zinc oxide (Al:ZnO, AZO). The reflective layer can be formed from silver (Ag), or an alloy of silver (Ag) with at least one of palladium (Pd), copper (Cu), indium (In), or neodymium (Nd), or an aluminum-palladium-copper (APC) alloy. For example, the first electrode 260a may have a two-layer structure of Ag / ITO or APC / ITO, or a three-layer structure of ITO / Ag / ITO or ITO / APC / ITO.

[0181] Furthermore, a pixel definition film 254 (bank) located at the boundary of the pixel P is provided on the second insulating layer 250b. The pixel definition film 254 can have an opening that covers the edge of the first electrode 260a while exposing the center of the first electrode 260a. For example, the pixel definition film 254 can be formed from an organic insulating material such as photoacrylic, benzocyclobutene, or polyimide.

[0182] The step compensation pattern 280 has substantially the same shape as the first electrode 260a. For example, the step compensation pattern 280 may have substantially the same shape as the opening of the pixel definition film 254. Also, the step compensation pattern 280 may have an area larger than the opening of the pixel definition film 254 but smaller than the first electrode 260a.

[0183] In the light-emitting diode display device 200 according to the second embodiment of the present invention, steps caused by the first signal wiring SL1 to the third signal wiring SL3 are compensated by the step compensation pattern 280, and at least a portion of the first electrode 260a, for example, the portion corresponding to the opening of the pixel definition film 254, becomes flat. As a result, the problem of reduced luminous efficiency and / or lifespan of the light-emitting diode display device 200 can be minimized or prevented.

[0184] Although not shown in the diagram, a spacer can be provided on the pixel definition film 254. The spacer can have a smaller area than the pixel definition film 254.

[0185] The light-emitting layer 260b is provided while covering the first electrode 260a and the pixel definition film 254. The light-emitting layer 260b contacts the first electrode 260a at the opening of the pixel definition film 254. That is, the light-emitting layer 260b can be formed in contact with the upper surface of the first electrode 260a and the side and upper surfaces of the pixel definition film 254.

[0186] For example, the light-emitting layer 260b may comprise a light-emitting material layer containing a host and a dopant. Alternatively, the light-emitting material layer of the light-emitting layer 260b may include an inorganic light-emitting material such as a quantum dot. Furthermore, the light-emitting layer 260b may have a multilayer structure further comprising at least one of the following: a hole injection layer, a hole transport layer, an electron barrier layer, a hole barrier layer, an electron transport layer, or an electron injection layer.

[0187] A second electrode 260c is provided on the light-emitting layer 260b. The second electrode 260c can be formed from one of the following: indium tin oxide (ITO), indium zinc oxide (IZO), aluminum (Al), silver (Ag), copper (Cu), lead (Pb), magnesium (Mg), molybdenum (Mo), titanium (Ti), or alloys thereof, and may be a single-layer or multi-layer structure. The second electrode 260c may be a thin transparent electrode or a semi-transparent electrode.

[0188] The first electrode 260a, the light-emitting layer 260b, and the second electrode 260c constitute a light-emitting diode D. The light-emitting diode D can emit red light, green light, and blue light from its red, green, and blue pixels, respectively. The light-emitting diode D may be an organic light-emitting diode or an inorganic light-emitting diode.

[0189] In the light-emitting diode display device 200, light from the light-emitting layer 260b passes through the second electrode 260c, and an image is displayed. In other words, the light-emitting diode display device 200 of the present invention is a top-emission type display device.

[0190] In a light-emitting diode display device 200 according to one embodiment of the present invention, the first electrode 260a may be a transparent electrode. That is, the first electrode 260a may have a single-layer structure of a transparent conductive oxide layer.

[0191] In this case, the step compensation pattern 280 located below the first electrode 260a acts as a reflective layer for light transmitted through the first electrode 260a, so that even if the first electrode 260a in the top-emission type light-emitting diode display device 200 has a single-layer structure of a transparent conductive oxide layer, the problem of reduced luminous efficiency does not occur.

[0192] Furthermore, since the first electrode 260a has a single-layer structure of a transparent conductive oxide layer, it is possible to prevent process defects that may occur during the patterning process of the first electrode 260a. That is, if the first electrode 260a has a structure including a transparent conductive oxide layer and a reflective layer (for example, a three-layer structure of ITO / Ag / ITO or ITO / APC / ITO), the first electrode 260a is formed by sequentially stacking the transparent conductive oxide layer, the reflective layer and the transparent conductive oxide layer, and then etching by a masking process, but defects may occur in the etching process of different materials. In this case, problems such as short circuits between adjacent pixels or current leakage between adjacent pixels may occur.

[0193] However, in the light-emitting diode display device 200 of the present invention, if the step compensation pattern 280 is used as a reflective layer and the first electrode 260a has a single-layer structure of a transparent conductive oxide layer, the luminous efficiency of the top-emission type display device can be improved without such process defect problems occurring.

[0194] A capsule sealing layer 262 is placed over the entire surface of the substrate 202 above the second electrode 260c to suppress moisture penetration. The capsule sealing layer 262 may have a multilayer structure including a first inorganic layer 262a, an organic layer 262b, and a second inorganic layer 262c, which are arranged sequentially.

[0195] For example, the first inorganic layer 262a and the second inorganic layer 262c are each made of silicon oxide (SiO2) or silicon nitride (SiN x The organic layer 262b can be formed from an inorganic insulating material such as acrylic resin, epoxy resin, phenolic resin, polyamide resin, and polyimide resin.

[0196] On the capsule sealing layer 262, a fifth buffer layer 264 is provided over the entire surface of the substrate 202. The fifth buffer layer 264 serves to block moisture and oxygen from the outside. For example, the fifth buffer layer 264 is made of silicon oxide (SiO2) or silicon nitride (SiN x) It can be formed from inorganic insulating materials such as this. Also, the fifth buffer layer 264 may have a single-layer structure or a multilayer structure.

[0197] A bridge pattern 266 is provided on the fifth buffer layer 264. When the fifth buffer layer 264 is omitted, the plurality of bridge patterns 266 can be formed directly above the capsule encapsulation layer 262. For example, the bridge pattern 266 can be formed from one of indium tin oxide (ITO), indium zinc oxide (IZO), aluminum (Al), silver (Ag), copper (Cu), lead (Pb), magnesium (Mg), molybdenum (Mo), titanium (Ti), or their alloys, and may have a single-layer structure or a multilayer structure.

[0198] On the plurality of bridge patterns 266, a second interlayer insulating film 270 is provided over the entire surface of the substrate 202. For example, the second interlayer insulating film 270 can be formed from inorganic insulating materials such as silicon oxide (SiO2) and silicon nitride (SiN x ) or organic insulating materials such as photoacrylic and benzocyclobutene (BCB). Also, the second interlayer insulating film 270 may have a single-layer structure or a multilayer structure.

[0199] A touch electrode 272 is provided on the second interlayer insulating film 270. The touch electrode 272 includes a first touch electrode 272a spaced apart from each other and a second touch electrode 272b disposed between the first touch electrodes 272a. The second touch electrodes 272b are connected to each other via the bridge pattern 266 formed in the second interlayer insulating film 270.

[0200] For example, each of the first touch electrodes 272a and the first touch electrodes 272a can be formed from one of indium tin oxide (ITO), indium zinc oxide (IZO), aluminum (Al), silver (Ag), copper (Cu), lead (Pb), magnesium (Mg), molybdenum (Mo), titanium (Ti), or their alloys, and may have a single-layer structure or a multilayer structure.

[0201] On the first touch electrode 272a and the second touch electrode 272b, a first protective layer 274 is provided over the entire surface of the substrate 202. The first protective layer 274 is made of silicon oxide (SiO2) or silicon nitride (SiN x It can be formed from inorganic insulating materials such as ) or organic insulating materials such as photoacrylic or benzocyclobutene (BCB), and may have a single-layer structure or a multilayer structure.

[0202] A black matrix 275 is provided on the first protective layer 274. The black matrix 275 is located at the boundary of the pixel P and has an opening corresponding to the light-emitting diode D. That is, the opening of the black matrix 275 corresponds to the opening of the pixel definition film 254.

[0203] The aperture of the black matrix 275 can have a larger area than the aperture of the pixel definition film 254. That is, the pixel definition film 254 can have a first width, and the black matrix 275 can have a second width smaller than the first width. If the aperture of the black matrix 275 is smaller than or the same as the aperture of the pixel definition film 254, the viewing angle of the light-emitting diode display device 200 will decrease.

[0204] On the first protective layer 274, a color filter layer 277 corresponding to the apertures of the black matrix 275 is provided. The color filter layer 277 may include a red color filter corresponding to a red pixel, a green color filter corresponding to a green pixel, and a blue color filter corresponding to a blue pixel.

[0205] The color filter layer 277 may contain organic substances and color particles (dyes or pigments). For example, the organic substance may be selected from the group consisting of polymethyl methacrylate, polycarbonate, polyacrylate, polyurethane, epoxy, polyester, and polyimide, but is not limited thereto.

[0206] A second protective layer 279 is provided over the entire surface of the substrate 202 on the black matrix 275 and the color filter layer 277. For example, the second protective layer 279 is made of silicon oxide (SiO2) or silicon nitride (SiN x It can be formed from inorganic insulating materials such as ) or organic insulating materials such as photoacrylic or benzocyclobutene (BCB), and may have a single-layer structure or a multilayer structure.

[0207] In the light-emitting diode display device 200 according to the second embodiment of the present invention, the first signal wiring SL1 to the third signal wiring SL3 correspond to pixels P and are arranged across pixels P, so that the line width limitations of the first signal wiring SL1 to the third signal wiring SL3 can be minimized.

[0208] Furthermore, the light-emitting diode display device 200 according to the second embodiment of the present invention further includes a step compensation pattern 280 that covers the first signal wiring SL1 to the third signal wiring SL3 and is located below the first electrode 260a, thereby improving the flatness of the first electrode 260a. Therefore, the problem of reduced luminous efficiency and / or lifespan caused by a decrease in the flatness of the first electrode 260a due to the first signal wiring SL1 to the third signal wiring SL3 can be minimized or prevented.

[0209] Figure 7 is a schematic cross-sectional view of a light-emitting diode display device according to a third embodiment of the present invention, showing the portion along the cutting line II-II' in Figure 5.

[0210] For the sake of explanation, the configuration between the substrate 302 and the first insulating layer 350a, the configuration of the upper part of the second electrode 360c, and the connecting electrode (252 in Figure 6) are not shown in the figure.

[0211] As shown in Figure 7, the light-emitting diode display device 300 according to the third embodiment of the present invention includes a substrate 302 including a pixel P, a first insulating layer 350a located on the upper part of the substrate 302, first signal wiring SL1 to third signal wiring SL3 located on the first insulating layer 350a, a second insulating layer 350b covering the first signal wiring SL1 to third signal wiring SL3, a step compensation pattern 380 located on the second insulating layer 350b, a third insulating layer 350c located on the step compensation pattern 380, and a light-emitting diode D including a second electrode 360c located on the third insulating layer 350c and electrically connected to the step compensation pattern 380.

[0212] First signal wiring SL1 to third signal wiring SL3 are provided on the first insulating layer 250a. Each of the first signal wiring SL1 to third signal wiring SL3 extends along the second direction Y and is spaced apart from each other in the first direction X. The first signal wiring SL1 is a high-potential signal wiring for applying a high-potential signal (Vdd in Figure 2), and each of the second signal wiring SL2 and third signal wiring SL3 may be data wiring (DL in Figure 1).

[0213] A second insulating layer 350b is provided above the first insulating layer 350a, covering the first signal wiring SL1 to the third signal wiring SL3.

[0214] A step compensation pattern 380 is provided on the second insulating layer 350b. The step compensation pattern 380 covers the first signal wiring SL1 to the third signal wiring SL3 and is spaced apart from the connecting electrode (252 in Figure 6).

[0215] The first signal wiring SL1 to the third signal wiring SL3 correspond to and are provided for the pixel P, and the first signal wiring SL1 to the third signal wiring SL3 cause waves to be generated in the second insulating layer 350b. That is, the surface flatness of the second insulating layer 350b is reduced due to the steps caused by the first signal wiring SL1 to the third signal wiring SL3.

[0216] In the light-emitting diode display device 300 of the present invention, a step compensation pattern 380 corresponding to the first signal wiring SL1 to the third signal wiring SL3 covers the surface of the waves generated in the second insulating layer 350b and compensates for the step caused by the first signal wiring SL1 to the third signal wiring SL3.

[0217] The step compensation pattern 380 includes an extended portion 382 located below the pixel definition film 354. That is, at least one side of the step compensation pattern 380 extends below the pixel definition film 354.

[0218] In one embodiment of the present invention, each of the first signal wiring SL1 to the third signal wiring SL3 has a first thickness, and the step compensation pattern 380 may have a second thickness greater than the first thickness.

[0219] The step compensation pattern 380 can be formed from a metallic material such as molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu), or an alloy thereof. Each of the step compensation patterns 380 may also be a single-layer or multi-layer structure.

[0220] A third insulating layer 350c is provided on the step compensation pattern 380, and a first electrode 360a is provided on the third insulating layer 350c.

[0221] The first electrode 360a is formed separately for each pixel P. The first electrode 360a is the anode and may include a transparent conductive oxide layer and a reflective layer made of a conductive material with a relatively large work function, such as transparent conductive oxide (TCO).

[0222] In a light-emitting diode display device 300 according to one embodiment of the present invention, the first electrode 360a may be a transparent electrode. That is, the first electrode 360a may have a single-layer structure of a transparent conductive oxide layer.

[0223] Since the step compensation pattern 380 located below the first electrode 360a acts as a reflective layer for light transmitted through the first electrode 360a, the problem of reduced luminous efficiency does not occur even if the first electrode 360a in the top-emission type light-emitting diode display device 300 has a single-layer structure of a transparent conductive oxide layer.

[0224] Furthermore, a pixel definition film 354 (bank) located at the boundary of the pixel P is provided on the second insulating layer 350b. The pixel definition film 354 may have an opening that covers the edge of the first electrode 360a while exposing the center of the first electrode 360a.

[0225] The step compensation pattern 380 has substantially the same shape as the first electrode 360a. For example, the step compensation pattern 380 may have substantially the same shape as the opening of the pixel definition film 354. Also, the step compensation pattern 380 may have an area larger than the opening of the pixel definition film 354 but smaller than the first electrode 360a.

[0226] In the light-emitting diode display device 300 according to the third embodiment of the present invention, steps caused by the first signal wiring SL1 to the third signal wiring SL3 are compensated by the step compensation pattern 380, and at least a portion of the first electrode 360a, for example, the portion corresponding to the opening of the pixel definition film 354, becomes flat. As a result, the problem of reduced luminous efficiency and / or lifespan of the light-emitting diode display device 300 can be minimized or prevented.

[0227] Auxiliary contact holes 356 corresponding to the stretched portion 382 of the step compensation pattern 380 are formed in the pixel definition film 354 and the third insulating layer 350c. That is, the stretched portion 382 of the step compensation pattern 380 is exposed through the auxiliary contact holes 356 provided in the pixel definition film 354 and the third insulating layer 350c.

[0228] The light-emitting layer 360b is provided while covering the first electrode 360a and the pixel definition film 354. The light-emitting layer 360b contacts the first electrode 360a at the opening of the pixel definition film 354. That is, the light-emitting layer 360b can be formed by contacting the upper surface of the first electrode 360a and a part of the side and upper surfaces of the pixel definition film 354.

[0229] For example, the light-emitting layer 360b may comprise a light-emitting material layer containing a host and a dopant. Alternatively, the light-emitting material layer of the light-emitting layer 360b may include an inorganic light-emitting material such as a quantum dot. Furthermore, the light-emitting layer 360b may have a multilayer structure further comprising at least one of the following: a hole injection layer, a hole transport layer, an electron barrier layer, a hole barrier layer, an electron transport layer, or an electron injection layer.

[0230] A second electrode 360c is provided on the light-emitting layer 360b. The second electrode 360c can be formed from one of the following: indium tin oxide (ITO), indium zinc oxide (IZO), aluminum (Al), silver (Ag), copper (Cu), lead (Pb), magnesium (Mg), molybdenum (Mo), titanium (Ti), or alloys thereof, and may be a single-layer or multi-layer structure. The second electrode 360c may be a thin, transparent electrode or a semi-transparent electrode.

[0231] The second electrode 360c is provided on the pixel definition film 354 and connects the auxiliary contact holes 356 provided in the pixel definition film 354 and the third insulating layer 350c to the extended portion 382 of the step compensation pattern 380.

[0232] The second electrode 360c is relatively thin and is formed across the entire surface of the substrate 302, so depending on its location, a voltage drop problem may occur at the second electrode 360c. However, in the light-emitting diode display device 300 according to the third embodiment of the present invention, an extended portion 382, ​​which is part of the step compensation pattern 380 provided to improve the flatness of the first electrode 360a, is connected to the second electrode 360c. As a result, the resistance of the second electrode 360c is reduced, and the voltage drop problem can be minimized or prevented.

[0233] As described above, in the light-emitting diode display device 300 according to the third embodiment of the present invention, the first signal wiring SL1 to the third signal wiring SL3 correspond to pixels P and are arranged across pixels P, so that the limitations on the line width of the first signal wiring SL1 to the third signal wiring SL3 can be minimized.

[0234] Furthermore, the light-emitting diode display device 300 according to the third embodiment of the present invention further includes a step compensation pattern 380 that covers the first signal wiring SL1 to the third signal wiring SL3 and is located below the first electrode 360a, thereby improving the flatness of the first electrode 360a. Therefore, the problem of reduced luminous efficiency and / or lifespan caused by a decrease in the flatness of the first electrode 360a due to the first signal wiring SL1 to the third signal wiring SL3 can be minimized or prevented.

[0235] Furthermore, in the light-emitting diode display device 300 according to the third embodiment of the present invention, since the extended portion 382, ​​which is part of the step compensation pattern 380, is connected to the second electrode 360c, the resistance of the second electrode 360c is reduced, and the voltage drop problem can be minimized or prevented.

[0236] Figure 8 is a schematic plan view showing a light-emitting diode display device according to a fourth embodiment of the present invention.

[0237] As shown in Figure 8, the light-emitting diode display device 400 according to the fourth embodiment of the present invention includes a first pixel P1, a second pixel P2, a third pixel P3, a second signal wiring SL2 and a third signal wiring SL3 that cross the first pixel P1 and the third pixel P3 and extend in one direction, and a fourth signal wiring SL4 that crosses the second pixel P2 and extends alongside the second signal wiring SL2 and the third signal wiring SL3.

[0238] For example, the first pixel P1 may be a red pixel, the second pixel P2 may be a green pixel, and the third pixel P3 may be a blue pixel. The light-emitting diode display device 400 may further include a fourth pixel which is a white pixel.

[0239] The first pixel P1 and the third pixel P3 have the same shape, while the second pixel P2 may have a different shape from the first pixel P1 and the third pixel P3. However, the shapes of the first pixel P1 through the third pixel P3 are not limited to these.

[0240] The area of ​​the third pixel P3 may be larger than the areas of the first pixel P1 and the second pixel P2, and the area of ​​the first pixel P1 may be smaller than or the same as the area of ​​the second pixel P2. However, the areas of the first pixel P1 through the third pixel P3 are not limited to these.

[0241] The first pixel P1 and the third pixel P3 are arranged alternately along the first direction X, and the second pixel P2 is spaced apart from the pixel row containing the first pixel P1 and the third pixel P3 in the second direction Y, and is arranged along the first direction X.

[0242] Each of the second signal lines SL2 through the fourth signal line SL4 extends along the second direction Y and is spaced apart from each other in the first direction X. The second signal line SL2 and the third signal line SL3 are spaced apart from each other and overlap the first electrode 460a of the third pixel P3. The fourth signal line SL4 is located on one side of the second signal line SL2 and on the other side of the third signal line SL3.

[0243] The second signal wire SL2 and the third signal wire SL3 can each be data wires (DL in Figure 1). The fourth signal wire SL4 can be a reference signal wire for applying a reference signal (Vre in Figure 2).

[0244] In each of the first pixel P1 to the third pixel P3, the first electrode 460a of a light-emitting diode (D in Figure 2) is arranged in an island-like configuration.

[0245] Furthermore, a step compensation pattern 480 corresponding to the first electrode 460a is positioned below the first electrode 460a for each of the first pixel P1 to the third pixel P3.

[0246] The step compensation pattern 480 includes an extended wiring section 482 that extends in a second direction Y. For example, the extended wiring section 482 can extend along the second direction Y from both ends of the step compensation pattern 480 in the second direction Y.

[0247] The extended wiring section 482 of the step compensation pattern 480 is located between the second signal wiring SL2 and the third signal wiring SL3 and can function as the first signal wiring SL1. For example, the extended wiring section 482 may be a high-potential signal wiring for applying a high-potential signal (Vdd in Figure 2).

[0248] In Figure 8, three signal lines SL1, SL2, and SL3 are arranged corresponding to the first pixel P1 and the third pixel P3, and one signal line SL4 is arranged corresponding to the second pixel P2. However, the arrangement of pixels P1, P2, P3 and signal lines SL1, SL2, and SL3 in the light-emitting diode display device 400 of the present invention is not limited to this.

[0249] Figure 9 is a schematic cross-sectional view of a light-emitting diode display device according to a fourth embodiment of the present invention, showing the portion along the cutting line III-III' in Figure 8.

[0250] As shown in Figure 9, the light-emitting diode display device 400 includes a substrate 402 containing a pixel P, a pixel circuit layer located on the upper part of the substrate 402 corresponding to the pixel P and containing a first transistor T1 and a second transistor T2, a first insulating layer 450a located on the upper part of the pixel circuit layer, first signal wiring SL1 to third signal wiring SL3 located on the first insulating layer 450a, a second insulating layer 450b covering the first signal wiring SL1 to third signal wiring SL3, a step compensation pattern 480 located on the second insulating layer 450b, an extended wiring portion 482 extending from the step compensation pattern 480, a third insulating layer 450c located on the step compensation pattern 480, and a light-emitting diode D located on the third insulating layer 450c.

[0251] Multiple pixels P are defined on the substrate 402. The substrate 402 may be a glass substrate or a plastic substrate. In one embodiment of the present invention, the substrate 402 may have a three-layer structure including a first polyimide film, a second polyimide film, and an interlayer inorganic film between the first and second polyimide films.

[0252] A first buffer layer 404 is provided on the substrate 402. The first buffer layer 404 serves to block moisture and oxygen from the outside.

[0253] A first light-shielding pattern 406 is provided on the first buffer layer 404. The first light-shielding pattern 406 serves to block incident light from below the substrate 402.

[0254] Furthermore, a first capacitor electrode 408 is provided on the first buffer layer 404. The first capacitor electrode 408 can be separated from the first light-shielding pattern 406.

[0255] A second buffer layer 410 is provided on top of the substrate 402, covering the first light-shielding pattern 406 and the first capacitor electrode 408. The second buffer layer 410 serves to block moisture and oxygen from the outside.

[0256] A second capacitor electrode 412 corresponding to the first capacitor electrode 408 is provided on the second buffer layer 410. The second capacitor electrode 412 overlaps the first capacitor electrode 408, and the first capacitor electrode 408, the second buffer layer 410, and the second capacitor electrode 412 constitute a storage capacitor Cst.

[0257] A third buffer layer 414 is provided on the upper part of the substrate 402, covering the second capacitor electrode 412. The third buffer layer 414 serves to block moisture and oxygen from the outside.

[0258] A second light-shielding pattern 416 is provided on the third buffer layer 414. The second light-shielding pattern 416 serves to block light from below the substrate 402.

[0259] A fourth buffer layer 418 is provided on the upper part of the substrate 402, covering the second light-shielding pattern 416. The fourth buffer layer 418 serves to block moisture and oxygen from the outside.

[0260] A first semiconductor layer 430 and a second semiconductor layer 432 spaced apart from the first semiconductor layer 430 are provided on the fourth buffer layer 418. The first semiconductor layer 430 corresponds to the first light-shielding pattern 406, and the second semiconductor layer 432 corresponds to the second light-shielding pattern 416.

[0261] Each of the first semiconductor layer 430 and the second semiconductor layer 432 may contain one of the following: a polycrystalline semiconductor material, an amorphous semiconductor material, or an oxide semiconductor material.

[0262] In one embodiment of the present invention, the first semiconductor layer 430 and the second semiconductor layer 432 can each be formed from an oxide semiconductor material.

[0263] In another embodiment of the present invention, the first semiconductor layer 430 and the second semiconductor layer 432 can each be formed from a polycrystalline semiconductor material such as polycrystalline silicon.

[0264] Furthermore, in other embodiments of the present invention, one of the first semiconductor layer 430 and the second semiconductor layer 432 may be formed from an oxide semiconductor material, and the other from a polycrystalline semiconductor material. In this case, the first semiconductor layer 430 and the second semiconductor layer 432 may be provided in different layers.

[0265] The first semiconductor layer 430 includes a first channel region 430a and first source regions 430b and first drain regions 430c on either side of the first channel region 430a. Each of the first source region 430b and the first drain region 430c is doped with an impurity.

[0266] The second semiconductor layer 432 includes a second channel region 432a and second source regions 432b and second drain regions 432c on either side of the second channel region 432a. Each of the second source region 432b and the second drain region 432c is doped with an impurity.

[0267] A gate insulating film 434 is provided above the fourth buffer layer 418, covering the first semiconductor layer 430 and the second semiconductor layer 432.

[0268] A first gate electrode 436 corresponding to the first channel region 430a of the first semiconductor layer 430, and a second gate electrode 438 corresponding to the second channel region 432a of the second semiconductor layer 432 are provided on the gate insulating film 434.

[0269] A first interlayer insulating film 440 is provided above the gate insulating film 434, covering the first gate electrode 436 and the second gate electrode 438. The first interlayer insulating film 440 serves to block moisture and oxygen from the outside.

[0270] A first source electrode 442a, a first drain electrode 442b, a second source electrode 444a, and a second drain electrode 444b are provided on the first interlayer insulating film 440, spaced apart from each other.

[0271] The first source electrode 442a and the first drain electrode 442b are connected to the first source region 430b and the first drain region 430c of the first semiconductor layer 430, respectively, via contact holes formed in the first interlayer insulating film 440 and the gate insulating film 434. The first source electrode 442a is also connected to the first capacitor electrode 408 via contact holes formed in the first interlayer insulating film 440, the gate insulating film 434, the fourth buffer layer 418, the third buffer layer 414, and the second buffer layer 410.

[0272] The second source electrode 444a and the second drain electrode 444b are connected to the second source region 432b and the second drain region 432c of the second semiconductor layer 432, respectively, via contact holes formed in the first interlayer insulating film 440 and the gate insulating film 434. The second source electrode 444a is also connected to the second capacitor electrode 412 via contact holes formed in the first interlayer insulating film 440, the gate insulating film 434, the fourth buffer layer 418, and the third buffer layer 414.

[0273] The first semiconductor layer 430, the first gate electrode 436, the first source electrode 442a, and the first drain electrode 442b constitute the first transistor T1, and the second semiconductor layer 432, the second gate electrode 438, the second source electrode 444a, and the second drain electrode 444b constitute the second transistor T2. The first transistor T1 and the second transistor T2 may each be thin-film transistors.

[0274] An insulating layer 450 is provided above the first interlayer insulating film 440, covering the first source electrode 442a, the first drain electrode 442b, the second source electrode 444a, and the second drain electrode 444b. That is, the insulating layer 450 covers the first transistor T1 and the second transistor T2.

[0275] The insulating layer 450 includes a first insulating layer 450a located on the first source electrode 442a, the first drain electrode 442b, the second source electrode 444a, and the second drain electrode 444b, a second insulating layer 450b located on the first insulating layer 450a, and a third insulating layer 450c located on top of the second insulating layer 450b.

[0276] A second signal line SL2 and a third signal line SL3 are provided on the first insulating layer 450a. Each of the second signal line SL2 and the third signal line SL3 extends along the second direction Y and is spaced apart from each other in the first direction X. Each of the second signal line SL2 and the third signal line SL3 may be a data line (DL in Figure 1).

[0277] A second insulating layer 450b is provided on the first insulating layer 450a, covering the second signal wiring SL2 and the third signal wiring SL3.

[0278] A connecting electrode 452 corresponding to the second source electrode 444a is provided on the second insulating layer 450b. The connecting electrode 452 can be connected to the second source electrode 444a via contact holes formed in the first insulating layer 450a and the second insulating layer 450b.

[0279] Furthermore, a step compensation pattern 480 is provided on the second insulating layer 450b. The step compensation pattern 480 covers the second signal wiring SL2 and the third signal wiring SL3 and is spaced apart from the connecting electrode 452.

[0280] The second signal wiring SL2 and the third signal wiring SL3 correspond to pixels P and are provided, and the second signal wiring SL2 and the third signal wiring SL3 cause waves to be generated in the second insulating layer 450b. That is, the surface flatness of the second insulating layer 450b is reduced due to the steps caused by the second signal wiring SL2 and the third signal wiring SL3.

[0281] In the light-emitting diode display device 400 of the present invention, step compensation patterns 480 corresponding to the second signal wiring SL2 and the third signal wiring SL3 cover the surface of the waves generated in the second insulating layer 450b, and compensate for the step caused by the second signal wiring SL2 and the third signal wiring SL3.

[0282] Furthermore, the ends of the step compensation pattern 480 extend along the second direction (Y in Figure 8), forming extended wiring sections 482 and SL1 that function as signal wiring. For example, the extended wiring section 482 is a first signal wiring SL1 that serves as a high-potential signal wiring for applying a high-potential signal (Vdd in Figure 2), and can be located between the second signal wiring SL2 and the third signal wiring SL3.

[0283] In the first direction (X in FIG. 8), the step compensation pattern 480 has a first width, and the extended wiring portion 482 has a second width smaller than the first width. For example, the width of the extended wiring portion 482 may be substantially the same as the widths of the second signal wiring SL2 and the third signal wiring SL3.

[0284] In the light-emitting diode display device 400 according to the fourth embodiment of the present invention, the second signal wiring SL2 and the third signal wiring SL3 are located below the second insulating layer 450b, and the first signal wiring SL1 (extended wiring portion) located between the second signal wiring SL2 and the third signal wiring SL3 extends from the step compensation pattern 480 on the second insulating layer 450b and is formed. That is, the first signal wiring SL1 is provided in a layer different from the second signal wiring SL2 and the third signal wiring SL3. Therefore, the limitation on the line width in the second signal wiring SL2 and the third signal wiring SL3 can be further reduced.

[0285] In one embodiment of the present invention, each of the second signal wiring SL2 and the third signal wiring SL3 may have a first thickness, and each of the step compensation pattern 480 and the extended wiring portion 482 may have a second thickness greater than the first thickness.

[0286] A third insulating layer 450c is provided on the connection electrode 452, the step compensation pattern 480, and the extended wiring portion 482, and a first electrode 460a is provided on the third insulating layer 450c. The first electrode 460a is connected to the connection electrode 452 through a contact hole formed in the third insulating layer 450c.

[0287] The first electrode 460a is formed separately for each pixel P. The first electrode 460a is an anode, and may include a transparent conductive oxide layer and a reflective layer made of a conductive material having a relatively large work function, for example, a transparent conductive oxide (TCO).

[0288] Also, a pixel defining film 454 (bank) located at the boundary of the pixel P is provided on the second insulating layer 450b. The pixel defining film 454 may have an opening that exposes the center of the first electrode 460a while covering the edge of the first electrode 460a.

[0289] The step compensation pattern 480 has substantially the same shape as the first electrode 460a. For example, the step compensation pattern 480 may have substantially the same shape as the opening of the pixel definition film 454. Also, the step compensation pattern 480 may have an area larger than the opening of the pixel definition film 454 but smaller than the first electrode 460a.

[0290] In the light-emitting diode display device 400 according to the fourth embodiment of the present invention, the step difference caused by the second signal wiring SL2 and the third signal wiring SL3 is compensated by the step difference compensation pattern 480, and at least a portion of the first electrode 460a, for example, the portion corresponding to the opening of the pixel definition film 454, becomes flat. As a result, the problem of reduced luminous efficiency and / or lifespan of the light-emitting diode display device 400 can be minimized or prevented.

[0291] A light-emitting layer 460b is provided while covering the first electrode 460a and the pixel definition film 454. The light-emitting layer 460b contacts the first electrode 460a at the opening of the pixel definition film 454. That is, the light-emitting layer 460b can be formed in contact with the upper surface of the first electrode 460a and the side and upper surfaces of the pixel definition film 454.

[0292] A second electrode 460c is provided on the light-emitting layer 460b. The second electrode 460c can be formed from one of the following: indium tin oxide (ITO), indium zinc oxide (IZO), aluminum (Al), silver (Ag), copper (Cu), lead (Pb), magnesium (Mg), molybdenum (Mo), titanium (Ti), or alloys thereof, and may be a single-layer structure or a multi-layer structure. The second electrode 460c may be a thin transparent electrode or a semi-transparent electrode.

[0293] The first electrode 460a, the light-emitting layer 460b, and the second electrode 460c constitute a light-emitting diode D. The light-emitting diode D can emit red light, green light, and blue light from its red, green, and blue pixels, respectively. The light-emitting diode D may be an organic light-emitting diode or an inorganic light-emitting diode.

[0294] In the light-emitting diode display device 400, light from the light-emitting layer 460b passes through the second electrode 460c, and an image is displayed. In other words, the light-emitting diode display device 400 of the present invention is a top-emission type display device.

[0295] In a light-emitting diode display device 400 according to one embodiment of the present invention, the first electrode 460a may be a transparent electrode. That is, the first electrode 460a may have a single-layer structure of a transparent conductive oxide layer.

[0296] In this case, the step compensation pattern 480 located below the first electrode 460a acts as a reflective layer for light transmitted through the first electrode 460a, so that even if the first electrode 460a in the top-emission type light-emitting diode display device 400 has a single-layer structure of a transparent conductive oxide layer, the problem of reduced luminous efficiency does not occur.

[0297] Furthermore, since the first electrode 460a has a single-layer structure of a transparent conductive oxide layer, it is possible to prevent process defects that may occur during the patterning process of the first electrode 460a.

[0298] A capsule sealing layer 462 that suppresses moisture penetration is placed over the entire surface of the substrate 402 above the second electrode 460c. The capsule sealing layer 462 may have a multilayer structure including a first inorganic layer 462a, an organic layer 462b, and a second inorganic layer 462c that are arranged sequentially.

[0299] On the capsule sealing layer 462, a fifth buffer layer 464 is provided across the entire surface of the substrate 402. The fifth buffer layer 464 serves to block moisture and oxygen from the outside.

[0300] A bridge pattern 466 is provided on the fifth buffer layer 464. If the fifth buffer layer 464 is omitted, multiple bridge patterns 466 can be formed directly above the capsule sealing layer 462.

[0301] On multiple bridge patterns 466, a second interlayer insulating film 470 is provided over the entire surface of the substrate 402.

[0302] A touch electrode 472 is provided on the second interlayer insulating film 470. The touch electrode 472 includes a first touch electrode 472a spaced apart from each other and a second touch electrode 472b positioned between the first touch electrodes 472a. The second touch electrodes 472b are connected to each other via a bridge pattern 466 formed in the second interlayer insulating film 470.

[0303] On the first touch electrode 472a and the second touch electrode 472b, the first protective layer 474 is provided over the entire surface of the substrate 402.

[0304] A black matrix 475 is provided on the first protective layer 474. The black matrix 475 is located at the boundary of the pixel P and has an opening corresponding to the light-emitting diode D. That is, the opening of the black matrix 475 corresponds to the opening of the pixel definition film 454.

[0305] The aperture of the black matrix 475 may have a larger area than the aperture of the pixel definition film 454. That is, the pixel definition film 454 may have a first width, and the black matrix 475 may have a second width smaller than the first width. If the aperture of the black matrix 475 is smaller than or the same as the aperture of the pixel definition film 454, the viewing angle of the light-emitting diode display device 400 will decrease.

[0306] On the first protective layer 474, a color filter layer 477 corresponding to the aperture of the black matrix 475 is provided. The color filter layer 477 may include a red color filter corresponding to a red pixel, a green color filter corresponding to a green pixel, and a blue color filter corresponding to a blue pixel.

[0307] A second protective layer 479 is provided over the entire surface of the substrate 402, on top of the black matrix 475 and the color filter layer 477.

[0308] In the light-emitting diode display device 400 according to the fourth embodiment of the present invention, since the second signal wiring SL2 and the third signal wiring SL3 correspond to the pixel P and are arranged across the pixel P, the limitation on the line width of the second signal wiring SL2 and the third signal wiring SL3 can be minimized.

[0309] Further, the light-emitting diode display device 400 according to the fourth embodiment of the present invention further includes a step compensation pattern 480 that covers the second signal wiring SL2 and the third signal wiring SL3 and is located below the first electrode 460a, thereby improving the flatness of the first electrode 460a. Therefore, it is possible to minimize or prevent the problem that the light emission efficiency and / or the lifetime are reduced due to the decrease in the flatness of the first electrode 460a caused by the second signal wiring SL2 and the third signal wiring SL3.

[0310] In the light-emitting diode display device 400 according to the fourth embodiment of the present invention, the second signal wiring SL2 and the third signal wiring SL3 are located below the second insulating layer 450b, and the first signal wiring SL1 (extended wiring portion) located between the second signal wiring SL2 and the third signal wiring SL3 extends from the step compensation pattern 480 on the second insulating layer 450b and is formed. Therefore, the limitation on the line width in the second signal wiring SL2 and the third signal wiring SL3 can be further reduced.

[0311] As described above, the present invention has been described based on the exemplary embodiments and examples of the present invention, but the present invention is not limited to the technical ideas described in the embodiments and the examples. Rather, those having ordinary knowledge in the technical field to which the present invention pertains can easily conceive various changes and modifications based on the above-described embodiments and examples. However, it will be clear from the claims that such changes and modifications belong to the scope of the present invention.

Description of Reference Numerals

[0312] 100, 200, 300, 400 Light-emitting diode display device 102, 202, 302, 402 Substrate 150a, 150b, 150, 250a, 250b, 250c, 250, 350a, 350b, 350c, 350, 450a, 450b, 450c, 450 Insulation layer 280, 380, 480 Step compensation patterns 482 Distraction wiring section 154, 254, 354, 454 pixel definition film (bank) 356 Contact Holes 160a, 260a, 360a, 460a 1st electrode 160b, 260b, 360b, 460b emissive layer 160c, 260c, 360c, 460c 2nd electrode SL1, SL2, SL3, SL4 signal wiring D Light-emitting diode

Claims

1. A substrate on which pixels including light-emitting and non-light-emitting regions are defined, A first insulating layer located on the substrate, A step compensation pattern located on the first insulating layer and corresponding to the light-emitting region, A second insulating layer covering the step compensation pattern, A first electrode located on the second insulating layer and corresponding to the step compensation pattern, The second insulating layer includes a pixel defining film located in the non-emitting region, covering the edge of the first electrode, and having an opening corresponding to the center of the first electrode, The step compensation pattern has the same shape as the opening, in a light-emitting diode display device.

2. The light-emitting diode display device according to claim 1, wherein the area of ​​the step compensation pattern is larger than the area of ​​the opening and smaller than the area of ​​the first electrode.

3. The light-emitting diode display device according to claim 1, wherein the step compensation pattern is island-shaped.

4. A light-emitting layer located at the opening on the first electrode, The light-emitting diode display device according to claim 1, further comprising the pixel definition film and a second electrode covering the light-emitting layer within the opening.

5. The light-emitting diode display device according to claim 4, wherein the step compensation pattern includes an extended portion, the extended portion extends from at least one end of the step compensation pattern to the lower part of the pixel defining film and protrudes from the first electrode.

6. The light-emitting diode display device according to claim 5, wherein the second electrode is electrically connected to the extended portion of the step compensation pattern.

7. The pixel definition film and the second insulating layer have contact holes formed in them that correspond to the stretched portion of the step compensation pattern. The light-emitting diode display device according to claim 5, wherein the second electrode is connected to the extended portion of the step compensation pattern via the contact hole.

8. The light-emitting diode display device according to claim 1, wherein the step compensation pattern further includes an extended wiring portion extending along a first direction.

9. A third insulating layer located between the substrate and the first insulating layer, The present invention further includes a first signal wiring located on the third insulating layer and extending along the first direction, The light-emitting diode display device according to claim 8, wherein the extended wiring portion and the first signal wiring are spaced apart from each other in a second direction that intersects with the first direction.

10. The system further includes a second signal wiring located on the third insulating layer and extending along the first direction, The extended wiring portion and the second signal wiring are spaced apart from each other in the second direction. The light-emitting diode display device according to claim 9, wherein the extended wiring portion is located between the first signal wiring and the second signal wiring.

11. The light-emitting diode display device according to claim 9, wherein the thickness of the step compensation pattern is greater than the thickness of the first signal wiring.

12. The light-emitting diode display device according to claim 8, wherein in a second direction perpendicular to the first direction, the step compensation pattern has a first width, and the extended wiring portion has a second width smaller than the first width.

13. The light-emitting diode display device according to claim 1, wherein the first electrode has a single-layer structure of a transparent conductive oxide layer, and the step compensation pattern is used as a reflective layer for light transmitted through the first electrode.

14. A light-emitting layer located at the opening on the first electrode, The pixel definition film and the second electrode covering the light-emitting layer within the opening, The light-emitting diode display device according to claim 13, further comprising a color filter layer located above the second electrode.

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