Digital signature

Abstract

The logic circuit package includes an interface for communicating with a host and logic circuitry. The logic circuitry includes a memory arrangement for storing digital signature metadata to facilitate verification of associated signed data. The digital signature metadata includes a schema identifier field for storing a schema version number, a key identifier field for storing an identifier of a signing key, a plurality of data block address fields for storing addresses corresponding to each data block of a plurality of data blocks, and a plurality of data block length fields corresponding to the plurality of data blocks, each data block length field storing data indicating a length of the corresponding data block. The logic circuitry is configured to receive a read request from the host and to transmit the digital signature metadata to the host in response to the read request.

Description

[Background technology]

[0001] The subcomponents of the device can communicate with each other in several ways. For example, they can use the Serial Peripheral Interface (SPI) protocol, Bluetooth Low Energy (BLE), Near Field Communication (NFC), or other types of digital or analog communication.

[0002] Some two-dimensional (2D) and three-dimensional (3D) printing systems include one or more interchangeable printer components, such as printing material containers (e.g., inkjet cartridges, toner cartridges, ink supplies, 3D printing agent supplies, and modeling material supplies) and inkjet printhead assemblies. In some examples, logic circuits associated with the interchangeable printer component(s) communicate with the logic circuits of the printer in which they are installed, transmitting information such as their identification, capabilities, and status. Similarly, other communication systems use logic circuits to connect to host logic circuits, common examples of which include network communication systems, life science applications, the automotive industry, and the Internet of Things.

[0003] Many examples of logic circuits involve digital signatures, which include signed data. The data may be generated and signed during manufacturing. The signature can be verified by a host or controller, thereby allowing us to assume that the signed data represents reliable data originating from, for example, the original equipment manufacturer or other trusted / authorized party. [Brief explanation of the drawing]

[0004] [Figure 1] An example of a printing system is shown. [Figure 2] An example of interchangeable printing device components is shown. [Figure 3] An example of a printing device is shown. [Figure 4]An example of a replaceable print cartridge is shown. [Figure 5A] An exemplary memory layout is shown. [Figure 5B] An exemplary memory layout is shown. [Figure 6A] An example of digital signature metadata is shown. [Figure 6B] An example of digital signature metadata is shown. [Figure 7A] This flowchart illustrates an exemplary method that can be performed by logic circuits. [Figure 7B] This flowchart illustrates an exemplary method that can be performed by logic circuits. [Figure 7C] This flowchart illustrates an exemplary method that can be performed by logic circuits. [Figure 7D] This flowchart illustrates an exemplary method that can be performed by logic circuits. [Figure 8A] This is a block diagram showing an example of a processing system for provisioning logic circuit packages. [Figure 8B] This is a block diagram showing an example of a processing system for provisioning logic circuit packages. [Figure 9] This is a block diagram showing an example of a signature hierarchy for a logic circuit package. [Figure 10] An example of a consumable cartridge is shown. [Figure 11A] Other exemplary memory layouts are shown. [Figure 11B] Other exemplary memory layouts are shown. [Figure 12A] This shows exemplary attribute data for a manufacturing digital signature. [Figure 12B] This shows exemplary attribute data for a manufacturing digital signature. [Figure 13] An example of instruction data for manufacturing digital signatures is shown. [Figure 14] This flowchart illustrates another exemplary method that can be performed by logic circuits. [Figure 15] This flowchart illustrates another exemplary method that can be performed by logic circuits. [Figure 16] A flowchart showing an example of a *** method for provisioning a logic circuit package with a memory placement. [Figure 17A] Shows other exemplary memory placements. [Figure 17B] Shows other exemplary memory placements. [Figure 18A] Shows exemplary part number signature metadata. [Figure 18B] Shows exemplary part number signature metadata. [Figure 19A] A flowchart showing another exemplary method that can be executed by a logic circuit. [Figure 19B] A flowchart showing another exemplary method that can be executed by a logic circuit. [Figure 19C] A flowchart showing another exemplary method that can be executed by a logic circuit. [Figure 20A] A block diagram showing another example of a processing system for provisioning a logic circuit package. [Figure 20B] A block diagram showing another example of a processing system for provisioning a logic circuit package. [Figure 21A] Shows other exemplary memory placements. [Figure 21B] Shows other exemplary memory placements. [Figure 22] A flowchart showing another exemplary method that can be executed by a logic circuit.

Best Modes for Carrying Out the Invention

[0005] Note: The text in the original seems to be incomplete in some parts, especially the part in where "***" is left as it is in the translation. You may need to check and provide the complete and accurate original text for a more precise translation.The following detailed description refers to the accompanying drawings illustrating specific examples that form part of this specification and enable the implementation of this disclosure. It should be understood that other examples may be used and that structural or logical modifications may be made without departing from the scope of this disclosure. Therefore, the following detailed description should not be constrained, and the scope of this disclosure is defined by the accompanying claims. It should be understood that each individual feature or combination of features of the various examples described herein may be combined with each other, in part or as a whole, with other individual features or combinations of features.

[0006] Some examples of the applications described herein relate to printing equipment. However, not all examples are limited to such applications, and at least some of the principles described herein may be used in other contexts, including but not limited to, other communication systems, network communication systems, life science applications, the automotive industry, the Internet of Things, and beverages.

[0007] Certain unauthorized third parties attempt to reverse engineer parts of the original equipment manufacturer (OEM) or other authorized parties to connect to the OEM or other authorized parties' equipment. Authorized parties, also known as trusted parties, include parties in the authorized chain, such as OEMs, suppliers, and developers authorized by intellectual property rights or otherwise associated with these parts and equipment, and unauthorized third parties may be third parties who, without a prior authorized relationship with the authorized parties, attempt to copy at least partially the original logic circuits of those authorized parties to connect to the host equipment of those authorized parties.

[0008] In one practical example, the logic circuit may include a microcontroller attached to or configured to be attached to a consumable cartridge, and the host printer logic circuit may include a printer controller and / or printer microcontroller. In this disclosure, the host logic circuit may be any host-side microcontroller, controller, application-specific integrated circuit (ASIC), etc. The host logic circuit may sometimes be simply referred to as the “host,” but the “logic circuit” itself should refer to the component-side logic circuit, not the host. Furthermore, the principles described in this disclosure can be applied to any two opposing communication devices without hierarchical implications, for example, without requiring a host-versus-component relationship. Thus, throughout this disclosure, “host” may be replaced with “controller.” A controller may include system components, hosts, supply devices, computers, printers, etc. A host or controller may have an opposing microcontroller and / or firmware that communicates with the logic circuit of this disclosure. In a host printer, the host printer logic circuit may command the logic circuit of an interchangeable print supply component. In other examples, it is not excluded that the logic circuit of this disclosure may command an opposing controller or host. Therefore, the host can be equipped with any controller or other logic circuitry.

[0009] A host or controller may be developed to accept only consumables (e.g., cartridges, containers, etc.) containing keys, attributes, and data from a trusted party (e.g., an OEM). To address this, digital signatures are provided for selected attributes and data, as disclosed herein. The digital signature is generated using a private key and written to the consumable. Firmware within the host may store (or access) the corresponding public key to verify the digital signature. If the digital signature is verified successfully, the key, attribute, and data are authentic, and the consumable can be accepted and used by the host. If the digital signature is not verified successfully, the key, attribute, or data is not authentic, and the consumable may be rejected by the host. As used herein, the term “signature” means “digital signature,” and “signature” and “digital signature” may be used interchangeably. The digital signatures disclosed herein may be signed directly over selected attributes and / or data, or indirectly over selected attributes and / or data, for example, over a hash of selected attributes and / or data, or a combination thereof.

[0010] To enable host verification of digital signatures, consumables can indicate which attributes and data were used to generate the digital signature. For example, a flexible and extensible schema for specifying the data on which a digital signature is computed is disclosed herein. The data may include certificates, such as custom certificate formats that do not otherwise include means of authentication. The schemas disclosed herein enable verification that the data concerning selected keys, attributes, and consumables is authentic, or at least developed by a party with access to the private key associated with the digital signature and / or schema. The private key may include trade secrets, and the party with access to the private key may be an authorized party. Digital signatures can compel manufacturers who are not authorized to create copies of complete attribute and datasets from legitimate consumables, instead of using non-genuine attributes, data, or combinations. For example, digital signatures can make it easier to identify and / or warn customers of the presence of non-genuine consumables, for example, via a host or server or otherwise. A flexible and extensible method for specifying the attributes and data to be included in a digital signature can save memory on consumables and enable a simpler and more efficient process for signature verification. For example, a single digital signature can be used to authenticate multiple OEM-proprietary certificates. The digital signature schemes and embodiments addressed in this disclosure may be applied to different types of digital circuits, including any computing or processing device, directly and / or via any type of network, for example, through some kind of interconnection function.

[0011] As described above, a logic circuit package may be associated with a printing device component such as a cartridge or container, and a host logic circuit may be associated with a host printing device to which the component is connected. In other examples, the logic circuit does not need to be associated with a printing component or a host printing device, and the host may be replaced by any type of controller that is not necessarily in a host-to-component relationship. Logic circuits and controllers can be used in combination with any microelectromechanical system, lab-on-a-chip, mobile computing device, and / or life science applications. A wide range of applications require a logic circuit package, such as a microcontroller, to securely connect to a host physically and / or communicatively. Logic circuit packages can connect to any type of host, such as any computing system, server, car system, home appliance, access control system, etc. Many examples in this disclosure include logic circuit packages and logic circuits for printing device components to connect to a host printing device logic circuit, but the features of the logic circuit package can be applied outside the field of printing, either alone or in relation to any component, to connect to any type of host logic circuit that is not necessarily associated with a printing device component or a printing device, respectively. Therefore, where this disclosure refers to a printing apparatus and / or components of a printing apparatus (or cartridge or container), etc., the apparatus may be any apparatus, and the components may be any components. An example of this disclosure enables a host logic circuit to securely identify and authenticate a logic circuit.

[0012] In certain cases, between integrated circuits (the notation is conforming to this specification) 2The I2C (or I2C) protocol allows at least one “leader” (commonly called a “master”) integrated circuit (IC) to communicate with at least one “follower” (commonly called a “slave”) IC, for example, via a bus. I2C and other communication protocols transmit data according to a clock period. For example, a voltage signal can be generated, and the value of the voltage is associated with the data. For example, a voltage value above X volts can represent a logical “1”, and a voltage value below Y volts can represent a logical “0”, where X and Y are predetermined numbers, and Y is less than or equal to X. By generating the appropriate voltage in each of a series of clock periods, data can be transmitted via a bus or another communication link. The specific examples of this disclosure relate to follower or slave logic. In other examples, there is no need for a master-slave or leader-follower or host-component relationship, so that both logic circuits (e.g., microcontrollers) communicating with each other can receive and respond to commands.

[0013] In at least some examples, multiple logic circuit packages (each possibly associated with a different interchangeable printer component or container) can be connected to an I2C bus. Certain exemplary printing material containers may have follower logic that utilizes I2C communication, but other examples may use other forms of digital or analog communication. In the I2C communication examples, the reader IC may generally be provided as part of the printer (sometimes called the “host”), and interchangeable printer components may have “follower” ICs, although this is not required in all examples. There may be multiple follower ICs connected to an I2C communication link or bus (e.g., containers of different colored printing materials). The addresses of the logic circuit packages may be I2C-compatible addresses (hereinafter referred to as I2C addresses), for example according to the I2C protocol, to facilitate the direction of communication between the reader and follower according to the I2C protocol. Follower ICs may include processors that perform data calculations before responding to requests from the logic circuits of the printing system. In certain examples, the follower IC or logic circuit package of the Disclosure may be connected to or integrated with any printing apparatus component that is connected to or integrated with a printing apparatus. For example, the logic circuit package or follower IC of the Disclosure may be connected to a non-interchangeable printing apparatus component. In other examples, other forms of digital and / or analog communication other than I2C may be used.

[0014] Communication between the printing device and interchangeable printing device components installed within the device (and / or their respective logic circuits) can facilitate various functions. Logic circuits within the printing device can receive information from logic circuits associated with interchangeable printing device components via a communication interface, and / or send commands to interchangeable printing device component logic circuits, which may include commands to write data to or read data from associated memory.

[0015] In at least some of the examples described below, a logic circuit package is described. The logic circuit package may be associated with a replaceable printer component, for example, mounted internally or externally, and at least partially mounted within a housing, and is adapted to communicate data with a printer controller via a bus provided as part of the printer.

[0016] As used herein, “logic circuit package” refers to one logic circuit or multiple logic circuits that can be interconnected or linked to communicate with one another. If two or more logic circuits are provided, they may be encapsulated as a single unit, separately, unencapsulated, or in any combination thereof. The package may be arranged or provided on a single substrate or multiple substrates. In some examples, the package may be mounted directly to a cartridge wall. In some examples, the package may include an interface, such as pads or pins. The package interface may be intended to connect to a communication interface of a printer component that connects to the printer logic circuit, or the package interface may connect directly to the printer logic circuit. An exemplary package may be configured to communicate via a serial bus interface. If two or more logic circuits are provided, these logic circuits may be connected to one another or to the interface in order to communicate via the same interface.

[0017] In some examples, each logic circuit package comprises at least one processor and memory. In one example, the logic circuit package may be a microcontroller or a secure microcontroller, or may function as one or the other. When in use, the logic circuit package may be bonded to or integrated with replaceable printer components, such as replaceable printing consumables (e.g., ink, toner) cartridges. Alternatively, the logic circuit package may be called a logic circuit assembly, or simply a logic circuit or processing circuit.

[0018] In the specific examples of this disclosure, package or packaging refers to the result of the final assembly of a logic circuit or integrated circuit assembly process, i.e., the final form of the processing circuit hardware itself. The logic circuit package may be the final product for shipment, sale, and use to a host logic circuit in the field, or it may be an intermediate product that may require further customization or personalization or programming steps, further assembly, and / or further mounting or connection to another (e.g., printed) component or circuit. In a relatively dressed-down form, the package may be a substrate with a thin film layer without further protection. In other examples, the package may comprise at least one circuit that is at least partially protected by an encapsulating or molding material and / or supported by a substrate (e.g., PCB) and / or a flexible film and / or a molded plastic component, e.g., a printed cartridge. In certain cases, the logic circuit is substantially enclosed by protective and / or insulating material, except for electrodes that connect the logic circuit to a host and / or other logic circuits. All of these examples, etc., can refer to a package. “Package” may include logic circuit packaging, but should not be confused with the industry term “packaging.”

[0019] In some examples, a logic circuit package can respond to various types of requests (or commands) from a host (e.g., a printer) logic circuit. Requests include, for example, read requests to retrieve data from general-purpose memory, query attribute requests to retrieve attributes from attribute storage memory, and / or start session requests to initiate an authenticated communication session using a key stored in key storage memory. A request is a type of command.

[0020] Figure 1 shows an example of a printing system 100. The printing system 100 includes a printing device 102 that communicates with logic circuits associated with interchangeable printing device components 104 via a communication link 106. In some examples, the communication link 106 may include an I2C-enabled or compatible bus (hereinafter referred to as an I2C bus). For clarity, the interchangeable printing device components 104 are shown as being outside the printing device 102, but in some examples, the interchangeable printing device components 104 may be temporarily installed or permanently housed within the printing device.

[0021] The replaceable printer component 104 may include, for example, a printing material container or cartridge (which may be a molding material container for 3D printing, a liquid or dry toner container for 2D printing, or an ink or liquid printing agent container for 2D or 3D printing), and in some examples, a print head or other ejection or transfer component. The printing material may be a consumable printing material consumed by ejection or transfer. In this disclosure, the printing material, printing consumables, or consumable printing material may be the same thing, and examples are shown in parentheses above. The replaceable printer component 104 may include, for example, a consumable resource of the printer 102, or a component that is likely to have a shorter lifespan (in some examples, considerably shorter) than the lifespan of the printer 102. Furthermore, although a single replaceable printer component 104 is shown in this example, in other examples there may be multiple replaceable printer components, including, for example, different colored printing agent containers, a print head (which may be integrated with the container), etc. In other examples, the printer component 104 may include service components that are replaced by service personnel, for example, a print head, toner process cartridge, or logic circuit package alone, which are bonded to the corresponding printer component and communicate with compatible printer logic circuits. In other examples, the logic circuits of this disclosure may be communicably connected to devices other than the printer.

[0022] Figure 2 shows an example of a replaceable printer component 200 that can provide the replaceable printer component 104 of Figure 1. The replaceable printer component 200 includes a data interface 202 and a logic circuit package 204. When the replaceable printer component 200 is used, the logic circuit package 204 decodes the data received via the data interface 202. The logic circuit may perform other functions as described below. The data interface 202 may include I2C or other interfaces. In certain examples, the data interface 202 may be part of the same package as the logic circuit package 204.

[0023] In some examples, the logic circuit package 204 may be further configured to encode data for transmission via the data interface 202. In some examples, two or more data interfaces 202 may be provided. In some examples, the logic circuit package 204 may be configured to function as a “follower” in I2C communication.

[0024] Figure 3 shows an example of a printing device 300. The printing device 300 may provide the printing device 102 shown in Figure 1. The printing device 300 may function as a host for interchangeable components. The printing device 300 includes an interface 302 for communication between the interchangeable printing device components and the printing device logic circuit 304, such as a controller. In some examples, the interface 302 is an I2C interface.

[0025] In some examples, the printer logic circuit 304 may be configured to function as a host or reader in I2C communication. The printer logic circuit 304 can generate commands and send them to at least one interchangeable printer component 200, receive responses, and decode the received responses therefrom. In other examples, the printer logic circuit 304 can communicate with the logic circuit package 204 using any form of digital or analog communication.

[0026] The printers 102, 300 and their interchangeable printer components 104, 200, and / or their logic circuits may be manufactured and / or sold separately. In one example, a user may acquire a printer 102, 300 and keep it for several years. The same printer may continue to be used for printing in homes and offices even if the same version of the printer 102, 300 is no longer commercially available. In contrast, during the following years when the printer 102, 300 is no longer available for purchase, the interchangeable printer components 104, 200 can still be purchased to facilitate printing with the printer 102, 300. The printer component logic circuits may be upgraded over several years, for example, to be compatible with newer versions of the printer. The same upgraded printer component logic circuits may remain backward compatible with older versions of the printer, so as to be compatible with a wide variety of printers, including both older and newer versions. It may be advantageous for an original equipment manufacturer (OEM) to manufacture printer component logic circuits compatible with a wide variety of printers 102, 300, for example, to avoid the need to support multiple hardware versions and to avoid a surge in stock item identification numbers (SKUs) for printer component logic circuits. Therefore, there may be at least some degree of forward and / or backward compatibility between printers 102, 300 and interchangeable printer component 104, 200.

[0027] Figure 4 shows an example of a replaceable print cartridge 400, such as a print consumable cartridge. The print cartridge 400 can provide the replaceable printer component 104 of Figure 1 or the replaceable printer component 200 of Figure 2. The print cartridge 400 includes a logic circuit package 402, which includes a logic circuit 404 and an interface 408. In some examples, the interface 408 is an I2C interface. The logic circuit 404 includes a memory arrangement 406. Furthermore, the print cartridge 400 includes a reservoir 410 for holding consumables and an output unit 412 for ejecting consumables. Consumables may include ink, dry toner, liquid toner, 3D printing agents (e.g., print enhancers, print inhibitors, shaping powders such as plastic powder or metal powder), or other suitable consumables outside the printing field.

[0028] The logic circuit package 402 may be associated with a replaceable print cartridge 400, or in some examples may be mounted thereon, and / or at least partially incorporated therein. The logic circuit 404 is communicatively coupled to a memory arrangement 406. The memory arrangement 406 may include one or more memory devices and may include either or any combination thereof of volatile memory (e.g., dynamic random access memory (DRAM), static random access memory (SRAM), registers, etc.) and non-volatile memory (e.g., read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash, erasable programmable read-only memory (EPROM), memristors, etc.). In some examples, as will be described in more detail below with reference to Figures 5A to 6B, the memory arrangement 406 stores digital signatures and digital signature metadata corresponding to the digital signatures. The logic circuit 402 may be configured to verify the authenticity of selected data and / or attributes of the logic circuit in response to a request from the host printer logic circuit, as will be described in more detail below. If the selected data and / or attributes of the logic circuit 402 are verified to be authentic, the replaceable print cartridge 400 can be used by the host printing device.

[0029] The exemplary logic circuits disclosed herein can provide a flexible digital signature schema, enabling manufacturers or suppliers to associate different amounts and types of data of their choice with the digital signatures of the schema with the same controller or host verifying the digital signatures. Thus, a single host controller can verify different digital signatures, as well as different amounts and / or types of data associated with the digital signatures. At the same time, it may be difficult for an unauthorized third party to tamper with the signed data. In other examples, the designation data and digital signature metadata (discussed below) may occupy a relatively small amount of data space. In yet another example, the designation data, digital signature metadata, and digital signatures may be duplicated by an unauthorized third party, and the duplicated designation data, metadata, and digital signatures may appear as authorized data. In one practical example, the logic circuit may comprise a microcontroller mounted on or configured to be mounted on a consumable cartridge, and the printer logic circuit may comprise a printer controller and / or printer microcontroller.

[0030] Figure 5A shows an example of memory arrangement 406a. In some examples, memory arrangement 406a may be an example of memory arrangement 406 in Figure 4. Memory arrangement 406a stores digital signature metadata 500 (also referred herein as persono signature metadata) and digital signature 502 (also referred herein as persono signature) corresponding to the digital signature metadata 500. As will be described in more detail below with reference to Figure 10, the digital signature metadata 500 and digital signature 502 may be stored in a general-purpose memory portion of the memory arrangement that can be accessed, for example, for read and write operations by a host controller. The digital signature metadata 500 is used to facilitate verification of the digital signature 502 (e.g., associated signed data) by the host. The digital signature metadata 500 may vary and is defined in more detail below with reference to Figures 6A and 6B. The digital signature metadata 500 specifies the data used to compute the digital signature 502. The digital signature 502 is calculated using the data corresponding to the digital signature metadata 500 and the private key corresponding to the public key stored by the host or stored by the host and accessible. The calculation of the digital signature 502 is described in more detail below with reference to Figures 8A and 8B. To verify that the logic circuit is authentic, the host can read the digital signature metadata 500 and the digital signature 502. The host can then use the data specified by the digital signature metadata 500 to verify the digital signature 502.

[0031] Figure 5B shows another example of memory arrangement 406b. In some examples, memory arrangement 406b may be another example of memory arrangement 406 in Figure 4. Memory arrangement 406b stores digital signature metadata 500 and the digital signature 502 corresponding to the digital signature metadata 500, as previously described and illustrated with reference to Figure 5A. Furthermore, memory arrangement 406b also stores a partition map 504, a logic circuit identifier 506, designation data 508 (also referred herein as persono signature designation data), and other data 510. As will be described in more detail below with reference to Figure 10, the partition map 504 and the logic circuit identifier 506 may be stored in an attribute memory portion of the memory arrangement that can be configured to be accessed for read operations by the host but not for write operations. An example of such a partition map 504 is disclosed in U.S. Patent No. 8,205,976 or International Patent Application No. PCT / US2021 / 020262. Furthermore, the specified data 508 and other data 510 can be stored in a general-purpose memory portion of the memory arrangement that can be accessed by the host for read and write operations.

[0032] The partition map 504 contains metadata defining the partitions of memory arrangement 406b, such as the partitions of the general-purpose memory portion of the memory arrangement. Digital signature metadata 500, digital signature 502, designation data 508, and other data 510 are stored within the partitions of memory arrangement 406b defined by the partition map 504. The partition map 504 may include multiple partition lengths, read / write configurations, and partition attribute identifiers, each of which defines a partition in the general-purpose memory portion of the memory arrangement. The read / write configuration can define how the corresponding partition is accessible, for example, for read-only (RO) operations, write-only (WO) operations, both read and write (R / W) operations, or write-once-read-only (W2RO) operations. The read / write configuration of a partition can also define other access modes, such as specifying whether authentication is required for partition access. The partition attribute identifier can define the type of data stored in the partition. For example, one attribute identifier value may indicate the partition where the persona signature is stored, and another attribute identifier value may indicate the partition where the persona signature metadata is stored. The host can query the partition map and, from the length and attribute identifier information, determine where the persona signature and persona signature metadata are stored, and then construct an appropriate read command (specifying the memory address and length). The partition map 504 may have a variable length and may define a single partition or multiple partitions. In some examples, the partition map 504 may have a length of 4 bytes multiplied by the number of partitions, with each partition having a length of 2 bytes, each read / write configuration being 1 byte, and each partition attribute identifier being 1 byte.

[0033] The logic circuit identifier 506 allows the host to distinguish logic circuit package 402 (Figure 4) from other logic circuit packages. In some examples, each logic circuit identifier 506 may be unique, i.e., different for different logic circuit packages. In cases where identifier 506 is duplicated by an unauthorized third party, the logic circuit identifier 506 does not need to be universally unique, as there may be two or more instances of the same identifier 506. In some examples, the logic circuit identifier 506 has a length of 32 bytes.

[0034] The designation data 508 includes data stored in multiple data blocks of the general-purpose memory portion of the memory arrangement specified by the digital signature metadata 500. The designation data 508 includes the data to be signed. The digital signature 502 is at least partially based on the designation data 508. The digital signature 502 is not based on any other data 510. In some examples, the designation data may be static over the lifetime of the logic circuit package and / or the components to which the logic circuit package is attached (e.g., read-only data). The designation data 508 may include any appropriate data, such as certificates and / or data specific to the logic circuit package. The designation data 508 may have a length that can vary between different logic circuit memory arrangements. In some examples, the designation data 508 may include the digital signature metadata 500, i.e., one of the data blocks that is part of the designation data 508 may include the digital signature metadata 500.

[0035] Other data 510 includes data not specified by the digital signature metadata 500. Other data 510 may include unsigned data unrelated to the digital signature 502, including print cartridge-related characteristics (e.g., color, fill level, etc.) and / or other appropriate data. In some examples, other data 510 may include data intended to be updated / modified by the host over the lifetime of the logic circuit package (e.g., read / write data or once-written read-only data) or the component to which the logic circuit package is attached, such as dynamic data that is updated over the lifetime of the logic circuit, including data in the usage counter field or print material level data.

[0036] In some examples, the digital signature 502 signs data that includes at least one of the following: a device type identifier, a logic circuit identifier 506, a partition map 504, and designation data 508. The device type identifier, which is not stored in memory placement 406b, can correspond to the logic circuit package 402 (Figure 4) and identify whether the logic circuit package is intended to be mounted on or is mounted on a replaceable printer component. In some examples, the value of the device type identifier is the same for all logic circuit packages intended to be mounted on or are mounted on a replaceable printer component. Other values ​​for the device type identifier can indicate that the logic circuit package is not intended to be mounted on a replaceable printer component.

[0037] As will be explained in more detail below, in order to verify that the logic circuit is authentic, the host can read the digital signature metadata 500, the digital signature 502, the partition map 504, and the logic circuit identifier 506. The host can then use the digital signature metadata 500 to read the designation data 508. The host can then use the partition map 504, the logic circuit identifier 506, and the designation data 508 to verify the digital signature 502. In one example, only a portion of the partition map, such as the length of the partitions within the partition map and / or other features within the partition map, may be verified for inspection.

[0038] Figure 6A shows an example of digital signature metadata 600a. In one example, digital signature metadata 600a provides the digital signature metadata 500 shown in Figure 5A or Figure 5B. Digital signature metadata 600a includes a schema identifier field 602, a key identifier field 604, a data block address field 606, and a data block length field 608. The schema identifier field 602 stores the schema version for determining which schema the host uses. The schema identifier field 602 may have a length of 1 byte. The key identifier field 604 stores the identifier of the signing key for the host to use the correct key for verification. The host may store (or make accessible) multiple public keys used to verify various signatures. The key identifier field 604 may have a length of 2 bytes. The original digital signature 502 (Figures 5A and 5B) may be calculated using the key corresponding to the key identifier.

[0039] The data block address field(s) 606 may contain one or more data block address fields. Each data block address field stores the address corresponding to the data block for which the digital signature is first calculated. The data block address may also be the starting address of the data block. Each data block address field may have a length of 2 bytes. The data block length field(s) 608 may contain one or more data block length fields. Each data block length field corresponds to the data block addressed by the corresponding data block address field. Each data block length field stores data indicating the length of the corresponding data block. Each data block length field may have a length of 2 bytes. Each data block address field and the corresponding data block length field are used in the digital signature metadata 600a to store the data block address(s) from the first data block address(addr1) and the data block length(len1) to the last data block address(addr1). N ) and data block length (len N ) up to addr1||len1||addr2||len2||...||addr N ||len N They may be concatenated as shown. For example, one of the specified data blocks may store digital signature metadata.

[0040] Figure 6B shows another example of digital signature metadata 600b. In one example, digital signature metadata 600b provides the digital signature metadata 500 in Figure 5A or Figure 5B. Digital signature metadata 600b includes a schema identifier field 602, a key identifier field 604, a data block address field(s) 606, and a data block length field(s) 608, as previously described and illustrated with reference to Figure 6A. Furthermore, digital signature metadata 600b also includes a length field 610 and a data block count field 612. The data block count field 612 stores data indicating the total number of data blocks addressed by the data block address field(s) 606. The data block count field 612 may have a length of 1 byte. The length field 610 stores data indicating the total cumulative length of the key identifier field 604, the data block count field 612, the data block address field(s) 606, and the data block length field(s) 608. The length field 610 may have a length of 2 bytes. The host can use the data stored in the length field 610 to parse the digital signature metadata 600b. In some examples, the host can use the data stored in the data block count field 612 instead of, or in addition to, the length field 610 to parse the digital signature metadata 600b.

[0041] Digital signature metadata 600b consists of schema identifier || length || key identifier || data block count || addr1 || len1 || addr2 || len2 || ... || addr N ||len NAs shown above, it can be linked to and written to memory allocation 406 (Figure 4). For example, 02 000B 8C00 02 0000 00F0 0100 Given a hexadecimal digital signature metadata 600b equal to 0001, the schema identifier field 602 (i.e., 02) indicates schema version number 2, the length field 610 (i.e., 000B) indicates a total cumulative length of 11 bytes, the key identifier field 604 (i.e., 8C00) indicates the signing key identifier of 8C00, the data block count field 612 (i.e., 02) indicates two data blocks: the first data block address field 606 (i.e., 0000) and the first data block length field 608 (i.e., 00F0) indicate a first data block of 0x0000-0x00EF with a length of 240 bytes, and the second data block address field 606 (i.e., 0100) and the second data block length field 608 (i.e., 0001) indicate a second data block of 0x0100-0x0100 with a length of 1 byte.

[0042] Figures 7A–7D are flowcharts illustrating exemplary methods 700, 710, 720, and 730 that can be performed by a logic circuit, such as logic circuit 404 in Figure 4. The logic circuit may be part of a logic circuit package (e.g., 402 in Figure 4) for interchangeable printer components (e.g., 400 in Figure 4) that include an interface (e.g., 408 in Figure 4) for communicating with a printer logic circuit (e.g., 304 in Figure 3), as previously described. In this example, the memory arrangement stores digital signature metadata (e.g., 600a in Figure 6A or 600b in Figure 6B) to facilitate verification of associated signed data. As shown in step 702 by method 700 in Figure 7A, the logic circuit is configured to receive a read request from a host. In step 704, the logic circuit is configured to send the digital signature metadata to the host in response to the read request.

[0043] In one example, the memory arrangement stores a digital signature (e.g., 502 in Figure 5A or Figure 5B) corresponding to digital signature metadata, which is signed with a key corresponding to a key identifier (e.g., 604 in Figure 6A or Figure 6B). In this example, the logic circuit is configured to receive read requests (or multiple read requests) from the host, as shown in step 712 by method 710 in Figure 7B. In step 714, the logic circuit is configured to send the digital signature and digital signature metadata (in any order) to the host in response to at least one read request.

[0044] In one example, the memory layout stores a digital signature (e.g., 502 in Figure 5B) signed on data including a logic circuit identifier (e.g., 506 in Figure 5B), a partition map (e.g., 504 in Figure 5B), digital signature metadata (e.g., 500 in Figure 5B), designation data (e.g., 508 in Figure 5B), and a device type identifier corresponding to the logic circuit package. In this example, the logic circuit is configured to receive requests from the host (e.g., general-purpose memory read requests and / or attribute memory read requests) as shown in step 722 by method 720 in Figure 7C. In step 724, the logic circuit is configured to send to the host the logic circuit identifier, partition map, digital signature, digital signature metadata, and / or other data, as well as the designation data corresponding to the digital signature metadata, in response to at least one request.

[0045] In one example, as will be described in more detail below with reference to Figure 10, the digital signature metadata and digital signature are stored in the general-purpose memory portion of a memory arrangement configured for general-purpose read / write access. Furthermore, the memory arrangement includes at least one distinct memory portion not intended for general-purpose read / write access, which stores at least one cryptographic key and / or multiple attributes. In this case, the logic circuit may be configured to perform cryptographic operations using at least one cryptographic key, as shown in step 732 by method 730 in Figure 7D. In step 734, the logic circuit is configured to return an attribute from among multiple attributes in response to an attribute request which includes an associated attribute tag, and the logic circuit is configured to associate the attribute with the attribute tag. The multiple attributes may include, for example, a partition map, a logic circuit identifier, or a device address (for example, in the case of I2C communication). The logic circuit may be configured to implement one or both of blocks 732 and 734.

[0046] Figures 8A and 8B are block diagrams showing an example of a processing system 800 for provisioning logic circuit packages (e.g., 402 in Figure 4). In one example, the processing system 800 may be part of a manufacturing line for logic circuit packages. The processing system 800 includes a processor 802 and a machine-readable storage medium 806. The processor 802 is communicatively coupled to the machine-readable storage medium 806 via a communication path 804. The following description refers to a single processor and a single machine-readable storage medium, but the description can also be applied to systems having multiple processors and multiple machine-readable storage mediums. In such examples, instructions may be distributed (e.g., stored) across multiple machine-readable storage mediums, and instructions may be distributed (e.g., executed) across multiple processors.

[0047] The processor 802 includes one (i.e., a single) central processing unit (CPU) or microprocessor, or two or more (i.e., multiple) CPUs or microprocessors and / or other suitable hardware devices for retrieving and executing instructions stored in the machine-readable storage medium 806. The processor 802 can fetch, decode, and execute instructions 808-814 to supply logic circuit packages.

[0048] The processor 802 can fetch, decrypt, and execute instructions 808 to obtain a signing key identifier and signature data. For example, the signature data includes a device type identifier corresponding to a logic circuit package, a logic circuit identifier for the logic circuit package to distinguish it from other logic circuit packages by the host, a partition map for defining partitions in the general-purpose memory portion of the logic circuit package's memory placement (e.g., including partition length and partition attribute identifiers for each partition), and data stored in multiple data blocks of the general-purpose memory portion of the logic circuit package's memory placement as specified by the digital signature metadata. The signing key identifier and signature data may be stored in a machine-readable storage medium 806 and / or another machine-readable storage medium accessible by the processing system 800.

[0049] Digital signature metadata facilitates the verification of associated signed data. Digital signature metadata may include a schema identifier field (e.g., 602 in Figure 6A or Figure 6B) that stores a schema version number to determine which schema the host uses; a key identifier field (e.g., 604 in Figure 6A or Figure 6B) that stores the identifier of the signing key so that the host can use the correct key for verification; multiple data block address fields (e.g., 606 in Figure 6A or Figure 6B) that store the addresses of each of the multiple data blocks for which the digital signature is first calculated; and multiple data block length fields (e.g., 608 in Figure 6A or Figure 6B) that correspond to multiple data blocks, each of which stores data indicating the length of the corresponding data block.

[0050] Processor 802 can fetch, decrypt, and execute instruction 810 for concatenating signature data. The signature data may be concatenated as follows: device type identifier || logic circuit identifier || partition map || data of data block 1 || data of data block 2 || ... || data of data block N, where "N" is the number of data blocks. Processor 802 can fetch, decrypt, and execute instruction 812 for computing a digital signature on the concatenated signature data using the signature secret key corresponding to the signature key identifier. Processor 802 can fetch, decrypt, and execute instruction 814 for writing the digital signature (e.g., 502 in Figure 5A or Figure 5B) to the general-purpose memory portion of the memory arrangement of the logic circuit package.

[0051] As shown in Figure 8B, processor 802 can fetch, decrypt, and execute a further instruction 816 to write digital signature metadata (e.g., 500 in Figure 5A or Figure 5B) to the general-purpose memory portion of the memory arrangement of the logic circuit package. Processor 802 can fetch, decrypt, and execute a further instruction 818 to write the logic circuit identifier (e.g., 506 in Figure 5B) and partition map (e.g., 504 in Figure 5B) to the attribute memory portion of the memory arrangement of the logic circuit package. Processor 802 can fetch, decrypt, and execute a further instruction 820 to write data (e.g., 508 in Figure 5B) stored in multiple data blocks specified by the digital signature metadata to the general-purpose memory portion of the memory arrangement of the logic circuit package.

[0052] Instead of acquiring and executing instructions, or in addition to doing so, the processor 802 may include, within the machine-readable storage medium 806, one (i.e., single) electronic circuit or two or more (i.e., multiple) electronic circuits having multiple electronic components to perform the functions of one or more of the instructions. With respect to executable instruction representations (e.g., boxes) described and illustrated herein, it should be understood that some or all of the executable instructions and / or electronic circuits contained within one box may, in alternative examples, be contained within different boxes shown in the figures or different boxes not shown.

[0053] The machine-readable storage medium 806 is a non-temporary storage medium and may be any suitable electronic, magnetic, optical, or other physical storage device for storing executable instructions. Therefore, the machine-readable storage medium 806 may be, for example, random access memory (RAM), electrically erasable programmable read-only memory (EEPROM), a storage drive, or an optical disk. The machine-readable storage medium 806 can be located within the system 800, as shown in Figures 8A and 8B. In this case, the executable instructions can be installed in the system 800. Alternatively, the machine-readable storage medium 806 may be a portable, external, or remote storage medium that allows the system 800 to download instructions from a portable / external / remote storage medium. In this case, the executable instructions may be part of an installation package.

[0054] Figure 9 is a block diagram showing an example of a signature hierarchy 900 for a logic circuit package, such as the logic circuit package 402 in Figure 4, which is implemented and / or stored on the logic circuit 400. The signature hierarchy 900 includes a (e.g., partially unique, static) digital signature 910, a part number signature 920, and a manufacturing signature 902 calculated on partially unique manufacturing data 930. The partially unique manufacturing data 930 may include the manufacturing date and time of the component to which the logic circuit 400 is mounted, a line identifier that identifies the manufacturing line of the component to which the logic circuit 400 is mounted, and so on.

[0055] As described above, for example with respect to Figures 5A and 5B, the digital signature 910 (e.g., 502 in Figure 5A or 5B, referred to elsewhere in this disclosure as a persono digital signature) is computed on the signature data 912 to provide the signed data. The digital signature 910 may be computed using a first signing key corresponding to a first key identifier (e.g., 604 in Figure 6A or 6B). In some examples, the digital signature 910 is unique to each logic circuit package. The original digital signature 910 and signature data 912 may be written to the memory placement of the logic circuit package during the provisioning of the logic circuit package, as described above with reference to Figures 8A and 8B. The signature data 912 includes a device type identifier (not stored in the memory placement of the logic circuit package in some examples), a logic circuit identifier (e.g., 506 in Figure 5B), a partition map (e.g., 504 in Figure 5B), and designation data (e.g., 508 in Figure 5B). The private key for digital signature 910 may reside within a hardware security module (HSM). The public key for digital signature 910 may reside within the host or be accessible by the host. The same private / public key can be used to generate and / or verify signatures for multiple logic circuits.

[0056] The part number signature 920 is calculated on common manufacturing data 922. The part number signature may be calculated using a second signing key corresponding to a second key identifier (e.g., 1804 in Figure 18A or Figure 18B) different from the first signing key used to calculate the digital signature 910. In some examples, the part number signature 920 may be common to multiple logic circuit packages that share the same part number (e.g., the same family, such as a combination of logic circuit packages and / or a family of interchangeable printer component parts, the same color or color combination, one or more specific fill levels, etc.). The part number signature 920 may be the same for multiple logic circuit packages having different digital signatures and different logic circuit identifiers (in certain cases, if the logic circuit identifiers are different, the digital signatures will consequently be different). The part number signature 920 may be pre-calculated. The part number signature 920 and common manufacturing data 922 may be written to the memory placement of the logic circuit package during the final assembly of the interchangeable printer component parts. The common manufacturing data 922 may include color, fill level, area, etc.

[0057] The manufacturing signature 902 may be computed by a logic circuit (e.g., 404 in Figure 4) during the final assembly of interchangeable printing device components. The manufacturing signature 902 may be computed using a third signing key (e.g., 1106 in Figure 11B) corresponding to a third key identifier (e.g., 1206 in Figure 12B) that is different from the first signing key used to compute the digital signature 910 and the second signing key used to compute the part number signature. The manufacturing signature 902 may include the manufacturing date and / or manufacturing time, line ID, and more partially unique manufacturing data written during the final assembly. As will be described in more detail below, the logic circuit may include a dedicated function for computed the manufacturing signature, including an elliptic curve cryptography (ECC) key that may be used to generate the manufacturing signature; dedicated configurable attributes that define which ECC key should be used for signing and which data blocks should be signed; and dedicated commands for generating the signature, writing the dedicated attributes during personalization, and reading the dedicated attributes and the signature. The private key for the manufacturing signature 902 may be generated by the personalization system and written to the key storage memory of the logic circuit. The public key for the manufacturing signature 902 may be included in a certificate generated by the personalization system and written to the general-purpose memory of the logic circuit. A unique private / public key can be used for signature generation and / or verification for each logic circuit.

[0058] A third party and / or an unauthorized party may copy the digital signature and metadata, including the signature and data in Figure 9, to achieve the effect of mimicking the original and authorized data.

[0059] Figure 10 shows an example of a consumable cartridge 1000. The consumable cartridge 1000 can provide the replaceable printer component 104 in Figure 1, the replaceable printer component 200 in Figure 2, or the print cartridge 400 in Figure 4. The consumable cartridge 1000 includes a reservoir 1002 containing consumable material, a logic circuit interface 1004 for communicating with a host, and a logic circuit 1006. The consumable material can include ink, dry toner, liquid toner, or 3D printing agent. The reservoir 1002 may be connected to an output unit (not shown) to eject the consumable material from the reservoir 1002. The interface 1004 may be an I2C interface or another suitable interface for communicating with a host.

[0060] The logic circuit 1006 includes a processor 1008, other authentication logic 1010, and a memory arrangement 1012. The memory arrangement 1012 may include attribute memory 1014, key memory 1024, general-purpose memory 1030, and instructions 1040 and 1042. For example, the memory arrangement 1012 may include one or more memory devices, and may include one or any combination of volatile memory (e.g., DRAM, SRAM, registers, etc.) and non-volatile memory (e.g., ROM, EEPROM, flash, EPROM, memristor, etc.).

[0061] The attribute memory 1014 can store the logic circuit identifier 506, the partition map 504, and the manufacturing signature attribute data 1200 (described later with reference to Figures 12A and 12B). In some examples, the attribute memory 1014 is accessible for read and / or write access by the processor 1008 and / or other authentication logic 1010. The attribute memory 1014 can be made accessible only for read access by the host by sending a request to the processor 1008, which can perform the requested operation and return the requested data to the host. The key memory 1024 can store cryptographic keys 1026 (e.g., symmetric base keys and / or asymmetric secret keys). In some examples, the key memory 1024 is accessible for read and write access by the processor 1008 and / or other authentication logic 1010, but not accessible to the host. The cryptographic keys 1026 can be used to perform cryptographic operations such as authentication, signing, and / or other appropriate operations. In some examples, the key storage memory 1024 stores multiple key identifiers and associated signing keys. Each signing key can be identified and selected based on the key identifier associated with each signing key. In one example, the multiple key identifiers and associated signing keys may be stored in a table or a tabular format, or in any other format that facilitates the identification and retrieval of keys based on their corresponding identifiers. In another example, a single signing key may be stored with or without an associated identifier.

[0062] The general-purpose memory 1030 can store personalized (persono) signature metadata 500 (e.g., the digital signature metadata 500 in Figures 5A and 5B, or the digital signature metadata 600a or 600b in Figures 6A and 6B), persono signature designation data 508 (e.g., designation data 508 in Figure 5B), and other data 510. The general-purpose memory 1030 can also store certificate 1102 and manufacturing signature designation data 1300 (also referred to herein as designation data, described below with reference to Figures 11A and 11B). In some examples, certificate 1102 may be contained within persono signature designation data 508. Certificate 1102 may be of the type described in International Patent Application No. PCT / US2021 / 054017, which is incorporated herein by reference. The manufacturing signature designation data 1300 may include a persono signature 502 (e.g., the digital signature 502 in Figures 5A and 5B), a part number signature 1304, and partial unique manufacturing data 1306 (e.g., corresponding to reference numerals 910, 920, and 930, respectively, in Figure 9). The general-purpose memory 1030 may also store part number signature metadata 1700 and part number signature designation data 1702 corresponding to the part number signature 1304. In some examples, the general-purpose memory 1030 is accessible for read and / or write access by the processor 1008, other authentication logic 1010, and / or the host via the processor 1008. The host can access the general-purpose memory 1030 by sending general-purpose read and / or write requests to the logic circuit 1006 via the interface 1004. General-purpose read and / or write requests from the host to access the general-purpose memory 1030 may differ from requests from the host to access the attribute storage memory 1014.

[0063] Instruction 1040 is an instruction for a secure communication session between the logic circuit 1006 and the host based on the cryptographic key(s) 1026. Instruction 1042 is an instruction for signature calculation (e.g., the manufacturing signature 902 in Figure 9) in response to a signature generation request from the host.

[0064] The processor 1008 executes instructions for controlling operations of the logic circuit 1006, including instructions 1040 and 1042, as well as instructions for accessing memory allocation 1012 for read and / or write operations. The processor 1008 can respond to external requests or commands from a host (e.g., via interface 1004) by returning data (e.g., logic circuit identifier 506, partition map 504, persona signature metadata 500, persona signature 502, persona signature designation data 508, and other data 510, etc.), updating data, and / or initiating functions (e.g., starting a secure communication session and calculating a signature). The processor 1008 can also respond to internal requests or commands within the logic circuit 1006 by generating and / or updating data stored in memory allocation 1012. Other authentication logic 1010 may include high-speed computer logic for handling predetermined iterative calculations and / or other logic for handling authentication algorithms. In some examples, other authentication logic 1010 may execute the instruction 1040 for a secure communication session and / or the instruction 1042 for signature calculation, or a portion of the instruction 1040 for a secure communication session and / or the instruction 1042 for signature calculation.

[0065] To avoid discrepancies between data stored in compatible logic circuits and the original and / or authorized data, it is desirable to sign critical data stored in consumables associated with identification information or functionality. Signed data remains static for the remainder of the consumable device's lifespan. Therefore, in many cases, signing is not appropriate for data whose values ​​may change, such as print consumable usage counters.

[0066] Generating signatures on partially unique data can be challenging in certain environments that are not directly controlled. An example of such an environment is the manufacturing location of components to which logic circuit packages (e.g., 1006, 402, 204) are attached (e.g., interchangeable printed components such as reference numerals 1000, 104, 200). These manufacturing locations do not necessarily have to be owned or directly operated by the party that designed and generated the architecture and content of the original data, such as an OEM.

[0067] Logical circuits on certain components, such as printing consumables, can perform signature operations themselves by computing a manufacturing digital signature. For example, the manufacturing of a component having printing material or imaging capabilities (e.g., a photoreceptor) may occur after the personalization of the associated logical circuit. The personalization of the logical circuit and the manufacturing of the component may occur in different locations and / or by different parties or suppliers. According to the examples of this disclosure, during the manufacturing of the component and / or after the personalization of the logical circuit, the manufacturing digital signature is computed by the logical circuit and stored in the logic circuit's memory location for later retrieval by an authorized host device (e.g., a printer) that wants to read and authenticate the signed data. Facilitating the logical circuit with the manufacturing signature functionality can facilitate the possibility that a manufacturing line can perform this signature operation without requiring special equipment. Since the logical circuit is pre-configured to compute the manufacturing digital signature, the manufacturing digital signature and the data on which it is computed can be considered authentic even if they are not signed in a directly controlled environment. These advantages may be of interest to OEMs.

[0068] It should be noted that third parties who are not OEMs of compatible host devices may still be able to duplicate the data and signatures disclosed herein. As illustrated by the examples in this disclosure, by storing equivalent or similar data and signatures, these third parties may connect to host devices developed by other parties (e.g., the aforementioned OEMs), thereby enabling the host devices to treat the received data as original data. In this regard, it should be noted that the manufacturing digital signatures and other signatures (e.g., persona signatures, part number signatures) disclosed herein may be independent of any steps or parties associated with an authorized manufacturing process or location. Furthermore, an unauthorized third party may duplicate signatures and write them to a memory placement on a consumable in a single step or action. Additionally, or alternatively, a complete set of signatures (e.g., persona signatures, part number signatures, manufacturing digital signatures) may be outsourced to a single supplier / manufacturer, not necessarily an unauthorized third party, and the consumable may adhere to the same schema disclosed herein to ensure compatibility with the installed host (e.g., a printer). Components, schemas, data, and signatures may be manufactured and / or written in a single location. In other words, the different signature and data characteristics of this disclosure are not limited by the steps or sequence of the manufacturing process. In particular cases, the various names used to describe each digital signature disclosed herein (e.g., persona, manufacturing, part number, etc.) are merely for distinguishing the signatures from one another, and the names do not imply that the signature is written during any particular process step. The principles described herein can be used to (i) obtain control over data for large amounts of logic circuits passing through specific steps and / or locations in a manufacturing process, for example, because one or more of the steps and / or locations may be difficult to fully control, and / or (ii) obtain compatibility with a pre-shipped / installed host controller.

[0069] While specific examples in this disclosure, such as Figure 10, illustrate cases of logic circuits where the manufacturing digital signature has already been calculated, it should be noted that earlier examples of logic circuits (e.g., before component manufacturing) may still require the calculation of the manufacturing digital signature.

[0070] Figure 11A shows another example of memory arrangement 406c. In some examples, memory arrangement 406c may be an example of memory arrangement 406 in Figure 4. Memory arrangement 406c stores instruction data 1100, certificate 1102, and manufacturing attribute data 1104. Instruction data 1100 may be data on which a manufacturing digital signature is calculated, indicated by the corresponding instruction (e.g., 1202) in the manufacturing attribute data 1104, as shown in Figure 12A. As shown in Figure 10, instruction data 1100 (e.g., there referred to as manufacturing signature instruction data 1300) may be stored in a general-purpose memory portion 1030 of the memory arrangement, which can be accessed, for example, by a host controller for read and write operations. Certificate 1102 may also be stored in a general-purpose memory portion of the memory arrangement. Manufacturing attribute data 1104 (e.g., there also referred to as manufacturing signature attribute data 1200) may be stored in an attribute memory portion 1014 of the memory arrangement.

[0071] As will be described in more detail below, instruction data 1100 is the data on which the manufacturing digital signature is calculated or should be calculated. Certificate 1102 is for the controller (e.g., the host) to verify the manufacturing digital signature. Certificate 1102 contains the public key corresponding to the private key used to calculate the manufacturing digital signature. Certificate 1102 is signed with a Certificate Authority private key which is verified by the controller (e.g., the host) with the Certificate Authority public key. As will be described in more detail below, manufacturing attribute data 1104 contains instruction data 1100 and at least one instruction that indicates (e.g., identifies) the manufacturing digital signature.

[0072] Figure 11B shows another example of memory arrangement 406d. In some examples, memory arrangement 406d may be another example of memory arrangement 406 in Figure 4. Memory arrangement 406d stores instruction data 1100, certificate 1102, and manufacturing attribute data 1104, as previously described and illustrated with reference to Figure 11A. In addition, memory arrangement 406d stores a signing key (e.g., a private key) 1106 for calculating the manufacturing digital signature. In this example, instruction data 1100 contains data blocks 11100 to 11107. In this example, instruction data 1100 contains eight data blocks 11100 to 11107, but in other examples, instruction data 1100 may contain fewer than eight data blocks, and again in other examples, more than eight data blocks may be used.

[0073] In some cases, the length and / or address of at least one instruction data 1100 to be written during a subsequent manufacturing process step is known in advance. For example, the addresses and lengths of each data block 11100-11107 of the instruction data may be predefined. However, not all actual instruction data values ​​to be written are known in advance. During provisioning or personalization of the logic circuit package before calculating the manufacturing digital signature, the certificate 1102, manufacturing attribute data 1104 (excluding the manufacturing signature), and signing key 1106 can be written to memory placement 406d. The manufacturing attribute data 1104 can be configured as described below with reference to Figures 12A and 12B.

[0074] Figure 12A shows an example of attribute data 1200a for a manufacturing digital signature. In this example, the attribute data 1200a provides the manufacturing attribute data 1104 for Figures 11A and 11B. The attribute data 1200a includes an instruction field 1202 that stores at least one instruction for the instruction data 1100 in Figure 11A or Figure 11B, which contains at least one data block 1110, and a manufacturing digital signature field 1204 that stores the manufacturing digital signature. In this example, the manufacturing digital signature field 1204 has a length of 64 bytes. The manufacturing digital signature field 1204 may remain empty until the manufacturing digital signature is calculated by the logic circuit 1006 and stored in the field 1204.

[0075] Figure 12B shows a further example of attribute data 1200b for a manufacturing digital signature. In one example, attribute data 1200b provides manufacturing attribute data 1104 in Figures 11A and 11B. Attribute data 1200b includes, as described and illustrated above, an instruction field 1202 that stores at least one instruction for the data on which the manufacturing digital signature is to be calculated, and a manufacturing digital signature field 1204 that stores the manufacturing digital signature. Attribute data 1200b also includes a signature key identifier field 1206 that stores a signature key identifier. The signature key identifier identifies (e.g., 1106 in Figure 11B) the signing key used to calculate the manufacturing digital signature, which is stored, for example, in key storage memory 1024 (e.g., 1106 in Figure 11B). The signature key identifier also corresponds to a certificate (e.g., 1102 in Figure 11B) for a controller (e.g., a host) to verify the manufacturing digital signature. In particular, the signature key identifier corresponds to the public key in the certificate. The certificate may also include a signing key identifier so that the controller can verify that it is using the correct certificate to validate the manufacturing digital signature. In one example, the signing key identifier field 1206 has a length of 2 bytes.

[0076] An instruction field 1202 that stores at least one instruction for data for which a manufacturing digital signature is calculated includes data block address fields 12120 to 12127 and corresponding data block length fields 12140 to 12147. Each of the data block address fields 12120 to 12127 stores the start address of each data block 11100 to 11107 (FIG. 11B). Each of the data block length fields 12140 to 12147 stores the length of each data block 11100 to 11107 (FIG. 11B). Accordingly, the data block address fields 12120 to 12127 and the corresponding data block length fields 12140 to 12147 identify each data block 11100 to 11107. In one example, each of the data block address fields 12120 to 12127 has a length of 2 bytes, and each of the data block length fields 12140 to 12147 has a length of 2 bytes.

[0077] In one example, the manufacturing attribute data 1200b is configured by sending a put attribute manufacturing signature command to a logic circuit. The command can specify 1 to 8 data blocks. If fewer than 8 data blocks are specified, address and length values of 0 are stored for the unspecified blocks. The command can include command parameters of attr_tag||rk_id||dblk0||...||dblk N-1 , where 1 ≦ N ≦ 8. attr_tag is a manufacturing signature attribute tag and can have a length of 1 byte. The manufacturing signature attribute tag indicates that the command constitutes manufacturing signature attribute data 1200b. rk_id is a key identifier that identifies a signature key for calculating a manufacturing signature and can have a length of 2 bytes. The key identifier is stored in the signature key identifier field 1206. dblk nIt identifies data block n and may have a length of 4 bytes, including a 2-byte address for the data block and a 2-byte length for the data block. The address and length of each data block n are stored in the corresponding data block address fields 12120-12127 and data block length fields 12140-12147, respectively.

[0078] The writing of manufacturing data and the generation of manufacturing signatures may occur during the post-personalization manufacturing or configuration process, which may occur in environments where the permissions of the original data are not fully controlled, such as manufacturing locations not operated by the OEM. During the manufacturing process, manufacturing data may be written to the general-purpose memory portion of the memory placement as part of the instruction data 1100 (for example, data is written to data blocks 11100-11107 in Figure 11B). Using the manufacturing data written to the memory placement, a manufacturing signature can be calculated and stored in the manufacturing digital signature field 1204. In one example, the manufacturing signature may be calculated in response to a logic circuit receiving a manufacturing signature generation command.

[0079] The manufacturing signature generation command can be used to generate (e.g., compute) a manufacturing signature across one or more data blocks in a memory arrangement. The signing key and the data blocks on which the manufacturing signature is computed are specified in the manufacturing signature attribute data 1200b. Once generated, the manufacturing signature can be queried via the manufacturing signature attribute. In some examples, generating a manufacturing signature may transition the consumable to an operational lifecycle state (i.e., from the manufacturing state to the state where it is ready for use by the host). In one example, the signing key may be used only once so that the manufacturing signature is not computed again after it has been computed. In some examples, the signing key can be deleted once the manufacturing signature has been computed.

[0080] The manufacturing signature can be calculated as follows: signature = ED25519 - Sign((signing key), const||SHA-512(mfg_data)). The signing key corresponds to the key identifier specified in the manufacturing signature attribute data. ·mfg_data=dblk0||data0||...||dblk N-1 ||data N-1 , · dblk n Note that n is the data block specified in the manufacturing signature attribute data, and does not include unused data blocks (i.e., those with a length of 0). ·data n This is general-purpose memory data corresponding to data block n. The manufacturing signature is at least one instruction in the instruction data (e.g., dblk). n ) and instruction data (for example, data n Note that this can be calculated over the hash (e.g., SHA-512) of the instructions.

[0081] Figure 13 shows an example of instruction data 1300 for a manufacturing digital signature. In this example, the instruction data 1300 includes a (partially unique) digital signature 502, also called a persono digital signature 502, a part number digital signature 1304, and partially unique manufacturing data 1306. As previously mentioned, the (partially unique) digital signature 502 is signed for data that includes at least one of the following: a device type identifier corresponding to a logic circuit package, a logic circuit identifier for the host to distinguish the logic circuit package from other logic circuit packages (e.g., 506 in Figure 5B), a partition map for defining the partitions of the general-purpose memory portion of the memory arrangement (e.g., 504 in Figure 5B), and designation data stored in the general-purpose memory portion of the memory arrangement (e.g., 508 in Figure 5B).

[0082] The part number digital signature 1304 is signed across common manufacturing data (e.g., 922 in Figure 9) which includes at least one of the following: color, fill level, and area. The common manufacturing data may be common to multiple logic circuit packages and may not be partial-specific. The partial-specific manufacturing data 1306 includes at least one of the following: manufacturing date, manufacturing time, and manufacturing line identifier (e.g., as shown in 930 in Figure 9). The (partially specific) digital signature 502, the part number digital signature 1304, and the partial-specific manufacturing data 1306 may be stored in data blocks 11100-11107 of the instruction data 1100 in Figure 11B.

[0083] Figure 14 is a flowchart showing another exemplary method 1400 that may be performed by a logic circuit, such as the logic circuit 404 in Figure 4. The logic circuit may be part of a logic circuit package (e.g., 402 in Figure 4) for interchangeable printer components (e.g., 400 in Figure 4) that includes an interface (e.g., 408 in Figure 4) for communicating with a controller (e.g., printer logic circuit 304 in Figure 3), as previously mentioned. In this example, the memory arrangement stores instruction data (e.g., 1100 in Figure 11A), certificates (e.g., 1102 in Figure 11A), and manufacturing attribute data (e.g., 1104 in Figure 11A).

[0084] In step 1402, the logic circuit is configured to send manufacturing attribute data to the controller in response to at least one first request from the controller. The manufacturing attribute data includes a key identifier (e.g., 1206 in Figure 12B), at least one instruction for data on which a manufacturing digital signature is calculated (e.g., 1202 in Figure 12B), and a manufacturing digital signature (e.g., 1204 in Figure 12B). In step 1404, the logic circuit is configured to send certificate and instruction data to the controller in response to at least one second request from the controller. In one example, at least one first request and at least one second request have differently encoded command type fields and / or include different opcodes indicating different command types. For example, at least one first request may be configured to query attribute memory (e.g., 1014 in Figure 10), and at least one second request may be configured to read general-purpose memory (e.g., 1030 in Figure 10). For example, due to certain technical limitations or other reasons, multiple transmissions may be required to send requested data to the controller, and accordingly, multiple requests may also be sent from the controller to the logic circuit. At least one first request may contain multiple first requests, and / or at least one second request may contain multiple second requests. Accordingly, for example, multiple responses of 32 bytes each may be sent to send a complete dataset of, for example, 64 bytes.

[0085] Figure 15 is a flowchart showing another exemplary method 1500 that may be performed by a logic circuit, such as the logic circuit 404 in Figure 4. The logic circuit may be part of a logic circuit package (e.g., 402 in Figure 4) for interchangeable printer components (e.g., 400 in Figure 4) that includes an interface (e.g., 408 in Figure 4) for communicating with a host (e.g., printer logic circuit 304 in Figure 3) as described above. In this example, the memory arrangement stores a signing key (e.g., 1106 in Figure 11B) and a key identifier (e.g., 1206 in Figure 12B).

[0086] In step 1502, the logic circuit is configured to calculate the manufacturing digital signature. The manufacturing digital signature is calculated based on attribute data (e.g., 1200b in Figure 12B). The manufacturing digital signature is calculated on the data stored in data blocks 11100-11107 in Figure 11B using the signing key 1106 in Figure 11B, which is identified by the signing key identifier 1206 in Figure 12B. In step 1504, the logic circuit is configured to store the manufacturing digital signature in a memory location. The manufacturing digital signature is stored in the manufacturing digital signature field 1204 of the attribute data 1200a in Figure 12A or the attribute data 1200b in Figure 12B, for example, in the attribute storage memory 1014 in Figure 10.

[0087] Figure 16 is a flowchart illustrating an example of a method 1600 for provisioning a logic circuit package (e.g., 402 in Figure 4) having a memory arrangement (e.g., 406 in Figure 4). In step 1602, method 1600 includes receiving a command by the logic circuit (e.g., 404) of the logic circuit package for generating a manufacturing digital signature. In step 1604, method 1600 includes reading by the logic circuit in response to the command at least one instruction (e.g., 1202 in Figure 12B) of a signing key identifier (e.g., 1206 in Figure 12B) and instruction data (e.g., 1100 in Figure 11A or Figure 11B). In step 1606, method 1600 includes reading by the logic circuit a signing key (e.g., 1106 in Figure 11B) corresponding to the signing key identifier.

[0088] In step 1608, method 1600 includes reading instruction data by a logic circuit based on at least one instruction. In one example, the instruction data is stored in the general-purpose memory portion of a memory arrangement configured for general-purpose read / write access (e.g., 1030 in Figure 10). The instruction data may include a partially unique digital signature (e.g., 502 in Figure 5B) signed on the data, which includes at least one of the following: a device type identifier corresponding to a logic circuit package, a logic circuit identifier for distinguishing the logic circuit package from other logic circuit packages (e.g., 506 in Figure 5B), a partition map for defining partitions in the general-purpose memory portion of the memory arrangement (e.g., 504 in Figure 5B), and instruction data stored in the general-purpose memory portion of the memory arrangement (e.g., 508 in Figure 5B).

[0089] In some examples, the logic circuit package may be mounted on a replaceable print cartridge (e.g., 400 in Figure 4). In this example, the instruction data may include a part number digital signature (e.g., 1304 in Figure 13) signed with common manufacturing data (e.g., 922 in Figure 9) which includes at least one of the following: color, fill level, and area. In this example, the instruction data may also include partial-specific manufacturing data (e.g., 1306 in Figure 13) which includes at least one of the following: the manufacturing date of the replaceable print cartridge, the manufacturing time of the replaceable print cartridge, and a line identifier (e.g., as shown in 930 in Figure 9) which identifies the manufacturing line of the replaceable print cartridge.

[0090] In step 1610, method 1600 includes a logic circuit calculating a manufacturing digital signature based on instruction data using a signing key. In step 1612, method 1600 includes a logic circuit writing the manufacturing digital signature to a memory location (e.g., field 1204 in Figure 12A or Figure 12B). For example, writing the manufacturing digital signature may include writing the manufacturing digital signature to an attribute memory portion of the memory location (e.g., 1014 in Figure 10). The logic circuit may be configured to provide the host with read-only access to several attributes stored in the attribute memory portion (e.g., the manufacturing signature attribute).

[0091] The above manufacturing digital signature architecture and the process for generating the manufacturing digital signature architecture can enable the authentication of common and / or partially unique manufacturing data written to consumables in a partially trusted or at least not fully controlled environment. The process and architecture can support the ability to generate digital signatures without the need to build complex infrastructure to create / support on-site or off-site signing services. This process allows for a flexible method of specifying the data to be included in the manufacturing digital signature and enables the combination of manufacturing data with other data previously written to memory placement, such as during the provisioning or personalization of logic circuit packages before computing the manufacturing digital signature. Furthermore, this process compels aftermarket consumables to use a replica of the complete dataset from genuine consumables instead of using non-genuine data, making it easier to identify non-genuine consumables and warn customers of their presence.

[0092] Figure 17A shows an example of memory arrangement 406e. In some examples, memory arrangement 406e may be an example of memory arrangement 406 in Figure 4. Memory arrangement 406e stores part number signature metadata 1700 and part number signature 1304 corresponding to part number signature metadata 1700. As described above with reference to Figure 10, part number signature metadata 1700 and part number signature 1304 can be stored in a general-purpose memory portion 1030 of the memory arrangement, which can be accessed, for example, by a host controller for read and write operations. Part number signature metadata 1700 is used to facilitate verification of part number signature 1304 (e.g., associated signed data) by the host. Part number signature metadata 1700 may vary and is defined in more detail below with reference to Figures 18A and 18B. Part number signature metadata 1700 specifies the data used to compute part number signature 1304. The part number signature 1304 is calculated using the data corresponding to the part number signature metadata 1700 and the private key corresponding to the public key stored by or accessible by the host. The calculation of the part number signature 1304 is described in more detail below with reference to Figures 20A and 20B. To verify that the logic circuit is authentic, the host can read the part number signature metadata 1700 and the part number signature 1304. The host can then use the data specified by the part number signature metadata 1700 to verify the part number signature 1304.

[0093] Figure 17B shows another example of memory arrangement 406f. In some examples, memory arrangement 406f may be another example of memory arrangement 406 in Figure 4. Memory arrangement 406f stores part number signature metadata 1700 and part number signature 1304 corresponding to part number signature metadata 1700, as previously described and illustrated with reference to Figure 17A. Furthermore, memory arrangement 406f also stores part number signature specification data 1702. As described above with reference to Figure 10, part number signature specification data 1702 can be stored in a general-purpose memory portion 1030 of the memory arrangement that can be accessed by the host for read and write operations.

[0094] The part number signature data 1702 includes data stored in multiple data blocks of the general-purpose memory portion of the memory arrangement specified by the part number signature metadata 1700. The part number signature data 1702 includes signed data. The part number signature 1304 is at least partially based on the part number signature data 1702. In some examples, the part number signature data may be static over the lifetime of the logic circuit package and / or the component to which the logic circuit package is mounted (e.g., read-only data). The part number signature data 1702 may include the aforementioned common manufacturing data (e.g., 922 in Figure 9) common to multiple interchangeable print cartridges (e.g., print cartridges having the same SKU). The part number signature data 1702 may have a length that can vary between different logic circuit memory arrangements. In some examples, the part number signature data 1702 may include the part number signature metadata 1700, i.e., one of the data blocks that is part of the part number signature data 1702 may include the part number signature metadata 1700.

[0095] In some examples, the part number signature 1304 is signed on data that includes at least one of the device type identifier and the part number signature designation data 1702. The device type identifier, which is not stored in memory placement 406f, can correspond to the logic circuit package 402 (Figure 4) and identify whether the logic circuit package is intended to be attached to or is attached to an interchangeable printer component. In some examples, the value of the device type identifier is the same for all logic circuit packages intended to be attached to or attached to an interchangeable printer component. The device type identifier signed when calculating the part number signature may be the same as or different from the device type identifier signed when calculating the persona signature.

[0096] As will be described in more detail below, to verify that the logic circuit is authentic, the host can read the part number signature metadata 1700 and the part number signature 1304. The host can then read the part number signature designation data 1702 using the part number signature metadata 1700. The host can then verify the part number signature 1304 using the part number signature designation data 1702. In some examples, the part number signature 1304 and the part number signature metadata 1700 can be configured according to a schema similar to the schema used for digital signatures (e.g., persona signatures) and digital signature metadata (e.g., persona signature metadata), as described and illustrated with reference to Figures 5A-5B and 6A-6B.

[0097] Figure 18A shows an example of part number signature metadata 1800a. In one example, part number signature metadata 1800a is part number signature metadata 1700 in Figure 17A or Figure 17B. Part number signature metadata 1800a includes a schema identifier field 1802, a key identifier field 1804, a data block address field 1806, and a data block length field 1808. The schema identifier field 1802 stores the schema version for determining which schema the host uses. The schema identifier field 1802 may have a length of 1 byte. The key identifier field 1804 stores the identifier of the signing key for the host to use the correct key for verification. The key identifier field 1804 may have a length of 2 bytes. The original part number signature 1304 (Figures 17A and 17B) may be calculated using the key corresponding to the key identifier.

[0098] The data block address field(s) 1806 may contain one or more data block address fields. Each data block address field stores the starting address corresponding to the data block for which the part number signature is first calculated. Each data block address field may have a length of 2 bytes. The data block length field(s) 1808 may contain one or more data block length fields. Each data block length field corresponds to the data block addressed by the corresponding data block address field(s) 1806. Each data block length field stores data indicating the length of the corresponding data block. Each data block length field may have a length of 2 bytes. Each data block address field and the corresponding data block length field are used in the part number signature metadata(s) 1800a to store the data block address(s) from the first data block address(addr1) and the data block length(len1) to the last data block address(addr1). N ) and data block length (len N) up to addr1||len1||addr2||len2||...||addr N ||len N They may be concatenated as shown. For example, one of the specified data blocks may store part number signature metadata.

[0099] Figure 18B shows another example of part number signature metadata 1800b. In one example, part number signature metadata 1800b is part number signature metadata 1700 in Figure 17A or Figure 17B. Part number signature metadata 1800b includes a schema identifier field 1802, a key identifier field 1804, a data block address field 1806, and a data block length field 1808, as previously described and illustrated with reference to Figure 18A. In addition, part number signature metadata 1800b also includes a length field 1810 and a data block count field 1812. The data block count field 1812 stores data indicating the total number of data blocks addressed by the data block address field 1806. The data block count field 1812 may have a length of 1 byte. The length field 1810 stores data indicating the total cumulative length of the key identifier field 1804, the data block count field 1812, the data block address field(s) 1806, and the data block length field(s) 1808. The length field 1810 may have a length of 2 bytes. The host can use the data stored in the length field 1810 to parse the part number signature metadata 1800b. In some examples, the host can use the data stored in the data block count field 1812 instead of, or in addition to, the length field 1810 to parse the part number signature metadata 1800b. The part number signature metadata 1800b is structured as follows: schema identifier||length||key identifier||data block count||addr1||len1||addr2||len2||...||addr N ||len NAs shown above, it can be linked to and written to memory allocation 406 (see Figure 4).

[0100] Figures 19A–19C are flowcharts illustrating exemplary methods 1900, 1910, and 1920 that can be performed by a logic circuit, such as logic circuit 404 in Figure 4. The logic circuit may be part of a logic circuit package (e.g., 402 in Figure 4) for interchangeable printer components (e.g., 400 in Figure 4) that includes an interface (e.g., 408 in Figure 4) for communicating with a printer logic circuit (e.g., 304 in Figure 3), as previously described. In this example, the memory arrangement stores part number signature metadata (e.g., 1800a in Figure 18A or 1800b in Figure 18B) to facilitate verification of associated signed data. As shown in step 1902 by method 1900 in Figure 19A, the logic circuit is configured to receive a read request from a host. In step 1904, the logic circuit is configured to send the part number signature metadata to the host in response to the read request.

[0101] In one example, the memory arrangement stores a part number signature (e.g., 1304 in Figure 17A or Figure 17B) corresponding to part number signature metadata, signed with a key corresponding to a key identifier (e.g., 1804 in Figure 18A or Figure 18B). In this example, the logic circuit is configured to receive read requests (or multiple read requests) from the host, as shown in step 1912 by method 1910 in Figure 19B. In step 1914, the logic circuit is configured to send the part number signature and part number signature metadata (in any order) to the host in response to at least one read request.

[0102] In one example, the memory arrangement stores part number signature metadata (e.g., 1700 in Figure 17B), part number signature specification data (e.g., 1702 in Figure 17B), and a signed part number signature (e.g., 1304 in Figure 17B) that includes a device type identifier and part number signature specification data corresponding to the logic circuit package. In this example, the logic circuit is configured to receive requests from the host (e.g., general-purpose memory read requests) as shown in step 1922 by method 1920 in Figure 19C. In step 1924, the logic circuit is configured to send to the host, in response to at least one request, the part number signature, part number signature metadata, and / or other data, as well as the part number signature specification data corresponding to the part number signature metadata.

[0103] Figures 20A and 20B are block diagrams showing another example of a processing system 2000 for provisioning a logic circuit package (e.g., 402 in Figure 4). In some examples, the processing system 2000 may be distributed across at least two locations. For example, a first-site processing system 2000 may pre-calculate sets of part number signatures corresponding to data for several predetermined part numbers. These datasets (i.e., part number signature data and part number signatures) may then be sent to a second (e.g., manufacturing) location where manufacturing data is written to the logic circuit package on the manufacturing line. If the manufacturing line is configured to execute a particular part number, an appropriate dataset may be selected and written by the processing system 2000 to the memory placement of the logic circuit package, as will be further described below. In one example, the processing system 2000 may differ from the processing system 800 described and illustrated with reference to Figures 8A and 8B. The processing system 2000 includes a processor 2002 and a machine-readable storage medium 2006. Processor 2002 is communicatively coupled to machine-readable storage medium 2006 via a communication path 2004. While the following description refers to a single processor and a single machine-readable storage medium, the description can also be applied to systems having multiple processors and multiple machine-readable storage mediums. In such examples, instructions may be distributed (e.g., stored) across multiple machine-readable storage mediums, and instructions may be distributed (e.g., executed) across multiple processors.

[0104] The processor 2002 includes one (i.e., a single) central processing unit (CPU) or microprocessor, or two or more (i.e., multiple) CPUs or microprocessors and / or other suitable hardware devices for retrieving and executing instructions stored in the machine-readable storage medium 2006. The processor 2002 can fetch, decode, and execute instructions 2008-2014 to supply logic circuit packages.

[0105] The processor 2002 can fetch, decrypt, and execute instructions 2008 (for example, at a first location) to obtain a signing key identifier and signature data. In one example, the signature data includes a device type identifier corresponding to a logic circuit package and data stored in multiple data blocks of the general-purpose memory portion of the memory arrangement of the logic circuit package specified by part number signing metadata. The signing key identifier and signature data may be stored in machine-readable storage medium 2006 and / or another machine-readable storage medium accessible by the processing system 2000.

[0106] Part number signature metadata facilitates the verification of associated signed data. Part number signature metadata may include a schema identifier field (e.g., 1802 in Figure 18A or Figure 18B) that stores a schema version number to determine which schema the host uses; a key identifier field (e.g., 1804 in Figure 18A or Figure 18B) that stores an identifier for the signing key so that the host can use the correct key for verification; multiple data block address fields (e.g., 1806 in Figure 18A or Figure 18B) that each store the address corresponding to each of the multiple data blocks in which the part number signature was first calculated; and multiple data block length fields corresponding to multiple data blocks (e.g., 1808 in Figure 18A or Figure 18B) where each of the multiple data block length fields stores data indicating the length of the corresponding data block.

[0107] Processor 2002 can fetch, decrypt, and execute instruction 2010 (e.g., in a first location) for concatenating signature data. The signature data may be concatenated in the format: device type identifier || data of data block 1 || data of data block 2 || ... || data of data block N, where "N" is the number of data blocks. Processor 2002 can fetch, decrypt, and execute instruction 2012 (e.g., in a first location) for computing a part number signature over the concatenated signature data using the signature secret key corresponding to the signature key identifier. In one example, computing a part number signature involves computing a part number signature over a hash of data stored in multiple data blocks. Processor 2002 can fetch, decrypt, and execute instruction 2014 (e.g., in a second location) for writing the part number signature (e.g., 1304 in Figure 17A or Figure 17B) to the general-purpose memory portion of the memory arrangement of the logic circuit package.

[0108] As shown in Figure 20B, processor 2002 can fetch, decrypt, and execute a further instruction 2016 (e.g., at a second location) to write part number signature metadata (e.g., 1700 in Figure 17A or Figure 17B) to the general-purpose memory portion of the memory arrangement of the logic circuit package. Processor 2002 can fetch, decrypt, and execute a further instruction 2018 (e.g., at a second location) to write data (e.g., 1702 in Figure 17B) stored in multiple data blocks specified by the part number signature metadata to the general-purpose memory portion of the memory arrangement of the logic circuit package.

[0109] Instead of, or in addition to, acquiring and executing instructions, the processor 2002 may include, within the machine-readable storage medium 2006, one (i.e., single) electronic circuit or two or more (i.e., multiple) electronic circuits having multiple electronic components to perform the functions of one or more of the instructions. With respect to executable instruction representations (e.g., boxes) described and illustrated herein, it should be understood that some or all of the executable instructions and / or electronic circuits contained within one box may, in alternative examples, be contained within different boxes shown in the figures or different boxes not shown.

[0110] The machine-readable storage medium 2006 is a non-temporary storage medium and may be any suitable electronic, magnetic, optical, or other physical storage device for storing executable instructions. Therefore, the machine-readable storage medium 2006 may be, for example, RAM, EEPROM, a storage drive, or an optical disk. The machine-readable storage medium 2006 can be located within the system 2000, as shown in Figures 20A and 20B. In this case, the executable instructions can be installed in the system 2000. Alternatively, the machine-readable storage medium 2006 may be a portable, external, or remote storage medium that allows the system 2000 to download instructions from a portable / external / remote storage medium. In this case, the executable instructions may be part of an installation package.

[0111] Figure 21A shows another example of memory arrangement 406g. In some examples, memory arrangement 406g may be an example of memory arrangement 406 in Figure 4. Memory arrangement 406g includes a first digital signature 2100, a second digital signature 2102, and a third digital signature 2104. In one example, the third digital signature 2104 is signed across the first digital signature 2100 and the second digital signature 2102. In one example, the first digital signature is a persono signature (e.g., 502 in Figures 5A, 5B, or 10), the second digital signature is a part number signature (e.g., 1304 in Figures 10, 17A, or 17B), and the third digital signature is a manufacturing signature (e.g., 1204 in Figures 12A or 12B). In one example, the first digital signature 2100 and the second digital signature 2102 are stored in the general-purpose memory portion of a memory arrangement configured for general-purpose read / write access (e.g., 1030 in Figure 10), while the third digital signature 2104 is stored in the attribute memory portion of a memory arrangement not configured for general-purpose read / write access (e.g., 1014 in Figure 10).

[0112] The memory placement 406g example may provide a multiple digital signature architecture that may be suitable for improving data integrity in which multiple stages and / or parties are involved in writing data to the memory placement. Similar to Figure 10, the examples in Figures 21A and 21B may simultaneously encompass different embodiments of the digital signatures disclosed herein, such as persona digital signatures, manufacturing digital signatures and part number digital signatures, and their respective metadata. However, other examples of memory placement 406g may provide a multiple digital signature architecture that can be used for other technical functions not described herein, other than specific manufacturing-related stages between different suppliers as described herein. The memory placement 406g example may be suitable for connecting to host devices that require the presence of digital signatures in order to pass the integrity check of the same host device.

[0113] In some examples, the first digital signature is signed over data (e.g., 912 in Figure 9) that includes at least one of the following: a device type identifier corresponding to a logic circuit package, a controller logic circuit identifier to distinguish the logic circuit package from other logic circuit packages, a partition map to define partitions in the general-purpose memory portion of the memory arrangement, and the first digital signature designation data stored in the general-purpose memory portion of the memory arrangement. In some examples, the second digital signature is signed over common manufacturing data (e.g., 922 in Figure 9) that includes at least one of the following: color, fill level, and area. In some examples, the third digital signature is signed over the first digital signature, the second digital signature, and partially unique manufacturing data (e.g., 930 in Figure 9) that includes at least one of the following: manufacturing date, manufacturing time, and manufacturing line identifier. At least one of the first, second, and third digital signatures may each be signed over a hash of at least a portion of the identified data described above.

[0114] Figure 21B shows another example of memory arrangement 406h. In some examples, memory arrangement 406h may be another example of memory arrangement 406 in Figure 4. Memory arrangement 406h stores the first digital signature 2100, the second digital signature 2102, and the third digital signature 2104, as previously described and illustrated with reference to Figure 21A. Memory arrangement 406h also stores the first digital signature metadata 2106 and the second digital signature metadata 2108. The first digital signature metadata 2106 facilitates the verification of the first digital signature 2100, and the second digital signature metadata 2108 facilitates the verification of the second digital signature 2102. In some examples, the first digital signature metadata 2106 is the persono signature metadata 600a or 600b described and illustrated with reference to Figures 6A and 6B, and the second digital signature metadata 2108 is the part number signature metadata 1800a or 1800b described and illustrated with reference to Figures 18A and 18B. In some examples, the first digital signature metadata 2106 and the second digital signature metadata 2108 are constructed based on the same schema.

[0115] Figure 22 is a flowchart showing another exemplary method 2200 that may be performed by a logic circuit. The logic circuit may be part of a logic circuit package (e.g., Figure 402) for interchangeable printer device components (e.g., Figure 400) that include an interface (e.g., Figure 408) for communicating with a controller (e.g., Figure 304) as described above. In this example, the memory arrangement stores a first digital signature (e.g., Figure 2100 in Figure 21A or Figure 21B), a second digital signature (e.g., Figure 2102 in Figure 21A or Figure 21B), and a third digital signature (e.g., Figure 2104 in Figure 21A or Figure 21B) signed over the first and second digital signatures. As shown in step 2202 by method 2200 in Figure 22, the logic circuit is configured to receive at least one request from the controller. In step 2204, the logic circuit is configured to send a first digital signature, a second digital signature, and a third digital signature (in any order) to the controller in response to at least one request.

[0116] Examples of the present disclosure can be provided as methods, systems, or machine-readable instructions, such as any combination of software, hardware, firmware, etc. Such machine-readable instructions may be contained within or on a machine-readable storage medium (including, but not limited to, EEPROM, PROM, flash memory, disk storage, CD-ROM, optical storage, etc.) having machine-readable program code therein or on.

[0117] This disclosure is described with reference to flowcharts and block diagrams illustrating the methods, devices, and systems described herein. While the flowcharts described above illustrate a specific execution order, the execution order may differ from that shown. Blocks described in one flowchart can be combined with blocks in another flowchart. It should be understood that at least some blocks in the flowcharts and block diagrams, as well as combinations thereof, can be implemented by machine-readable instructions.

[0118] Machine-readable instructions may be executed, for example, by a processor in a general-purpose computer, a dedicated computer, an embedded processor, or other programmable data processing device to implement the functions described in the description and diagrams. In particular, a processor or processing circuit can execute machine-readable instructions. Thus, the functional modules of devices and apparatus (e.g., logic circuits and / or controllers) may be implemented by a processor that executes machine-readable instructions stored in memory, or by a processor that operates according to instructions incorporated into the logic circuits. The term “processor” should be interpreted broadly to include CPUs, processing units, ASICs, logic units, or programmable gate arrays, etc. All methods and functional modules may be executed by a single processor or divided among several processors.

[0119] Such machine-readable instructions may also be stored in a machine-readable storage device (e.g., a tangible machine-readable medium) that can guide a computer or other programmable data processing device to operate in a particular mode.

[0120] Such machine-readable instructions may also be loaded into a computer or other programmable data processing device, which then performs a series of operations to generate computer implementation processing, and thus the instructions executed on the computer or other programmable device realize the functions specified by the blocks(s) of the flowchart and / or block diagram.

[0121] Furthermore, the teachings herein can be implemented in the form of a computer software product, which is stored on a storage medium and includes a number of instructions for causing a computer device to implement the methods described in the examples of this disclosure.

[0122] The word "comprising" does not exclude the existence of elements other than those enumerated in the claims, and "a" or "an" does not exclude multiple elements.

[0123] While specific examples have been illustrated and described herein, various alternative and / or equivalent embodiments may be substituted for the specific examples illustrated and described without departing from the scope of this disclosure. This application is intended to cover any adaptations or variations of the specific examples discussed herein. Accordingly, this disclosure is intended to be limited only by the claims and their equivalents.

[0124] This disclosure addresses a logic circuit having an interface for communicating with a host logic circuit. The logic circuit may be part of a package. The logic circuit may be a dedicated circuit, such as a microcontroller, for example a secure microcontroller. The logic circuit may be configured to communicate with a printer controller. The logic circuit (ry package) may be mounted on, embedded in, or mountable to a replaceable print cartridge or component. The host logic circuit may include, or be part of, a printer controller or other printer logic circuit. The logic circuit and its features may be used in other applications, such as secure applications.

[0125] The logic circuit has a memory layout that includes any executable selection, any combination, or all combination of the following features: The memory layout may store digital signature metadata to facilitate the verification of associated signed data. The digital signature metadata may include a schema identifier field that stores a schema version number to determine which schema the host uses. The digital signature metadata may include a key identifier field that stores an identifier for the signing key so that the host uses the correct key for verification. The digital signature metadata may include multiple data block address fields, each of which stores the address corresponding to each of the multiple data blocks for which the digital signature is first calculated. The digital signature metadata may include multiple data block length fields corresponding to multiple data blocks, each of which stores data indicating the length of the corresponding data block. The memory layout may store a logic circuit identifier for the controller to distinguish the logic circuit package from other logic circuit packages. The memory layout may store a partition map to define the partitions of the general-purpose memory portion of the memory layout. The memory layout may store digital signature metadata to facilitate the verification of the associated signed data and the specified data corresponding to the digital signature metadata. The memory location can store a digital signature signed for data containing a device type identifier, logic circuit identifier, partition map, and specification data corresponding to a logic circuit package. The memory location can store instruction data for which a manufacturing digital signature is calculated. The memory location can store a certificate for the controller to verify the manufacturing digital signature. The memory location can store manufacturing attribute data. The manufacturing attribute data may include at least one instruction that points to instruction data. The manufacturing attribute data may include a manufacturing digital signature. The memory location can store a signing key for calculating the manufacturing digital signature.The memory layout can identify the signing key for computing the manufacturing digital signature and store a key identifier for the host to use the correct key to verify the associated signed data. The logic circuit may be configured to send the key identifier to the host in response to a request from the host. The memory layout can store the first digital signature, the second digital signature, and the third digital signature signed over the first and second digital signatures. The memory layout can store part number signature metadata to facilitate verification of the associated signed data. The part number signature metadata may include a schema identifier field that stores a schema version number to determine which schema the host uses. The part number signature metadata may include a key identifier field that stores the identifier of the signing key for the host to use the correct key for verification. The part number signature metadata may include a plurality of data block address fields that store the address of each data block corresponding to a plurality of data blocks in which the part number signature is first computed. The part number signature metadata may include a plurality of data block length fields corresponding to a plurality of data blocks, each of which stores data indicating the length of the corresponding data block. The memory arrangement can store a signed part number signature for data including a device type identifier corresponding to the logic circuit package and / or part number signature designation data. A logic circuit having a memory arrangement including any of the above features, any combination of any feasible selections, or all of them can be configured according to any of the following features, any combination of any feasible selections, or all of them: The logic circuit may be configured to send digital signature metadata to the host in response to a read request. The logic circuit may be configured to send a logic circuit identifier, partition map, digital signature, digital signature metadata, and / or other data, as well as designation data corresponding to the digital signature metadata, to the host in response to a request from at least one controller.The logic circuit may be configured to send manufacturing attribute data to the controller in response to at least one first request from the controller. The logic circuit may be configured to send certificate and instruction data to the controller in response to at least one second request from the controller. The logic circuit may be configured to send a first digital signature, a second digital signature, and a third digital signature to the controller in response to at least one request. The logic circuit may be configured to send part number signature metadata to the host in response to a read request. The memory arrangement may store part number signature designation data corresponding to the part number signature metadata. The logic circuit may be configured to send part number signature, part number signature metadata, and / or other data, and / or part number signature designation data corresponding to the part number signature metadata, to the controller. Any of the above derivable exemplary logic circuits and / or exemplary memory arrangements may be combined with any, any feasible selection, or all of the following exemplary features. The digital signature metadata may include a data block count field that stores data indicating the total number of data blocks. The digital signature metadata may include a key identifier field, a data block count field, multiple data block address fields, and a length field that stores data indicating the total cumulative length of multiple data block length fields, for the host to parse the digital signature metadata. The memory arrangement may store the digital signature corresponding to the digital signature metadata, and the digital signature is signed with the key corresponding to the key identifier. The logic circuit may be configured to send the digital signature and digital signature metadata to the host in response to at least one read request. The digital signature metadata and digital signature may be stored in the general-purpose memory portion of the memory arrangement configured for general-purpose read / write access. The memory arrangement may have at least one different memory portion not intended for general-purpose read / write access that stores at least one cryptographic key and / or multiple attributes.The logic circuit may be configured to perform cryptographic operations using at least one cryptographic key. The logic circuit may be configured to (i) return one of several attributes in response to an attribute request that includes an associated attribute tag, and (ii) associate the attribute with the attribute tag. The memory placement may be stored in a partition defined by a partition map, digital signature, digital signature metadata, designation data, and other data. The memory placement may store other data unrelated to the digital signature, including print cartridge-related characteristics. Manufacturing attribute data may include a key identifier corresponding to a certificate for the controller to verify the manufacturing digital signature. At least one instruction may include multiple data block length fields indicating multiple data block addresses of instruction data stored in the memory placement, and / or the length of each corresponding data block. At least one first request and at least one second request may have differently encoded command type fields and / or include different opcodes indicating different command types. At least one first request may be configured to query attribute memory. At least one second request may be configured to read general-purpose memory. The instruction data on which the manufacturing digital signature is computed includes at least one other digital signature. The instruction data may include partially unique manufacturing data. Manufacturing attribute data may include a key identifier. The key identifier can identify the private key used to compute the manufacturing digital signature. The certificate may include a public key corresponding to the private key. The certificate may be signed with a Certificate Authority public key and verified by the controller with the Certificate Authority public key. The memory arrangement can store multiple key identifiers and their associated signing keys. The memory arrangement can store the private key used to compute the manufacturing digital signature. The memory arrangement can store the private key, the key identifier can correspond to the public key in the certificate, and the certificate may further include a key identifier for the controller to verify that it is the correct certificate used to verify the manufacturing digital signature using the public key. The logic circuit may be configured to compute the manufacturing digital signature.The logic circuit may be configured to compute a manufacturing digital signature and store the manufacturing digital signature in a memory placement at or after completion. The memory placement may compute the manufacturing digital signature and store attribute data to facilitate verification of the associated signed data. The attribute data may include a key identifier. The attribute data may include at least one instruction. The logic circuit may be configured to send at least one instruction to the host in response to a request from the host. The logic circuit may be configured to compute a manufacturing digital signature based on the attribute data and store the manufacturing digital signature in the attribute data. The instruction data on which the manufacturing digital signature is computed may include a partially unique digital signature signed on data that includes at least one of the following: a device type identifier corresponding to the logic circuit package, a logic circuit identifier for the host to distinguish the logic circuit package from other logic circuit packages, a partition map for defining partitions in the general-purpose memory portion of the memory placement, and / or designation data stored in the general-purpose memory portion of the memory placement. The instruction data on which the manufacturing digital signature is computed may include a part number digital signature signed on common manufacturing data that includes at least one of the following: color, fill level, and / or area. The instruction data on which the manufacturing digital signature is calculated may include partial-specific manufacturing data, which includes at least one of the manufacturing date, manufacturing time, and / or manufacturing line identifier. The first digital signature may be a persono signature. The second digital signature may be a part number signature. The third digital signature may be a manufacturing signature. The first digital signature may be signed on data, which includes at least one of the following: a device type identifier corresponding to a logic circuit package, a logic circuit identifier for the controller to distinguish the logic circuit package from other logic circuit packages, a partition map for defining partitions in the general-purpose memory portion of the memory arrangement, and / or first digital signature designation data stored in the general-purpose memory portion of the memory arrangement. The second digital signature may be signed on common manufacturing data, which includes at least one of the following: color, fill level, and / or area.A third digital signature may be applied to partially unique manufacturing data that includes at least one of the manufacturing date, manufacturing time, and / or manufacturing line identifier. The memory arrangement may store the first digital signature metadata to facilitate the verification of the first digital signature and / or the second digital signature metadata to facilitate the verification of the second digital signature. The first digital signature metadata and the second digital signature metadata are the same. It can be configured based on a schema and / or schema version. The first and second digital signatures can be stored in the general-purpose memory portion of a memory placement configured for general-purpose read / write access. The third digital signature can be stored in the attribute memory portion of the memory placement. The attribute memory portion does not have to be configured for general-purpose read / write access. The part number signature metadata may include a data block count field that stores data indicating the total number of data blocks. The part number signature metadata may include a key identifier field, a data block count field, multiple data block address fields, and a length field that stores data indicating the total cumulative length of multiple data block length fields, so that the host can parse the part number signature metadata. The memory placement can store a part number signature corresponding to the part number signature metadata, signed with the key corresponding to the key identifier. The logic circuit may be configured to send the part number signature and part number signature metadata to the host in response to at least one read request. The part number signature metadata and part number signature can be stored in the general-purpose memory portion of a memory placement configured for general-purpose read / write access. The memory layout can store other data unrelated to the part number signature, including printed cartridges associated with data that can be updated throughout the lifespan of the logic circuit.

Claims

1. A logic circuit package comprising an interface for communicating with a host and a logic circuit, wherein the logic circuit is It has a memory location for storing digital signature metadata to facilitate verification of associated signed data, The aforementioned digital signature metadata A schema identifier field that stores the schema version number in order to determine which schema the host uses, A key identifier field that stores the identifier of the signing key for the host to use the correct key for the verification, A plurality of data block address fields, each of which stores the address corresponding to each data block of a plurality of data blocks in which the digital signature is first calculated, A plurality of data block length fields corresponding to the plurality of data blocks, each of which stores data indicating the length of the corresponding data block, including: The aforementioned logic circuit Upon receiving a read request from the aforementioned host, A logic circuit package configured to transmit the digital signature metadata to the host in response to the read request.

2. The logic circuit package according to claim 1, wherein the digital signature metadata further includes a data block count field that stores data indicating the total number of the plurality of data blocks.

3. The logic circuit package according to claim 2, wherein the digital signature metadata further includes a length field that stores data indicating the total cumulative length of the key identifier field, the data block count field, the plurality of data block address fields, and the plurality of data block length fields, for the host to parse the digital signature metadata.

4. The memory arrangement stores the digital signature corresponding to the digital signature metadata, which is signed with the key corresponding to the key identifier. The logic circuit package according to claim 1, wherein the logic circuit is configured to transmit the digital signature and the digital signature metadata to the host in response to at least one read request.

5. The digital signature metadata and the digital signature are stored in the general-purpose memory portion of the memory arrangement configured for general-purpose read / write access. The memory arrangement comprises at least one distinct memory portion not intended for general-purpose read / write access, which stores at least one cryptographic key and / or multiple attributes, and the logic circuit is The logic circuit package according to claim 4, configured to perform an encryption operation using at least one encryption key and / or to return an attribute from the plurality of attributes in response to an attribute request including an associated attribute tag, wherein the logic circuit is configured to associate the attribute with the attribute tag.

6. The logic circuit package according to claim 4, wherein the memory arrangement stores a partition map defining partitions of the memory arrangement, and stores the digital signature, the digital signature metadata, the specified data, and other data within the partitions.

7. The logic circuit package according to claim 4, wherein the digital signature is used to sign data that includes at least one of a device type identifier, a logic circuit identifier, a partition map, and specified data.

8. The logic circuit package according to claim 1 for a print cartridge, wherein the memory arrangement stores other data unrelated to the digital signature, including print cartridge-related characteristics.

9. A replaceable print cartridge comprising the logic circuit package described in any one of claims 1 to 8.

10. A method for provisioning a logic circuit package with memory arrangement, Depending on the processing system, Signature key identifier and The step of obtaining signature data, The aforementioned signature data A device type identifier corresponding to the aforementioned logic circuit package, A logic circuit identifier for the logic circuit package, which the host uses to distinguish the logic circuit package from other logic circuit packages, A partition map for defining the partition of the general-purpose memory portion of the memory arrangement of the logic circuit package, The step includes: data stored in a plurality of data blocks of the general-purpose memory portion of the memory arrangement of the logic circuit package specified by digital signature metadata; The processing system performs the steps of concatenating the signature data, The processing system performs the steps of: calculating a digital signature over the concatenated signature data using the signature secret key corresponding to the signature key identifier; The processing system includes the step of writing the digital signature to the general-purpose memory portion of the memory arrangement of the logic circuit package, The digital signature metadata facilitates the verification of the associated signed data, and the digital signature metadata is A schema identifier field that stores a schema version number for determining which schema the host uses, A key identifier field that stores the identifier of the signing key for the host to use the correct key for the verification, A plurality of data block address fields, each of which stores the address corresponding to each data block of the plurality of data blocks in which the digital signature is first calculated, A method comprising: a plurality of data block length fields corresponding to the plurality of data blocks, each of which stores data indicating the length of the corresponding data block.

11. The method according to claim 10, wherein the partition map includes a partition length and a partition attribute identifier that define each partition of the general-purpose memory portion of the memory arrangement.

12. The method according to claim 10, further comprising the step of writing the digital signature metadata to the general-purpose memory portion of the memory arrangement of the logic circuit package using the processing system.

13. The method according to claim 10, further comprising the step of writing the logic circuit identifier and the partition map to the attribute memory portion of the memory arrangement of the logic circuit package by the processing system.

14. The method according to claim 10, further comprising the step of writing the data stored in the plurality of data blocks specified by the digital signature metadata to the general-purpose memory portion of the memory arrangement of the logic circuit package, by the processing system.

15. A logic circuit package comprising an interface for communicating with a controller and a logic circuit, wherein the logic circuit includes a memory arrangement. The aforementioned memory arrangement is The controller includes a logic circuit identifier for distinguishing the logic circuit package from other logic circuit packages, A partition map for defining the partitions of the general-purpose memory portion of the aforementioned memory arrangement, Digital signature metadata to facilitate verification of associated signed data, The specified data corresponding to the aforementioned digital signature metadata, The system stores the logic circuit package, the logic circuit identifier, the partition map, and a digital signature signed for the data including the device type identifier corresponding to the specified data. The aforementioned digital signature metadata A schema identifier field that stores a schema version number for determining which schema the controller uses, A key identifier field that stores the identifier of the signing key for the controller to use the correct key for the verification, A plurality of data block address fields, each of which stores the address corresponding to each data block of the plurality of data blocks in which the digital signature is first calculated, A plurality of data block length fields corresponding to the plurality of data blocks, each of which stores data indicating the length of the corresponding data block, including: The logic circuit responds to at least one request from the controller, A logic circuit package configured to transmit the logic circuit identifier, the partition map, the digital signature, the digital signature metadata, and / or other data, as well as the specified data corresponding to the digital signature metadata, to the controller.

16. The aforementioned digital signature metadata A data block count field that stores data indicating the total number of the aforementioned multiple data blocks, The logic circuit package according to claim 15, further comprising: a key identifier field, a data block count field, a plurality of data block address fields, and a length field that stores data indicating the total cumulative length of the plurality of data block length fields, for the controller to parse the digital signature metadata.

17. A replaceable print cartridge comprising the logic circuit package according to claim 15 or 16.

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