Semiconductor equipment

Abstract

To provide a novel semiconductor device, low power consumption semiconductor device, or a semiconductor device capable of shrinking its area.SOLUTION: A semiconductor device includes: an internal circuit; an input / output terminal; a signal line; a power supply line; a resister; a first transistor; and a control signal generation circuit. The internal circuit is connected to the input / output terminal via the signal line. A first terminal of the first transistor is electrically connected to the power supply line. A second terminal of the first transistor is connected to a first terminal of the resister. A second terminal of the resister is electrically connected to the signal line. The control signal generation circuit is electrically connected to the gate of the first transistor, and the resister and the first transistor include an oxide semiconductor.SELECTED DRAWING: Figure 1

Description

【Technical Field】 【0001】 One aspect of the present invention relates to a semiconductor device, a circuit board, and an electronic device. 【0002】 Note that one aspect of the present invention is not limited to the above technical field. The technical field of one aspect of the invention disclosed in this specification etc. relates to an object, a method, or a manufacturing method. Or, one aspect of the present invention relates to a process, a machine, a manufacture, or a composition of matter. Or, one aspect of the present invention relates to a semiconductor device, a display device, a light emitting device, a power storage device, a storage device, an imaging device, a driving method thereof, or a manufacturing method thereof. 【Background Art】 【0003】 In semiconductor devices such as integrated circuits (ICs) and display devices, pull-up (or pull-down) resistors are used to prevent the input / output terminals of the circuit from becoming indeterminate. For example, a technique of using gate polysilicon as a pull-up (or pull-down) resistor of a CMOS inverter has been disclosed (see Patent Document 1). 【Prior Art Documents】 【Patent Documents】 【0004】 【Patent Document 1】 Japanese Patent Application Laid-Open No. 11-274440 【Summary of the Invention】 【Problems to be Solved by the Invention】 【0005】 For example, in a CMOS circuit, the resistance value of a pull-up (or pull-down) resistor is several kiloohms. From several megaohms to a very large value may be required. As shown in the above Patent Document 1, when polysilicon is used as a resistor in a gate array semiconductor circuit device, the area occupied by the polysilicon becomes large, resulting in a problem that the cell size increases. 【0006】 Also, in an IC having a pull-up (or pull-down) resistor, a current of about several μA continuously flows while signals are input and output to and from the input / output terminals, resulting in a problem that the power consumption increases. 【0007】 Also, as described above, an IC having a pull-up (or pull-down) resistor has a large power consumption. Therefore, in order to suppress this power consumption and make the IC have lower power consumption, a switch for disconnecting the pull-up (or pull-down) resistor may be provided after the IC starts stable operation. The switch can mainly be formed by a transistor, but even when the transistor is turned off to disconnect the switch, an off-leakage current flows, resulting in an increase in power consumption due to this. 【0008】 Therefore, one aspect of the present invention aims to provide a novel semiconductor device, circuit board or electronic device. Or, one aspect of the present invention aims to provide a configuration capable of reducing the layout area. Or, one aspect of the present invention aims to provide a configuration capable of preventing a current from constantly occurring. Or, one aspect of the present invention aims to provide a configuration capable of reducing power consumption. Or, one aspect of the present invention aims to prevent a through-current from occurring. ​​​​​​​​​​​​​​ One of the objectives is to shorten the time required or to provide a configuration that makes this possible. 【0009】 Furthermore, one aspect of the present invention does not necessarily have to solve all of the above problems, but at least It is sufficient if it can solve one problem. Also, the description of the above problem does not imply the existence of other problems. This does not preclude anything. Other issues can be identified from the description in the specification, drawings, claims, etc. This becomes clear, and from the descriptions in the specification, drawings, claims, etc., other issues are not addressed. It is possible to extract it. [Means for solving the problem] 【0010】 One aspect of the present invention comprises an internal circuit, input / output terminals, signal lines, power lines, a resistor, and a first It has a transistor and a control signal generation circuit, and the internal circuit has input / output terminals via signal lines. The first terminal of the first transistor is electrically connected to the power line, The second terminal of the first transistor is electrically connected to the first terminal of the resistor, and the resistor The second terminal is electrically connected to the signal line, and the control signal generation circuit is connected to the first transistor. The gate is electrically connected, and the resistor and the first transistor have an oxide semiconductor. It is a semiconductor device. 【0011】 One aspect of the present invention comprises an internal circuit, input / output terminals, signal lines, power lines, a resistor, and a first It has a transistor and a control signal generation circuit, and the internal circuit has input / output terminals via signal lines. The first terminal of the first transistor is electrically connected to the second terminal of the resistor. The second terminal of the first transistor is connected to the signal line and the resistor The first terminal is electrically connected to the power line, and the control signal generation circuit is the first transistor The gate is electrically connected, and the resistor and the first transistor have an oxide semiconductor. It is a semiconductor device. 【0012】 One aspect of the present invention comprises an internal circuit, input / output terminals, signal lines, power lines, and a first transistor It has a control signal generation circuit, and the internal circuit is electrically connected to the input / output terminals via signal lines. The first terminal of the first transistor is electrically connected to the power line, and the first transistor The second terminal of the inverter is electrically connected to the signal line, and the control signal generation circuit is connected to the first transistor. The first transistor is electrically connected to the gate of the transistor and has an oxide semiconductor. It is a conductive device. 【0013】 Furthermore, one aspect of the present invention comprises the semiconductor device described above and a second transistor, and controls The signal generation circuit is electrically connected to the first terminal of the second transistor, and the second transistor The second terminal of the transistor is electrically connected to the gate of the first transistor, and the second transistor A zista is a semiconductor device having an oxide semiconductor. 【0014】 Furthermore, one aspect of the present invention comprises the semiconductor device described above and a capacitive element, wherein the capacitive element is The second terminal of the second transistor and the gate of the first transistor are electrically connected. It is a semiconductor device. 【0015】 Furthermore, the control signal generation circuit and the gate of the second transistor are electrically connected. This is also possible. Furthermore, the gate of the second transistor may be connected to another wire. 【0016】 Furthermore, one aspect of the present invention is a circuit board having the semiconductor device described above and a printed circuit board. That is the case. 【0017】 Furthermore, one aspect of the present invention includes the semiconductor device or circuit board described above, and a display unit. It is an electronic device having a microphone, speaker, or control keys. 【0018】 In this specification, the term "resistive portion" refers to a layer having an oxide semiconductor used as the resistor. preferable. [Effects of the Invention] 【0019】 One aspect of the present invention can provide a novel semiconductor device, circuit board, or electronic device. Alternatively, one aspect of the present invention relates to reducing the layout area or making it possible to do so. A configuration can be provided. Alternatively, one aspect of the present invention provides a configuration in which a current is generated steadily. It is possible to prevent this or to provide a configuration that makes it possible. Or, one aspect of the present invention The embodiment can provide a configuration that reduces power consumption or makes it possible to do so. Alternatively, one aspect of the present invention involves shortening the time during which through-current occurs or making it possible to do so. It can provide a suitable configuration. 【0020】 Furthermore, the description of these effects does not preclude the existence of other effects. The embodiment does not necessarily have to have all of these effects. Furthermore, other effects are... This will become clear from the description in the specification, drawings, claims, etc., and the specification, drawings Furthermore, it is possible to extract other effects from the descriptions in the claims and other documents. [Brief explanation of the drawing] 【0021】 [Figure 1] A diagram illustrating an example of a semiconductor device. [Figure 2] A diagram illustrating an example of a semiconductor device. [Figure 3] A diagram illustrating an example of a semiconductor device. [Figure 4] A diagram illustrating an example of a semiconductor device. [Figure 5] Timing chart. [Figure 6] A diagram illustrating an example of a semiconductor device. [Figure 7] A diagram illustrating an example of a semiconductor device. [Figure 8] A diagram illustrating an example of a semiconductor device. [Figure 9] A diagram illustrating an example of a semiconductor device. [Figure 10] A diagram illustrating an example of a transistor configuration. [Figure 11] A diagram illustrating an example of a transistor configuration. [Figure 12] A diagram illustrating an example of a transistor configuration. [Figure 13] A diagram illustrating an example of a transistor configuration. [Figure 14] A diagram illustrating an example of a transistor configuration. [Figure 15] A diagram illustrating an example of a transistor configuration. [Figure 16] A diagram illustrating an example of a transistor configuration. [Figure 17] A diagram illustrating the energy band diagram of a transistor. [Figure 18] A diagram illustrating an example of a semiconductor device. [Figure 19] Flowcharts and schematic perspectives illustrating the manufacturing process of electronic components. [Figure 20] A diagram illustrating electronic devices. [Modes for carrying out the invention] 【0022】 Embodiments of the present invention will be described in detail below with reference to the drawings. However, the present invention is as follows The description is not limited to the embodiments described herein, and does not deviate from the spirit and scope of the present invention. It will be easily understood by those skilled in the art that its form and details can be varied in many ways. Therefore, the present invention is not to be interpreted as being limited to the following embodiments. . 【0023】 Note that in the drawings, the size, thickness of the film (layer), or area may be exaggerated for clarity. There are cases where this is the case. 【0024】 In this specification, the terms "membrane" and "layer" are interchangeable. It is possible to do so. 【0025】 Furthermore, voltage is defined by a certain potential and a reference potential (e.g., ground potential (GND) or source potential). It often refers to the potential difference between two points. Therefore, it is possible to rephrase voltage as potential. Generally, electric potential (voltage) is relative, and its magnitude is relative to a reference potential. Therefore, it is determined by this. Consequently, even if it is written as "ground potential," The potential is not necessarily 0V. For example, the lowest potential in a circuit may be the "ground potential". There are also cases where the potential in the middle of the circuit becomes the "ground potential." Based on that potential, positive and negative potentials are defined. 【0026】 Furthermore, in this specification, etc., the high power supply potential VDD (hereinafter simply referred to as "VDD" or "H potential") Also known as, ) Low power supply potential VSS (hereinafter simply referred to as "VSS" or "L potential") It exhibits a power supply potential higher than . Also, the low power supply potential VSS is the same as the high power supply potential VDD. It shows a power supply potential that is lower than [the specified potential]. Also, the ground potential can be used as VDD or VSS. It is also possible that, for example, if VDD is at ground potential, then VSS is at a potential lower than ground potential. If VSS is at ground potential, then VDD is at a higher potential than ground potential. 【0027】 The ordinal numbers "1st" and "2nd" are used for convenience only and do not necessarily indicate the order of processes or layering. It does not indicate order. Therefore, for example, "the first" could be "the second" or "the third." It can be explained by substituting it as appropriate. Also, ordinal numbers as described in this specification, etc. The ordinal numbers used to specify one aspect of the present invention may not always coincide. 【0028】 Furthermore, one aspect of the present invention includes, in addition to integrated circuits, any display device, RF tag, imaging device, etc. Devices are included in that category. Display devices are typified by liquid crystal displays and organic light-emitting devices. A light-emitting device equipped with a light-emitting element in each pixel, electronic paper, DMD (Digital Media Display). micromirror device), PDP (Plasma Display Pa Integrated circuits such as nel, FED (Field Emission Display) Display devices that possess this category are included. 【0029】 When explaining the structure of the invention using drawings, reference numerals that refer to the same thing will be used across different drawings. However, there are some things that are used in common. 【0030】 Furthermore, in this specification, etc., the figures or text described in a particular embodiment may differ from the original. Therefore, it is possible to take a part of it and constitute one aspect of the invention. If a diagram or text describing a part is included, remove a portion of that diagram or text. The information provided is disclosed as one aspect of the invention and constitutes one aspect of the invention. It is assumed to be possible. And one aspect of the invention can be said to be clear. Therefore, for example, one or more of active elements (such as transistors), wirings, passive elements (such as capacitive elements), conductive layers , insulating layers, semiconductor layers, components, devices, operation methods, manufacturing methods, etc. are described in the drawings or text, and it is possible to extract a part of them to constitute one aspect of the invention. For example, it is assumed to be possible to extract M (M is an integer and M < N) circuit elements (such as transistors, capacitive elements, etc.) from a circuit diagram composed of N (N is an integer) circuit elements (such as transistors, capacitive elements, etc.) to constitute one aspect of the invention. As another example, from the text "A has B, C, D, E or F", by arbitrarily extracting some elements, "A has B and E", "A has E and F", " A has C, E and F", or "A has B, C, D and E", etc. can be used to constitute one aspect of the invention. That is, it is possible to constitute one aspect of the invention. In addition, in this specification, etc., when at least one specific example is described in the drawings or text described in a certain embodiment, it is easily understood by those skilled in the art to derive the upper concept of that specific example. Therefore, when at least one specific example is described in the drawings or text described in a certain embodiment, the upper concept of that specific example is also disclosed as one aspect of the invention and can be used to constitute one aspect of the invention. And one aspect of the invention can be said to be clear. 【0031】 Also, in this specification, etc., at least the content described in the drawings (even a part of the drawings) is 【0032】 It is disclosed as one aspect of the invention, and it is possible to constitute one aspect of the invention. Yes. Therefore, if a certain content is described in a diagram, it does not need to be stated in text. Even if it is not disclosed, its content is disclosed as one aspect of the invention, and does not constitute one aspect of the invention. It is possible to do so. Similarly, a diagram showing only a part of the figure can also be considered as one aspect of the invention. It is disclosed in this way and can constitute one aspect of the invention. One aspect of the invention can be said to be clear. 【0033】 Furthermore, any content not specified in the text or drawings within the specification will be excluded. This can constitute one embodiment of the invention that defines the following: or, for a certain value, an upper limit If a numerical range is specified, such as a lower limit, you can arbitrarily narrow that range. or, by excluding one point within that scope, one aspect of the invention that partially excludes that scope is defined. This makes it possible, for example, that the prior art falls within the technical scope of one aspect of the present invention. It is possible to stipulate that it is not included. 【0034】 Furthermore, in this specification, active elements (such as transistors) and passive elements (such as capacitive elements) are used. For all terminals such as those mentioned above, a person skilled in the art can, without specifying the destination of the connection, It may be possible to constitute one aspect of the invention. In other words, even without specifying the connection destination, One aspect of the explanation is clear. And the details of the identified connection destination are described in this specification, etc. If included, an embodiment of the invention that does not specify the connection destination is described in this specification, etc. It is sometimes possible to make a determination. Especially when there are multiple possible destinations for the terminal connection, There is no need to limit the connection destination of that terminal to a specific location. Therefore, active elements (transitions) Only certain terminals of passive elements (such as capacitors) and other passive elements (such as capacitive elements) are connected. In some cases, specifying the prior art can constitute one aspect of the invention. 【0035】 Furthermore, in this specification, if a circuit is specified, at least the connection destination is identified, the business If you are an expert, you may be able to identify the invention. Or, regarding a certain circuit, However, if the function is specified, a person skilled in the art may be able to specify the invention. In other words, if the function is specified, it can be said that one aspect of the invention is clear. It may be possible to determine that one aspect of the invention is described in this specification, etc. Therefore, even without specifying the function of a certain circuit, if the connection destination is specified, it constitutes an invention. It is disclosed as such and can constitute one aspect of the invention. Regarding a certain circuit, even if the connection destination is not specified, if the function is specified, it can be considered as one aspect of the invention. This has been disclosed and can constitute one aspect of the invention. 【0036】 Furthermore, if it is explicitly stated in this specification, etc., that X and Y are connected. This refers to the case where X and Y are electrically connected, and the case where X and Y are functionally connected. The cases in which X and Y are directly connected are disclosed in this specification, etc. Therefore, the connection relationships are not limited to predetermined relationships, such as those shown in the diagram or text. Connections other than those shown in the diagram or text are also included as those described in the diagram or text. ru. 【0037】 Here, X and Y are the object (e.g., device, element, circuit, wiring, electrode, terminal, conductive film, layer). (etc.) 【0038】 One example of a case where X and Y are directly connected is when an electrical connection between X and Y is possible. Elements such as switches, transistors, capacitive elements, inductors, resistive elements, and dies. If the diode, display element, light-emitting element, load, etc. are not connected between X and Y and elements that enable electrical connection between X and Y (e.g., switches, transistors, capacitors). Without the need for elements such as components, inductors, resistors, diodes, display elements, light-emitting elements, loads, etc. This is the case where X and Y are connected. 【0039】 One example of a case where X and Y are electrically connected is the ability to make an electrical connection between X and Y possible. Elements such as switches, transistors, capacitive elements, inductors, resistive elements, and dies. One or more devices (such as diodes, display elements, light-emitting elements, and loads) are connected between X and Y. Yes, it is possible. Furthermore, a switch has the function of being controlled to be on or off. In other words, a switch The switch can be in a conductive (on) or non-conductive (off) state, allowing current to flow. It has a function to control whether or not current flows. Alternatively, the switch selects the path through which current flows. It has a function to switch between them. Furthermore, if X and Y are electrically connected, X and This includes cases where Y is directly connected to it. 【0040】 One example of a functional connection between X and Y is enabling a functional connection between X and Y. Circuits that perform this function (for example, logic circuits (inverters, NAND gates, NOR gates, etc.), signal transformers) Conversion circuits (DA conversion circuits, AD conversion circuits, gamma correction circuits, etc.), potential level conversion circuits (electric (Source circuits (boost circuits, buck circuits, etc.), level shifter circuits that change the potential level of a signal, etc.) Voltage source, current source, switching circuit, amplification circuit (which can increase signal amplitude or current amount, etc.) Circuits, operational amplifiers, differential amplifier circuits, source follower circuits, buffer circuits, etc., signal generation One or more circuits (such as memory circuits and control circuits) can be connected between X and Y. For example, even if another circuit is placed between X and Y, the signal output from X If the signal is transmitted to Y, then X and Y are assumed to be functionally connected. When X and Y are functionally connected, the situation is different from when X and Y are directly connected. This includes cases where and are electrically connected. 【0041】 Furthermore, if it is explicitly stated that X and Y are electrically connected, then X and Y and When they are electrically connected (i.e., when there is another element or circuit between X and Y) (when connected by) and when X and Y are functionally connected (i.e., X and Y and (When they are functionally connected with another circuit in between) and when X and Y are directly connected In the case where (that is, when X and Y are connected without another element or circuit in between) ) and are disclosed in this specification, etc. That is, electrically connected and If explicitly stated, simply explicitly stated as connected. The same information as in this case is disclosed in this specification, etc. 【0042】 For example, the source (or first terminal, etc.) of the transistor is connected via Z1 (and (Without intervening), electrically connected to X, and the drain of the transistor (or second terminal, etc.) However, if Y is electrically connected via (or without) Z2, or if a transistor The source (or first terminal, etc.) is directly connected to a part of Z1, and another part of Z1 It is directly connected to X, and the drain (or second terminal, etc.) of the transistor is connected to Z2. If one part is directly connected to Z2, and another part of Z2 is directly connected to Y, then the following applies: It can be expressed as follows. 【0043】 For example, "X and Y and the source (or first terminal, etc.) and drain (or The second terminal, etc., is electrically connected to each other, and X is the source of the transistor ( (or the first terminal, etc.), the transistor's drain (or the second terminal, etc.), and Y in that order. It can be expressed as, "It is electrically connected." Or, "The source of the transistor." (or the first terminal, etc.) is electrically connected to X and the drain of the transistor (or The second terminal (or other terminal) is electrically connected to Y, and X is the source of the transistor (or the first terminal). Y is electrically connected to the drain (or second terminal, etc.) of the transistor in this order. It can be expressed as "X is connected to the source of the transistor ( or via the first terminal (or the second terminal, etc.) and the drain (or the second terminal, etc.), Y is electrically connected. Connected, X, the source of the transistor (or the first terminal, etc.), the slave of the transistor It can be expressed as "N (or the second terminal, etc.), Y are provided in this connection order." Yes, it is possible. Using similar notation to these examples, the order of connections in a circuit configuration can be specified. By defining the source (or first terminal, etc.) and drain (and The technical scope can be determined by distinguishing between (for example, a second terminal) and other components. 【0044】 Alternatively, another way to express it is, for example, "the source (or first terminal, etc.) of the transistor." ) is electrically connected to X via at least a first connection path, and the first connection path is It does not have a second connection path, and the second connection path is via a transistor, The source (or first terminal, etc.) of the transistor and the drain (or second terminal, etc.) of the transistor The path between ) and the first connection path is the path via Z1, and the transistor Rain (or the second terminal, etc.) is electrically connected to Y via at least a third connection path. The third connection path is connected, and does not have the second connection path, and the third connection path is Z2 It can be expressed as, "It is a path via the transistor (ma (or the first terminal, etc.) is electrically connected to X via Z1 through at least the first connection path. They are connected in a specific way, and the first connection path does not have the second connection path, and the second connection path has It has a connection path via a transistor, and the drain (or second terminal, etc.) of the transistor. ) is electrically connected to Y via Z2 by at least a third connection path, and the third This can be expressed as, "The connection path does not have a second connection path." Or, " The source (or first terminal, etc.) of the transistor is connected by at least the first electrical path. Z1 is electrically connected to X, and the first electrical path has a second electrical path. It is not done, and the second electrical path is from the transistor's source (or first terminal, etc.) This is the electrical path to the drain (or second terminal, etc.) of the transistor. The drain (or second terminal, etc.) of Z2 is connected by at least a third electrical path. Through this, Y is electrically connected, and the third electrical path does not have a fourth electrical path. The fourth electrical path is from the transistor's drain (or second terminal, etc.) to the transistor It can be expressed as "It is the electrical path to the source (or first terminal, etc.) of the sta." Using similar notation to these examples, the connection paths in the circuit configuration are defined. This allows the source (or first terminal, etc.) and drain (or second terminal) of the transistor to be connected. By distinguishing between terminals (and other similar components), the technical scope can be determined. 【0045】 Note that these methods of expression are just examples and are not limited to these methods. Here, X Y, Z1, and Z2 are the objects (e.g., devices, elements, circuits, wiring, electrodes, terminals, conductive films, etc.) Let's assume it is a layer, etc. 【0046】 Note that, in circuit diagrams, independent components are shown as being electrically connected to each other. Even in such cases, one component may possess the functions of multiple components. For example, if part of the wiring also functions as an electrode, one conductive film will function as the wiring, and It possesses the functions of both components of the electrode. Therefore, in this specification Electrically connected means that a single conductive film combines the functions of multiple components. This also falls under that category. 【0047】 (Embodiment 1) This embodiment describes an example of a semiconductor device according to one aspect of the present invention. A semiconductor device according to one embodiment includes an internal circuit and input / output terminals for inputting and outputting signals to the internal circuit, In a circuit having, a pull-up ( or pull-down) resistor is provided to prevent the input / output terminals of the circuit from entering an indeterminate state. 【0048】 <Configuration example of semiconductor device> FIG. 1(A) is a circuit diagram of a semiconductor device 10 according to an aspect of the present invention. As shown in FIG. 1(A), the semiconductor device 10 includes a transistor 11, a resistor section 12, an input / output terminal 13, an internal circuit 1 4, a power supply line 15, a signal line 16, and a control signal generation circuit 17. 【0049】 In the semiconductor device 10, the first terminal of the transistor 11 is connected to the power supply line 15, and the second terminal of the transistor 11 is connected to the first terminal of the resistor section 12. Also, the gate of the transistor 11 is connected to the control signal generation circuit 17. The second terminal of the resistor section 12 is connected to the signal line 16, and the input / output terminal 13 is connected to the internal circuit 14 via the signal line 16. 【0050】 The input / output terminal 13 is a terminal for inputting a signal (high-level signal, low-level signal, or analog signal) to the internal circuit 14 or outputting a signal (high-level signal, low-level signal, or analog signal) from the internal circuit 14. The control signal generation circuit 17 is a circuit that sends a signal to the gate of the transistor 11 and controls the on / off state of the transistor 11. 【0051】 The power supply line 15 can be a high-potential power supply line VDD that provides a high-level (H) potential or a low-potential (L) power supply line VSS (VSS < VDD). When the power supply line 15 is VDD, the resistor section 12 in the semiconductor device 10 is a pull-up resistor and It functions as follows. When the power line 15 is VSS, the resistor 12 in the semiconductor device 10 is It functions as a pull-down resistor. 【0052】 Without a pull-up (or pull-down) resistor, an external circuit or negative signal will be applied to input / output terminal 13. If the device to be loaded is not connected, or if no signal is input or output to input / output terminal 13, When not configured, input / output terminal 13 is in an undefined state (neither high nor low, or either high or low). The state is unknown.) When the input / output terminal 13 is in an undefined state, the internal circuit 14 This could lead to malfunctions. 【0053】 Therefore, by providing a pull-up (or pull-down) resistor as shown in Figure 1(A) By fixing the input / output terminal 13 to H or L, it is possible to prevent malfunctions in the internal circuitry. Cut. 【0054】 Transistor 11 receives signals (high-level signals, low-level signals, or A) at input / output terminal 13. It is ON when no analog signal is being input or output. Therefore, power line 15 is V In the case of DD, when no signal is input to input / output terminal 13, the input / output terminal is high-frequency. It will be held in the bell. Also, if the power line 15 is VSS, the input / output terminal 13 When no signal is being input or output, the input / output terminals will remain at a low level. 【0055】 Transistor 11 receives signals (high-level signals, low-level signals, or A) at input / output terminal 13. After an analog signal is input and the internal circuit 14 starts up normally, it turns off. This allows the current to stop flowing between the power line 15 and the signal line 16. Therefore, this prevents current from being continuously consumed in the resistor 12, and reduces the power consumption of the semiconductor device 10. The force can be reduced. 【0056】 The transistor 11 and the resistor 12 have an oxide semiconductor. The oxide semiconductor is wide It is a gap semiconductor, and furthermore, the effective mass of holes is very large. By minimizing the amount of impurities and further reducing oxygen deficiency, oxidation The carrier concentration of the semiconductor can be reduced. In this way, the oxidation is purified to a high purity. By using semiconductor materials in transistors, it is possible to create transistors with extremely low off-currents. It can be formed. By using an oxide semiconductor in the transistor 11, The power consumption of the semiconductor device 10 can be reduced. Also, when used in the resistor 12, as shown above Because oxide semiconductors like the one described have very high resistance, they can be used as resistors. The area required to achieve the desired resistance value becomes smaller. In other words, the oxide semiconductor in the resistive part 12 By using this method, the layout area of ​​the resistor 12 can be reduced. 【0057】 Furthermore, transistors and resistors using oxide semiconductors can easily form a stacked structure. It is possible to form it by stacking it with, for example, a silicon transistor. Therefore, for example, as in the semiconductor device 10 according to one aspect of the present invention, The resistor 11 and resistor 12 are formed using an oxide semiconductor, and the internal circuit 14 is made of silicon By forming it with transistors using a transistor, the transistor 11 and resistor Since section 12 and the internal circuit 14 can be formed by stacking them, the layout area can be reduced. It can be made to stack the transistor 11 and the resistor 12 to form a structure. That's fine. 【0058】 Furthermore, it includes an oxide semiconductor that functions as a resistive layer and a conductive layer that is in contact with the oxide semiconductor. The resistive section may have a nonlinear resistance. 【0059】 Figure 1(B) is a circuit diagram of a semiconductor device 20 according to one aspect of the present invention. The semiconductor device 20 is The connection between the transistor 11 and the resistor 12 in the semiconductor device 10 shown in Figure 1(A) The configuration is reversed. The semiconductor device 20 consists of a transistor 21, a resistor 22, and an input Output terminal 23, internal circuit 24, power line 25, signal line 26, control signal generation circuit 27 It has the following characteristics. 【0060】 In the semiconductor device 20, the first terminal of the transistor 21 is in contact with the second terminal of the resistor 22. The second terminal of transistor 21 is connected to the signal line 26. The gate 21 is connected to the control signal generation circuit 27. The first terminal of the resistor 22 is connected to the power line. The input / output terminal 23 is connected to the internal circuit 24 via the signal line 26, and is connected to the 25. 【0061】 Figure 1(C) is a circuit diagram of a semiconductor device 30 according to one aspect of the present invention. The semiconductor device 30 is , transistor 31, input / output terminal 33, internal circuit 34, power line 35, signal line 36 It also includes a control signal generation circuit 37. 【0062】 The semiconductor device 30 has a configuration in which the resistor 12 is absent in the semiconductor device 10 shown in Figure 1(A). In other words, in the semiconductor device 30 shown in Figure 1(C), there is a transistor between the power line 35 and the signal line 36. It consists solely of the Zista 31. 【0063】 In the semiconductor device 30, the first terminal of the transistor 31 is connected to the power line 35, The second terminal of transistor 31 is connected to the signal line 36. Also, the gate of transistor 31 It is connected to the control signal generation circuit 37. The input / output terminal 33 is connected to the internal circuit via the signal line 36. It connects to Route 34. 【0064】 The semiconductor device 30 has a configuration in which there is no resistance between the power line 35 and the signal line 36, The channel resistance of transistor 31 in the ON state can be used as a substitute for the resistor. It also functions as a pull-up (or pull-down) resistor. In particular, acid on transistor 31 Using ion semiconductors makes it easier to form high channel resistance and results in very low off-current. Therefore, it is preferable. 【0065】 Figure 1(D) is a circuit diagram of a semiconductor device 40 according to one aspect of the present invention. The semiconductor device 40 is , resistor section 42, input / output terminals 43, internal circuit 44, power line 45, signal line 46, To possess. 【0066】 The semiconductor device 40 is a control in the semiconductor device 10 shown in Figure 1(A), which includes the transistor 11 and control This configuration lacks the signal generation circuit 17. In other words, the semiconductor device 40 in Figure 1(D) has a power line 4 The connection between 5 and signal line 46 consists only of a resistor 42. 【0067】 In the semiconductor device 40, the first terminal of the resistor 42 is connected to the power line 45, and the resistor 42 The second terminal is connected to signal line 46. Input / output terminal 43 is connected internally via signal line 46. It is connected to circuit 44. 【0068】 The semiconductor device 40 has a configuration in which there is no transistor between the power line 45 and the signal line 46. Thus, even if a transistor is not formed between the power line 45 and the signal line 46, Because of the resistor 42, it is possible to suppress the signal line 46 from being in an undefined state. In that case, since current flows steadily while the semiconductor device 40 is running, Although the power consumption of the semiconductor device 40 will increase, the area required to form the transistors will be eliminated. Therefore, the layout can be made smaller. 【0069】 Furthermore, in the semiconductor device 10 shown in Figure 1(A), the transistor 11 and the resistor 12 are Multiple units can be used for each. For example, as shown in the semiconductor device 70 in Figure 2(A) Alternatively, a configuration using two resistors 12 may be used. Furthermore, a configuration using three or more resistors 12 may also be used. Alternatively, as shown in Figure 2(B), the semiconductor device 80 may be configured with two transistors 11. A configuration using three or more transistors 11 is also acceptable. Furthermore, the transistor 11 and the resistor 12 do not need to be connected alternately; the same type can be used. A configuration in which they are connected in a continuous sequence is also acceptable. 【0070】 Furthermore, as an example of the internal circuit 14 in the semiconductor device 10 shown in Figure 1(A), Figure 3(A) shows As shown, the gate driver circuit is configured as shown in Figure 3(B), and the clock generator etc. It can be used. Furthermore, various other circuits can be used, not limited to these. 【0071】 Figure 4(A) is a circuit diagram of a semiconductor device 50 according to one aspect of the present invention. The semiconductor device 50 is In the configuration of the semiconductor device 10 shown in Figure 1(A), the gate and control signal of transistor 11 are The configuration includes an additional transistor between the circuit 17 and the other components. 【0072】 The semiconductor device 50 includes a transistor 51, a resistor 52, input / output terminals 53, and an internal circuit 5 4, power line 55, signal line 56, control signal generation circuit 57, transistor 58, To possess. 【0073】 In the semiconductor device 50, the first terminal of the transistor 51 is connected to the power line 55, The second terminal of the inverter 51 is connected to the first terminal of the resistor 52, and the second terminal of the resistor 52 The child is connected to signal line 56. Also, the gate of transistor 51 is connected to transistor 58. The first terminal is connected, and the second terminal of transistor 58 is connected to the control signal generation circuit 57. The gate of transistor 58 is connected to the control signal generation circuit 57. Input / Output Terminal 53 is connected to the internal circuit 54 via signal line 56. Also, transistor 51 A floating node (FN) is placed at the connection point between the gate and the first terminal of transistor 58. A formation is created. 【0074】 The transistor 58, like the transistor 51 and the resistor 52, has an oxide semiconductor. Transistors with oxide semiconductors have very low off-currents. Therefore, semiconductors In the device 50, by switching the on and off of transistor 58, the transistor The voltage required to operate the TA51 can be maintained at FN. Therefore, the transistor The period during which the ON or OFF state of TA 51 is maintained is by stopping the control signal generation circuit 57. This configuration makes it possible to reduce the power consumption of the semiconductor device 50. 【0075】 In the semiconductor device 50 shown in Figure 4(A), the gate of transistor 58 generates a control signal. The configuration connected to circuit 57 is shown, but the gate of transistor 58 is the control signal generation circuit It is also possible to configure it so that it is not connected to 57. In other words, the gate of transistor 58 is not connected to other wiring. Alternatively, it can be configured to be connected to circuits and the like. 【0076】 Figure 4(B) is a circuit diagram of a semiconductor device 60 according to one aspect of the present invention. The semiconductor device 60 is In the configuration of the semiconductor device 50 shown in Figure 4(A), the gate and transistor of transistor 51 A capacitive element is further connected to the floating node formed at the connection point with Ta58. It is structured as follows. 【0077】 The semiconductor device 60 includes a transistor 61, a resistor 62, input / output terminals 63, and an internal circuit 6 4, power line 65, signal line 66, control signal generation circuit 67, transistor 68, It has a quantitative element 69. 【0078】 In the semiconductor device 60, the first terminal of the transistor 61 is connected to the power line 65, The second terminal of the inverter 61 is connected to the first terminal of the resistor 62, and the second terminal of the resistor 62 The child is connected to signal line 66. Also, the gate of transistor 61 is connected to transistor 68. The first terminal is connected to the capacitive element 69, and the second terminal of the transistor 68 is connected to the control signal. It is connected to the signal generator circuit 67. Also, the gate of transistor 68 is connected to the signal generator circuit 67. The input / output terminal 63 is connected to the internal circuit 64 via the signal line 66. The gate of transistor 61, the first terminal of transistor 68, and the capacitive element 69 are connected. A floating node (FN) is formed at the adjacent location. 【0079】 The semiconductor device 60, like the semiconductor device 50, switches the transistor 68 on and off. This allows the voltage required to operate transistor 61 to be maintained at FN. Furthermore, the semiconductor device 60 has a capacitive element 69 connected to FN, which further increases F The configuration makes it easy to maintain voltage in N. Therefore, the ON state of transistor 61 and This makes it easier to maintain the off state and allows the control signal generation circuit 67 to be stopped. Therefore, the power consumption of the semiconductor device 60 can be reduced. 【0080】 In the semiconductor device 60 shown in Figure 4(B), the gate of transistor 68 generates a control signal. The configuration shown is connected to circuit 67, but the gate of transistor 68 is the control signal generation circuit It is also possible to configure it so that it is not connected to 67. In other words, the gate of transistor 68 is not connected to other wiring. Alternatively, it can be configured to be connected to circuits and the like. 【0081】 <Example of semiconductor device operation> Next, the semiconductor device 10 shown in Figure 1(A) is subjected to the timing shown in Figures 5(A) and 5(B). The operation when controlled based on the chart will be explained. However, as shown in Figure 1(A) The semiconductor device 10 can perform various other operations by appropriately controlling the potential of each wire. It is possible to do so. 【0082】 Figure 5(A) shows that the power line 15 of the semiconductor device 10 in Figure 1(A) is the high-potential power line VDD. This is a timing chart explaining the case where it functions as follows. In other words, the resistor 12 is It functions as a pull-up resistor. 【0083】 Figure 5(A) shows the potential V15 of the power line 15, the potential V17 of the control signal generation circuit 17, and the input / output. This shows the potential V13 at terminal 13. 【0084】 During the period T11 shown in Figure 5(A), the potentials of the power line 15 and the control signal generation circuit 17 are The voltage gradually increases and is boosted to the threshold voltage (Vth) of transistor 11. The potential of child 13 is floating because transistor 11 is in the off state. It enters an indeterminate state. 【0085】 During period T12, the potentials of the power line 15 and the control signal generation circuit 17 further increase, V The voltage is boosted to DD(H). After that, the potential of the power line 15 and the control signal generation circuit 17 is V It is held in DD(H). Also, the potential of the input / output terminal 13 is when transistor 11 is ON. Therefore, it will be at the same potential (VDD) as power line 15. 【0086】 During period T13, the potential of the power line 15 and the control signal generation circuit 17 is maintained at VDD (H). It is held. A low-level (L) signal (VSS) is input to input / output terminal 13. In other words During period T13, current flows through transistor 11 and resistor 12, so the semiconductor The power consumption of device 10 increases. Therefore, a shorter period T13 is preferable. 【0087】 During period T14, the potential of the power line 15 is maintained at VDD. Control signal generation circuit 17 When a low-level (L) signal (VSS) is input, transistor 11 is turned off. The potential of input / output terminal 13 is maintained at VSS(L). 【0088】 During period T15, the potential of power line 15 is maintained at VDD (H). Control signal generation circuit A high-level signal (VDD) is input to 17, and transistor 11 turns on. The potential of input / output terminal 13 is maintained at VSS(L). That is, during period T15, As current flows through the transistor 11 and the resistor 12, the power consumption of the semiconductor device 10 increases. Therefore, a shorter duration T15 is preferable. 【0089】 During period T16, the potential of the power line 15 and the control signal generation circuit 17 is maintained at VDD. The potential of input / output terminal 13 is VDD(H) because the input of a low-level (L) signal is stopped. ) 【0090】 Figure 5(B) shows that the power line 15 of the semiconductor device 10 in Figure 1(A) is a low-potential power line VSS This is a timing chart explaining the case where it functions as follows. In other words, the resistor 12 is It functions as a pull-down resistor. 【0091】 Figure 5(B) shows the potential V15 of the power line 15, the potential V17 of the control signal generation circuit 17, and the input / output. This shows the potential V13 at terminal 13. 【0092】 During the period T21 shown in Figure 5(B), power line 15 is held at VSS(L). Control signal The potential of the voltage generation circuit 17 gradually increases, boosting up to the threshold voltage (Vth) of transistor 11. It is done. Also, the potential of the input / output terminal 13 is floating because transistor 11 is in the off state. It is in an unstable state. 【0093】 During period T22, the power line 15 is held at VSS(L). Control signal generation circuit 17 The potential increases further and is boosted to VDD(H). Subsequently, the power of the control signal generation circuit 17 The position is held at VDD(H). Also, the potential of the input / output terminal 13 is such that when transistor 11 is O As a result, the voltage becomes the same as that of power line 15 (VSS). 【0094】 During period T23, the power line 15 is held at VSS(L). Control signal generation circuit 17 The potential is held at VDD. A high-level signal (VDD) is input to input / output terminal 13. Therefore, during period T23, current flows through transistor 11 and resistor 12. Therefore, the power consumption of semiconductor device 10 increases. For this reason, a shorter period T23 is preferable. 【0095】 During period T24, the power line 15 is held at VSS(L). Control signal generation circuit 17 When a low-level (L) signal (VSS) is input, transistor 11 is turned off. The potential of input / output terminal 13 is maintained at VDD (H). 【0096】 During period T25, the power line 15 is held at VSS(L). Control signal generation circuit 17 When a high-level signal (VDD) is input, transistor 11 turns ON. Input / Output The potential of terminal 13 is maintained at VDD(H). That is, during period T25, the transient As current flows through the sta 11 and the resistor 12, the power consumption of the semiconductor device 10 increases. Therefore, a shorter duration T25 is preferable. 【0097】 During period T26, the potential of power line 15 is maintained at VSS(L). Control signal generation circuit The potential of terminal 17 is held at VDD. The potential of input / output terminal 13 is the input of a high-level (H) signal. Because the force stops, it becomes VSS(L). 【0098】 As described above, the semiconductor device 10 shown in Figure 1 has pull-up (or pull-down) connections for ICs and other devices. It can function as a semiconductor device with resistance. 【0099】 In this embodiment, one aspect of the present invention has been described. Or, other embodiments may be described. In this section, one aspect of the present invention will be described. However, this aspect of the present invention is not limited to these. It is not possible. In other words, various aspects of the invention are described in this embodiment and other embodiments. Therefore, one aspect of the present invention is not limited to a specific aspect. For example, one aspect of the present invention and An example of the case where a pull-up (or pull-down) resistor is applied has been shown, but the present invention is The embodiments are not limited thereto. Depending on the circumstances, or depending on the situation, one embodiment of the present invention may also be described. This may also be applied to other circuits. Or, for example, depending on the circumstances or situation. In one aspect of the present invention, a pull-up (or pull-down) resistor may not be applied. For example However, as one aspect of the present invention, an example has been shown in which the transistor has an oxide semiconductor, One aspect of the present invention is not limited thereto. Depending on the circumstances, the present invention may be used in some cases or situations. In one aspect, transistors are made of silicon, germanium, silicon germanium, and carbon. Silicon phosphate, gallium arsenide, aluminum gallium arsenide, indium phosphide, gallium nitride Alternatively, it may have various semiconductor materials, such as organic semiconductors. Or, for example In some cases, or depending on the circumstances, in one aspect of the present invention, the transistor is acid It is not necessary to have a monoxide semiconductor. 【0100】 Furthermore, this embodiment can be appropriately combined with the descriptions of other embodiments. Therefore, The contents described in this embodiment (or even just some of the contents) may differ from the contents described in that embodiment. Content (or partial content), and / or described in one or more other embodiments. Apply, combine, or replace the content (even if only a part of it) to the content. It is possible to do so. Furthermore, the contents described in each embodiment refer to the following in each embodiment: This refers to content described using various diagrams or text included in the specification. Furthermore, any figure (even a part of it) described in one embodiment may be a separate figure. The part of, another figure (even if only a part of it) described in that embodiment, and / or one Alternatively, in combination with the figures (even if only a part of them) described in multiple other embodiments, By doing so, even more figures can be constructed. This is in the following embodiment. The same applies to this as well. 【0101】 (Embodiment 2) In this embodiment, the transistor 11 in the semiconductor device 10 shown in Embodiment 1 is An example of the configuration of the resistor section 12 will be described below. 【0102】 <Configuration Example 1> Figure 6 shows the circuit diagram, top view, and cross-sectional view of the transistor 100 and the resistor 200. Note that transistor 100 can be used in place of transistor 11 in Figure 1(A). Furthermore, the resistor 200 can be used in the resistor 12 in Figure 1(A). In the formation of this embodiment, the transistor 100 and the resistor 200 have an oxide semiconductor. Let me explain the configuration. 【0103】 Figure 6(A) shows a circuit diagram in which transistor 100 and resistor 200 are connected. Regarding the transistor 100 and resistor 200 shown in Figure 6(A), see Figure 6(B) for details. A top view showing an example of the result is shown. Figure 6(C) shows the dashed line A1-A2 in Figure 6(A). Figure 6(D) shows a cross-sectional view along the dashed line A3-A4, and Figure 6(E) shows a cross-sectional view along the dashed line A3-A4. A cross-sectional view is shown along the dashed line A5-A6. Here, the direction of the dashed line A1-A2 is shown. The direction of the channel length and the direction of the dashed line A3-A4 are sometimes referred to as the channel width direction. Figure 6(C) shows the cross-sectional structure of transistor 100 in the channel length direction. Figure 6(D) shows the cross-sectional structure of transistor 100 in the channel width direction. To clarify the vice structure, some components have been omitted in Figure 6(B). 【0104】 The transistor 100 shown in Figure 6 has an insulating layer 112 on the substrate 110 and an acid on the insulating layer 112. A conductive layer 141 is formed in partial contact with the oxide semiconductor layer 120 and the oxide semiconductor layer 120. and conductive layer 142, oxide semiconductor layer 120, conductive layer 141 and insulating layer 142 Layer 113 and oxide semiconductor layer 120 are superimposed, and conductive layer 130 is on insulating layer 113, and conductive layer It has 130 and an insulating layer 115 on the insulating layer 113. 【0105】 The resistor 200 shown in Figure 6 consists of an insulating layer 112 on the substrate 110 and an oxide layer on the insulating layer 112. A semiconductor layer 121 and a conductive layer 142 formed in partial contact with the oxide semiconductor layer 121 and The conductive layer 143, the oxide semiconductor layer 121, the conductive layer 142, and the insulating layer 1 on the conductive layer 143 It has 13 and an insulating layer 115 on the insulating layer 113. 【0106】 In transistor 100, the insulating layer 112 can function as an underlying insulating layer. The oxide semiconductor layer 120 can function as the active layer of the transistor 100. The conductive layers 141 and 142 function as source and drain electrodes. It can be formed. The insulating layer 113 has a region that functions as a gate insulating layer. The conductive layer 130 can function as a gate electrode. The insulating layer 115 can function as an interlayer insulating layer . 【0107】 In addition, in the resistor portion 200, the oxide semiconductor layer 121 can function as a resistor layer . 【0108】 <Configuration Example 2> FIG. 7 shows a circuit diagram, a top view, and a cross-sectional view of the transistor and the resistor portion 101. Note that the transistor and the resistor portion 101 can be used for the transistor 11 and the resistor portion 12 in FIG. 1(A). Also, the transistor and the resistor portion 10 1 in the formation of this embodiment will be described for a configuration having an oxide semiconductor 【0109】 The transistor and the resistor portion 101 shown in FIG. 7 have a configuration in which the transistor 100 and the resistor portion 200 in FIG. 6 are combined into one. In particular, by using a transistor and a resistor portion 101 having an oxide semiconductor, it is possible to form a structure in which the active layer of a transistor with a small off-current and a resistor layer with a high resistance value are directly connected. By adopting such a configuration in which the transistor and the resistor portion are combined, it is possible to reduce the layout area . 【0110】 FIG. 7(A) shows a circuit diagram of the transistor and the resistor portion 101. For the transistor and the resistor portion 101 shown in FIG. 7(A), FIG. 7(B) shows a top view showing an example of the configuration. FIG. 7(C) is a cross-sectional view taken along the dashed-dotted line A1-A2 in FIG. 7(A), FIG. 7(D ) is a cross-sectional view taken along the dashed-dotted line A3-A4, and FIG. 7(E) is a cross-sectional view taken along the dashed-dotted line A5-A6​ shows a cross-sectional view. Note that, in order to clarify the device structure, in FIG. 7(B), some constituent elements are omitted. elements are omitted. 【0111】 The transistor and resistor portion 101 shown in FIG. 7 includes an insulating layer 112 on a substrate 110, an oxide semiconductor layer 122 on the insulating layer 112, a conductive layer 141 and a conductive layer 143 formed in partial contact with the oxide semiconductor layer 122, an insulating layer 114 on the oxide semiconductor layer 122, the conductive layer 141 and the conductive layer 143, a conductive layer 131 overlapping partially with the oxide semiconductor layer 122 and on the insulating layer 114, and an insulating layer 115 on the conductive layer 131 and the insulating layer 114. 【0112】 In the transistor and resistor portion 101, the insulating layer 112 can function as a base insulating layer. The oxide semiconductor layer 122, in the transistor and resistor portion 101, the region overlapping with the conductive layer 131 can function as an active layer of the transistor. The conductive layers 141 and 143 can function as source electrodes and drain electrodes. The insulating layer 114 has a region that functions as a gate insulating layer. The conductive layer 131 can function as a gate electrode. The insulating layer 115 can function as an interlayer insulating layer. The insulating layer 115 can function as an interlayer insulating layer. can function. 【0113】 Also, in the transistor and resistor portion 101, the oxide semiconductor layer 122, the region between the conductive layer 13 1 and the conductive layer 143 can function as a resistance layer of the resistor portion. 【0114】 <Configuration Example 3> FIG. 8 shows a circuit diagram, a top view, and a cross-sectional view of a transistor 400 and a resistor portion 401. Note that transistor 400 and resistor 401 are the same as transistor 11 in Figure 1(A). It can also be used in the resistor 12. Furthermore, in the formation of the transistor 40 in this embodiment The configuration of 0 and the resistor 401 will be described as having an oxide semiconductor. 【0115】 The transistor 400 shown in Figure 8 is a top-gate type transistor as shown in Figures 6 and 7. It's not a regular transistor, but a bottom-gate type transistor. 【0116】 Figure 8(A) shows the circuit diagram of transistor 400 and resistor 401. Regarding the transistor 400 and resistor 401 shown in A), an example of their configuration is shown in Figure 8(B). The top view is shown. Figure 8(C) is a cross-section along the dashed line A1-A2 in Figure 8(A). A diagram is shown. Note that, in order to clarify the device structure, some components are omitted in Figure 8(B). It's abbreviated. 【0117】 The transistor 400 shown in Figure 8 has an insulating layer 112 on the substrate 110 and a conductive layer on the insulating layer 112. A conductive layer 410, an insulating layer 412 on the conductive layer 410, and an oxide semiconductor layer 41 on the insulating layer 412. 4 and conductive layers 418 and 420 are formed in partial contact with the oxide semiconductor layer 414. The structure includes an oxide semiconductor layer 414, a conductive layer 418, and an insulating layer 424 on the conductive layer 420. do. 【0118】 The resistor 401 shown in Figure 8 consists of an insulating layer 112 on the substrate 110 and an insulating layer 4 on the insulating layer 112. 12, the oxide semiconductor layer 416 on the insulating layer 412, and the oxide semiconductor layer 416 in partial contact A conductive layer 420 and a conductive layer 422 are formed, along with an oxide semiconductor layer 416 and a conductive layer 420. and an insulating layer 424 on a conductive layer 422, and 【0119】 In the transistor 400, the insulating layer 112 can function as a base insulating layer . The oxide semiconductor layer 414 can function as the active layer of the transistor 400. The conductive layer 418 and the conductive layer 420 can function as a source electrode and a drain electrode . The insulating layer 412 has a region that functions as a gate insulating layer. The conductive layer 410 can function as a gate electrode. The insulating layer 424 can function as an interlayer insulating layer . 【0120】 Also, in the resistor portion 401, the oxide semiconductor layer 416 can function as a resistance layer . 【0121】 Also, the bottom gate type transistor 400 shown in FIG. 8 has a channel etch type structure However, as shown in FIG. 9(A), it may be a channel protection type transistor 402. 【0122】 The transistor 402 shown in FIG. 9(A) includes an insulating layer 112 on the substrate 110, a conductive layer 410 on the insulating layer 112, an insulating layer 412 on the conductive layer 410, an oxide semiconductor layer 414 on the insulating layer 412, an insulating layer 428 on the oxide semiconductor layer 414, and conductive layers 430 and 432 formed in partial contact with the oxide semiconductor layer 414 and the insulating layer 428, and an insulating layer 434 on the oxide semiconductor layer 414, the insulating layer 428, the conductive layers 430 and 432. has. 【0123】 In the transistor 402, the insulating layer 112 can function as a base insulating layer . The oxide semiconductor layer 414 can function as the active layer of the transistor 400. The conductive layer 430 and the conductive layer 432 function as source and drain electrodes. This can be done. The insulating layer 412 has a region that functions as a gate insulating layer. The conductive layer 410 is It can function as a gate electrode. The insulating layer 434 functions as an interlayer insulating layer. The insulating layer 428 can function as a channel protection layer. 【0124】 Furthermore, transistor 403 shown in Figure 9(B) has a conductive layer 4 added to transistor 400 in Figure 8. It has a structure having 11. In transistor 403, the conductive layer 411 is the back gate electric It can function as a pole. 【0125】 Furthermore, the resistive section 401 shown in Figure 8 may also have a structure that includes a conductive layer. Figure 9(C) shows a resistive section 404 having a conductive layer 435 in addition to the resistive section 401. 【0126】 The resistor 404 shown in Figure 9(C) consists of an insulating layer 112 on the substrate 110 and a conductive layer on the insulating layer 112. A conductive layer 435, an insulating layer 438 on the conductive layer 435, and an oxide semiconductor layer 4 on the insulating layer 438. 44 and the conductive layer 440 and conductive layer 44, which are formed in partial contact with the oxide semiconductor layer 444. 2, an oxide semiconductor layer 444, a conductive layer 440, and an insulating layer 446 on the conductive layer 442, To possess. 【0127】 Furthermore, in the resistive section 404, the oxide semiconductor layer 444 can function as a resistive layer. Cut. 【0128】 Furthermore, the resistor 405 shown in Figure 9(D) has a conductive layer 448 on top of the resistor 404 shown in Figure 9(C). It has a structure. 【0129】 Furthermore, the resistor 406 shown in Figure 9(E) has an insulating layer 450 over the resistor 401 in Figure 8. It is a structure. 【0130】 When the insulating layer 450 is a film containing a large amount of hydrogen, such as a film having silicon nitride, In some cases, the resistance of the oxide semiconductor layer 416 can be reduced. 【0131】 The configuration and method shown in this embodiment may be appropriately combined with the configuration and method shown in other embodiments. It is possible. 【0132】 (Embodiment 3) In this embodiment, a transient having an oxide semiconductor that can be used in one aspect of the present invention This section describes an example configuration of a transistor (also called an OS transistor). This will be explained using this embodiment. The OS transistors are, for example, transistor 11 in Figure 1(A) and the transistor in Figure 4(A). This can be applied to the Rangista 58, etc. 【0133】 <Configuration Example 1> Figure 10 shows an example of the OS transistor configuration. Figure 10(A) shows the OS transistor configuration. This is a top view showing an example. Figure 10(B) is a cross-sectional view along the line y1-y2, and Figure 10(C) Figure 10(D) is a cross-sectional view along the line x1-x2, and Figure 10(D) is a cross-sectional view along the line x3-x4. Here, y In the case where the direction of the 1-y2 line is referred to as the channel length direction and the direction of the x1-x2 line is referred to as the channel width direction, There is a match. Therefore, Figure 10(B) shows the cross-sectional structure of the OS transistor in the channel length direction. The diagram shows the channel width direction of the OS transistor, and Figures 10(C) and 10(D) are shown. This is a diagram showing the cross-sectional structure. Note that, in order to clarify the device structure, Figure 10(A) shows a single Some components of the section have been omitted. 【0134】 The OS transistor 501 shown in Figure 10 has a back gate. 1 is formed on the insulating surface. Here, it is formed on the insulating layer 511. Insulating layer 511 The substrate 510 surface is formed. The OS transistor 501 is formed on the insulating layer 514 and the insulating layer 514. It is covered by the margin layer 515. Furthermore, the insulating layers 514 and 515 are connected to the OS transistor 501 It can also be considered a component of the OS transistor 501, insulating layer 512, insulating layer 5 13. Oxide semiconductor layer 521, oxide semiconductor layer 522, oxide semiconductor layer 523, conductive layer 5 30, has a conductive layer 531, a conductive layer 541, and a conductive layer 542. Here, oxide semi The conductive layer 521, oxide semiconductor layer 522, and oxide semiconductor layer 523 are collectively referred to as oxide semiconductor This is referred to as the conductor layer 520. Note that although a structure with a back gate is shown here, A gateless structure is also acceptable. 【0135】 The insulating layer 513 has a region that functions as a gate insulating layer. The conductive layer 530 is the gate electrode ( The conductive layer 531 functions as the first gate electrode (second gate electrode). It functions as an electrode. Conductive layer 541 and conductive layer 542 are, respectively, source electrodes or It functions as a drain electrode. Note that the conductive layer 531 does not need to be provided (the same applies hereafter). 【0136】 As shown in Figures 10(B) and (C), the oxide semiconductor layer 520 is the oxide semiconductor layer 521, The region has an oxide semiconductor layer 522 and an oxide semiconductor layer 523 stacked in order. 13 covers this laminated portion. The conductive layer 531 is connected to the oxide semiconductor layer via the insulating layer 513. It overlaps with the laminated portion. Conductive layer 541 and conductive layer 542 are oxide semiconductor layer 521 and acid These are provided on a laminated film consisting of a ionized semiconductor layer 523, and these are located on the upper surface of this laminated film. It is in contact with the side surface in the channel length direction of the multilayer film. Also, in the example of Figure 10, conductive layer 541 542 is also in contact with the insulating layer 512. The oxide semiconductor layer 523 is in contact with the oxide semiconductor layer 52 1. Oxide semiconductor layer 522, and conductive layer 541, formed to cover conductive layer 542. The lower surface of the oxide semiconductor layer 523 is in contact with the upper surface of the oxide semiconductor layer 522. 【0137】 In the oxide semiconductor layer 520, the oxide semiconductor layers 521 to 52 are separated via the insulating layer 513. A conductive layer 530 is formed so as to surround the channel width direction of the stacked portion 3 (Figure 1). See 0(C). Therefore, in addition to the gate electric field from the vertical direction, this stacked portion is also affected by the side A gate electric field is also applied from that direction. In the OS transistor 501, the gate electric field is This refers to the electric field formed by the voltage applied to the conductive layer 531 (gate electrode layer). Therefore, the gate electric field electrically charges the entire stacked portion of the oxide semiconductor layers 521 to 523. Because it can surround the oxide semiconductor layer 522, a channel is formed throughout the entire bulk of the oxide semiconductor layer 522. This may occur. Therefore, the OS transistor 501 has high on-current characteristics. It is possible. 【0138】 In this specification, a gate electric field can electrically surround a semiconductor in this manner. The structure of the transistor is called a "surrounded channel (s-channel)". This is called a structure. The OS transistor 501 has an s-channel structure. In a NEL structure, a large current can flow between the source and drain of the transistor, and conduction is possible. The drain current (on-current) in this state can be increased. 【0139】 By making the OS transistor 501 an s-channel structure, the oxide semiconductor layer 522 The channel formation region can be easily controlled by the gate electric field on the side surface. Conductive layer 530 It extends below the oxide semiconductor layer 522 and faces the side surface of the oxide semiconductor layer 521. In terms of construction, it offers superior controllability, which is desirable. As a result, the subthread of the OS transistor 501 This reduces the S-value (also known as the S-value) and suppresses short-channel effects. It can be controlled. Therefore, it is a structure suitable for miniaturization. 【0140】 As shown in Figure 10, the OS transistor is a three-dimensional device structure, as shown in the OS transistor 501. By using this method, the channel length can be reduced to less than 100 nm. OS transistor Miniaturization allows for a reduction in circuit area. The channel length of the OS transistor is 65n. It is preferable that the value be less than m, and more preferably 30 nm or less, or 20 nm or less. 【0141】 A conductor that functions as the gate of a transistor is used as the gate electrode, and the source of the transistor is used as the source. The functional conductor is the source electrode, and the conductor that functions as the drain of the transistor is the drain. The electrode, the region that functions as the source of the transistor, and the transistor's drain. The region that functions as a gate is called the drain region. In this specification, the gate is referred to as the gate, and the drain is referred to as the drain region. The in-electrode or drain region is referred to as the drain, and the source electrode or source region is referred to as the source. There are cases where this is the case. 【0142】 Channel length refers to, for example, the length of the semiconductor (or transistor) in a top view of a transistor. The region where the gate and the part of the semiconductor through which current flows when the gate is ON overlap, or the region where the gate overlaps. This refers to the distance between the source and drain in the region where a channel is formed. In transistors, the channel length is not necessarily the same across all regions. That is, The channel length of a transistor may not be fixed to a single value. Therefore, this specification... In the book, the channel length is any one value, the maximum value, in the region where the channel is formed. Use the minimum or average value. 【0143】 Channel width refers to, for example, the channel width of a semiconductor (or transistor) when it is in the ON state. In the region where the current flows and the gate overlap, or in the region where the channel is formed This refers to the length of the part where the source and drain face each other. In this case, the channel width is not necessarily the same value in all regions. That is, one channel The channel width of a zista may not be fixed to a single value. Therefore, in this specification, The channel width is any one value, maximum value, minimum value, or This will be the average value. 【0144】 Furthermore, depending on the transistor structure, the channel may actually be formed in the region where the channel is formed. The channel width (hereinafter referred to as the effective channel width) and the top view of the transistor The channel width (hereinafter referred to as the apparent channel width) may differ from the actual channel width. For example, In transistors with a three-dimensional structure, the effective channel width is shown in the top view of the transistor. The apparent channel width shown in [the relevant section] becomes larger, and its effect can no longer be ignored. There are cases where this occurs. For example, in transistors with a fine and three-dimensional structure, the sides of the semiconductor In some cases, the proportion of the formed channel region may be large. In such cases, it is shown in the top view. The effective channel width in which the channel is actually formed is greater than the apparent channel width. The side becomes larger. 【0145】 In this specification, when simply referred to as "channel width," it may refer to the apparent channel width. Yes. Or, in this specification, when simply referred to as channel width, it means effective channel width. This may refer to channel length, channel width, effective channel width, and apparent channel width. Channel width, enclosed channel width, etc., are determined by acquiring cross-sectional TEM images and analyzing those images. The value can be determined by doing so. 【0146】 <Configuration Example 2> The OS transistor 502 shown in Figure 11 is a modified version of the OS transistor 501. Figure 1(A) is a top view of OS transistor 502. Figure 11(B) is a cross section along the line y1-y2. Figure 11(C) is a cross-sectional view along the line x1-x2, and Figure 11(D) is a cross-sectional view along the line x3-x4. This is a cross-sectional view. Note that in order to clarify the device structure, some of the components are shown in Figure 11(A). The basic form is omitted. 【0147】 The OS transistor 502 shown in Figure 11, like the OS transistor 501, also uses s-cha It has an nnel structure. The shape of conductive layer 541 and conductive layer 542 is that of OS transistor 501 This is different. The conductive layers 541 and 542 of the OS transistor 502 are made of oxide semiconductor material. From a hard mask used to form a multilayer film of layer 521 and oxide semiconductor layer 522 It is manufactured. Therefore, conductive layer 541 and conductive layer 542 are oxide semiconductor layer 521 And it is not in contact with the side surface of the oxide semiconductor layer 522 (Figure 11(D)). 【0148】 The oxide semiconductor layers 521 and 522 and the conductive layers 541 and 542 are fabricated through the following process. This is possible. Two oxide semiconductor films constituting oxide semiconductor layers 521 and 522 are formed. To do this, a single-layer or multi-layer conductive film is formed on an oxide semiconductor film. This conductive film is then etched. A hard mask is formed by shaping. Using this hard mask, two layers of oxide semiconductor film are created. The oxide semiconductor layer 521 and the oxide semiconductor layer 522 are then mixed to form a laminated film. Then, the hard mask is etched to form conductive layer 541 and conductive layer 542. 【0149】 <Configuration Examples 3 and 4> The OS transistor 503 shown in Figure 12 is a modified version of the OS transistor 501, and Figure 1 The OS transistor 504 shown in 3 is a modified version of the OS transistor 502. In transistors 503 and 504, the conductive layer 530 is used as a mask, and acid The oxide semiconductor layer 523 and the insulating layer 513 are etched. The edges of the body layer 532 and the insulating layer 513 will be approximately coincident with the edges of the conductive layer 530. 【0150】 <Configuration Examples 5, 6> The OS transistor 505 shown in Figure 14 is a modified version of the OS transistor 501, and Figure 1 The OS transistor 506 shown in 5 is a modified version of the OS transistor 502. Transistor 505 and OS transistor 506 are connected to an oxide semiconductor layer 523 and a conductive layer, respectively. There is a layer 551 between the electrolytic layers 541, and a layer 552 between the oxide semiconductor layer 523 and the conductive layer 542. It has. 【0151】 Layers 551 and 552 are, for example, transparent conductors, oxide semiconductors, nitride semiconductors, or oxidized nitrides. It can be formed with layers made of a monocrystalline semiconductor. Layers 551 and 552 are n-type oxide semiconductor layers. It can be formed with, or with a conductive layer having higher resistance than conductive layers 541 and 542. It is possible to use indium, tin, and oxygen as layers 551 and 552. Layers containing indium and zinc, layers containing indium, tungsten and zinc , a layer containing tin and zinc, a layer containing zinc and gallium, a layer containing zinc and aluminum A layer containing zinc and fluorine, a layer containing zinc and boron, and a layer containing tin and antimony You can use layers containing tin and fluorine, or layers containing titanium and niobium, etc. The layers illustrated are hydrogen, carbon, nitrogen, silicon, germanium, or argon. It may contain one or more elements. 【0152】 Layers 551 and 552 may have the property of transmitting visible light. Alternatively, layer 551, 552 transmits visible light, ultraviolet light, infrared light, or X-rays by reflecting or absorbing them. It is acceptable for it to have the property of preventing transients caused by stray light. In some cases, it is possible to suppress fluctuations in the electrical characteristics of the sta. 【0153】 Furthermore, layers 551 and 552 do not form a Schottky barrier between themselves and the oxide semiconductor layer 532. It is preferable to use a layer. This improves the on-characteristics of OS transistors 505 and 506. It can improve. 【0154】 Layers 551 and 552 are to be layers with higher resistance than conductors 516a and 516b. This is preferable. Also, layers 551 and 552 have lower resistance than the channel resistance of the transistor. It is preferable to do so. For example, the resistivity of layers 551 and 552 should be 0.1 Ωcm or more and 100 Ωc. If the resistance is less than or equal to m, between 0.5 Ωcm and 50 Ωcm, or between 1 Ωcm and 10 Ωcm Good. By setting the resistivity of layers 551 and 552 within the above range, the channel and drain and This can alleviate electric field concentration at the boundary. Therefore, the electrical characteristics of the transistor This can reduce fluctuations. In addition, punch-through caused by the electric field generated from the drain can be reduced. The current can be reduced. Therefore, even in transistors with short channel lengths, saturation The sum characteristics can be improved. Note that this is a circuit configuration where the source and drain are not swapped. In that case, it is better to place only one of layers 551 or 552 (for example, on the drain side). It may be preferable in some cases. 【0155】 <Configuration Example 7> In Figures 10 to 15, a conductive layer 530 functions as the first gate electrode, and a second gate electrode... The conductive layer 531, which functions as a electrode, may be connected. For example, as shown in Figure 10. Figure 16 shows a configuration in which conductive layer 530 and conductive layer 531 are connected. 【0156】 As shown in Figure 16(C), an opening is provided in the insulating layer 512 and the insulating layer 513, and the opening A conductive layer 560 is provided in this part. The conductive layer 530 is connected to the conductive layer 560. It is connected to the conductive layer 531. This connects to the first gate of the OS transistor 501. The pole and the second gate electrode can be connected. The same applies to Figures 11 to 15. A configuration in which a first gate electrode and a second gate electrode are connected can be applied. 【0157】 The components of OS transistors 501 to 506 will be described below. 【0158】 <Oxide semiconductor layer> Typical semiconductor materials for oxide semiconductor layers 521 to 523 include In-Ga oxide. In-Zn oxide, In-M-Zn oxide (where M is Ga, Sn, Y, Zr, La, Ce) There are also (or Nd). In addition, the oxide semiconductor layers 521 to 523 contain an acid containing indium. The oxide semiconductor layers are not limited to oxide layers. For example, the oxide semiconductor layers 521 to 523 may be Zn-Sn oxide. It can be formed from layers, Ga-Sn layers, Zn-Mg oxide, etc. Also, oxide semiconductor layers 522 is preferably formed from In-M-Zn oxide. 1. Each oxide semiconductor layer 523 can be formed from Ga oxide. 【0159】 In-M-Zn oxide, formed by sputtering oxide semiconductor layers 521 to 523. The case of forming a film will be explained. In-M is used for forming the oxide semiconductor layer 522. - The atomic ratio of metal elements in the target for Zn oxide film deposition is In:M:Zn=x1:y1 Let :z1 be the target used in forming the oxide semiconductor layer 521 and the oxide semiconductor layer 523. Let the atomic ratio of the metal elements be In:M:Zn = x²:y²:z². 【0160】 For the formation of the oxide semiconductor layer 522, x1 / y1 must be between 1 / 3 and 6, and moreover, between 1 and 6. The following conditions apply, where z1 / y1 is between 1 / 3 and 6, and furthermore, between 1 and 6 in In-MZ It is preferable to use a polycrystalline target of n oxide. z1 / y1 should be between 1 and 6. This facilitates the formation of the CAAC-OS film. The atomic ratio of the target metal elements Table examples are In:M:Zn=1:1:1, In:M:Zn=1:1:1.2, In:M:Z n=2:1:1.5, In:M:Zn=2:1:2.3, In:M:Zn=2:1:3, Examples include In:M:Zn=3:1:2 and In:M:Zn=4:2:4.1. Note that CAA C-OS refers to an oxide semiconductor having a crystalline portion oriented along the c axis, and regarding this... This will be discussed later. It is preferable that the CAAC-OS film does not contain a spinel-type crystal structure. This improves the electrical characteristics and reliability of transistors using CAAC-OS films. It is possible. 【0161】 The target used for forming oxide semiconductor layers 521 and 523 is x2 / y2 <x1 / y It is preferable that z² / y² is between 1 / 3 and 6, and moreover, between 1 and 6. By setting z2 / y2 to between 1 and 6, the CAAC-OS film is more easily formed. Typical examples of atomic ratios of target metal elements are In:M:Zn = 1:3:2, In:M :Zn=1:3:4, In:M:Zn=1:3:6, In:M:Zn=1:3:8, In :M:Zn=1:4:4, In:M:Zn=1:4:5, In:M:Zn=1:4:6, In:M:Zn=1:4:7, In:M:Zn=1:4:8, In:M:Zn=1:5: 5, In:M:Zn=1:5:6, In:M:Zn=1:5:7, In:M:Zn=1: Examples include 5:8 and In:M:Zn=1:6:8. 【0162】 The atomic ratios of the In-M-Zn oxide films are each within the plus or minus range of the above atomic ratios, with an error margin. Includes a 40% variation in eggplant. For example, an oxide target with In:M:Zn = 4:2:4.1. The atomic ratio of metal elements contained in an oxide semiconductor film deposited using this method is approximately In:M: The ratio of Zn is 4:2:3. 【0163】 [Energy band] Next, the acid is formed by stacking oxide semiconductor layers 521 to 523. The function and effects of the ionized semiconductor layer 520 are shown in the energy bands in Figure 17(B). This will be explained using a structural diagram. Figure 17(A) shows the channel region of OS transistor 502. This is an enlarged view, a partial enlargement of Figure 11(B). In Figure 17(B), as in Figure 17(A) Energy of the region indicated by the dotted line z1-z2 (channel formation region of OS transistor 502) —This shows the band structure. The following explanation will use OS transistor 502 as an example, but OS transistor The same applies to Ta501, 503 through 506. 【0164】 In Figure 17(B), Ec512, Ec521, Ec522, Ec523, and Ec513 are... Each of them is an insulating layer 512, an oxide semiconductor layer 521, an oxide semiconductor layer 522, and an oxide semiconductor layer 523 shows the energy at the lower end of the conduction band of the insulating layer 513. 【0165】 Here, the difference between the energy of the vacuum level and the energy of the lower end of the conduction band (also called "electron affinity") is true The difference between the energy of the empty level and the energy of the upper end of the valence band (also called the ionization potential) This is the value after subtracting the energy gap. Note that the energy gap is measured using a spectroscopic ellipsometer. Measurement can be performed using the HORIBA JOBIN YVON UT-300. The energy difference between the vacant level and the top of the valence band can be determined by ultraviolet photoelectron spectroscopy (UPS). iolet Photoelectron Spectroscopy (PHI Corporation) It can be measured using VersaProbe. 【0166】 Furthermore, using a sputtering target with an atomic ratio of In:Ga:Zn=1:3:2, the shape The resulting In-Ga-Zn oxide has an energy gap of approximately 3.5 eV and an electron affinity of approximately 4 It is 0.5eV. Also, a sputtering turret with an atomic ratio of In:Ga:Zn=1:3:4 The energy gap of the In-Ga-Zn oxide formed using GET is approximately 3.4 eV. The electron affinity is approximately 4.5 eV. Also, the atomic ratio is In:Ga:Zn = 1:3:6. Energy gap of In-Ga-Zn oxide formed using a puttering target The electron affinity is approximately 3.3 eV, and the electron affinity is approximately 4.5 eV. Furthermore, the atomic ratio is In:Ga:Zn In-Ga-Zn oxide formed using a sputtering target with a ratio of 1:6:2 The energy gap is approximately 3.9 eV, and the electron affinity is approximately 4.3 eV. Also, the atomic ratio is In-Ga formed using a sputtering target with an In:Ga:Zn ratio of 1:6:8 - The energy gap of Zn oxide is approximately 3.5 eV, and its electron affinity is approximately 4.4 eV. Furthermore, using a sputtering target with an atomic ratio of In:Ga:Zn=1:6:10 The energy gap of the formed In-Ga-Zn oxide is approximately 3.5 eV, and the electron affinity is approximately It is 4.5 eV. Also, the sputtering machine has an atomic ratio of In:Ga:Zn=1:1:1. The energy gap of the In-Ga-Zn oxide formed using -get is approximately 3.2 eV. The electron affinity is approximately 4.7 eV. Also, the atomic ratio is In:Ga:Zn = 3:1:2. Energy gap of In-Ga-Zn oxide formed using a sputtering target The voltage is approximately 2.8 eV, and the electron affinity is approximately 5.0 eV. 【0167】 Since insulating layer 512 and insulating layer 513 are insulators, Ec513 and Ec512 are equal to Ec52 1. Closer to the vacuum level than Ec522 and Ec523 (lower electron affinity). 【0168】 Furthermore, Ec521 is closer to the vacuum level than Ec522. Specifically, Ec521 is E 0.05eV or more, 0.07eV or more, 0.1eV or more, or 0.15eV or more than c522 Above V, and below 2eV, 1eV, 0.5eV, or 0.4eV in vacuum levels. Closer is preferable. 【0169】 Furthermore, Ec523 is closer to the vacuum level than Ec522. Specifically, Ec523 is E 0.05eV or more, 0.07eV or more, 0.1eV or more, or 0.15eV or more than c522 Above V and below, and below 2eV, 1eV, 0.5eV, or 0.4eV in vacuum levels. Closer is preferable. 【0170】 Furthermore, near the interface between the oxide semiconductor layer 521 and the oxide semiconductor layer 522, and the oxide semiconductor Near the interface between the body layer 522 and the oxide semiconductor layer 523, a mixed region is formed, therefore, conduction The energy at the lower end of the band changes continuously. That is, no levels exist at these interfaces. There's hardly any squid. 【0171】 Therefore, in the laminated structure having the energy band structure, electrons are in the oxide semiconductor layer 5 22 will be the main component to move. Therefore, the oxide semiconductor layer 521 and the insulating layer 512 Assuming that an energy level exists at the interface, or at the interface between the oxide semiconductor layer 523 and the insulating layer 513 However, this level has almost no effect on electron movement. Also, the oxide semiconductor layer 521 and the oxide Interface with semiconductor layer 522, and interface between oxide semiconductor layer 523 and oxide semiconductor layer 522 Because there are no or very few energy levels in that region, electron movement is inhibited. There is none. Therefore, the OS transistor 502 having the above oxide semiconductor stacked structure is high It can have field-effect mobility. 【0172】 Furthermore, as shown in Figure 17(B), the interface between the oxide semiconductor layer 521 and the insulating layer 512, and Near the interface between the oxide semiconductor layer 523 and the insulating layer 513, traps caused by impurities and defects are present. Although the level Et502 may be formed, oxide semiconductor layer 521 and oxide semiconductor layer 5 The presence of 23 allows the oxide semiconductor layer 522 to be kept away from the trap level. Cut. 【0173】 OS transistor 502 is located on the upper and side surfaces of oxide semiconductor layer 522 in the channel width direction. The surface is in contact with the oxide semiconductor layer 523, and the lower surface of the oxide semiconductor layer 522 is the oxide semiconductor layer 521 It is formed in contact with (see Figure 11(C)). In this way, the oxide semiconductor layer 522 is acid By using a configuration in which the layer is covered with an oxide semiconductor layer 521 and an oxide semiconductor layer 523, the above trap level The impact can be further reduced. 【0174】 However, if the energy difference between Ec521 or Ec523 and Ec522 is small, the acid Electrons in the ionized semiconductor layer 522 may exceed the energy difference and reach the trap level. When electrons are trapped in the trap level, a negative fixed charge is generated at the interface of the insulating film, The threshold voltage of the transistor shifts in the positive direction. 【0175】 Therefore, the energy difference between Ec521 and Ec523 and Ec522 is set to 0. If set to 0.1eV or higher, preferably 0.15eV or higher, the threshold voltage of the transistor changes. This is preferable because it reduces vibration and improves the electrical characteristics of the transistor. . 【0176】 Furthermore, the band gaps of oxide semiconductor layer 521 and oxide semiconductor layer 523 are oxide It is preferable that the band gap is wider than that of semiconductor layer 522. 【0177】 The oxide semiconductor layer 521 and the oxide semiconductor layer 523 contain, for example, (Ga, Y, Zr, L A material containing a, Ce, or Nd in a higher atomic ratio than the oxide semiconductor layer 522 is used. This can be done. Specifically, the ratio of atoms can be increased by 1.5 times or more, preferably by 2 times or more, and even more preferably The ratio should be three times or more. Because the aforementioned elements bond strongly with oxygen, oxygen deficiency occurs in oxide semiconductors. It has a function to suppress the occurrence of this in the body. That is, the oxide semiconductor layer 521 and the oxide The semiconductor layer 523 is less prone to oxygen vacancies than the oxide semiconductor layer 522. ru. 【0178】 Oxide semiconductor layer 521, oxide semiconductor layer 522, and oxide semiconductor layer 523 are at least Contains dium, zinc, and M (where M is Ga, Sn, Y, Zr, La, Ce, or Nd). If it is an In-M-Zn oxide, the oxide semiconductor layer 521 is In:M:Zn=x1:y 1:z1 [atomic ratio], oxide semiconductor layer 522 is In:M:Zn=x2:y2:z2 [atomic ratio] [atomic ratio], the oxide semiconductor layer 523 is In:M:Zn=x3:y3:z3 [atomic ratio] In this case, it is preferable that y1 / x1 and y3 / x3 become larger than y2 / x2. / x1 and y3 / x3 are 1.5 times or more than y2 / x2, preferably 2 times or more, and further Preferably, it should be 3 times or more. In this case, in the oxide semiconductor layer 522, y2 is x2 or more. This allows the electrical characteristics of the transistor to be stabilized. However, y2 is three times x2. At this point, the field-effect mobility of the transistor decreases, so y2 is three times x2. It is preferable that it be less than [a certain value]. 【0179】 In-M-Zn oxide films that satisfy these conditions satisfy the atomic ratio of the metal elements described above. It can be formed by using an In-M-Zn oxide target. 【0180】 In and O in oxide semiconductor layer 521 and oxide semiconductor layer 523, excluding Zn and O. The atomic ratio of M is preferably less than 50 atomic% for In and 50 atomic% for M. Higher than that, and even more preferably, In is less than 25 atomic% and M is 75 atomic%. To make it higher than that. Also, In and M except for Zn and O in the oxide semiconductor layer 522 The atomic ratio is preferably such that In is higher than 25 atomic%, and M is 75 atomic%. Less than %, more preferably In is higher than 34 atomic%, and M is 66 atomic It should be less than a percent. 【0181】 Furthermore, at least one of the oxide semiconductor layer 521 and the oxide semiconductor layer 523 is made of indigo It may not be necessary to include the element. For example, the oxide semiconductor layer 521 and / or acid The ionized semiconductor layer 523 can be formed from a gallium oxide film. 【0182】 The thickness of oxide semiconductor layer 521 and oxide semiconductor layer 523 is between 3 nm and 100 nm. Preferably, the thickness is 3 nm or more and 50 nm or less. Also, the thickness of the oxide semiconductor layer 522 is 3 nm to 200 nm, preferably 3 nm to 100 nm, and more preferably 3 nm The nm length shall be between m and 50 nm. Furthermore, the oxide semiconductor layer 523 is the same as the oxide semiconductor layer 521. It is preferable that the oxide semiconductor layer 523 is thinner. 【0183】 Furthermore, in order to impart stable electrical characteristics to an OS transistor using an oxide semiconductor channel... This reduces the impurity concentration in oxide semiconductors, making the oxide semiconductor intrinsically or substantially intrinsically This is effective. Here, "substantially true" means that the carrier density of the oxide semiconductor is 1 × 10 17 / cm 3 It is less than 1 × 10⁻⁶ 15 / cm 3 Being less than, More preferably 1 × 10 13 / cm 3 This refers to being less than or equal to. 【0184】 Furthermore, in oxide semiconductors, hydrogen, nitrogen, carbon, silicon, and metal elements other than the main component These elements become impurities. For example, hydrogen and nitrogen contribute to the formation of donor levels, and carrier density This increases the amount of impurities. Furthermore, silicon contributes to the formation of impurity levels in oxide semiconductors. These impurity levels can act as traps, potentially degrading the electrical characteristics of the transistor. Therefore, oxide semiconductor layer 521, oxide semiconductor layer 522 and oxide semiconductor layer 523 It is preferable to reduce the impurity concentration within the layers and at each interface. 【0185】 To make an oxide semiconductor intrinsically or substantially intrinsically, SIMS analysis is performed, for example, , at a certain depth in the oxide semiconductor, or in a certain region of the oxide semiconductor, silico The concentration of [substance] is 1×10 19 atoms / cm 3 less than, preferably 5×10 18 atoms / c m 3 less than, more preferably 1×10 18 atoms / cm 3 and is set to be less. Also, the hydrogen concentration is, for example, at a certain depth of the oxide semiconductor or in a certain region of the oxide semiconductor, 2×10 atoms / cm 20 atoms / cm 3 or less, preferably 5×10 19 atoms / cm 3 or less, more preferably 1×10 19 atoms / cm 3 or less, even more preferably 5×1 0 18 atoms / cm 3 and is set to be less. Also, the nitrogen concentration is, for example, at a certain depth of the oxide semiconductor or in a certain region of the oxide semiconductor, 5×10 atoms / c 19 atoms / c m 3 less than, preferably 5×10 18 atoms / cm 3 or less, more preferably 1×10 1 8 atoms / cm[[ID=5​​​​​​​​​​​​​​​​​​​​Less than 5 × 10 18 Atom s / cm 3 Less than 1 × 10 18 atoms / cm 3 There is a portion that is less than It is sufficient if it is done. Also, for example, at a certain depth in an oxide semiconductor, or in an oxide semiconductor In a certain region of the body, the carbon concentration is 1 × 10⁻⁶ 19 atoms / cm 3 Less than 5 ×10 18 atoms / cm 3 Less than 1 × 10 18 atoms / cm 3 It is sufficient to have a portion that is less than [a certain value]. 【0187】 Furthermore, as mentioned above, a transistor using a highly purified oxide semiconductor in the channel formation region The off-current of the device is extremely small. For example, if the voltage between the source and drain is 0.1V, 5V Alternatively, if the voltage is set to approximately 10V, the off-current normalized by the transistor's channel width is It becomes possible to reduce the level from several yA / μm to several zA / μm. 【0188】 [Off-current] In this specification, unless otherwise specified, off-current refers to the current when the transistor is off This refers to the drain current when the device is in an off state (also called a non-conductive state or interrupted state). Unless otherwise specified, in an n-channel transistor, the voltage between the gate and source is... When Vgs is lower than the threshold voltage Vth, in a p-channel transistor, the gate and This refers to a state where the voltage Vgs between sources is higher than the threshold voltage Vth. For example, n channels The off-current of a type 1 transistor is the voltage Vgs between the gate and source, compared to the threshold voltage V. Sometimes, this refers to the drain current when it is lower than th. 【0189】 The off-current of a transistor may depend on Vgs. Therefore, the off-current of the transistor The statement that the current is less than or equal to I means that there exists a value of Vgs such that the transistor's off-current is less than or equal to I. It is sometimes said that the off-current of a transistor is the off-state at a given Vgs. An off state is obtained at a Vgs within a predetermined range, or a sufficiently reduced off current is obtained. This can sometimes refer to the off-current in the off state of Vgs, etc. 【0190】 As an example, consider a drain with a threshold voltage Vth of 0.5V and Vgs of 0.5V. Current is 1 × 10 -9 A is such that the drain current at Vgs = 0.1V is 1 × 10⁻¹⁰ -13 A is such that the drain current at Vgs = -0.5V is 1 × 10⁻¹⁰ -19 A and Vgs The drain current at -0.8V is 1 × 10⁻⁶ -22 n-channel transistor such that A Let's assume a transistor. The drain current of this transistor is, when Vgs is -0.5V, Alternatively, in the range of Vgs from -0.5V to -0.8V, 1 × 10 -19 A or less Therefore, the off-current of the transistor is 1 × 10⁻⁶. -19 There are cases where it is said to be less than or equal to A. The drain current of the transistor is 1 × 10⁻⁶ -22 Because there exists a Vgs that is less than or equal to A. The off-current of the transistor is 1 × 10⁻⁶ -22 Sometimes it is said that it is less than or equal to A. 【0191】 In this specification, the off-current of a transistor having a channel width W is given by a value per channel width W. It is sometimes expressed in terms of the current flowing. Also, the current flowing per a given channel width (e.g., 1 μm) It may be expressed as a current value. In the latter case, the unit of the off-current is a single unit with the dimension of current / length. It may sometimes be expressed in units (for example, A / μm). 【0192】 The off-current of a transistor may be temperature-dependent. In this specification, the off-current is Unless otherwise specified, the power is turned off at room temperature, 60°C, 85°C, 95°C, or 125°C. It may represent current. Alternatively, the reliability of the semiconductor device containing the transistor is guaranteed. The temperature at which the transistor is used, or the temperature at which the semiconductor device containing the transistor is used (for example) In some cases, it may represent the off-current at any one temperature between 5°C and 35°C. The off-current of the zista is less than or equal to I, meaning that at room temperature, 60°C, 85°C, 95°C, 125°C, etc. The temperature at which the reliability of the semiconductor device containing the transistor is guaranteed, or the transistor The temperature at which semiconductor devices containing stas are used (for example, any one of 5°C to 35°C) This indicates that there exists a value of Vgs such that the transistor's off-current at a given temperature is less than or equal to I. There may be cases where this is the case. 【0193】 The off-current of a transistor may depend on the voltage Vds between the drain and source. In this specification, unless otherwise specified, the off-current is defined as Vds of 0.1V, 0.8V, 1 V, 1.2V, 1.8V, 2.5V, 3V, 3.3V, 10V, 12V, 16V, or This may represent the off-current at 20V. Alternatively, it may refer to the semiconductor containing the transistor. Vds that guarantees the reliability of the device, or semiconductor device containing the transistor. It can sometimes represent the off-current at Vds used in a transistor. The current is less than or equal to I, meaning that Vds is 0.1V, 0.8V, 1V, 1.2V, 1.8V, 2V. 0.5V, 3V, 3.3V, 10V, 12V, 16V, 20V, the transistor in question is included. The reliability of the semiconductor device is guaranteed by Vds, or the semiconductor containing the transistor. In devices and other equipment, the off-current of the transistor at Vds is less than or equal to I at Vg. This can sometimes refer to the existence of a value for s. 【0194】 In the above explanation of off-current, you may substitute "drain" for "source." That is, off-current This can also refer to the current flowing through the source when the transistor is in the off state. 【0195】 In this specification, the term "leakage current" may be used interchangeably with "off current." 【0196】 In this specification, off-current refers to, for example, the current when a transistor is in the off state. It can sometimes refer to the current flowing between the valve and the drain. 【0197】 [Crystal structure of oxide semiconductor film] Below is the oxide semiconductor film constituting the oxide semiconductor layer 520. The structure of the crystal is described below. In this case, it is represented as a hexagonal crystal system. 【0198】 Oxide semiconductor films are broadly classified into non-single-crystal oxide semiconductor films and single-crystal oxide semiconductor films. A single-crystal oxide semiconductor film is a CAAC-OS (C Axis Aligned Crystals Polycrystalline oxide semiconductor film This refers to microcrystalline oxide semiconductor films, amorphous oxide semiconductor films, etc. 【0199】 <CAAC-OS film> CAAC-OS film is an oxide semi-crystalline film having multiple c-axis oriented crystalline portions. It is a type of conductive film. 【0200】 Transmission Electron Microscope (TEM) A composite analysis image of the bright-field image and diffraction pattern of the CAAC-OS film is obtained using a scope. Also known as a high-resolution TEM image, multiple crystalline regions can be identified by observing it. On the other hand, high-resolution TEM images clearly show the boundaries between crystalline parts, i.e., grain boundaries. Also called boundary.) It is not possible to confirm. Therefore, the CAAC-OS membrane is This means that a decrease in electron mobility due to grain boundaries is less likely to occur. 【0201】 When observing a high-resolution TEM image of the cross-section of the CAAC-OS film from a direction approximately parallel to the sample surface, In the crystalline region, it can be confirmed that the metal atoms are arranged in layers. Each layer of metal atoms is: The surface (also called the film-forming surface) or the top surface of the CAAC-OS film reflects the unevenness of the surface on which the film is formed. It has a specific shape and is arranged parallel to the surface or top surface of the CAAC-OS film to be formed. 【0202】 On the other hand, a high-resolution TEM image of the planar surface of the CAAC-OS film was observed from a direction approximately perpendicular to the sample surface. This confirms that in the crystalline region, the metal atoms are arranged in a triangular or hexagonal shape. However, no regularity is observed in the arrangement of metal atoms between different crystalline regions. 【0203】 X-ray diffraction (XRD) was applied to the CAAC-OS film. When structural analysis is performed using this method, for example, a CAAC-OS film having InGaZnO4 crystals is found. In the out-of-plane analysis, the diffraction angle (2θ) shows a peak near 31°. This peak may appear. This peak is attributed to the (009) plane of the InGaZnO4 crystal. Therefore, the crystals of the CAAC-OS film have c-axis orientation, and the c-axis is approximately aligned with the surface to be formed or the upper surface. It can be confirmed that it is facing vertically. 【0204】 Out-of-plane method for CAAC-OS film containing InGaZnO4 crystals In the analysis, in addition to the peak near 31° for 2θ, a peak also appears near 36° for 2θ. There is a peak near 2θ of 36°, which indicates that a portion of the CAAC-OS film has c-axis orientation. This indicates the presence of crystals. The CAAC-OS film shows a peak around 31° at 2θ. It is preferable that the following is observed, and that 2θ does not show a peak near 36°. 【0205】 CAAC-OS films are oxide semiconductor films with low impurity concentrations. The impurities include hydrogen, carbon, These are elements other than silicon and transition metal elements, which are the main components of oxide semiconductor films. In particular, silicon Elements such as ions, which have a stronger bonding force with oxygen than the metal elements that make up oxide semiconductor films, By removing oxygen from the material semiconductor film, the atomic arrangement of the oxide semiconductor film is disrupted, reducing its crystallinity. This is a contributing factor. Also, heavy metals such as iron and nickel, argon, and carbon dioxide have atomic radii. Because of its large molecular radius, when it is contained within an oxide semiconductor film, the oxide semiconductor film This disrupts the atomic arrangement and reduces crystallinity. Furthermore, these impurities are present in oxide semiconductor films. Objects can sometimes act as carrier traps or carrier sources. 【0206】 CAAC-OS films are oxide semiconductor films with a low defect level density. For example, oxide semiconductors Oxygen deficiencies in the membrane can act as carrier traps, or capture hydrogen, thus preventing the formation of carriers. A can be a source of contamination. 【0207】 A low impurity concentration and low defect level density (few oxygen vacancies) is referred to as high-purity intrinsic or This is essentially called high-purity intrinsic. High-purity intrinsic or substantially high-purity intrinsic oxide semiconductor film Because there are fewer carrier sources, the carrier density can be kept low. Therefore, The transistor using this oxide semiconductor film exhibits an electrical characteristic in which the threshold voltage becomes negative. Also called normally-on.) It rarely becomes high-purity intrinsic or substantially high-purity. Highly intrinsic oxide semiconductor films have few carrier traps. Transistors using body membranes exhibit less variation in electrical characteristics and are highly reliable. Furthermore, the charge trapped in the carrier trap of the oxide semiconductor film requires time to be released. It can remain dormant for a long time, behaving almost like a fixed charge. Therefore, the impurity concentration Transistors using oxide semiconductor films with high defect level density have unstable electrical properties. This can happen. 【0208】 OS transistors using CAAC-OS films exhibit electrical properties under irradiation with visible and ultraviolet light. The fluctuations are small. 【0209】 <Microcrystalline oxide semiconductor film> In high-resolution TEM images, the crystalline portion of the microcrystalline oxide semiconductor film is visible. It has regions where a clear crystalline structure can be observed and regions where a clear crystalline structure cannot be observed. The crystalline portion contained in the microcrystalline oxide semiconductor film is between 1 nm and 100 nm, or 1 nm. They are often between m and 10 nm in size. In particular, between 1 nm and 10 nm, or It contains nanocrystals (nc: nanocrystal), which are microcrystalline particles between 1 nm and 3 nm in size. The oxide semiconductor film is called nc-OS (nanocrystalline oxide se It is called a microconductor film. Also, nc-OS films are used, for example, to create high-resolution TEM images. In some cases, the grain boundaries may not be clearly visible. 【0210】 nc-OS films are used in minute regions (for example, regions between 1 nm and 10 nm, especially regions larger than 1 nm). The atomic arrangement has periodicity in the region of 3 nm or less. Also, the nc-OS film is different No regularity in crystal orientation is observed between the crystalline regions. Therefore, no orientation is observed throughout the entire film. Therefore, depending on the analytical method, nc-OS films may be indistinguishable from amorphous oxide semiconductor films. There are cases where this is not possible. For example, when using X-rays with a diameter larger than that of the crystalline region on an nc-OS film, XR When structural analysis is performed using instrument D, the out-of-plane method shows that the crystal plane No peaks indicating this are detected. Also, for the nc-OS film, probes larger than the crystalline region are detected. Electron diffraction (also called limited-area electron diffraction) using an electron beam with a diameter (e.g., 50 nm or more) When this is done, a diffraction pattern resembling a halo pattern is observed. On the other hand, for nc-OS films... Nanobeam electron beams with a probe diameter close to or smaller than the size of the crystal region are used. When diffraction is performed, spots are observed. Furthermore, nanobeam electron diffraction is performed on nc-OS films. When this is done, a region of high brightness may be observed in a circular (ring-shaped) pattern. Also, When nanobeam electron diffraction is performed on an nc-OS film, multiple spots are observed within a ring-shaped region. It may be observed. 【0211】 nc-OS films are oxide semiconductor films with higher orderliness than amorphous oxide semiconductor films. Therefore, nc-OS films have a lower defect level density than amorphous oxide semiconductor films. However, In nc-OS films, no regularity is observed in the crystal orientation between different crystalline regions. Therefore, nc-O The S film has a higher defect level density compared to the CAAC-OS film. 【0212】 <Amorphous oxide semiconductor film> An amorphous oxide semiconductor film has an irregular arrangement of atoms within the film. It is an oxide semiconductor film that does not have a crystalline portion. A conductive film is one example. 【0213】 In amorphous oxide semiconductor films, crystalline regions cannot be observed in high-resolution TEM images. When structural analysis of amorphous oxide semiconductor films is performed using an XRD device, out-of-p Analysis using the Lane method did not detect any peaks indicating crystal planes. Furthermore, amorphous oxide semi-crystalline materials were found to be semi-crystalline. When electron diffraction is performed on a conductive film, a halo pattern is observed. Furthermore, amorphous oxide semiconductors... When nanobeam electron diffraction is performed on a conductive film, no spots are observed, and a halo pattern is not seen. It is observed. 【0214】 Oxide semiconductor films have a structure that exhibits physical properties between nc-OS films and amorphous oxide semiconductor films. In some cases, oxide semiconductor films having such a structure are used, particularly amorphous-like oxide semiconductor films. Body(a-like OS:amorphous-like Oxide Semicon It is called a ductor membrane. 【0215】 In a-like OS films, porosity (also called voids) is observed in high-resolution TEM images. In some cases, the crystalline portion can be clearly identified in high-resolution TEM images. It has regions and regions where the crystalline portion cannot be observed. The a-like OS film is Crystallization occurs and crystalline growth is observed even with minute electron irradiation, such as that seen by TEM. This can sometimes occur. On the other hand, with a high-quality nc-OS film, even trace amounts of electricity, such as those observed by TEM, are not detected. Crystallization due to subirradiation is hardly observed. 【0216】 The size of the crystalline portion of a-like OS films and nc-OS films is measured using high-resolution TEM imaging. This can be done using [a specific method]. For example, the crystal of InGaZnO4 has a layered structure, and In- It has two Ga-Zn-O layers between the O layers. The unit cell of the InGaZnO4 crystal is I It has three nO layers and six Ga-Zn-O layers, for a total of nine layers stacked in layers along the c-axis. It has a structure that is such that the spacing between these adjacent layers is the lattice plane of the (009) plane. It is approximately the same as the interval (also called the d value), and its value was determined to be 0.29 nm from crystal structure analysis. Therefore, focusing on the grid lines in high-resolution TEM images, the spacing between grid lines is 0. In areas between 28 nm and 0.30 nm, each lattice fringe is InGaZn This corresponds to the ab-plane of the O4 crystal. 【0217】 Oxide semiconductor films may have different film densities depending on their structure. For example, a certain oxide semiconductor film If the composition is known, it can be compared with the film density of a single-crystal oxide semiconductor film with the same composition. This allows us to estimate the structure of the oxide semiconductor film. For example, single-crystal oxide Compared to the film density of semiconductor films, the film density of a-like OS films is between 78.6% and 92.3%. It becomes full. Also, for example, the film density of an nc-OS film compared to the film density of a single-crystal oxide semiconductor film. The film density of the CAAC-OS film will be between 92.3% and less than 100%. Oxide semiconductor films with a film density of less than 78% of that of oxide semiconductor films are formed. The situation itself is difficult. 【0218】 The above will be explained using a concrete example. For example, In:Ga:Zn=1:1:1[atom In an oxide semiconductor film satisfying the [number ratio], a single crystal InGaZnO4 having a rhombohedral structure. The membrane density is 6.357 g / cm³. 3 Therefore, for example, In:Ga:Zn=1:1: In an oxide semiconductor film satisfying 1 [atomic ratio], the film density of the a-like OS film is 5. 0 g / cm 3 More than 5.9g / cm 3 It becomes less than. Also, for example, In:Ga:Zn=1: In an oxide semiconductor film satisfying a 1:1 [atomic ratio], the film density and CA of the nc-OS film are as follows: The membrane density of the AC-OS membrane is 5.9 g / cm³. 3 More than 6.3g / cm 3 It will be less than. 【0219】 Note that single-crystal oxide semiconductor films with the same composition may not exist. In that case, any proportion By combining single-crystal oxide semiconductor films with different compositions, a single-crystal acid of a desired composition can be obtained. The film density corresponding to an oxide semiconductor film can be calculated. The membrane density of body membranes is weighted against the proportion of single-crystal oxide semiconductor films with different compositions that are combined. It can be calculated using the average. However, the film density should be calculated using as few types of single-crystal oxides as possible. It is preferable to perform the calculation by combining semiconductor films. 【0220】 Furthermore, oxide semiconductor films include, for example, amorphous oxide semiconductor films, a-like OS films, and microcrystalline films. The film may be a multilayer film having two or more types of crystalline oxide semiconductor films and CAAC-OS films. 【0221】 <Circuit board> The substrate 510 is not merely a support material, but also has other devices such as transistors formed on it. A substrate may also be used. In this case, the conductive layer 530 and conductive layer 541 of the OS transistor 501 One of the conductive layers 542 may be electrically connected to the other devices mentioned above. 【0222】 <Underlayment insulation layer> The insulating layer 511 serves to prevent the diffusion of impurities from the substrate 510. Preferably, it has the role of supplying oxygen to the oxide semiconductor layer 520. Therefore, the insulating layer 512 is preferably an insulating film containing oxygen, and has a stoichiometric composition. It is more preferable that the insulating film contains a larger amount of oxygen. For example, TDS (Therma In Desorption Spectroscopy (temperature-controlled desorption gas spectroscopy) The surface temperature of the film is in the range of 100°C to 700°C, or 100°C to 500°C. The amount of oxygen molecules released is 1.0 × 10⁻⁶. 18 [molecules / cm 3 The film must be of a thickness of ] or greater. If 510 is a substrate on which other devices are formed, the insulating layer 511 will have a flat surface. For example, using the CMP (Chemical Mechanical Polishing) method. It is preferable to perform a planarization treatment. 【0223】 Insulating layers 511 and 512 are aluminum oxide, aluminum oxide nitride, and magnesium oxide. , silicon oxide, silicon nitride oxide, gallium oxide, germanium oxide, yttrium oxide Zirconium oxide, lanthanum oxide, neodymium oxide, hafnium oxide, and tantalum oxide. Insulating materials such as silicon nitride, silicon oxide nitride, aluminum oxide nitride, or These can be formed using a mixture of materials. In this specification, oxidized nitrides and It is a material with a higher oxygen content than nitrogen, and nitride oxides are materials with a higher nitrogen content than oxygen. It is an ingredient that is used in large quantities. 【0224】 < Stop gate> The conductive layer 530 is composed of copper (Cu), tungsten (W), molybdenum (Mo), and gold (Au). Aluminum (Al), manganese (Mn), titanium (Ti), tantalum (Ta), nickel Iron (Ni), chromium (Cr), lead (Pb), tin (Sn), iron (Fe), cobalt (Co) Ruthenium (Ru), iridium (Ir), strontium (Sr), platinum (Pt) Formed from a single low-resistance material, an alloy, or a compound primarily composed of these materials. It is preferable. 【0225】 Furthermore, the conductive layer 530 may be a single-layer structure or a laminated structure of two or more layers. For example, sil A single-layer structure of an aluminum film containing condensate, and a double-layer structure in which a titanium film is laminated on top of an aluminum film. A two-layer structure in which a titanium film is stacked on top of a titanium nitride film, and a tungsten film is stacked on top of a titanium nitride film. A layered two-layer structure, where a tungsten film is laminated on top of a tantalum nitride film or a tungsten nitride film. It has a two-layer structure, with a titanium film and an aluminum film laminated on top of the titanium film, and then a titanium film on top of that. A three-layer structure forming a tan film, a single-layer structure of a Cu-Mn alloy film, and a Cu film on top of a Cu-Mn alloy film. A two-layer structure in which layers are stacked, with a Cu film stacked on top of a Cu-Mn alloy film, and then a Cu-Mn There are three-layer structures, such as those with stacked alloy films. In particular, Cu-Mn alloy films have low electrical resistance, and... Because manganese oxide can be formed at the interface with the oxygen-containing insulating film, preventing the diffusion of Cu. preferable. 【0226】 Furthermore, the conductive layer 530 contains indium tin oxide and indium oxide including tungsten oxide. Indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide Indium tin oxide containing titanium oxide, indium zinc oxide, and silicon oxide are added. Furthermore, transparent conductive materials such as indium tin oxide can also be applied. A laminated structure of a light-transmitting conductive material and the above-mentioned metal element can also be used. 【0227】 Here, a transistor T, such as OS transistors 501 to 506, is a semiconductor film If there is a pair of gates with a signal A in between, one gate receives signal A, and the other gate receives signal A. A fixed potential Vb may be applied to the gate. 【0228】 Signal A is, for example, a signal used to control a conduction or non-conduction state. Signal A is, This is a digital signal that takes two types of potentials: potential V1 or potential V2 (where V1 > V2). It is also possible to set potential V1 as the high power supply potential and potential V2 as the low power supply potential. Yes. Signal A may be an analog signal. 【0229】 The fixed potential Vb is, for example, a potential used to control the threshold voltage VthA of a transistor T. The fixed potential Vb may be potential V1 or potential V2. In this case, the fixed electric It is preferable that there is no need to provide a separate potential generation circuit to generate the potential Vb. The fixed potential Vb is The potential may be different from potential V1 or potential V2. Lower the fixed potential Vb. Therefore, the threshold voltage VthA can be increased in some cases. As a result, the gate-source voltage V Reduces the drain current when gs is 0V, and reduces the leakage current of a circuit with transistor T. It may be possible to reduce it. For example, the fixed potential Vb may be lower than the low power supply potential. In some cases, increasing the potential Vb can lower the threshold voltage VthA. As a result, Improve the drain current when the gate-source voltage Vgs is VDD, and transistor T In some cases, the operating speed of a circuit having this can be improved. For example, if the fixed potential Vb is lower than the low power supply potential You can also raise the price. 【0230】 Furthermore, signal A is applied to one gate of transistor T, and signal B is applied to the other gate. It is also possible that signal B controls, for example, the conduction or non-conduction state of transistor T. This is the signal. Signal B has two types: potential V3 or potential V4 (assuming V3 > V4). It may also be a digital signal that takes an electric potential. For example, if electric potential V3 is the high power supply potential and electric potential V4 The power supply potential can be set to a low potential. Signal B may also be an analog signal. 【0231】 If both signal A and signal B are digital signals, then signal B will have the same digital value as signal A. It may also be a single signal. In this case, the on-current of transistor T is increased, and transistor T In some cases, the operating speed of a circuit having this can be improved. In this case, the potential V1 of signal A is equal to the potential of signal B The potential V3 may be different from that of signal A. Also, the potential V2 of signal A may be different from the potential V4 of signal B. It is also possible that the gate insulating film corresponding to the gate into which signal B is input is such that signal A If the gate dielectric film is thicker than the gate dielectric film corresponding to the input gate, the potential amplitude of signal B (V3-V) 4) can be made larger than the potential amplitude (V1-V2) of signal A. By doing so, The effects of signal A on the conduction or non-conduction state of transistor T, and the effects of signal B. In some cases, the effects of [this] and [that] can be considered to be of similar magnitude. 【0232】 If both signal A and signal B are digital signals, signal B will have a different digital value from signal A. It may also be a signal that possesses signals. In this case, the control of transistor T is separated by signals A and B. This can be done in various ways, and in some cases, higher functionality can be achieved. For example, if transistor T In the case of an n-channel type, if signal A is at potential V1 and signal B is at potential V3 In cases where only one is conducting, or where signal A is at potential V2 and signal B is at potential V4 If only the transistor is in a non-conductive state, a single transistor can be used to create NAND gates, NOR gates, etc. In some cases, the function can be realized. Also, signal B is for controlling the threshold voltage VthA. It may also be a signal. For example, signal B is the period when a circuit having transistor T is operating. The signal may have a different potential during the period when the circuit is not operating. Signal B is The signals may have different potentials depending on the operating mode of the circuit. In this case, signal B is The potential may not switch as frequently as in type A. 【0233】 If both signal A and signal B are analog signals, then signal B is an analog signal with the same potential as signal A. The signal, an analog signal obtained by multiplying the potential of signal A by a constant, or adding the potential of signal A by a constant. Alternatively, a subtracted analog signal may also be used. In this case, the on-current of transistor T is This can improve the operating speed of circuits with transistor T. Signal B is a signal It may be an analog signal different from signal A. In this case, the control of transistor T is controlled by signal A and This can sometimes be done separately using signal B, potentially enabling higher functionality. 【0234】 Signal A may be a digital signal and signal B may be an analog signal. Signal B may also be a digital signal. 【0235】 Furthermore, one gate of transistor T has a fixed potential Va, and the other gate has a fixed potential V. b may be given. If a fixed potential is applied to both gates of transistor T, In some cases, a zista T can function as an element equivalent to a resistor. For example, If transistor T is an n-channel type, the fixed potential Va or fixed potential Vb is set high (low By doing this, it may be possible to lower (or raise) the effective resistance of the transistor. By increasing (or decreasing) both fixed potentials Va and Vb, a gate with only one gate is created. In cases where an effective resistance lower (higher) than the effective resistance obtained by the transistor is obtained, be. 【0236】 <Gate Insulation Layer> The insulating layer 513 is formed of an insulating film with a single-layer or multi-layer structure. Aluminum oxide, magnesium oxide, silicon oxide, silicon oxide nitride, silicon oxide N, silicon nitride, gallium oxide, germanium oxide, yttrium oxide, zirconium oxide Contains one or more of the following: um, lanthanum oxide, neodymium oxide, hafnium oxide, and tantalum oxide. An insulating film can be used. Furthermore, the insulating layer 513 may be a laminate of the above materials. Oh, in the insulating layer 513, lanthanum (La), nitrogen, zirconium (Zr), etc., are added as impurities. It may also be included. Furthermore, the insulating layer 511 can be formed in the same way as the insulating layer 513. The insulating layer 513 has, for example, oxygen, nitrogen, silicon, hafnium, etc. Preferably, it contains hafnium oxide and silicon oxide or silicon oxide-nitride. 【0237】 Hafnium oxide has a higher dielectric constant compared to silicon oxide and silicon oxide nitride. Therefore Therefore, compared to the case where silicon oxide is used, the thickness of the insulating layer 513 can be increased, The leakage current due to the Nell current can be reduced. In other words, the transient with a small off-current It is possible to achieve this. Furthermore, hafnium oxide having a crystalline structure has an amorphous structure It has a higher dielectric constant compared to hafnium oxide, which has a low off-current. For use as a transistor, it is preferable to use hafnium oxide having a crystalline structure. Examples of crystal structures include monoclinic and cubic systems. However, one aspect of the present invention is... The term "sama" is not limited to these examples. 【0238】 <Source electrode, drain electrode, back electrode> The conductive layers 541, 542, and 531 are manufactured in the same manner as the conductive layer 530. This is possible. The Cu-Mn alloy film has low electrical resistance and at the interface with the oxide semiconductor layer 520. Manganese oxide is formed on the conductive layer 541, and the diffusion of Cu can be prevented, so conductive layer 5 It is preferable to use it in 42. 【0239】 <Protective insulating layer> The insulating layer 514 blocks oxygen, hydrogen, water, alkali metals, alkaline earth metals, etc. It is preferable that it has the function of being able to do so. By providing such an insulating layer 514, oxide semiconductor Diffusion of oxygen from body layer 520 to the outside, and hydrogen, water, etc. from the outside to oxide semiconductor layer 520. This prevents the intrusion of particles. For example, a nitride insulating film can be used as the insulating layer 514. This is possible. Examples of nitride insulating films include silicon nitride, silicon nitride oxide, and aluminum nitride. Examples include nium, aluminum nitride, etc. Note that oxygen, hydrogen, water, alkali metals, and alkalis are also present. Instead of nitride insulating films that have a blocking effect on earth metals, etc., use oxygen, hydrogen, water, etc. An oxide insulating film having a blocking effect may be provided. Examples of oxide insulating films having a galvanic effect include aluminum oxide, aluminum oxide nitride, and oxide Gallium, gallium oxide nitride, yttrium oxide, yttrium oxide nitride, hafniu oxide Examples include hafnium oxide nitride, etc. 【0240】 Aluminum oxide films allow both hydrogen, water, and other impurities, as well as oxygen, to pass through the film. Because it has a high barrier effect, it is preferable to apply it to the insulating layer 514. Therefore, aluminum oxide The aluminum film enhances the electrical properties of the transistor during and after the transistor fabrication process. To prevent the inclusion of impurities such as hydrogen and water, which cause fluctuations in properties, into the oxide semiconductor layer 520, and to prevent oxidation. The main component material constituting the semiconductor layer 520 is oxygen, which is prevented from being released from the oxide semiconductor and is used for insulation. Suitable for use as a protective film that has the effect of preventing unnecessary release of oxygen from layer 512. It is also possible to diffuse the oxygen contained in the aluminum oxide film into the oxide semiconductor. Cut. 【0241】 <Interlayer insulation layer> Furthermore, it is preferable that an insulating layer 515 is formed on the insulating layer 514. Insulating layer 515 This can be formed as a single-layer or multi-layer insulating film. The insulating film may contain magnesium oxide. Nesium, silicon oxide, silicon oxide nitride, silicon nitride oxide, silicon oxide, gas Yttrium, germanium oxide, yttrium oxide, zirconium oxide, lanthanum oxide, oxide An insulating film containing one or more neodymium, hafnium oxide, and tantalum oxide can be used. ru. 【0242】 <Film formation method> Methods for depositing insulating films, conductive films, semiconductor films, etc. that constitute semiconductor devices include sputtering, Plasma CVD is a typical method. Other methods, such as thermal CVD, can also be used. This is possible. For example, as a thermal CVD method, MOCVD (Metal Organic Chemical Vapor Deposition) is used. The Chemical Vapor Deposition method can be used. Alternatively, the ALD (Atomic Layer Deposition) method may be used. 【0243】 Thermal CVD is a film deposition method that does not use plasma, so defects are generated by plasma damage. It has the advantage that it does not involve any damage. Thermal CVD is performed by reducing the pressure inside the chamber to atmospheric pressure or reduced pressure. The raw material gas and oxidizer are simultaneously introduced into the chamber and reacted near or on the substrate. The film may also be formed by depositing it onto a substrate. 【0244】 Furthermore, the ALD method maintains atmospheric pressure or reduced pressure inside the chamber, and the raw material gases for the reaction are sequentially supplied. The gas can then be introduced into the chamber, and the film deposition process may be carried out by repeating this gas introduction sequence. For example, by switching between each switching valve (also called a high-speed valve), you can create two or more types. The raw material gases are supplied to the chamber in order, and the first raw material gas is supplied in order to prevent the mixing of multiple types of raw material gases. An inert gas (such as argon or nitrogen) is introduced simultaneously with or after the refrigerant gas, Introducing the raw material gas (2). Note that if an inert gas is introduced simultaneously, the inert gas should be... It becomes a carrier gas, and when introducing the second raw material gas, an inert gas may also be introduced at the same time. Also, instead of introducing an inert gas, the first raw material gas is discharged by vacuum evacuation. A second raw material gas may be introduced. The first raw material gas is adsorbed onto the surface of the substrate to form the first monoprimary gas. A sublayer is formed and reacts with a second source gas introduced later, so that the second single atomic layer is formed from the first single atomic layer. Thin films are formed by stacking on atomic layers. By controlling the order of gas introduction, the desired thickness is achieved. By repeating the process multiple times until the desired result is achieved, a thin film with excellent step coverage can be formed. The thickness can be adjusted by the number of times the gas introduction sequence is repeated, allowing for precise film thickness adjustment. It allows for rifling and is suitable for fabricating miniature FETs. 【0245】 Film deposition methods such as MOCVD and ALD are used to obtain the film deposition methods disclosed in the embodiments described above. It is possible to form conductive films and semiconductor films. For example, InGaZnO X (X>0) membrane When forming the film, trimethylindium, trimethylgallium, and dimethylzinc are used. It is used. The chemical formula for trimethylindium is (CH3)3In. The chemical formula for methylgallium is (CH3)3Ga. The chemical formula for dimethylzinc is: It is Zn(CH3)2. Furthermore, it is not limited to these combinations, but also trimethylgallium Triethylgallium (chemical formula (C2H5)3Ga) can be used instead, and dimethyl Diethylzinc (chemical formula Zn(C2H5)2) can also be used instead of zinc. 【0246】 For example, when depositing a tungsten film using an ALD-based film deposition apparatus, WF6 gas The initial tungsten film is formed by sequentially introducing S and B2H6 gas, and then WF6 A tungsten film is formed using gas and H2 gas. Note that SiH can be used instead of B2H6 gas. Four gases may also be used. 【0247】 For example, oxide semiconductor films, such as InGaZnO, can be deposited using an ALD (Advanced Laser Deposition) system. X (X >0) When forming a film, In(CH3)3 gas and O3 gas are introduced sequentially and repeatedly. An InO2 layer is formed, and then Ga(CH3)3 gas and O3 gas are introduced sequentially and repeatedly. A GaO layer is formed, and then Zn(CH3)2 gas and O3 gas are introduced sequentially and repeatedly. A ZnO layer is formed. Note that the order of these layers is not limited to this example. Also, these gases Mixing these together creates InGaO2 layers, InZnO2 layers, GaInO layers, ZnInO layers, and GaZnO layers. A mixed compound layer such as the above may be formed. Alternatively, instead of O3 gas, an inert gas such as Ar may be used. While H2O gas obtained by blending can be used, it is better to use O3 gas that does not contain H. It is preferable. Alternatively, In(C2H5)3 gas may be used instead of In(CH3)3 gas. Also, Ga(C2H5)3 gas may be used instead of Ga(CH3)3 gas. Alternatively, Zn(CH3)2 gas may be used. 【0248】 Furthermore, although this embodiment shows a top-gate type transistor structure, Not limited to these types. For example, bottom-gate transistors or planar transistors. This can be applied. 【0249】 The configuration and method shown in this embodiment may be appropriately combined with the configuration and method shown in other embodiments. It is possible. 【0250】 (Embodiment 4) This embodiment describes an example of a cross-sectional structure of a semiconductor device according to one aspect of the present invention. 【0251】 <Configuration Example 1> Figure 18 shows cross-sectional views of transistor 301, transistor 302, and resistor 303. Oh, transistor 302 corresponds to transistor 11 in Figure 1(A), and resistor 303 corresponds to Figure 1 It can be used in the resistor 12 in (A). It can also be connected to the transistor 302. Transistor 301 is a transistor that constitutes the internal circuit 14 in Figure 1(A), etc. It can be used for this purpose. Also, in Figure 18, channel formation in a single-crystal semiconductor substrate in the first layer. A transistor 301 having a region is located, and an OS transistor is located in the second layer on the first layer. The cross-sectional structure of a semiconductor device when a transistor 302 and a resistor 303 are located This is an example. 【0252】 Transistor 301 is amorphous, microcrystalline, polycrystalline, or single-crystal, made of silicon or gel. The semiconductor film or semiconductor substrate, such as manium, may have a channel-forming region. When forming transistor 301 using a thin film of Ricon, the thin film contains plasma CV Amorphous silicon, amorphous silicon produced by vapor phase growth methods such as Method D or by sputtering methods. Polycrystalline silicon and single-crystal silicon are obtained by crystallizing silicon through processes such as laser annealing. This involves using single-crystal silicon, etc., obtained by implanting hydrogen ions, etc., into a wafer and then exfoliating the surface layer. can. 【0253】 The semiconductor substrate 310 on which the transistor 301 is formed may be, for example, a silicon substrate or a germanium substrate. A silicon-germanium substrate, silicon-germanium substrate, etc., can be used. In Figure 18, a single crystal silicon This example illustrates the case where the capacitor substrate is used as the semiconductor substrate 310. 【0254】 Furthermore, transistor 301 is electrically isolated by the element isolation method. Then, the selective oxidation method (LOCOS method: Local Oxidation of Silic on method), trench isolation method (STI method: Shallow Trench Isolati method) (on), etc. can be used. In Figure 18, the trench isolation method is used for transistor 30 This illustrates the case where 1 is electrically isolated. Specifically, in Figure 18, the semiconductor substrate 310 is After forming a trench by etching or the like, an insulating material containing silicon oxide is placed in the trench. The element isolation region 311 formed by embedding in the chip separates the transistor 301 into elements. This provides an example of a situation where separation is required. 【0255】 Transistor 301 has impurity region 312a and impurity region 312b. Region 312a and impurity region 312b are the source or drain of transistor 301. It functions as such. 【0256】 An insulating film 321 is provided on the transistor 301, and an opening is formed in the insulating film 321. And in the opening, there is a conductive layer 313a connected to the impurity region 312a, A conductive layer 313b is formed, connected to the pure material region 312b. Also, conductive layer 313a It is connected to a conductive layer 322a formed on the insulating film 321, and the conductive layer 313b is an insulating film It is connected to the conductive layer 322b formed on the edge film 321. 【0257】 An insulating film 323 is provided on conductive layers 322a and 322b, and An opening is formed therein, and a conductive layer 322a is connected to the conductive layer 322a. Layer 324 is formed. Also, conductive layer 324 is formed on conductive layer 323. It is connected to 25. 【0258】 An insulating film 326 is provided on the conductive layer 325. 【0259】 Then, an OS transistor, transistor 302, is provided on the insulating film 326. It exists. Transistor 302 has an oxide semiconductor layer 341 on an insulating film 326 and an oxide semiconductor Conductive layers 343a and 343b on layer 341, oxide semiconductor layer 341, conductive layer 3 43a, an insulating film 344 on the conductive layer 343b, and an oxide semiconductor layer located on the insulating film 344. It has a conductive layer 345 having a region that overlaps with 341. Note that conductive layer 343a and conductive The electrode layer 343b functions as either the source or drain electrode of the transistor 302. The insulating film 344 functions as the gate insulating film of the transistor 302, and the conductive layer 345 It functions as the gate electrode of transistor 302. 【0260】 Furthermore, a resistive portion 303 is provided on the insulating film 326. The resistive portion 303 is provided on the insulating film 3 On 26, an oxide semiconductor layer 342, and conductive layers 343b and 3 on the oxide semiconductor layer 342. 43c, oxide semiconductor layer 342, conductive layer 343b, insulating film 344 on conductive layer 343c , has . The oxide semiconductor layer 342 functions as a resistive layer in the resistive section 303. ru. 【0261】 An insulating film 346 is provided on the insulating film 344 and the conductive layer 345. A conductive layer 352 and a conductive layer 353 are provided on 346. The conductive layer 352 is an insulating layer. The film 326, insulating film 344, and the conductive layer 325 are connected through openings provided in the insulating film 346. The conductive layer 3 is then introduced through openings provided in insulating film 344, insulating film 346, and insulating film 351. It is connected to 43c. The conductive layer 353 is provided in the insulating film 344 and insulating film 346. It is connected to the conductive layer 343a via the opening. 【0262】 Furthermore, in Figure 18, transistor 302 corresponds to one channel of one conductive layer 345. This example illustrates a single-gate structure having a region for forming a transistor. However, The 302 has multiple gate electrodes connected to each other, thus forming an oxide semiconductor layer 341 It may also be a multi-gate structure having multiple channel-forming regions. It may also have a structure that includes a t. 【0263】 As described above, transistor 301, transistor 302 and resistor 303 are connected By forming it in layers, the area of ​​the semiconductor device can be reduced. The inverter 302 and the resistor 303 may be formed by stacking them. 【0264】 Note that transistor 302 and resistor 303 are the transistor and resistor shown in Figure 7. It may be formed as shown in 101. Also, transistor 302 is shown in Figures 10 to 16. It may be formed like a transistor. 【0265】 The configuration and method shown in this embodiment may be appropriately combined with the configuration and method shown in other embodiments. It is possible. 【0266】 (Embodiment 5) In this embodiment, an example of applying the semiconductor device described in the above embodiment to an electronic component, and Examples of its application to electronic devices equipped with the said electronic component will be explained using Figures 19 and 20. I will reveal it. 【0267】 Figure 19(A) shows an example of applying the semiconductor device described in the above embodiment to an electronic component. Let me explain. Electronic components are also called semiconductor packages or IC packages. Electronic components have multiple standards and names depending on the direction of terminal extraction and the shape of the terminals. Therefore, in this embodiment, we will describe one example. 【0268】 The circuit section, which is composed of transistors as shown in the above embodiment, is assembled in the assembly process (post-processing). The circuit board is completed by combining multiple detachable components through a series of steps. 【0269】 The subsequent processes can be completed by going through the steps shown in Figure 19(A). Specifically, after the element substrate obtained in the previous process is completed (step S1), the back surface of the substrate is ground. (Step S2). By thinning the substrate at this stage, any warping of the substrate from the previous process is corrected. This is to reduce the size of the component and make it smaller. 【0270】 The back surface of the substrate is ground down to perform a dicing process, which separates the substrate into multiple chips. Then, The separated chips are picked up individually, mounted on a lead frame, and joined together. The die bonding process is performed (step S3). In this die bonding process, the tip and the lead are bonded together. Adhesion to the frame can be done using resin bonding, tape bonding, or other methods as appropriate depending on the product. Select the method. Note that the die bonding process involves mounting and joining on an interposer. That's good too. 【0271】 Next, the leads of the lead frame and the electrodes on the chip are electrically connected with a thin metal wire. Connect them and perform wire bonding (step S4). For the thin metal wires, use silver wire or gold Wires can be used. Also, wire bonding is a type of bonding that can be used with ball bonding or other methods. Edge bonding can be used. 【0272】 The wire-bonded chips are then sealed with epoxy resin or the like in a molding process. (Step S5). The molding process fills the inside of the electronic component with resin. This reduces damage to the internal circuitry and wires caused by mechanical external forces. Furthermore, it can reduce the deterioration of properties due to moisture and dust. 【0273】 Next, the leads of the lead frame are plated. Then the leads are cut and shaped. (Step S6). This plating process prevents the leads from rusting and allows them to be later mounted on a printed circuit board. This allows for more reliable soldering during the process. 【0274】 Next, the surface of the package is printed (marked) (step S7). And finally The electronic component is completed (step S9) after going through a standard inspection process (step S8). 【0275】 The electronic components described above shall have a configuration that includes the semiconductor device described in the above-described embodiment. This makes it possible to create electronic components with reduced power consumption. 【0276】 Furthermore, a schematic perspective view of the completed electronic component is shown in Figure 19(B). The electronic component 1700 on the circuit board 1704 is shown in Figure 19(C). In Figure 19(B), As an example of an electronic component, here is a schematic perspective view of a QFP (Quad Flat Package). As shown, the electronic component 1700 shown in Figures 19(B) and 19(C) has lead 170 Figure 19(B) shows circuit section 1703. The electronic component 1700 shown in Figure 19(B) is, for example, P It is mounted on a lint substrate 1702. Multiple such electronic components 1700 are combined, Each is electrically connected on the printed circuit board 1702, allowing it to be mounted inside an electronic device. This can be done. The completed circuit board 1704 is installed inside electronic equipment, etc. 【0277】 Furthermore, a semiconductor device or electronic component according to one aspect of the present invention is used in display devices, personal computers, etc. A video playback device equipped with a video player and recording medium (typically DVD: Digital Versus) It has a display capable of playing recording media such as a disc and displaying the images from them. It can be used in a device that... Electronic devices capable of doing so include mobile phones, game consoles (including portable ones), personal digital assistants, and e-books. Cameras such as terminals, video cameras, and digital still cameras, and goggle-type displays (headsets) Mounted display), navigation system, sound playback device (car audio, Digital audio players, photocopiers, fax machines, printers, and multifunction printers. Examples include automated teller machines (ATMs), vending machines, and medical equipment. A specific example of an electronic device is shown in Figure 20. 【0278】 Figure 20(A) shows a portable game console, consisting of a casing 5001, casing 5002, display unit 5003, Display unit 5004, microphone 5005, speaker 5006, operation keys 5007, stand It has illustrations 5008, etc. A semiconductor device according to one aspect of the present invention is a portable game console It can be used in various integrated circuits. Note that the portable game console shown in Figure 20(A) is two It has a display unit 5003 and a display unit 5004, but the display unit of a portable game console The number is not limited to this. 【0279】 Figure 20(B) shows a portable information terminal, consisting of a first housing 5601, a second housing 5602, and a first display unit. The present invention includes a 5603, a second display unit 5604, a connection unit 5605, an operation key 5606, etc. A semiconductor device according to one embodiment can be used in various integrated circuits of a portable information terminal. The first display unit 5603 is located in the first housing 5601, and the second display unit 5604 is located in the second housing It is located in 5602. And the first housing 5601 and the second housing 5602 are connected by a connection part They are connected by 5605, and the angle between the first housing 5601 and the second housing 5602 is, It can be changed by the connecting part 5605. The video in the first display unit 5603 is connected to the connecting part 56 The switching mechanism is determined according to the angle between the first housing 5601 and the second housing 5602 in 05. It may also be made into a single unit. In addition, at least one of the first display unit 5603 and the second display unit 5604 Alternatively, a display device with added functionality as a position input device may be used. The function as a stationary input device can be added by providing a touch panel on the display device. Alternatively, its function as a position input device is represented by a photoelectric conversion element, also known as a photosensor. It can also be added by providing it in the pixel section of the display device. 【0280】 Figure 20(C) shows a notebook personal computer, consisting of a casing 5401 and a display unit 5402. The present invention includes a keyboard 5403, a pointing device 5404, and the like. Such semiconductor devices can be used in various integrated circuits of notebook personal computers. Cut. 【0281】 Figure 20(D) shows an electric refrigerator-freezer, consisting of a casing 5301, a refrigerator door 5302, and a freezer door. It has 5303, etc. A semiconductor device according to one aspect of the present invention is an integrated electric refrigerator. It can be used in circuits. 【0282】 Figure 20(E) shows a video camera, consisting of a first housing 5801, a second housing 5802, and a display unit 58 03, includes an operation key 5804, a lens 5805, a connecting part 5806, etc. One embodiment of the present invention The semiconductor device described can be used in various integrated circuits of video cameras. Operation key 5 804 and lens 5805 are provided in the first housing 5801, and the display unit 5803 is the second It is located in the enclosure 5802. And the first enclosure 5801 and the second enclosure 5802 are connected. They are connected by a connecting part 5806, and the angle between the first housing 5801 and the second housing 5802 is The video on the display unit 5803 can be changed by the connection unit 58 A configuration that switches according to the angle between the first housing 5801 and the second housing 5802 in 06. That's also acceptable. 【0283】 Figure 20(F) is an automobile, consisting of a body 5101, wheels 5102, dashboard 5103, It has lights 5104, etc. A semiconductor device according to one aspect of the present invention is used in various integrated circuits of automobiles. It can be used for roads. 【0284】 The configuration and method shown in this embodiment may be appropriately combined with the configuration and method shown in other embodiments. It is possible. [Explanation of symbols] 【0285】 10 Semiconductor Devices 11 transistors 12 Resistor section 13 Input / output terminal 14 Internal circuit 15 Power line 16 signal lines 17 Control signal generation circuit 20 Semiconductor equipment 21 transistors 22 Resistance section 23 Input / output terminal 24 Internal circuit 25 Power line 26 signal lines 27 Control signal generation circuit 30 Semiconductor Equipment 31 transistors 33 Input / output terminal 34 Internal circuit 35 Power line 36 signal lines 37 Control signal generation circuit 40 Semiconductor Equipment 42 Resistance section 43 Input / output terminal 44 Internal circuit 45 Power line 46 signal line 50 Semiconductor Equipment 51 Transistors 52 Resistance section 53 Input / output terminal 54 Internal circuit 55 Power line 56 Signal Line 57 Control signal generation circuit 58 transistors 60 Semiconductor Devices 61 transistors 62 Resistance section 63 Input / output terminal 64 Internal circuit 65 Power line 66 signal line 67 Control signal generation circuit 68 transistors 69 Capacitive elements 70 Semiconductor Equipment 80 Semiconductor Equipment 100 transistors 101 Resistance section 110 circuit boards 112 Insulating layer 113 Insulating layer 114 Insulating layer 115 Insulating layer 120 oxide semiconductor layer 121 Oxide semiconductor layer 122 Oxide semiconductor layer 130 Conductive layer 131 Conductive layer 141 Conductive layer 142 Conductive layer 143 Conductive layer 200 Resistance section 301 Transistors 302 Transistors 303 Resistance section 310 Semiconductor substrates 311 Element Isolation Region 312a Impurity region 312b Impurity region 313a conductive layer 313b Conductive layer 321 Insulating film 322a conductive layer 322b conductive layer 323 Insulating film 324 Conductive layer 325 Conductive layer 326 Insulating film 341 Oxide semiconductor layer 342 Oxide semiconductor layer 343a conductive layer 343b Conductive layer 343c conductive layer 344 Insulating Film 345 Conductive layer 346 Insulating film 351 Insulating film 352 Conductive layer 353 Conductive layer 400 transistors 401 Resistance section 402 transistors 403 Transistors 404 Resistance section 405 Resistance section 406 Resistance section 410 Conductive layer 411 Conductive layer 412 Insulating layer 414 Oxide semiconductor layer 416 oxide semiconductor layer 418 Conductive layer 420 Conductive layer 422 Conductive layer 424 Insulating layer 428 Insulating layer 430 Conductive layer 432 Conductive layer 434 Insulating layer 435 Conductive layer 438 Insulating layer 440 Conductive layer 442 Conductive layer 444 oxide semiconductor layer 446 Insulating layer 448 Conductive layer 450 Insulating layer 501 OS Transistors 502 OS Transistors 503 OS Transistor 504 OS Transistor 505 OS Transistor 506 OS Transistors 510 circuit board 511 Insulating layer 512 Insulating layer 513 Insulating layer 514 Insulating layer 515 Insulating layer 516a Conductor 516b Conductor 520 Oxide Semiconductor Layer 521 Oxide semiconductor layer 522 Oxide semiconductor layer 523 Oxide semiconductor layer 530 Conductive layer 531 Conductive layer 532 Oxide semiconductor layer 541 Conductive layer 542 Conductive layer 551 layers 552 layers 560 Conductive layer 1700 Electronic Components 1701 Reed 1702 Printed circuit board 1703 Circuit section 1704 Circuit board 5001 enclosure 5002 enclosure 5003 Display section 5004 Display section 5005 Microphone 5006 Speaker 5007 Operation Keys 5008 Stylus 5101 Car body 5102 Wheel 5103 Dashboard 5104 Light 5301 enclosure 5302 Refrigerator door 5303 Freezer door 5401 enclosure 5402 Display section 5403 Keyboard 5404 Pointing device 5601 enclosure 5602 enclosure 5603 Display section 5604 Display section 5605 Connection part 5606 Operation Keys 5801 enclosure 5802 enclosure 5803 Display section 5804 Operation Keys 5805 Lens 5806 Connection part

Claims

[Claim 1] It comprises an oxide semiconductor layer, an insulating layer, a first conductive layer, a second conductive layer, and a third conductive layer. The first conductive layer has a region located above the oxide semiconductor layer, The second conductive layer has a region located above the oxide semiconductor layer, The oxide semiconductor layer has a first region in contact with the first conductive layer, a second region in contact with the second conductive layer, and a third region between the first region and the second region. The insulating layer has a region that is in contact with the entire lower surface of the oxide semiconductor layer. The third conductive layer is positioned below the insulating layer such that it has a region overlapping with the first region, a region overlapping with the third region, and a region overlapping with the second region. The oxide semiconductor layer has a function as a resistor. The oxide semiconductor layer does not have a channel formation region for the transistor. The semiconductor device wherein the third conductive layer does not have any region in contact with other conductive layers. [Claim 2] It comprises an oxide semiconductor layer, an insulating layer, a first conductive layer, a second conductive layer, and a third conductive layer. The first conductive layer has a region located above the oxide semiconductor layer, The second conductive layer has a region located above the oxide semiconductor layer, The oxide semiconductor layer has a first region in contact with the first conductive layer, a second region in contact with the second conductive layer, and a third region between the first region and the second region. The insulating layer has a region that is in contact with the entire lower surface of the oxide semiconductor layer. The third conductive layer is positioned below the insulating layer such that it has a region overlapping with the first region, a region overlapping with the third region, and a region overlapping with the second region. The oxide semiconductor layer has the function of a nonlinear resistor. The oxide semiconductor layer does not have a channel formation region for the transistor. The semiconductor device wherein the third conductive layer does not have any region in contact with other conductive layers.

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