Control device, control method, and program

The control device integrates dual-state purification and subspace expansion to suppress quantum errors in NISQ computers, reducing qubit overhead and enhancing error mitigation efficiency.

JP7874840B2Active Publication Date: 2026-06-17NIPPON TELEGRAPH & TELEPHONE CORP +1

Patent Information

Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
NIPPON TELEGRAPH & TELEPHONE CORP
Filing Date
2023-01-27
Publication Date
2026-06-17

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Abstract

To suppress quantum error with low overhead of the number of quantum bits.SOLUTION: A control apparatus includes: a first matrix calculation unit which calculates a first matrix on the basis of a result of first quantum measurement by a first quantum computer having a quantum circuit including a quantum state which approximates given Hamiltonian ground state and a dual quantum state corresponding to the quantum state; a second matrix calculation unit which calculates a second matrix on the basis of a result of second quantum measurement by a second quantum computer having a part of the quantum circuit included in the first quantum computer; and a density matrix calculation unit which calculates a density matrix which minimizes an expectation of the Hamiltonian by solving a generalized linear equation on the basis of the calculated first and second matrices.SELECTED DRAWING: Figure 5
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Description

[Technical Field]

[0001] This invention relates to a control device, a control method, and a program. [Background technology]

[0002] Quantum computers are a technology that performs calculations using the superposition principle of quantum mechanics, and are expected to solve problems such as prime factorization and quantum chemical calculations at high speed, so their development is progressing rapidly worldwide. In addition to the errors in classical computers where 0s and 1s are swapped, quantum bits handled by quantum computers are subject to unique errors such as shifts in the ratio of the "superposition" of 0s and 1s, or the "superposition" of 0s and 1s being lost. Therefore, methods to suppress errors that occur in quantum computers (quantum errors) are being researched. Conventionally, methods for suppressing quantum errors have been known to include methods that require information on the quantum error to be suppressed, and methods that do not require information on the quantum error.

[0003] Conventionally, there is a method called the generalized sub-space expansion method (e.g., Non-Patent Document 1) as a quantum error suppression mechanism that does not require information on quantum errors. The generalized sub-space expansion method is a generalized method that integrates quantum error suppression methods called virtual distillation (e.g., Non-Patent Documents 2, 3, etc.) and subspace expansion (e.g., Non-Patent Document 4). Virtual distillation is a quantum error suppression method that efficiently suppresses stochastic errors, while subspace expansion is a quantum error suppression method that efficiently suppresses coherent errors such as rotation errors and algorithmic errors. Here, since virtual distillation is a method that uses copies of quantum states, the generalized subspace expansion method also needs to use copies.

[0004] Furthermore, a method called dual-state purification (for example, Non-Patent Document 5) has been developed, making it possible to perform operations similar to virtual distillation without using copies. [Prior art documents] [Non-patent literature]

[0005] [Non-Patent Document 1] Yoshioka, Nobuyuki, Hideaki Hakoshima, Yuichiro Matsuzaki, Yuuki Tokunaga, Yasunari Suzuki, and Suguru Endo. "Generalized quantum subspace expansion." Physical Review Letters 129, no. 2 (2022): 020502. [Non-Patent Document 2] Koczor, Balint. "Exponential error suppression for near-term quantum devices." Physical Review X 11.3 (2021): 031057. [Non-Patent Document 3] Huggins, William J., et al. "Virtual distillation for quantum error mitigation." Physical Review X 11.4 (2021): 041036. [Non-Patent Document 4] McClean, Jarrod R., Mollie E. Kimchi-Schwartz, Jonathan Carter, and Wibe A. De Jong. "Hybrid quantum-classical hierarchy for mitigation of decoherence and determination of excited states." Physical Review A 95, no. 4 (2017): 042308. [Non-Patent Document 5] Huo, Mingxia, and Ying Li. "Dual-state purification for practical quantum error mitigation." Physical Review A 105, no. 2 (2022): 022427. [Overview of the project] [Problems that the invention aims to solve]

[0006] Conventional generalized subspace methods require two or more copies of the quantum state whose computational errors we want to suppress, which poses a significant overhead for NISQ (Noisy Intermediate-Scale Quantum) computers with insufficient qubits. Therefore, we propose a generalized subspace expansion method that applies the dual-state purification method described above.

[0007] The disclosed technology aims to achieve quantum error suppression with minimal qubit overhead. [Means for solving the problem]

[0008] The disclosed technology is a control device comprising: a first matrix calculation unit that calculates a first matrix based on the result of a first quantum measurement by a first quantum computer having a quantum circuit including a quantum state that approximates the ground state of a given Hamiltonian and a dual quantum state corresponding to the quantum state; a second matrix calculation unit that calculates a second matrix based on the result of a second quantum measurement by a second quantum computer having a part of the quantum circuit included in the first quantum computer; and a density matrix calculation unit that calculates a density matrix that minimizes the expectation value of the Hamiltonian by solving a generalized linear equation based on the calculated first matrix and the second matrix. [Effects of the Invention]

[0009] According to the disclosed technology, it is possible to suppress quantum errors with minimal overhead in terms of the number of qubits. [Brief explanation of the drawing]

[0010] [Figure 1] This figure shows an example of the system configuration of a quantum computing system. [Figure 2] This figure shows an example of the hardware configuration of the first quantum computer. [Figure 3] It is a diagram showing an example of the hardware configuration of a second quantum computer. [Figure 4] It is a diagram showing an example of the hardware configuration of a computer. [Figure 5] It is a diagram showing an example of the functional configuration of a control device. [Figure 6] It is a flowchart showing an example of the flow of quantum calculation processing.

Embodiments for Carrying Out the Invention

[0011] Hereinafter, embodiments (these embodiments) of the present invention will be described with reference to the drawings. The embodiments described below are merely examples, and the embodiments to which the present invention is applied are not limited to the following embodiments.

[0012] (Overview of These Embodiments) The quantum computing system according to these embodiments is a system that performs quantum computing with suppressed quantum errors. The method for suppressing quantum errors according to these embodiments is a dual generalized subspace expansion method that integrates and generalizes the dual state purification method and the subspace expansion method.

[0013] Specifically, when the Hamiltonian H of a quantum system is given, a procedure for suppressing the quantum error of its eigenstate will be described.

[0014] FIG. 1 is a diagram showing an example of the system configuration of a quantum computing system. The quantum computing system 1 includes a control device 10, a first quantum computer 20, and a second quantum computer 30. The control device 10 and the first quantum computer 20 are communicably connected via a communication line 40. Also, the control device 10 and the second quantum computer 30 are communicably connected via a communication line 50.

[0015] The control device 10 is a device composed of a classical computer. A classical computer is a computer that performs classical calculations using electronic circuits. Hereinafter, a classical computer will also be simply referred to as a computer.

[0016] The control device 10 receives data from the first quantum computer 20 via the communication line 40 indicating the result of the first quantum measurement. The control device 10 also receives data from the second quantum computer 30 via the communication line 50 indicating the result of the second quantum measurement.

[0017] Then, based on the results of the first and second quantum measurements, the control device 10 calculates the coefficient vector of the density matrix shown in equation (1) that minimizes the expectation value of the Hamiltonian H by solving the generalized linear equation.

[0018]

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[0020]

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[0021]

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[0022] N is a vector

[0023]

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[0024] The first quantum computer 20 and the second quantum computer 30 are devices composed of quantum computers. A quantum computer is a device that performs calculations at high speed using quantum mechanical phenomena such as superposition and quantum entanglement.

[0025] The first quantum computer 20 and the second quantum computer 30 may be implemented using separate hardware, or they may be implemented using common hardware. As will be described later, the first quantum computer 20 and the second quantum computer 30 have similar quantum circuits, with some exceptions.

[0026] The structure of the quantum circuits included in the first quantum computer 20 and the second quantum computer 30 is determined according to the results of calculations performed by the control device 10. Therefore, the method of calculation performed by the control device 10 and the hardware configurations of the first quantum computer 20 and the second quantum computer 30 will be described below.

[0027] The control device 10 processes a given Hamiltonian H using Pauli operators (and their products) P. k It is decomposed into a sum of Σ. The decomposed Hamiltonian H is H = Σ k b k P k This is the result. Here, b k It is a real number.

[0028] Furthermore, a conventional variational quantum eigensolver (VQE) is implemented in the quantum computer beforehand to obtain a state σ0 that approximates the ground state. The unitary circuit that realizes this is denoted as U0, but this circuit is generally susceptible to computational errors.

[0029] Furthermore, the control device 10 determines the quantum circuit,

[0030]

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[0031] Figure 2 shows an example of the hardware configuration of the first quantum computer. The first quantum computer 20 consists of a quantum circuit that realizes state σ0 and the calculated R k This includes quantum circuits based on and

[0032] Figure 3 shows an example of the hardware configuration of the second quantum computer. The second quantum computer 30 includes a quantum circuit that realizes state σ0.

[0033] Furthermore, the control device 10 is implemented, for example, by the hardware configuration of the computer 500 shown in Figure 4. The computer 500 shown in Figure 4 includes an input device 501, a display device 502, an external I / F 503, a communication I / F 504, a processor 505, and a memory device 506. Each of these hardware components is connected to the others via a bus 507 for communication.

[0034] The input device 501 is, for example, a keyboard, mouse, or touch panel. The display device 502 is, for example, a display. Note that the computer 500 does not necessarily have to have at least one of the input device 501 and the display device 502.

[0035] External I / F 503 is an interface to external devices such as recording media 503a. Examples of recording media 503a include CD (Compact Disc), DVD (Digital Versatile Disk), SD memory card (Secure Digital memory card), and USB (Universal Serial Bus) memory card.

[0036] The communication interface 504 is an interface for data communication with other devices, equipment, systems, etc. The processor 505 is, for example, a CPU or other type of arithmetic unit. The memory device 506 is, for example, a storage device such as an HDD, SSD, RAM (Random Access Memory), ROM (Read Only Memory), or flash memory.

[0037] By having the hardware configuration of the computer 500 shown in FIG. 4, the control device 10 can implement various processes described later. Note that the hardware configuration of the computer 500 shown in FIG. 4 is an example, and the computer 500 may have other hardware configurations. For example, the computer 500 may have a plurality of processors 505 or may have a plurality of memory devices 506.

[0038] FIG. 5 is a diagram showing an example of the functional configuration of the control device. The control device 10 includes a preparatory operation unit 11, a quantum circuit design unit 12, a first matrix calculation unit 13, a second matrix calculation unit 14, and a density matrix calculation unit 15.

[0039] The preparatory operation unit 11 performs operations that serve as preparations for designing the quantum circuits of the first quantum computer 20 and the second quantum computer 30. Specifically, the preparatory operation unit 11 decomposes the given Hamiltonian H into a sum of Pauli operators (and their products) P k .

[0040] The quantum circuit design unit 12 calculates R k based on the Pauli operator (and its product) P k . R k relates to the design of the quantum circuit included in the first quantum computer 20.

[0041] The first matrix calculation unit 13 receives data indicating the result of the first quantum measurement from the first quantum computer 20 and calculates the first matrix. Details of the method for calculating the first matrix will be described later.

[0042] The second matrix calculation unit 14 receives data indicating the result of the second quantum measurement from the second quantum computer 30 and calculates the second matrix. Details of the method for calculating the second matrix will be described later.

[0043] The density matrix calculation unit 15 calculates the density matrix by solving a generalized linear equation based on the first and second matrices that have been calculated. The calculated density matrix is ​​the density matrix shown in equation (1) that minimizes the expectation value of the Hamiltonian H.

[0044] Next, we will explain the operation of quantum computing system 1.

[0045] Figure 6 is a flowchart showing an example of the quantum computing process. Given the Hamiltonian H of the quantum system, the preparation unit 11 processes the Hamiltonian H using Pauli operators (and their products) P. k Decompose into a sum of (step S101). The decomposed Hamiltonian H is H = Σ k b k P k This is the result. Here, b k It is a real number.

[0046] Next, the quantum circuit design unit 12 designs the quantum circuit of the first quantum computer 20 based on the results of the calculations performed by the preparation calculation unit 11. Specifically, the quantum circuit design unit 12 performs the aforementioned R k Calculate R k This concerns the design of the quantum circuits for the first quantum computer 20. Furthermore, quantum measurements will be performed using the first quantum computer 20.

[0047] Next, the first matrix calculation unit 13 obtains measurement values ​​from the first quantum computer 20 and calculates the first matrix (step S103). Specifically, the first matrix calculation unit 13 calculates the quantity given by equation (2).

[0048]

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[0049] Here, σ i This is an actual quantum state obtained from a quantum circuit, and is a process that includes computational errors.

[0050]

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[0054] Also,

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[0059] However, σ0 is different from the ideal state because it is affected by calculation errors.

[0060]

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[0066] The procedure for obtaining equation (2) is as follows: Initial state

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[0070]

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[0073] Therefore, quantum computations were performed many times on the first quantum computer 20, and on the quantum circuit

[0074]

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[0076] The first matrix calculation unit 13 then obtains equation (2) for all Pk in this manner,

[0077]

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[0082] Next, the second matrix calculation unit 14 obtains measurements from the second quantum computer and calculates the second matrix (step S104). Specifically, the second matrix calculation unit 14 calculates the second matrix for all combinations of {i,j}.

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[0086] The density matrix calculation unit 15 calculates a density matrix that minimizes the expectation value of the Hamiltonian based on the calculated first and second matrices (step S105). Specifically, the density matrix calculation unit 15 calculates a generalized linear equation

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[0089] According to this embodiment, a generalized dual generalized subspace expansion method can be realized by integrating the dual state purification method and the subspace expansion method. This eliminates the need for copying quantum states and enables the suppression of quantum errors with a low qubit overhead.

[0090] (Note) The following additional information is disclosed regarding the embodiments described above. (Additional note 1) Memory and A control device comprising at least one processor connected to the memory, The aforementioned processor, Based on the results of a first quantum measurement performed by a first quantum computer having a quantum circuit that includes a quantum state approximating the ground state of a given Hamiltonian and a dual quantum state corresponding to the said quantum state, the first matrix is ​​calculated. Based on the results of the second quantum measurement performed by the second quantum computer, which has a part of the quantum circuit included in the first quantum computer, the second matrix is ​​calculated. The density matrix that minimizes the expected value of the Hamiltonian is calculated by solving the generalized linear equation based on the calculated first and second matrices. Control device. (Additional note 2) The processor further calculates values ​​related to the design of the quantum circuit included in the first quantum computer based on the Pauli operators decomposed from the Hamiltonian. The control device described in Appendix 1. (Additional note 3) The processor performs multiple measurements on the Z base and calculates the first matrix based on the probability that the last measurement in each measurement will result in the same bit sequence as the initial state. The control device described in Appendix 1. (Additional note 4) A control method performed by a computer, Based on the results of a first quantum measurement performed by a first quantum computer having a quantum circuit that includes a quantum state approximating the ground state of a given Hamiltonian and a dual quantum state corresponding to the said quantum state, the first matrix is ​​calculated. Based on the results of the second quantum measurement performed by the second quantum computer, which has a part of the quantum circuit included in the first quantum computer, the second matrix is ​​calculated. The density matrix that minimizes the expected value of the Hamiltonian is calculated by solving the generalized linear equation based on the calculated first and second matrices. Control method. (Additional note 5) A non-temporary storage medium storing a program for causing a computer to function as a component of any one of the control devices described in any one of the appendices 1 to 3.

[0091] Although this embodiment has been described above, the present invention is not limited to this specific embodiment, and various modifications and changes are possible within the scope of the gist of the invention as described in the claims. [Explanation of Symbols]

[0092] 1. Quantum Computing System 10 Control device 11 Preparation calculation section 12 Quantum Circuit Design Department 13 First matrix calculation section 14 Second matrix calculation section 15 Density matrix calculation section 20. The First Quantum Computer 30. Second Quantum Computer 40, 50 communication lines 500 Computers 501 Input device 502 Display device 503 External I / F 503a Recording medium 504 Communication I / F 505 Processor 506 Memory Device 507 Bus

Claims

1. A first matrix calculation unit calculates a first matrix based on the results of a first quantum measurement performed by a first quantum computer having a quantum circuit that includes a quantum state approximating the ground state of a given Hamiltonian and a dual quantum state corresponding to the said quantum state. A second matrix calculation unit calculates a second matrix based on the results of a second quantum measurement performed by a second quantum computer having a part of the quantum circuit included in the first quantum computer, The system comprises a density matrix calculation unit that calculates a density matrix that minimizes the expected value of the Hamiltonian by solving a generalized linear equation based on the calculated first matrix and the second matrix, Control device.

2. The first quantum computer further comprises a quantum circuit design unit that calculates values ​​related to the design of the quantum circuit included in the first quantum computer based on the Pauli operator decomposed from the Hamiltonian. The control device according to claim 1.

3. The first matrix calculation unit performs multiple measurements on the Z basis and calculates the first matrix based on the probability that the last measurement in each measurement will result in the same bit sequence as the initial state. The control device according to claim 1.

4. A control method performed by a computer, A step of calculating a first matrix based on the result of a first quantum measurement performed by a first quantum computer having a quantum circuit that includes a quantum state approximating the ground state of a given Hamiltonian and a dual quantum state corresponding to the said quantum state, The steps include calculating a second matrix based on the results of a second quantum measurement performed by a second quantum computer having a part of the quantum circuit included in the first quantum computer, The method comprises the step of calculating a density matrix that minimizes the expected value of the Hamiltonian by solving a generalized linear equation based on the calculated first matrix and the second matrix, Control method.

5. A program for causing a computer to function as a component of the control device described in any one of claims 1 to 3.