Parallel decoding for quantum error correction codes
A parallel decoding method using a classical computer system with a main thread and worker threads, employing a compressed logical inversion tracking table, addresses the challenge of real-time decoding in quantum error-corrected codes, achieving faster and lower latency without specialized hardware.
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- GOOGLE LLC
- Filing Date
- 2024-05-30
- Publication Date
- 2026-06-23
AI Technical Summary
Real-time decoding of quantum error-corrected codes is challenging due to the difficulty in meeting high throughput and low latency requirements while maintaining accuracy, particularly in systems like surface code superconducting quantum computers, which generate measurement data at a rate of about one terabit per second.
A parallel decoding method using a classical computer system with a main thread and multiple worker threads, employing a compressed logical inversion tracking table to manage node clusters in a detector graph, allowing for parallel processing of measurement data without a final adjustment step, thus reducing latency and maintaining accuracy.
The method achieves faster and lower latency decoding of quantum error-corrected codes without requiring special-purpose hardware, utilizing relatively inexpensive CPUs to improve the performance of quantum data centers.
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Abstract
Description
[Technical Field]
[0001] This specification relates to quantum computing. [Background technology]
[0002] Quantum computing offers a means to solve certain problems that cannot be solved within a reasonable timeframe using conventional classical computers. These problems include factoring very large numbers into prime numbers and searching large, unstructured datasets. Many physical systems, including ions, semiconductor spins, and superconducting circuits, are being studied for use in quantum computing. However, these systems do not function well enough to directly serve as computational qubits. For example, a single two-state physical system that could be used as a physical qubit cannot reliably encode and retain information over a useful period of time, for example, due to noise.
[0003] Quantum error correction is a technique that ensures quantum computers can reliably execute quantum algorithms despite noise affecting qubits. The decoder is a key component of the quantum error correction scheme, and its role is to identify errors faster than they can be stored in the quantum computer. The decoder takes a syndrome, which is measurement data extracted from quantum parity check measurements, as input and returns an error estimate as output. Given this estimate, the impact of the error can be reversed. Decoders need to be implemented with minimal hardware resources to scale into the realm of practical applications of quantum computing. [Overview of the project]
[0004] This specification describes methods, systems, and apparatus for parallel decoding of quantum error-correcting codes.
[0005] One innovative aspect of the subject matter described herein can be implemented in a classical computer system configured to perform a decoding process on measurement data received from a quantum computing system in order to determine errors in quantum computations performed by the quantum computing system, wherein the classical computer system implements a main thread, a plurality of worker threads, and a data structure common to each of the worker threads, the data structure storing data for a dynamic system of node clusters of disjoints of the detector graph for the decoding process, each node cluster having a root node with no ascending nodes and one or more descending child nodes, the child nodes including leaf nodes with no descending nodes, or one or more descending child nodes, and the data is compressed logical flip information of the child nodes in each node cluster. The system includes information, and during the execution of the decoding process, each of the multiple worker threads, in parallel with each of the other worker threads, retrieves one or more node clusters in the detector graph from the main thread, each node cluster contains one or more detection events in the measurement data, and the decoding process is executed to modify one or more node clusters, and for each cluster modification, the worker thread is configured to update the data in the data structure corresponding to the cluster under atomic primitives.
[0006] Classical computer systems can be configured to perform specific operations or actions by installing software, firmware, hardware, or a combination thereof, on the system that causes the system to perform actions while it is running. One or more computer programs can be configured to perform specific operations or actions by containing instructions that cause the data processing device to perform actions when executed by the device.
[0007] The aforementioned and other embodiments may each optionally include one or more of the following features, either individually or in combination. In some embodiments, the data structure stores data at the root node of each node cluster that specifies one or more of the following: a node type specifier, parity of detected events in the node cluster, total size of the node cluster, boundary nodes of the node cluster, minimum time coordinates, and maximum time coordinates.
[0008] In some embodiments, the classical computing system further includes one or more memory regions outside the data structures, each memory region storing a boundary map for each node cluster.
[0009] In some embodiments, data objects in memory are stored according to conservation rules, and the data of the data object is popped out of the child node's memory according to the conservation rules before a push update adds data to the object associated with the root node.
[0010] In some embodiments, the compressed logical inversion information of the child nodes included in each node cluster is stored in the child nodes.
[0011] In some embodiments, the compressed logical inversion information of a child node includes the logical inversion parity along the decoding graph path from the child node to its parent node, and the compressed logical inversion information is used together with cluster parity information to determine the parity inversion applied to the logical observable by the fusion of two clusters.
[0012] In some embodiments, the classical computing system is further configured to recover the decoded output of the decoding process, which includes using the data in the data structure to compute the net logical inversion on the path of each node in the detector graph associated with the detected event, and compute the total parity of the net logical inversion.
[0013] In some embodiments, the decoding process includes a Union-Find or minimum weight perfect matching (MWPM) decoding process.
[0014] In some embodiments, the data structure is lock-free.
[0015] In some embodiments, the atomic primitives include compare-and-swap atomic primitives, or atomic pool allocators having a reference count.
[0016] In some embodiments, updates to the data in the data structure corresponding to each change in the cluster are packed into a single word, which optionally contains a pointer to external atomic data.
[0017] In some embodiments, during the execution of the decoding process, the main thread identifies the detected events in the measurement data, seeds a node cluster with non-zero parity in the detector graph for each detected event, places the seeded node clusters in a central list structure, and multiple worker threads are configured to retrieve each node cluster from the central list structure.
[0018] Other innovative aspects of the subject matter described herein can be implemented in a system that combines the classical computer system and the quantum computing system of the above-described aspects, wherein the classical computer system is configured to receive measurement data from the quantum computing system and to determine errors in the quantum computation performed by the quantum computing system.
[0019] Other innovative aspects of the subject matter described herein can be implemented in a manner for performing a decoding process on measurement data received from a quantum computing system in order to determine errors in quantum computations performed by the quantum computing system. The method may include instantiating a data structure common to each worker thread of a plurality of worker threads, the data structure storing data for a dynamic system of feature node clusters of a detector graph for the decoding process, each node cluster comprising a root node without ascending nodes and one or more descending child nodes, each child node comprising a leaf node without descending nodes, or one or more descending child nodes, and the data comprising compressed logical inversion information of the child nodes of each node cluster; acquiring one or more node clusters from the main thread for each worker thread of the plurality of worker threads, and in parallel with each of the other worker threads, each acquired cluster comprising one or more detection events in the measurement data; executing the decoding process on the detector graph to modify the acquired one or more node clusters, including updating the data in the data structure corresponding to the cluster under atomic primitives for each change in the cluster; and recovering the decoded output of the decoding process using the updated data in the data structure.
[0020] According to further innovative aspects of the subject matter described herein, a method is provided for determining errors in quantum computation, the method comprising: performing one or more measurements in a quantum computing system performing quantum computation to generate measurement data; receiving the measurement data from the quantum computing system in a classical computing system; and performing the method described in the preceding paragraph in the classical computing system.
[0021] Other embodiments of these aspects include corresponding computer systems, apparatuses, and computer programs recorded on one or more computer storage devices, each configured to perform the actions of the method. One or more classical computer systems can be configured to perform certain operations or actions by installing in the system software, firmware, hardware, or combinations thereof that cause the system to perform the actions during operation. One or more computer programs can be configured to perform certain operations or actions by including instructions that cause an apparatus to perform the actions when executed by a data processing apparatus.
[0022] The foregoing and other embodiments can each include one or more of the following features, either alone or in combination. In some embodiments, recovering the decoded output of the decoding process using data within the data structure includes calculating a net logical inversion on the path to each node's respective root node for each node in the detector graph associated with the detected event, and calculating the total parity of the net logical inversions.
[0023] In some embodiments, the data structure stores at the root node of each node cluster data that specifies one or more of a node type designator, the parity of detected events in the node cluster, the total size of the node cluster, the boundary nodes of the node cluster, the minimum time coordinate, and the maximum time coordinate.
[0024] In some embodiments, the compressed logical inversion information of a child node includes a parity inversion applied to a logical observable by an operator having a zero boundary that includes the child node and the parent node in the corresponding graph tree.
[0025] In some embodiments, the decoding process includes a union-find or minimum weight perfect matching decoding process.
[0026] In some embodiments, the atomic primitive includes a comparison and exchange atomic primitive, or an atomic pool allocator having a reference count.
[0027] In some embodiments, updating the data in the data structure corresponding to each change in the cluster involves packing the updates into a single word, which optionally includes a pointer to external atomic data.
[0028] In some embodiments, the method includes a main thread identifying detection events in measurement data, the main thread seeding a node cluster with non-zero parity in the detector graph for each detection event, and the main thread placing the seeded node clusters into a central list structure, with multiple worker threads retrieving and placing each node cluster from the central list structure.
[0029] The subject matter described herein can be implemented in a particular manner to achieve one or more of the following advantages:
[0030] A challenging sub-problem that arises when implementing quantum error correction is real-time decoding of quantum error-corrected codes. In real-time decoding, a classical algorithm called a decoder processes a stream of classical bits from a quantum computer and outputs predictions in real time about the logical state of the quantum algorithm executed by the quantum computer. It can be difficult for the decoder to meet the high throughput and low latency requirements of real-time decoding while maintaining sufficient accuracy. Ideally, the decoder should process the stream of classical bits fast enough to keep pace with the clock speed of the quantum computer. For example, a surface code superconducting quantum computer with one million physical qubits can generate measurement data at a rate of about one terabit per second. To prevent a data backlog that grows exponentially with the depth of the T-gates in the computation, this data needs to be processed by the decoder at least as fast as it is being generated. Furthermore, the decoder delay (the time it takes from the last measurement until decoding is complete) must be kept to a minimum, as longer delays reduce the logical clock rate of the quantum computer.
[0031] This disclosure addresses this problem and provides a method for parallelizing the execution of accurate decoders for a large class of useful and practical topological quantum error correction codes, including surface codes. Multiple workers decode the measurement data in parallel, tracking the global state of the decoder in an atomic data structure referred to herein as a compressed logic inversion tracking table. Thus, unlike conventional techniques that partition the spatiotemporal domain of a detector graph processed in parallel by multiple worker threads, for example, the final adjustment step of the decoding is unnecessary. Consequently, the decoding process is faster and lower latency than conventional techniques.
[0032] Furthermore, the technologies described herein do not require any special-purpose hardware and can be implemented using relatively inexpensive CPUs, thereby reducing the costs associated with decoding and improving the performance of future quantum data centers and the like.
[0033] Details of one or more embodiments of the subject matter described herein are shown in the accompanying drawings and the following description. Other features, aspects, and advantages of the subject matter will become apparent from the description, drawings, and claims. [Brief explanation of the drawing]
[0034] [Figure 1] This is a block diagram of an exemplary computing system for parallel execution of quantum error correction codes. [Figure 2] This is an exemplary block diagram of a classical processor decoder. [Figure 3] This is a schematic block diagram of the data stored in a compressed logical inversion tracking table for a specific node cluster within the detector graph. [Figure 4] This is a schematic block diagram of the node tree in a forest containing a compressed logical inversion tracking table. [Figure 5] This is an illustrative flowchart of a process for performing a decoding process on measurement data received from a quantum computing system in order to determine errors in quantum computations performed by the quantum computing system. [Modes for carrying out the invention]
[0035] Similar reference numbers and symbols in various drawings indicate the same elements.
[0036] This specification describes a technique for parallel decoding of measurement data obtained from a quantum computer implementing quantum error correction codes. The measurement data may represent the physical state of the quantum computing system. For example, the measurement data may represent the state of one or more qubits in the quantum computing system. The decoder implements a main thread and multiple worker threads. The main thread provides each of the worker threads with their respective clusters in the detector graph. The worker threads process their respective clusters in parallel and almost independently, requiring coordination only when two or more clusters grow and connect to each other. The decoder maintains an atomic data structure that tracks the decoder's global state in order to properly coordinate the growth of clusters between threads and maintain thread safety.
[0037] Figure 1 is a block diagram of an exemplary computing system 100 for parallel execution of quantum error correction codes. The exemplary computing system 100 is an example of a system that can be implemented as classical and quantum computer programs on one or more classical computers and quantum computing devices in one or more locations, and can implement the systems, components, and techniques described herein.
[0038] An exemplary computing system 100 includes a quantum computing device 102 and a classical processor 104. For illustrative purposes, the quantum computing device 102 and the classical processor 104 shown in Figure 1 are shown as separate entities, but in some embodiments, the classical processor 104 may be included in the quantum computing device 102. For example, in some implementations, the quantum computing device 102 may be directly connected to the classical processor 104. In other embodiments, the quantum computing device 102 may be connected to the classical processor 104 via a network, such as a local area network (LAN), a wide area network (WAN), the internet, or a combination thereof.
[0039] The quantum computing device 102 includes components for performing quantum computation, such as physical qubits. For example, the quantum computing device 102 may include a quantum data plane containing a plurality of physical qubits, a control and measurement plane configured to perform operations and measurements on the physical qubits, a control processor plane configured to determine the sequence of operations and measurements required for a quantum algorithm performed by the quantum computing system, and a classical computer that communicates with the control processor and facilitates interaction with the user and access to a network or memory. The specific type of quantum computing device 102 may depend on the type of qubits used. In some embodiments, the qubits may be superconducting qubits, semiconductor qubits, optical qubits, or atom-based qubits. For example, the qubits may include Xmon qubits, flux qubits, phase qubits, CAT qubits, or qubits with frequency interaction.
[0040] Typically, quantum computations performed by the quantum computing device 102 are noisy because errors are unavoidable, such as those caused by unwanted interactions between qubits, unwanted interactions with the environment (causing decoherence), defective quantum gates or operations, or errors in the state preparation or measurement process. Examples of error types include coherent errors acting on a single qubit, such as the Pauli X-type error called a bit inversion error that maps the qubit's ground state to X|0〉=|1〉 and X|1〉=|0〉, and the Pauli Z-type error called a phase inversion error that maps the qubit's ground state to Z|0〉=|0〉 and Z|1〉=-|1〉. Noise within the quantum computing device can be represented by error models, such as the independent error model, which is described in more detail below. If left unchecked, errors can destroy quantum information and render the quantum computation performed by the quantum computing device 102 useless.
[0041] Therefore, the quantum computing device 102 can be configured to execute a quantum error correction code 106 when performing quantum computation. The quantum error correction code encodes a first number k qubits (Hilbert space of dimension 2k) into a second number n qubits (Hilbert space of dimension 2n), where the second number is greater than the first number, i.e., n > k. The k qubits are data qubits that store logical information and are protected from errors. An additional nk qubits are ancilla qubits used to detect errors. An exemplary quantum error correction code includes a stabilizer code, e.g., a surface code 108.
[0042] The surface code 108 encodes logical qubits into patches of multiple physical qubits on a grid, such as a square or hexagonal grid. The grid includes alternating data qubits and ancilla qubits, with the qubits located at each edge of the grid. The code is based on the Hamiltonian H = -Σ v∈V X v -Σ f∈F Z f It is defined as the basis space of , where V represents the vertices of the lattice, F represents the faces defined by the edges connecting the vertices of the lattice, and the operator X v This is the product of Pauli X matrices associated with vertex v and acting on the edges associated with v, and the operator Z f This is the product of Pauli Z matrices associated with face f and acting on all edges of f. The code space is the operator X v and Z f These are defined as concurrent "+1" eigenstates. These operators (or the product of these operators) are called sign stabilizers. If an error affects a sign qubit, any stabilizer that inversely exchanges with the error returns a "-1" measurement. The subset of vertices with a -1 measurement is called syndrome σ. When applied to a sign, syndrome σ can be used to determine the correction operator that corrects the error up to the stabilizer.
[0043] During the execution of the quantum error correction code 106, the quantum computing device 102 is configured to provide measurement data 110 to the classical processor 104. The measurement data 110 may be received as a batch of data or a data stream. The measurement data 110 includes, for example, classical measurement result bits corresponding to a stabilizer measurement. In this disclosure, the detector is the parity of the measurement result bits, which is deterministic in the absence of errors. The result of the detector measurement is 1 if the observed parity differs from the expected parity of a noise-free computation, and 0 otherwise. A Pauli error P is said to invert the detector D if the result of D changes when P is present in the circuit, and the detected event is the detector with a result of 1. A logical observable is a linear combination of the measurement bits, the result of which corresponds to a measurement of a logical Pauli operator.
[0044] The classical processor 104 includes components for performing classical computations. For example, the classical processor 104 may be implemented as one or more computer programs, i.e., one or more modules of computer program instructions, encoded on a tangible, non-temporary storage medium, which are executed by or control the operation of a data processing device. The computer storage medium may be a machine-readable storage device, a machine-readable storage board, a random-access memory device, or a serial-access memory device, or one or more combinations thereof.
[0045] The classical processor 104 implements a decoder 112, which is configured to process measurement data 110 received from the quantum computing device 102, decode the measurement data, that is, predict what errors may have occurred during the quantum computation performed by the quantum computing device 102. To process the measurement data 110, the decoder 104 is configured to execute a decoding algorithm 114 (also referred to herein as the decoding process) that maps the decoding problem to a graph problem using a graph error model for the quantum error correction code 106.
[0046] The graphical error model is an independent error model, i.e., a set of m independent error mechanisms, where error mechanism i occurs with probability p[i] (where p ∈ R m is a prior vector) and reverses a set of detectors and observables. In a graphical error model, each error mechanism reverses at most two detectors. Using the graphical error model, it is possible to approximate the common noise model of many important classes of quantum error correction codes, including surface codes where both X-type and Z-type Pauli errors are graphical.
[0047] The graphical error model is represented by a detector graph G=(V,E) of nodes and edges. Each node v ∈ V of the detector graph corresponds to a detector. Each edge e ∈ E is a set of detector nodes of cardinality 1 or 2 and represents an error mechanism that reverses this set of detector nodes. The set of edges E can be decomposed as E = E1 ∪ E2, where |e| = 1 if each edge belongs to E1 and |e| = 2 if each edge e belongs to E2. A normal edge e=(u,v) ∈ E2 reverses the pair of detectors u,v ∈ V, and a half-edge (u,) ∈ E1 reverses a single detector u ∈ V. The half-edge can be connected to the boundary of the detector graph, in which case the edge can be defined as (u,v b ) where v b is a virtual boundary node (not corresponding to any detector). In some embodiments, for example, when solving the graph problem using a minimum weight perfect matching, a weight can be assigned to each edge, e.g., w(e i ) = loglog(1 - p[i]) / p[i]. Each edge can also be labeled with the set of logical observables reversed by the error mechanism, which is represented by either l(e i ) or l(u,v) when e i =(u,,v) ∈ E. The distance D(u,v) between two nodes u and v of the detector graph is equal to the length of the shortest path between them.
[0048] An exemplary decoding algorithm includes minimum weight perfect matching (MWPM) and join search. The MWPM decoding process determines the most likely physical error that matches the syndrome of the measured data. Detected events in the measured data are identified and labeled in a detector graph. Next, the minimum weight embedding match of the detected events in the detector graph is determined, where the embedding match of the set of detected events is an edge set in the detector graph, where each node corresponding to a detected event in the set of detected events is connected to an odd-numbered edge in the edge set, and each node not corresponding to a detected event in the set of detected events is connected to an even-numbered edge in the edge set. In a conventional embodiment of the MWPM decoding process, Edmund's Blossom algorithm is used to determine the embedding match, for example, by seeding node clusters in the detector graph using detected events and growing, shrinking, or freezing the clusters until the minimum weight embedding match is obtained. The embedding match is used to determine a prediction of which logical observables have been inverted, which can then be used to determine the correction operator that corrects the error when applied to the quantum error correction code 106.
[0049] The coupled search-decode process can be considered an approximation of the minimum-weighted perfect-matching decode process. The coupled search-decode process identifies detected events in the measurement data and uses those detected events to seed clusters of nodes in the detector graph. The clusters then grow iteratively in the detector graph until the parity of the clusters changes. Next, a so-called delamination step is performed. A spanning tree is generated for each grown cluster, and an estimate of the error is calculated by traversing the spanning tree in reverse. The correction operator that corrects the error when applied to the quantum error correction code 106 is then determined.
[0050] Returning to Figure 1, the decoder 112 implements a main thread 202, multiple worker threads 204, and a compressed logical inversion tracking table 206. The main thread 202 is configured to manage the multiple worker threads 204 and coordinate the execution of the decoding algorithm 114. The main thread 202 is configured to receive measurement data 110 from the quantum computing device 102 and generate a detector graph for the measurement data. The main thread 202 uses the detected events in the measurement data to seed node clusters with non-zero parity in the detector graph and places the seeded clusters into a central list structure.
[0051] Each of the worker threads 204 is configured to extract a seeded cluster from a central list structure. Then, each of the worker threads 204 modifies its seeded cluster according to the decoding algorithm 114, for example, by adding some or all nodes from the cluster boundary according to a cluster growth rule, or by shrinking or freezing it. Each worker thread is configured to modify its cluster in parallel and independently of each other, and coordination is only required when two or more clusters grow and connect to each other.
[0052] Multiple workers 204 are configured to modify seeded clusters while tracking the global state of decoder 112 in an atomic data structure called a compressed logical inversion tracking table 206 in this specification. Thus, unlike conventional techniques that divide the spatiotemporal domain of a detector graph to be processed in parallel by multiple worker threads, for example, the final final adjustment step of the decoding algorithm 114 is unnecessary. Note that in these conventional parallelizations of finite decoders, a final adjustment step is required because the finite decoding algorithm is designed to operate over the entire decoding graph, whereas the parallel version can only access a limited spatiotemporal domain (or block) of the decoding graph. The final adjustment step requires cross-referencing the solutions within each block to find and resolve any discrepancies. Cross-referencing may include, for example, determining whether an error predicted in one block matches an error predicted in another block. The difficulty / overhead of the final adjustment cross-referencing may increase with the size of the block or remain constant. In either case, in order to maintain a limited delay, the number of blocks must increase along with the number of rounds of syndrome extraction, and therefore the amount of work performed during this final adjustment step must also increase (along with the number of blocks). In such conventional parallel decoders, simply ignoring this additional adjustment step at the end of decoding generally results in an output different from the decoding algorithm of the underlying single-threaded decoder, and it is not possible to suppress errors to the maximum possible amount for the selected code distance. In contrast, the decoding algorithm introduced herein does not require a final adjustment step because it tracks decoding predictions and cross-references to resolve discrepancies between worker threads incrementally during decoding. Tracking net logic inversion incrementally is not the same as a final adjustment step because it is performed incrementally during decoding, not after decoding is complete. Therefore, it does not contribute to the delay of the decoder. Exemplary operations performed by the components of decoder 112 are described in more detail below with reference to Figures 2-5.
[0053] After the decoder 112 completes the decoding algorithm 114, the classical processor 104 is configured to output a correction operator 118. The correction operator 118 can be applied to the quantum error correction code 106 to correct the error identified by the decoder 112.
[0054] Figure 2 is a block diagram 200 of an exemplary classical processor decoder 112. The decoder 112 may be implemented as one or more computer programs, i.e., one or more modules of computer program instructions, encoded in a tangible, non-temporary storage medium, which are executed by or control the operation of the data processing device. The computer storage medium may be a machine-readable storage device, a machine-readable storage board, a random-access memory device, or a serial-access memory device, or one or more combinations thereof.
[0055] As previously mentioned with reference to Figure 1, the decoder 112 implements a main thread 202, several worker threads 204a-d, and a compressed logic inversion tracking table 206. For convenience, the exemplary decoder 112 shown in Figure 2 includes four worker threads 204a-d, but in some embodiments, the decoder 112 may include a different, for example, larger number of worker threads. The components of the decoder 112 can be connected via a network accessible via wired and / or wireless communication links, such as a local area network (LAN), wide area network (WLAN), the internet, or a combination thereof.
[0056] As previously mentioned with reference to Figure 1, the main thread 202 is configured to manage multiple worker threads 204a to d and coordinate the execution of the decoding process. The main thread 202 is configured to receive measurement data from the quantum computing device and generate a detector graph for the measurement data. The main thread 202 identifies detection events in the measurement data (e.g., caused by noise with hardware qubits of the quantum computing device) and uses the detection events to seed node clusters with non-zero parity in the detector graph. The main thread 202 is configured to place the seeded clusters in a central list structure 212.
[0057] Each of the multiple worker threads 204a to d is configured to access the central list structure 212 and retrieve its respective seeded cluster from it. Each worker organizes the seeded cluster retrieved from the central list structure 212 into a private, sorted data structure that implements the overall job assignment strategy.
[0058] In some embodiments, the job assignment strategy can be based on dividing the cyclic spacetime buffer into regions owned by the tiling of worker threads 204a-d. Alternatively, in some embodiments, job assignment can be random based on the load of individual worker threads, or a combination of multiple heuristics. For example, in some embodiments, excitation clusters that extend further back in time (clusters with non-zero parity) may be preferred over new clusters confined to later time windows. This job assignment strategy aims to reduce delays in real-time decoding. In some embodiments, the growth of excitation clusters that extend too far into the future horizontally, i.e., too close to the earliest time coordinates where not all measurement results are known to the decoder, can be prohibited. In some embodiments, changes to smaller excitation clusters may be preferred over changes to larger excitation clusters, and the cluster size is determined based on either the boundary size (which can be measured by the number of adjacent vertices or the number of incident edges in the graph emanating from the cluster), the number of graph nodes contained in the cluster, or a combination of these quantities.
[0059] Each worker thread is configured to modify the clusters stored in its private sorted data structure according to heuristics specified by the decoding process performed by the decoder 112. In non-limiting examples, in some embodiments, the decoding process may be a join search decoding process. In these embodiments, each worker thread may grow the clusters stored in its private sorted data structure until, for example, each cluster has equal parity or fills the boundaries of the detector graph. In other non-limiting examples, in some embodiments, the decoding process may be a minimum weight perfect matching decoding process. In these embodiments, each worker thread may grow, shrink, or shatter the clusters stored in its private sorted data structure until, for example, each cluster has equal parity or fills the boundaries of the detector graph.
[0060] In some embodiments, one or more of the worker threads 204a-d may be configured to calculate the current cluster change priority of the clusters in its private sorted data structure before each change step. The worker threads 204a-d can then determine whether the current cluster change priority differs from the expected change priority, for example, calculated in a previous change step. If a worker thread determines that the current cluster change priority differs from the expected change priority, the worker thread can adjust the order in which the clusters are processed. Generally, the priority of a cluster decreases as it grows, so a valid iteration in priority order of all clusters is constructed by traversing a list of once sorted clusters and reinserting clusters (in the correct sort position) whose recalculated priority does not match the previous calculation.
[0061] The compressed logical inversion tracking table 206 is shared by worker threads 204a-d, i.e., it is common to each worker thread. When worker threads 204a-d perform the decryption process and modify their respective clusters, they update the data in the compressed logical inversion tracking table 206 corresponding to each cluster based on atomic primitives, such as compare and exchange atomic primitives and an atomic pool allocator with reference counts. The atomic primitives allow each worker thread to track whether other worker threads have modified its cluster, thus achieving thread safety. Therefore, the compressed logical inversion tracking table 206 can avoid the need for locks and be lock-free.
[0062] For example, a first worker thread may operate on a first cluster, e.g., cluster 222, and a second worker thread may operate on a second cluster, e.g., cluster 224. During the decoding process, the first and second workers may grow their respective clusters so that the first and second clusters come into contact and merge into a single cluster 226 during the decoding process. Under atomic primitives, the first worker thread (or second worker thread) may determine that it should stop modifying its clusters and allow the second worker thread (or first worker thread) to proceed with modifying the merged cluster 226. The first worker thread (or second worker thread) may then extract the new cluster from its private sorted data structure and modify it.
[0063] Therefore, the compressed logical inversion tracking table 206 tracks the dynamic system of clusters (of features) that are seeded by the main thread 202 and modified by worker threads 204a~d. In other words, the compressed logical inversion tracking table 206 tracks the global state 220 of the decoder 112, for example, each cluster and how it was modified during the decoding process.
[0064] The compressed logical inversion tracking table 206 stores the data for each cluster included in the detector graph. During the decoding process (for example, after the clusters are seeded and one or more modifications have been made), each cluster consists of a root node (which has no ascending nodes) and one or more descending child nodes (the child nodes are leaf nodes that do not have descending nodes, or contain one or more descending child nodes). That is, each cluster is represented as a connected tree, and the entire collection of clusters in the detector graph is a forest of such trees.
[0065] The data stored in the compressed logical inversion tracking table 206 for a specific cluster includes data relevant to the entire cluster, such as data specifying cluster characteristics, including the parity of detected events included in the cluster, the cluster size, and the cluster boundary nodes. This data can be stored in the cluster's root node, as will be described in more detail below with reference to Figures 3 and 4.
[0066] The data also includes compressed logical inversion (CLF) information for child nodes within the cluster. Each edge in the decoded graph has a bit for each observable indicating whether the logical observable is inverted by the error mechanism associated with that edge. Note that the decoder (whether UF or MWPM) selects a subset of edges associated with a subset of errors it predicts have occurred. In this case, the decoded prediction is the bitwise sum of these logical inversions across all edges selected in the subset. In the compressed logical inversion (CLF) scheme, the selected edges are split across clusters, and the CLF for each child node is the bitwise sum of logical inversions across the edges to its parent node (or zero for the root node). In MWPM decoding, the node's CLF bits are the bitwise sum of logical inversions along the edges to the matched node (if the nodes match). In UF decoding, the root node's CLF bit is always 0, and the child node's CLF information includes a parity inversion (i.e., a net inversion of parity along the edges between the child node and the parent node in the decoding graph) applied to the logical observable by an operator with a 0 boundary consisting of the child node's node and the parent node's node in the tree / cluster. The CLF information of multiple logical observables can be tracked in parallel and updated incrementally during decoding. Furthermore, the CLF can be used along with the net parity of each cluster during decoding to incrementally track the net predictive inversion(s)(s) of the logical observable(s). As will be described in more detail below with reference to Figures 3 and 4, the child node's CLF information can be stored in the child node.
[0067] In some embodiments, the main thread 202 can be configured to assign seeded clusters in the central list structure 212 to each worker thread. To avoid contention, the scheduling strategy should assign excited clusters to grow almost entirely by separate worker threads. However, this can be problematic because for the decoder 112 to be wait-free (a desirable characteristic for real-time decoding, etc.), all worker threads must be able to proceed with completing their work even when one worker thread is stalled.
[0068] This can be implemented by so-called workersting, which can be done through the atomicity of the compressed logical inversion tracking table 206. For example, in some embodiments, a worker thread can record clusters that are not specifically assigned to it when it reads a list of available clusters in a central list structure 212 maintained by the main thread 202. Then, when the worker thread has finished modifying the cluster it pulled from the central list structure 212, it can steal (e.g., acquire) other clusters from other domains, e.g., other worker threads. The worker thread can then perform a decryption process and modify the "stolen" clusters.
[0069] Decoder 112 can be configured to perform worksteing with minimal overhead by using a separate data structure that tracks clusters when they are assigned to worker threads 204a-d. The overhead of tracking this information is minimized because the separate data structure only needs to be updated when the main thread 202 seeds a new cluster or when a worker thread performs worksteed.
[0070] Once a worker thread has cycled through all the queued clusters in a private sorted data structure, it can be configured to draw new clusters from the central list structure 212. If no excited clusters remain in the central list structure 212, the worker thread can be configured to wait for a new round of measurement data to become available (for example, waiting for the main thread to seed new clusters with the new measurement data). Alternatively, or additionally, a worker thread can work in conjunction with the main thread 202 to perform cleanup or reset tasks, such as freezing and deleting old clusters that are no longer excited. Alternatively, or additionally, a worker thread may steal clusters from other worker threads, as described above.
[0071] When all clusters have been processed by multiple worker threads 204a~d, for example, when all clusters have been modified to have zero parity, the decoder 112 can be configured to recover the decoded output using the processed clusters. The specific actions performed by the decoder 112 to recover the decoded output depend on the underlying decoding process. For example, in some embodiments, the decoder 112 can recover the decoded output by computing the net logic inversion on the path from the child node in the cluster corresponding to the detected event to the root node of the cluster, for each processed cluster. The decoder 112 can then compute the sum parity of all net logic inversions across each of the processed clusters. The sum parity of all net logic inversions provides an overall prediction of whether the logic observable was inverted due to an error during quantum computation. The sum parity of all net logic inversions does not need to be computed at the end, but instead can be incrementally kept up-to-date as the worker modifies the data structure. When two clusters A and B are merged, with A becoming a child of B, then the net inversion is modified if A has non-zero parity and the CLF bits on the path from the root of A to the root of B are non-zero. This procedure generalizes directly to the case of multiple observables.
[0072] As previously mentioned with reference to Figure 1, the decoder 112 (or, more generally, the classical processor 104) can be configured to use predictions to determine the correction operator to correct the error when applied to a quantum error correction code performed by a quantum computing device.
[0073] Figure 3 is a schematic block diagram 300 of the data stored in the compressed logical inversion tracking table for a specific node cluster in the detector graph. As previously mentioned with reference to Figure 2, the data stored in the compressed logical inversion tracking table for a specific cluster includes data relevant to the entire cluster, such as data specifying the cluster's characteristics. This data can be stored in the cluster's root node 302 and is kept up-to-date whenever the cluster changes. The data stored in the compressed logical inversion tracking table for a specific cluster also includes compressed logical inversion (CLF) information for each child node in the cluster. The child node's CLF information can be stored in the child node; for example, the CLF information 320 for child node 304 can be stored in child node 304.
[0074] The stored data may include a node type specifier 306, for example, an indication of whether each node in the compressed logical inverted tracking table corresponds to a root node or a child node. In the example shown in Figure 3, a node type specifier "1" indicates that the node is a root node, and a node type specifier "0" indicates that the node is a child node. When two clusters are merged, the root node of one of the original clusters needs to be changed to point to the root node of the newly merged cluster. This requires determining whether a given node is actually the root. Therefore, a node type specifier bit is stored in the stored data for each node. There are other ways this can be done. For example, all nodes could instead have a pointer to their parent, and a null (zero) value would indicate that the node is a root node that does not actually have a parent. One advantage of the scheme where a single bit is used instead is that the space used to store null values could instead be used to store additional data in the root node.
[0075] The stored data may also include data specifying the parity 308 of the detected events included in the cluster. This data is a characteristic of the cluster (not a specific child node included in the cluster) and is therefore stored in the root node 302. When the cluster is first seeded, the parity 308 of the detected events is non-zero, e.g., 1. When the cluster is modified, e.g., grows and merges with other clusters, the cluster will subsequently contain two detected events, and therefore the parity 308 of the detected events is updated to 0. In some embodiments, the cluster can be "frozen" by updating the parity 308 of the detected events from 1 to 0, so that no further changes are made to the cluster by worker threads until another cluster with non-zero parity grows and comes into contact with and merges with the zero-parity cluster. When such an event occurs, the parity can be used to incrementally update the net logical inversion information according to the net logical inversion tracking protocol described above.
[0076] The stored data may also include data specifying cluster boundary information 310. This data is a characteristic of the cluster (not a specific child node included in the cluster) and is therefore stored in the root node 302. The boundary information 310 may include data specifying whether the cluster has reached the boundary of the decoded graph of the code. When connected to the boundary, the parity of the cluster is set to zero and will not grow again during decoding. The boundary information 310 may also include data specifying which nodes in the detector graph currently form the boundary of the cluster. This information can be used by worker threads to determine the current size of the cluster and, for example, to prioritize the processing of some clusters over others.
[0077] The stored data may also include data specifying minimum and maximum time coordinates 312 and 314. This data is a cluster characteristic (not a specific child node included in the cluster) and is therefore stored in the root node 302. The time coordinates can be used to determine the priority of cluster growth. For example, in one embodiment, to reduce RT decoding delays, excitation clusters that extend to earlier time coordinates can be processed preferentially over clusters that are limited to later time coordinates. The time coordinates can also be used to prevent the growth of excitation clusters that extend too far into the future horizontal, i.e., too close to the earliest time coordinates where not all measurement results are known to the decoder.
[0078] The stored data also includes CLF information for each child node, for example, CLF information 320 for child node 304. The CLF information of a child node is stored within the child node. The CLF information is used by the decoder along with the net parity information to incrementally calculate the number of logically inverted nets on the path containing the corresponding child node during decoding.
[0079] The stored data also includes the parent node index of each child node, for example, the parent node index 322 of child node 304. The parent node index points to the child's parent (ascending) node. The parent node index of a child node is stored in the child node. The parent node index can be used by the decoder to identify the path from the child node corresponding to a detected event in the cluster to the cluster's root node, for example, when the decoder generates a decoded output and computes a net logical inversion on the path from the detected event to the root node.
[0080] In some embodiments, the stored data may also include data specifying neighboring nodes of the cluster that are not yet included in the cluster. These neighboring nodes encode the graph structure as a boundary map from the node to the CLF bits (equal to 1 if the edges traversed to reach that node from the cluster invert the logical observable). The boundary map may be large, and therefore a pointer 316 to an external memory area that stores the external atomic data 318 may be stored in the root node 202, and the boundary map may be stored in the external memory area. That is, the most important data (data stored in the root node and child nodes) may be compressed to fit within a fixed size, e.g., one 64-bit word, and the remaining data may be stored in the external memory area. In some embodiments, the external memory area that stores the external atomic data 318 may use memory managed by an atomic allocator with a reference count to avoid memory access violations by ensuring that the memory is reallocated only after all references to it have been freed. The boundary map is used during cluster growth to find the next node(s) to add to the growing cluster.
[0081] In some embodiments, one or more optimizations can be implemented to improve the performance of the compressed logical inverted track table, which is particularly beneficial because the compressed logical inverted track table is a core-shared global data structure of the decoder 112. The compressed logical inverted track table simply requires atomic comparisons and exchanges for large (multiple-word) data objects. This can be implemented using hardware transactional memory (HTM) on certain processors. However, on most central processing units, only single-word comparisons and exchanges, e.g., x86 cmxchg, are available as hardware instructions. Even on chips that support HTM, transactions can fail incorrectly, requiring a fallback to simpler atomic primitives. To build multi-word comparisons and exchanges from single-word comparisons and exchanges, some prior arts propose emulating multi-word comparisons and exchanges by always allocating new memory and adding an indirect layer using single-word comparisons and exchanges. However, this can lead to unlimited memory usage and damage performance due to excessive copying and many extra reads and writes to memory resulting from the indirect layer.
[0082] Therefore, by combining and implementing one or more of the following techniques, it is possible to atomically protect the necessary node data with better performance than the simple solution described above.
[0083] For example, if the data to be updated is packed into a single word, no new memory allocation is required. Multiple data, such as parent node specifiers and cluster parity, can non-trivially be packed within a 64-bit word along with pointers to external atomic data (if necessary). Updating packed data does not require loading / storing into external memory, thus improving performance.
[0084] As another example, a memory region that stores external atomic data objects cannot be recycled in a simple embodiment because a worker thread that has acquired a pointer to that memory and has stopped may eventually dereference that memory, leading to an inconsistent state if the memory is recycled. However, this can be overcome by using an atomic pool allocator with reference counting.
[0085] As another example, if an atomic data object stored externally is required, a simple approach to reducing this data to the root of the tree is to copy it to new external memory and then update the pointer in the node word by performing comparisons and swaps. Performance can be improved by implementing pop / push techniques instead. The central problem with updating members of the root node in place is that even if the update to the external data is successful, a second "interfering" worker thread's action may cause that node to cease being the root. A simple solution is to detect this situation by having the worker thread performing the update check whether the node is still the root after the external memory update. If the worker thread detects such a situation, the worker thread can consider the external memory update complete without recognizing the change. If the worker thread detects a change, it will decide to climb the tree (cluster) and continue updating the external data at the new root. However, there is ambiguity as to how the worker thread should adjust the original modified data. This ambiguity arises because the interfering worker thread itself reading from its external memory and propagating it up the tree can occur before or after the first thread successfully updates the external memory. One exemplary way to avoid this ambiguity is to impose conservation laws on atomic data objects stored externally. Specifically, data from these objects can be atomically "popped" from the child node's memory before the data is added to the object associated with the root node by an atomic "push" update.
[0086] For example, an integer size counter (including summation as a reduction operation) can be set to zero by comparison and swap before its value is added to the root node by an atomic add instruction. By imposing conservation laws on data stored in externally allocated memory pointed to by the root node, any missteps caused by thread interference can be detected and clearly corrected. For example, if a worker thread pushes data to an object in the root node and it turns out that the object is no longer the root, this push can be rolled back by a pop. The worker thread can then climb the tree to a new root node, and finally the worker thread can push to an object specified by the new root node. In this case, there is no ambiguity as to which worker thread can add this data to the root is determined by which worker thread's atomic pop is successful. The pop-and-push paradigm provides a common incremental method for ensuring the atomicity of reduction operations performed in each set in the system without additional reads and writes. Any atomic data structure, such as a linked list, that can be atomically "popped from" and "pushed to" beyond an integer counter may be used inside an atomic external data object indicated by the root node. For example, a common strategy for any 63-bit payload is to add a "delete" bit to indicate that it has been "popped," and unused memory locations can be recycled using the pool allocator's reference count.
[0087] Figure 4 is a schematic block diagram of a tree 400 of nodes included in a forest containing a compressed logical inversion tracking table. As previously mentioned with reference to Figure 2, the compressed logical inversion tracking table stores data for each cluster included in the detector graph. Each cluster consists of a root node 402 (which has no ascending nodes) and one or more descending child nodes 404a~f (the child nodes include leaf nodes that do not have descending nodes, e.g., child nodes 404a, 404c, 404d, and 404f, or child nodes that have one or more descending child nodes, e.g., child nodes 404b and 404e). That is, each cluster is represented by a connected tree 400, and the entire collection of clusters in the detector graph is a forest of such trees.
[0088] Figure 5 is a flowchart of an exemplary process 500 for performing a decoding process on measurement data received from a quantum computing system in order to determine errors in a quantum computation performed by the quantum computing system. For convenience, process 500 is described as being performed by a component of a classical computing system. For example, a classical decoder, e.g., decoder 112 in Figures 1 and 2, can be appropriately programmed to perform exemplary process 500.
[0089] The system acquires measurement data from a quantum computing system and generates a detector graph for the decoding process. Next, the system identifies one or more detection events in the measurement data and, for each identified detection event, seeds a cluster of nodes with non-zero parity in the detector graph (step 502). The system places the seeded node clusters into a central list structure.
[0090] The system instantiates a common data structure for each of the multiple worker threads (step 504). The data structure stores data for node clusters of the detector graph during the decoding process, for example, for a dynamic cluster system during the decoding process. Each node cluster includes a root node that does not have ascending nodes and may include one or more descending child nodes, where the child nodes are leaf nodes that do not have descending nodes, or one or more descending child nodes. The number of child nodes in each cluster may change as the decoding process is executed, for example as the cluster grows or shrinks, so the cluster system is called a dynamic cluster system.
[0091] The data stored in the data structure includes compressed logical inversion information for child nodes within each node cluster. In some embodiments, the compressed logical inversion information for a child node includes the parity of the logical inversion along the decoding graph path from the child node to its parent node, and the compressed logical inversion information is used together with cluster parity information to determine the parity inversion applied to the logical observable by the fusion of two clusters. The compressed logical inversion information for a child node includes the parity inversion applied to the logical observable by a zero-boundary operator that includes the child and parent nodes in the tree (i.e., the net inversion of the parity between the child and parent nodes in the decoding graph). The compressed logical inversion information for a child node can be stored in the child node's data structure.
[0092] The data stored in the data structure may also include data specifying the characteristics of each cluster. For example, for a particular cluster, the data may include data specifying one or more of the following: node type specifiers, parity of detected events in the node cluster, total size of the node cluster, and boundary nodes of the node cluster. This data can be stored in a data structure located at the root node of a particular cluster.
[0093] The system performs a decoding process on the detector graph to modify the seeded node clusters in the detector graph. Each of multiple worker threads retrieves one or more of the seeded node clusters (step 506) and performs a decoding process on the detector graph to modify one or more retrieved node clusters (step 508). Multiple worker threads can perform steps 506 and 508 in parallel. For each cluster modification, the worker thread implementing the modification updates the corresponding data in the data structure under the atomicity primitive. In some embodiments, the atomicity primitive may be a compare and exchange atomicity primitive or an atomic pool allocator with a reference count. The system uses the updated data in the data structure to recover the decoding output of the decoding process (step 510). For example, the system can use the data stored in the data structure to compute a net logical inversion on the path of each node to its respective root node for each node in the detector graph associated with a detection event. Next, the system can calculate the total parity of the net logical inversions (the computations that can be performed and the corresponding results that are incrementally stored during decoding) to obtain a prediction about whether the logical observables of the quantum computation have been inverted due to an error. The system can then use this prediction to determine the correction operator that corrects the error when applied to the quantum computing system.
[0094] All embodiments and functional operations described herein can be implemented in computer software, firmware, or hardware, or one or more combinations thereof, including digital electronic circuits or the structures disclosed herein and their structural equivalents. Embodiments can be implemented as one or more computer program products, such as one or more modules of computer program instructions encoded on a computer-readable medium for execution by a data processing device or for controlling the operation of a data processing device. The computer-readable medium may be a machine-readable storage device, a machine-readable storage substrate, a memory device, a composition of a material that affects a machine-readable propagating signal, or one or more combinations thereof. The term “data processing device” includes, for example, all devices and machines for processing data, including a programmable processor, a computer, or multiple processors or computers. In addition to hardware, a device may include code that constitutes the execution environment of the computer program, such as processor firmware, a protocol stack, a database management system, an operating system, or one or more combinations thereof. A propagating signal is a signal generated to encode information for transmission to a suitable receiver device, such as a mechanically generated electrical signal, an optical signal, or an electromagnetic signal.
[0095] A computer program (also known as a program, software, software application, script, or code) can be written in any form of programming language, including compiled or interpreted languages, and can be deployed in any form, including as a standalone program or as modules, components, subroutines, or other units suitable for use in a computing environment. A computer program does not necessarily correspond to a file in a file system. A program may be stored in part of a file that holds other programs or data (e.g., one or more scripts stored in a markup language document), in a single file dedicated to the program of interest, or in multiple collaborative files (e.g., files that store one or more modules, subprograms, or parts of code). A computer program may be deployed to run on one computer, or on multiple computers located in one location or distributed across multiple locations and interconnected by a communication network.
[0096] The processes and logic flows described herein may be executed by one or more programmable processors running one or more computer programs, performing functions by acting on input data and generating outputs. Process and logic flows may also be executed by special-purpose logic circuits, such as FPGAs (Field-Programmable Gate Arrays) or ASICs (Application-Specific Integrated Circuits), and the devices may also be implemented as special-purpose logic circuits.
[0097] Processors suitable for executing computer programs include, for example, both general-purpose and special-purpose processors, and one or more processors of any type of digital computer. Generally, processors receive instructions and data from read-only memory, random-access memory, or both.
[0098] The basic elements of a computer are a processor for executing instructions, and one or more memory devices for storing instructions and data. Generally, a computer also includes one or more mass storage devices for storing data, such as magnetic disks, magneto-optical disks, or optical disks, or is operationally connected to these devices to receive and transfer data, or both. However, a computer is not required to have such devices. Furthermore, to give some examples, a computer may be embedded in other devices, such as tablet computers, mobile phones, personal digital assistants (PDAs), mobile audio players, and Global Positioning System (GPS) receivers. Computer-readable media suitable for storing computer program instructions and data include all forms of non-volatile memory, media, and memory devices, such as semiconductor memory devices like EPROM, EEPROM, and flash memory devices, magnetic disks such as internal hard disks or removable disks, magneto-optical disks, and CD-ROM and DVD-ROM disks. The processor and memory can be complemented or incorporated by dedicated logic circuits.
[0099] To provide user interaction, the embodiment may be implemented in a computer having a display device for displaying information to the user (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor), and a keyboard and pointing device (e.g., a mouse or trackball) through which the user can input into the computer. Other types of devices may also be used to provide user interaction. For example, the feedback provided to the user may be any form of sensory feedback, such as visual feedback, auditory feedback, or tactile feedback, and the input from the user may be acoustic, spoken language, or tactile input.
[0100] The embodiment may be implemented in a computing system that includes, for example, a backend component as a data server, or a middleware component, such as an application server, or a frontend component, such as a client computer having a graphical user interface or web browser on which a user can interact with the embodiment, or any combination of one or more such backend, middleware, or frontend components. The components of the system may be interconnected by any form or medium of digital data communication, such as a communication network. Examples of communication networks include local area networks (LANs), wide area networks (WANs), and, for example, the Internet.
[0101] A computing system may include a client and a server. Clients and servers are generally geographically distant from each other and typically communicate through a communication network. The client-server relationship arises from computer programs that run on each computer and have a mutual client-server relationship.
[0102] While this specification contains many details, these should not be construed as limiting the scope of this disclosure or the scope of the claims, but rather as descriptions of features specific to particular embodiments. Certain features described herein in the context of individual embodiments can also be implemented in combination in a single embodiment. Conversely, various features described as a single embodiment can also be implemented in multiple embodiments, separately or in any preferred secondary combination. Furthermore, features may be described above as operating in a particular combination, and may be initially claimed as such, but one or more features from a claimed combination may be removed from that combination in some cases, and the claimed combination may be directed towards a partial combination or a variation of a partial combination.
[0103] Similarly, while operations are shown in a specific order in the drawings, this should not be understood as requiring that such operations be performed in a specific illustrated order or sequence, or that all illustrated operations be performed, in order to achieve the desired result. In certain situations, multitasking and parallel processing may be advantageous. Furthermore, the separation of various system components in the above embodiments should not be understood as requiring such separation in all embodiments, and the described program components and systems should be understood as generally being able to be integrated into a single software product or packaged into multiple software products.
[0104] In each example where an HTML file is mentioned, other file types or formats may be substituted. For example, an HTML file could be replaced with XML, JSON, plain text, or other types of files. Furthermore, where a table or hash table is mentioned, other data structures (such as spreadsheets, relational databases, or structured files) may be used.
[0105] Having described specific embodiments, other embodiments are within the scope of the following claims. For example, the actions described in the claims may be performed in a different order, and this may still yield desirable results.
Claims
1. It is a system, The classical computer system is configured to perform a decoding process on measurement data received from a quantum computing system and to determine errors in the quantum computation performed by the quantum computing system, and the classical computer system is Main thread, Multiple worker threads, and A common data structure is implemented for each of the aforementioned worker threads, and this data structure stores data for the dynamic system of the node cluster of features of the detector graph for the decoding process. Each node cluster includes a root node that does not have ascending nodes and one or more descending child nodes, and the one or more descending child nodes include a leaf node that does not have descending nodes, or one or more descending child nodes. The aforementioned data includes compressed logical inversion information of child nodes within each node cluster. During the execution of the decryption process, each of the worker threads operates in parallel with each of the other worker threads. The process involves obtaining one or more node clusters in the detector graph from the main thread, wherein each node cluster includes one or more detection events in the measurement data. A system configured to perform the decoding process to modify one or more node clusters, wherein for each cluster modification, the worker thread updates the data in the data structure corresponding to the cluster under atomic primitives.
2. The system according to claim 1, wherein the data structure stores data specifying one or more of the following at the root node of each node cluster: a node type specifier, the parity of detected events in the node cluster, the total size of the node cluster, the boundary node of the node cluster, the minimum time coordinate, and the maximum time coordinate.
3. The classical computer system further includes one or more memory regions outside the data structure, each memory region storing a boundary map of each node cluster, according to claim 1.
4. The system according to claim 3, wherein data objects in the memory area are stored according to a conservation rule, and before a push update adds the data to the object associated with the root node, the data of the data object is popped off from the memory of the child node according to the conservation rule.
5. The system according to claim 1, wherein the compressed logical inversion information of the child nodes included in each node cluster is stored in the child nodes.
6. The system according to claim 1, wherein the compressed logical inversion information of the child node includes the logical inversion parity along the decoding graph path from the child node to its parent node, and the compressed logical inversion information is used together with cluster parity information to determine the parity inversion applied to the logical observable by the fusion of two clusters.
7. The classical computer system is further configured to recover the decryption output of the decryption process, and the decryption process uses the data in the data structure, For each node in the detector graph associated with the detected event, the net logic inversion on the path to the root node of each node is calculated, The system according to claim 1, comprising calculating the total parity of the net logical inversion.
8. The system according to claim 1, wherein the decoding process includes a join search or a minimum weight perfect matching decoding process.
9. The system according to claim 1, wherein the data structure is lock-free.
10. The system according to claim 1, wherein the atomic primitive includes a comparison and exchange atomic primitive, or an atomic pool allocator having a reference count.
11. The system according to claim 1, wherein updates to the data in the data structure corresponding to each change in the cluster are packed into a single word, and optionally the single word includes a pointer to external atomic data.
12. During the execution of the aforementioned decryption process, the main thread, To identify the detected event in the aforementioned measurement data, For each detected event, a node cluster with non-zero parity is seeded within the detector graph, The system according to claim 1, wherein the seeded node clusters are arranged in a central list structure, and the plurality of worker threads are configured to acquire and arrange each node cluster from the central list structure.
13. A system comprising a classical computer system according to any one of claims 1 to 12 and a quantum computing system, wherein the classical computer system is configured to receive the measurement data from the quantum computing system and to determine errors in the quantum computation performed by the quantum computing system.
14. A method implemented in a computer for performing a decoding process on measurement data received from a quantum computing system in order to determine errors in quantum computations performed by the quantum computing system, Instantiating a common data structure for each worker thread in a plurality of worker threads, wherein the data structure stores data for the dynamic system of node clusters of features of the detector graph for the decoding process, Each node cluster includes a root node that does not have any ascending nodes and one or more descending child nodes, and the one or more descending child nodes include a leaf node that does not have any descending nodes, or one or more descending child nodes. The aforementioned data includes compressed logical inversion information of child nodes within each node cluster, and is instantiated. With respect to each of the aforementioned worker threads, and in parallel with each of the other worker threads, The process involves obtaining one or more of the node clusters from the main thread, wherein each obtained node cluster contains one or more detection events in the measurement data. Performing the decoding process on the detector graph to modify one or more acquired node clusters, including updating the data in the data structure corresponding to the cluster under atomic primitives for each cluster modification, A method comprising recovering the decryption output of the decryption process using the updated data in the data structure.
15. Recovering the decryption output of the decryption process using the updated data in the data structure is: For each node in the detector graph associated with the detected event, the net logic inversion on the path to the root node of each node is calculated, The method according to claim 14, further comprising calculating the total parity of the net logic inversion.
16. The method according to claim 14, wherein the data structure stores data specifying one or more of the following at the root node of each node cluster: a node type specifier, the parity of detected events in the node cluster, the total size of the node cluster, the boundary node of the node cluster, the minimum time coordinate, and the maximum time coordinate.
17. The method according to claim 14, wherein the compressed logical inversion information of a child node includes parity inversion applied to a logical observable by an operator having a zero boundary including the child node and parent node in the corresponding graph tree.
18. The method according to claim 14, wherein the decoding process includes a join search or a minimum weight perfect matching decoding process.
19. The method according to claim 14, wherein the atomic primitive includes a comparison and exchange atomic primitive or an atomic pool allocator having a reference count.
20. The method according to claim 14, wherein updating the data in the data structure corresponding to each change in the cluster comprises packing the update into a single word, the single word optionally including a pointer to external atomic data.
21. The main thread identifies the detected events in the measurement data, The main thread seeds a node cluster with non-zero parity in the detector graph for each detected event, The method according to claim 17, further comprising the main thread arranging the seeded node clusters into a central list structure, wherein the plurality of worker threads retrieve and arrange each node cluster from the central list structure.
22. A method for determining errors in quantum computation, To generate measurement data, one or more measurements are performed in a quantum computing system that implements the aforementioned quantum computation, Receiving the measurement data from a classical computer system and from the quantum computing system, A method comprising performing the method according to any one of claims 14 to 21 on the aforementioned classical computer system.