Estimation device, design support device, estimation method, design support method, and computer program

Abstract

Provided is an estimation device comprising a control unit that: reads information from a storage unit in which are stored a set of parameters and symbols used in communication, and information indicating the performance required in order to realize a prescribed communication quality in communication in which the parameters and symbols are used, the set and the information being associated with one another; and estimates a SNR required in multilevel coding (MLC) in which the parameters and symbols indicated by inputted information are used.

Description

Technical Field

[0001] The present invention relates to an estimation device, a design support device, an estimation method, a design support method, and a computer program.

Background Art

[0002] In recent years, with the increase in traffic, higher capacity in backbone optical transmission has been demanded. As part of this, in forward error correction processing (FEC) in a DSP (Digital Signal Processor) used in a backbone optical transmission network, studies on techniques for reducing the calculation amount for various modulation orders have been underway. As an example of such reduction in calculation amount, MLC (Multilevel coding: see Non-Patent Document 1) and similar methods (see Non-Patent Documents 2 to 6) have been proposed. MLC efficiently reduces SD-FEC (Soft-decision FEC), which is high-performance but has a large calculation amount. When designing MLC, it is necessary to design an error correction code according to the SNR (Signal-to-Noise Ratio) of the signal. Therefore, conventionally, the performance has been estimated by performing a simulation on the configuration of the designed MLC.

Prior Art Documents

Non-Patent Documents

[0003]

Non-Patent Document 1

Non-Patent Document 2

Outdoor Tools3

Outdoor Tools 4

Direct Environment 5

[0004] However, conventional error correction code design methods that involve a performance estimation process through simulation were burdensome due to the computational load involved in conducting the simulation. In other words, the computational time required for the simulation resulted in poor design efficiency.

[0005] In view of the above circumstances, the present invention aims to provide a technique that can estimate the performance of coding with less computational effort. [Means for solving the problem]

[0006] One aspect of the present invention is an estimation device comprising a storage unit that stores a set of codes and parameters used for communication in association with information indicating the performance required to achieve a predetermined communication quality in communication using the codes and parameters, and a control unit that reads information and estimates the SNR required in an MLC using the codes and parameters indicated by the input information.

[0007] One aspect of the present invention is a design support device comprising: a storage unit that stores a set of codes and parameters used for communication in association with information indicating the performance required to achieve a predetermined communication quality in communication using the codes and parameters, an estimation unit that reads information and estimates the SNR required in an MLC using the codes and parameters indicated by the input information, and a design information determination unit that determines one or more sets of codes and parameters to be applied to the MLC based on the information estimated by the estimation unit.

[0008] One aspect of the present invention is an estimation method comprising a control step of reading information from a storage unit that stores a set of codes and parameters used for communication and information indicating the performance required to achieve a predetermined communication quality in communication using the codes and parameters, and estimating the SNR required in an MLC using the codes and parameters indicated by the input information.

[0009] One aspect of the present invention is a design support method comprising: an estimation step of reading information from a storage unit that stores a set of codes and parameters used for communication and information indicating the performance required to achieve a predetermined communication quality in communication using the codes and parameters, and estimating the SNR required in an MLC using the codes and parameters indicated by the input information; and a design information determination step of determining one or more sets of codes and parameters to be applied to the MLC based on the information estimated in the estimation step.

[0010] One aspect of the present invention is a computer program for causing a computer to function as an estimation device, comprising: a storage unit that stores a set of codes and parameters used in communication in association with information indicating the performance required to achieve a predetermined communication quality in communication using the codes and parameters, and a control unit that reads information and estimates the SNR required in an MLC using the codes and parameters indicated by the input information.

[0011] One aspect of the present invention is a computer program for causing a computer to function as a design support device, comprising: a storage unit that stores a set of codes and parameters used for communication in association with information indicating the performance required to achieve a predetermined communication quality in communication using the codes and parameters; an estimation unit that reads information from a storage unit and estimates the SNR required in an MLC using the codes and parameters indicated by the input information; and a design information determination unit that determines one or more sets of codes and parameters to be applied to the MLC based on the information estimated by the estimation unit. [Effects of the Invention]

[0012] This invention makes it possible to estimate the performance of encoding with less computation. [Brief explanation of the drawing]

[0013] [Figure 1] This is a block diagram illustrating the schematic functional configuration of the estimation device 80 in the present invention. [Figure 2] This figure shows a schematic of the estimated required SNR. [Figure 3] This is a block diagram illustrating the schematic functional configuration of the design support device 70 in the present invention. [Figure 4] This figure shows an example of a DSP configuration as shown above. [Figure 5] This is a block diagram showing an example configuration of a transmitting device. [Figure 6] This is a block diagram showing an example configuration of a receiving device.

Best Mode for Carrying Out the Invention

[0014] Hereinafter, an embodiment of the present invention will be described with reference to the drawings. For superscripts, they will be described using ^, and for subscripts, they will be described using _. For example, when a character with superscript b and subscript c is added to the character A, it will be described as A^b_c.

[0015] FIG. 1 is a block diagram showing a schematic functional configuration of an estimation device 80 in the present invention. The estimation device 80 includes an input unit 81, an output unit 82, a storage unit 83, and a control unit 84. The estimation device 80 may be configured using an information processing device such as a personal computer or a server, or may be configured as a circuit formed on a substrate.

[0016] The input unit 81 receives input of information to the estimation device 80. For example, the input unit 81 may be configured as a user interface that receives a user's operation. In this case, the input unit 81 may be configured as a device (input device) for inputting information according to a user's operation, such as a keyboard, a touch panel, a mouse, a voice input device, etc. The input unit 81 may be an interface that communicably connects these input devices and the estimation device 80. The input unit 81 may be configured as a communication interface that receives data from another information processing device. In this case, the input unit 81 may be configured using, for example, a device that performs wireless communication or a device that performs wired communication. The input unit 81 may be a configuration for inputting information output from other hardware or other software operating in the information processing device in which the estimation device 80 is mounted to the estimation device 80. In this case, the hardware applied to the estimation device 80 may be partially or entirely shared with other software.

[0017] The output unit 82 outputs information from the estimation device 80. For example, the output unit 82 may be configured using an output device that outputs information to the user. In this case, the output unit 82 may be configured as an output device such as a display, an audio output device, or a printer. The output unit 82 may also be an interface that connects these output devices and the estimation device 80 in a communicative manner. The output unit 82 may also be configured as a communication interface that transmits data to other information processing devices. In this case, the output unit 82 may be configured using a device that performs wireless communication, or a device that performs wired communication. The output unit 82 may also be configured to output information to other hardware or other software that operates on the information processing device on which the estimation device 80 is implemented. In this case, the hardware applied to the estimation device 80 may be partially or completely shared with the other software.

[0018] The storage unit 83 is configured using a storage device such as a magnetic hard disk drive or a semiconductor storage device. The storage unit 83 functions, for example, as a known information storage unit 831. The known information storage unit 831 stores known information in advance that the estimation unit 842 of the control unit 84 uses for estimation processing. For example, the known information storage unit 831 stores, for each combination of element code and parameters, the SNR required to achieve a certain error rate (e.g., 10 to the power of minus 15) when communicating using that element code and parameter (hereinafter referred to as "requested SNR"). The parameters are given according to the algorithm used. For example, in LDPC (Low Density Parity-Check) coding, parameters such as the number of iterations of iterative decoding, decimal precision, and decoding algorithm are given. For example, in oFEC (open FEC), parameters such as the number of codeword candidates for Chase-II decoding, decimal precision of the received value LLR (log-likelihood ratio), and the number of iterations of iterative decoding are given. Such information can be obtained as known information based on existing research results, etc.

[0019] In addition, the known information storage unit 831 may pre-store the following values. • Capacity (maximum coding rate) C for each modulation level • SD-FEC binary input - AWGN capacity (SD-FEC capacity) C_S • HD-FEC binary input - AWGN capacity (HD-FEC capacity) C_H • Capacities of various MLC methods

[0020] The value C is expressed in the following equation 3, using, for example, the capacity transmitted bit b and the received value LLR in the BICM scheme as follows.

[0021]

number

number

number

[0022] Here, the mutual information is approximated by Monte Carlo simulation as shown in Equation 4 below. Similarly, the capacities of SD-FEC and HD-FEC are shown by Equations 5 and 6, respectively.

[0023]

number

number

number

[0024] Here, p is the bit error rate, and the following equation 7 holds true.

number

[0025] Furthermore, the capacity C_CP of the CP-MLC system is expressed as follows:

number

number

number

[0026] p_CP is the bit error rate for z^(i)_j. L is the sum of the LLR random variables for each d lane. When using the codes R_H and R_S, they are given as follows:

number

number

number

[0027] λ^(1)_j can be expressed as shown in Equation 15 below, provided the following conditions are met.

number

number

[0028] Here, n' = n / d, and n' is an integer. Also, y_j can be expressed as follows:

number

[0029] Furthermore, the following equation holds true.

number

[0030] λ^(1)_j may also be expressed as shown in equation 18 below.

number

number

[0031] The operators used (operators with a dot inside a circle) are defined as follows:

number

number

[0032] Next, the control unit 84 will be described. The control unit 84 is composed of a processor such as a CPU (Central Processing Unit) and memory (main memory). The control unit 84 functions as an information control unit 841 and an estimation unit 842 when the processor executes a program. Note that all or part of the functions of the control unit 84 may be implemented using hardware such as an ASIC (Application Specific Integrated Circuit), a PLD (Programmable Logic Device), or an FPGA (Field Programmable Gate Array). The above program may be recorded on a computer-readable recording medium. Computer-readable recording media include, for example, portable media such as flexible disks, magneto-optical disks, ROMs, CD-ROMs, and semiconductor memory devices (e.g., SSDs: Solid State Drives), as well as storage devices such as hard disks and semiconductor memory devices built into computer systems. The above program may be transmitted via a telecommunications line.

[0033] The information control unit 841 receives information from the input unit 81. The information control unit 841 reads information from the known information storage unit 831. The information control unit 841 outputs information from the output unit 82.

[0034] The estimation unit 842 estimates the required SNR for an MLC (e.g., CP-MLC) with the configuration indicated by the input information, based on the information input from the input unit 81 (information regarding the configuration of the MLC) and the information stored in the known information storage unit 831. For example, the estimated SNR may be for an MLC to which one or more sets of codes and parameters indicated by the input information are applied. In this case, the estimation unit 842 estimates the required SNR based on the information stored in the known information storage unit 831 without performing a numerical simulation.

[0035] The estimation unit 842 may determine the requested SNR by, for example, the following process. First, it calculates the difference Δ between the rates of the codes indicated by the input information at the requested SNR. For example, if the difference in SD-FEC is Δ_S, the value of Δ_S is given by the following equation 22.

[0036]

number

[0037] Similarly, if we consider the difference Δ_H in HD-FEC, the value of Δ_H is given by the following equation 23.

number

[0038] The estimation unit 842 approximates the difference Δ between the actual rates using the value of the following equation 24.

number

[0039] The estimation unit 842 obtains an estimated SNR that satisfies the following conditions as the requested SNR. Note that IR is the information quantity, and m is the number of bits per symbol per dimension.

number

[0040] Figure 2 shows a schematic diagram of the estimated value of the requested SNR. Figure 2 assumes capacity estimation when using CP-MLC during BPSK modulation. The triangles related to Δ_S and Δ_H each represent the requested SNR of the code indicated by the input information. Δ_S represents the difference between the value indicated by this triangle and the value indicated by C_S in the requested SNR. Δ_H represents the difference between the value indicated by this triangle and the value indicated by C_H in the requested SNR. The minimum SNR obtained by subtracting the value of Δ obtained based on Δ_S and Δ_H from the graph of C_CP, set to satisfy a predetermined coding rate condition (e.g., 0.80), may be obtained as the estimated value of the requested SNR. The value of the coding rate condition differs depending on the MLC method and element code. The estimation unit 842 may obtain an estimated value of the requested SNR for each set of element code and parameters indicated by the input information by such processing. The estimation unit 842 outputs an estimated value of the requested SNR via the information control unit 841 and the output unit 82. In this case, the estimation unit 842 may not simply output an estimated value of the requested SNR, but may also output information indicating a set of element codes and parameters, and the corresponding estimated value of the requested SNR. Multiple sets of such information and estimated values ​​may be output.

[0041] The estimation device 80 configured in this way can estimate the required SNR for the MLC according to the input information without performing numerical simulations, by using known information (information showing the relationship between element codes and their performance (e.g., SNR)). Therefore, the coding performance can be estimated with less computation.

[0042] In the processing of the estimation device 80, for example, it may be applied to TL-MLC. In this case, if the bit level is m, the rate difference per bit level is expressed by the equation obtained by replacing "d" with "m" in equation 24.

[0043] In the estimation device 80, the storage unit 83 may be provided in another device. For example, the storage unit 83 may be provided in another information processing device that can communicate with the estimation device 80. In this case, for example, the information control unit 841 may obtain the information stored in the known information storage unit 831 of the storage unit 83 by communication.

[0044] Figure 3 is a block diagram illustrating the schematic functional configuration of the design support device 70 in the present invention. The design support device 70 comprises an input unit 71, an output unit 72, a storage unit 73, and a control unit 74. The design support device 70 may be configured using an information processing device such as a personal computer or a server, or it may be configured as a circuit formed on a circuit board.

[0045] The input unit 71, output unit 72, and storage unit 73 of the design support device 70 have the same configuration as the input unit 81, output unit 82, and storage unit 83 of the estimation device 80, respectively. The information control unit 741 and estimation unit 742 in the control unit 74 of the design support device 70 have the same configuration as the information control unit 841 and estimation unit 842 in the control unit 84 of the estimation device 80. The design information determination unit 743 will be described below.

[0046] The design information determination unit 743 selects one or more sets of element codes and parameters according to the application (applicable domain) of the CP-MLC configuration, based on the information indicating the set of element codes and parameters obtained by the estimation unit 742 and the corresponding estimated value of the required SNR. The design information determination unit 743 outputs the selection result via the information control unit 841 and the output unit 82.

[0047] The design support device 70 configured in this way can easily determine the element codes and parameters suitable for the application of the MLC (e.g., CP-MLC) configuration based on the estimated required SNR.

[0048] The design support device 70 configured in this way may be incorporated into a DSP. Figure 4 shows an example of the configuration of a DSP configured in this way. In Figure 4, the DSP 60 is applied to a transceiver and is a device using MLC. The DSP 60 may be, for example, a coherent DSP. The DSP 60 comprises the design support device 70 and a transceiver signal processing circuit 61. The transceiver signal processing circuit 61 comprises an FEC circuit 611 and other circuits 612. A specific example of the transceiver signal processing circuit 61 is, for example, BICM (Reference 1). Reference 1: Caire, Giuseppe, Giorgio Taricco, and Ezio Biglieri. "Bit-interleaved coded modulation." IEEE transactions on information theory 44.3 (1998): 927-946.

[0049] The transmit / receive signal processing circuit 61 requests appropriate element codes and parameters from the design support device 70 according to the state of the transmission line to which its device is connected. The element codes and parameters determined by the design support device 70 are set in the FEC circuit 611 by the transmit / receive signal processing circuit 61. Such processing is performed at predetermined timings. For example, it may be performed at predetermined time intervals, or it may be performed when the state of the transmission line changes by more than a predetermined threshold.

[0050] The following describes specific examples of CP-MLC configurations to which the estimation device 80 or design support device 70 can be applied. Figure 5 is a block diagram showing an example configuration of the transmitter 1. The transmitter 1 is part of a digital coherent communication system and is used to transmit data to be transmitted (hereinafter referred to as "transmitted data"). The transmitter 1 transmits the transmitted data to a receiving device connected via a communication channel. The communication channel is assumed to be, for example, an AWGN (Additive White Gaussian Noise) communication channel.

[0051] The transmitting device 1 comprises an encoding circuit 10, a symbol mapper 11, and a transmitting unit 12. The encoding circuit 10 consists of an S / P conversion unit 110, a sequence conversion unit 120, a P / S conversion unit 130, an external encoder 140, a 1:d converter 150, an SD-FEC encoding unit 160, a bit conversion circuit 170, and a d:m converter 180.

[0052] The S / P conversion unit 110 divides the input data to be transmitted into multiple data by performing a serial-to-parallel conversion. For example, the S / P conversion unit 110 divides the data to be transmitted into two data. The data to be transmitted is a uniform sequence of data. Here, a uniform sequence refers to an information sequence (e.g., bits) that occurs according to a uniform distribution.

[0053] The sequence conversion unit 120 converts a uniform sequence to a non-uniform sequence. Specifically, the sequence conversion unit 120 is a converter that reversibly converts a uniform bit sequence of length k (where k is an integer greater than or equal to 1) to a non-uniform symbol sequence of length n (where n is an integer greater than or equal to 1). Here, k ≤ n × (m-1), and the redundancy nk is determined according to the shape of the non-uniform distribution. m is the bit length per symbol (bit / symbol). A non-uniform sequence refers to an information sequence that is not a uniform sequence. d ≥ m, where d represents the number of lanes in the 1:d converter 150.

[0054] The P / S conversion unit 130 converts the uniform sequence data output from the S / P conversion unit 110 and the non-uniform sequence data converted by the sequence conversion unit 120 into serial data by performing a parallel-to-serial conversion.

[0055] The external encoder 140 corrects all remaining errors simultaneously, including those that could not be corrected by the SD-FEC. The external encoder 140 is one embodiment of the external coding unit.

[0056] The 1:d converter 150 divides the output from the external encoder 140 into d lanes (where d is an integer greater than or equal to 2), assigns a portion of the uniform sequence data to the first lane, and assigns the remaining uniform sequence and amplitude sequence to lanes 2 through d. The 1:d converter 150 may also perform interleaving as needed to prevent burst errors caused by the internal coding.

[0057] The SD-FEC coding unit 160 performs coding using error correction codes.

[0058] The bit conversion circuit 170 is a conversion circuit that ensures that the ratio of inputs to outputs that remain unchanged for a given number of bits d per symbol is less than or equal to (d-1) / d. When combined with a receiver, it concentrates errors in the bits of the first lane, virtually reducing errors in the bits of the second to d lanes.

[0059] The d:m converter 180 converts the data sequences transmitted in each of the 1-d lanes into data sequences in the m lane.

[0060] The symbol mapper 11 generates transmission data by assigning uniformly distributed bits to the LSB (Least Significant Bit), which corresponds to the sign of the symbol, and non-uniformly distributed bits to the MSBs (Most Significant Bits), which correspond to the amplitude, similar to conventional PAS.

[0061] The transmitting unit 12 transmits the transmission data generated by the symbol mapper 11.

[0062] Figure 6 is a block diagram showing an example configuration of the receiving device 2. The receiving device 2 is a transmitting device used in a digital coherent communication system. The receiving device 2 receives transmission data sent from the transmitting device 1, which is connected via a communication path.

[0063] The receiving device 2 comprises a receiving unit 20, a symbol demapper 21, and a decoding circuit 22.

[0064] The receiving unit 20 receives the transmission data sent from the transmitting device 1 via the communication channel.

[0065] The symbol demapper 21 demodulates the transmitted data received by the receiver 20 using a demodulation method corresponding to the modulation scheme.

[0066] The decoding circuit 22 consists of an S / P conversion unit 220, an SD likelihood calculation unit 230, an SD-FEC decoding unit 240, a plurality of HD likelihood calculation units 250-1 to 250-d, a d:1 converter 260, an external code decoder 270, an S / P conversion unit 280, an inverse sequence conversion unit 290, and a P / S conversion unit 300.

[0067] The S / P conversion unit 220 divides the transmitted data into multiple data by performing a serial-to-parallel conversion on the transmitted data demodulated by the symbol demapper 21. For example, the S / P conversion unit 220 divides the transmitted data into a number of d corresponding to the number of lanes.

[0068] The SD likelihood calculation unit 230 calculates the likelihood based on the data output from the S / P conversion unit 220 and the channel information. The channel information represents the noise distribution of the channel. The channel information can be measured using a spectrum analyzer or the like. It is assumed that the channel information has been measured in advance and is stored in the SD likelihood calculation unit 230.

[0069] The processing of the SD likelihood calculation unit 230 will be explained in more detail. The SD likelihood calculation unit 230 is a circuit that calculates the probability likelihood L^(1) of the probability P(y|z^(1)) input to the SD-FEC decoding unit 240 in order to estimate the codeword z^(1) output by the SD-FEC coding unit 160 from the received word y and the channel information P(y|x). For example, if the channel P(y|z^(1)) is y=[y_1 ,If each symbol is independent, as in [y_2...y_n'], the SD likelihood calculation unit 230 calculates the likelihood L_i^(1) based on the following equation 26.

[0070]

number

[0071] Here, n' = n / d, which is an integer. Assume that the code length and the number of partitions are designed so that n' is an integer. Furthermore, y_i = [y_i^(1)y_i^(2)...y_i^(d)].

[0072] The SD-FEC decoding unit 240 performs error correction decoding using the likelihood L_i^(1) calculated by the SD likelihood calculation unit 230, and obtains the error-corrected codeword z^(1).

[0073] Multiple HD likelihood calculation units 250-1 to 250-d calculate the likelihood for the conditional probability P(y, z^(1)|z^(s)) based on the corrected codeword z^(1), the received word y, and the channel information P(y|x). For example, similar to the SD likelihood calculation unit 230, if the channel P(y|z^(1)) is independent for each subscript, such as y=[y_1y_2…y_n'], each HD likelihood calculation unit 250 makes a hard determination based on the following equation 27 and calculates the bit z^(s). Note that s is an integer between 2 and d, inclusive.

[0074]

number

[0075] The d:1 converter 260 receives the codeword z transmitted in one lane. (1) The corresponding information bit sequence and each z^(s) are combined into one.

[0076] The external code decoder 270 performs external code decoding after converting the bit sequence.

[0077] The S / P conversion unit 280 divides the input data into multiple data sets by performing a serial-to-parallel conversion. For example, the S / P conversion unit 280 divides the data into two data sets. The S / P conversion unit 280 outputs the non-uniform sequence data to the inverse sequence conversion unit 290 and the uniform sequence data to the P / S conversion unit 300.

[0078] The inverse sequence conversion unit 290 converts a non-uniform sequence into a uniform sequence. Specifically, the inverse sequence conversion unit 290 is a converter that reversibly converts a non-uniform symbol sequence of length n into a uniform bit sequence of length k. This restores the original uniform sequence.

[0079] The P / S conversion unit 300 converts the uniform sequence data output from the S / P conversion unit 280 and the uniform sequence data converted by the inverse sequence conversion unit 290 into serial data by performing a parallel-to-serial conversion. This allows the transmitted data to be decoded.

[0080] Although embodiments of this invention have been described in detail above with reference to the drawings, the specific configuration is not limited to these embodiments and includes designs and the like that do not depart from the spirit of this invention. [Industrial applicability]

[0081] This invention can be applied to the design of communication systems using encoders and decoders. [Explanation of symbols]

[0082] 1…Transmitter, 2…Receiver, 10…Encoding circuit, 20…Receiver unit, 21…Symbol demapper, 22…Decoding circuit, 70…Design support device, 71…Input unit, 72…Output unit, 73…Storage unit, 731…Known information storage unit, 74…Control unit, 741…Information control unit, 742…Estimation unit, 743…Design information determination unit, 80…Estimation device, 81…Input unit, 82…Output unit, 83…Storage unit, 831…Known information storage unit, 84…Control unit, 841…Information control unit, 842…Estimation unit

Claims

1. An estimation device comprising: a storage unit that stores a set of element codes and parameters used for communication in association with an SNR required to achieve a predetermined communication quality in communication using the element codes and parameters, and a control unit that reads information from the storage unit and estimates the SNR required to achieve the predetermined communication quality in MLC (Multilevel Coding) communication using the element codes and parameters indicated by the input information.

2. A storage unit stores a set of element codes and parameters used in communication in association with the SNR required to achieve a predetermined communication quality in communication using the element codes and parameters, and an estimation unit reads information from the storage unit and estimates the SNR required to achieve the predetermined communication quality in MLC (Multilevel Coding) communication using the codes and parameters indicated by the input information. A design support device comprising: a design information determination unit that determines one or more sets of element codes and parameters to be applied to the MLC based on the information estimated by the estimation unit.

3. An estimation method comprising: a control step of reading information from a storage unit that stores a set of element codes and parameters used for communication in association with an SNR required to achieve a predetermined communication quality in communication using the element codes and parameters, and estimating the SNR required to achieve the predetermined communication quality in MLC (Multilevel Coding) communication using the element codes and parameters indicated by the input information.

4. An estimation step of reading information from a storage unit that stores a set of element codes and parameters used in communication in association with the SNR required to achieve a predetermined communication quality in communication using the element codes and parameters, and estimating the SNR required to achieve the predetermined communication quality in MLC (Multilevel Coding) communication using the element codes and parameters indicated by the input information, A design support method comprising: a design information determination step of determining one or more sets of element codes and parameters to be applied to the MLC based on the information estimated in the estimation step.

5. A computer program for causing a computer to function as an estimation device, comprising: a storage unit that stores a set of element codes and parameters used for communication in association with an SNR required to achieve a predetermined communication quality in communication using the element codes and parameters; a control unit that reads information and estimates the SNR required to achieve the predetermined communication quality in MLC (Multilevel Coding) communication using the element codes and parameters indicated by the input information.

6. A storage unit stores a set of element codes and parameters used in communication, and the SNR required to achieve a predetermined communication quality in communication using the element codes and parameters, in association with each other. An estimation unit reads information from this storage unit and estimates the SNR required to achieve the predetermined communication quality in MLC (Multilevel Coding) communication using the element codes and parameters indicated by the input information. A computer program for causing a computer to function as a design support device, comprising: a design information determination unit that determines one or more sets of element codes and parameters to be applied to the MLC based on the information estimated by the estimation unit.

Images