Circuit board inspection method

Abstract

This simple configuration allows for easy identification of abnormal internal wiring within printed circuit boards. [Solution] The PCB inspection method includes a first wiring step S11, a first measurement step S12, a second wiring step S14, a second measurement step S15, and a identification step S18. In the first wiring step S11, a first wiring pattern is formed by electrically connecting at least two internal wirings that extend from one side 200A of the PCB 20 through the interior of the PCB 20 to either side 200A or side 200B. In the first measurement step S12, the resistance value R of the first wiring pattern is measured. In the second wiring step S14, a second wiring pattern is formed that includes at least one internal wiring included in the first wiring pattern. In the second measurement step S15, the resistance value R of the second wiring pattern is measured. In the identification step S18, abnormal internal wiring is identified based on the measurement results of the first measurement step and the measurement results of the second measurement step.

Description

Technical Field

[0001] This invention relates to an inspection method for forming a daisy chain on a printed wiring board to inspect the continuity and insulation of internal wirings.

Background Art

[0002] With the increase in the number of components mounted on a printed wiring board used in electric devices and the like, the number of internal wirings and mounting terminals provided on the printed wiring board also increases, and the density of mounting terminals on the surface of the printed wiring board is increasing. When inspecting the internal wirings and mounting terminals, it is common to use probes to check the insulation and continuity for each of all the internal wirings.

[0003] As the density of the printed wiring board increases, the size of the mounting terminals becomes smaller, making it difficult to cope with conventional probes. On the other hand, in the semiconductor structure of Patent Document 1, two sets of daisy chains are formed for the test circuit, and the short circuits of the two sets of daisy chains are simultaneously checked to identify the short circuit locations.

Prior Art Documents

Patent Documents

[0004]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0005] In the semiconductor structure of Patent Document 1, a switching circuit for checking the short circuit of the daisy chain is required, and the switching process of the switch is repeated until the short circuit location is found, so it is expected that the time until the short circuit location is identified will be long.

[0006] This invention has been made in view of the above problems, and aims to provide a circuit board inspection method that can easily identify abnormal internal wiring contained in a printed circuit board with a simple configuration. [Means for solving the problem]

[0007] The invention made to solve the above problems is a substrate inspection method that includes: a first wiring step of electrically connecting at least two internal wirings in series to form a first wiring pattern on a printed circuit board, each of which is conductive and extends from one side of the printed circuit board through the interior of the printed circuit board to the one side or the other side facing the opposite side; a first measurement step of measuring the resistance value of the first wiring pattern; a second wiring step of electrically connecting one or more internal wirings included in the first wiring pattern and one or more other internal wirings in series to form a second wiring pattern different from the first wiring pattern; a second measurement step of measuring the resistance value of the second wiring pattern; and a identification step of identifying an abnormal internal wiring from among the plurality of internal wirings based on the measurement results of the first measurement step and the measurement results of the second measurement step.

[0008] In the substrate inspection method of the present invention, the internal wiring preferably forms through holes that penetrate the printed circuit board linearly from one surface to the other surface of the printed circuit board, and the printed circuit board preferably has a plurality of through holes arranged in a grid pattern formed by a plurality of vertical columns and a plurality of horizontal rows. In a substrate in which the through holes are arranged in a grid pattern in this way, it is easy to form a pair of a first wiring pattern and a second wiring pattern in which some of the internal wiring overlaps.

[0009] In the substrate inspection method of the present invention, it is preferable that the first wiring pattern is formed by connecting in series only all of the through holes located in any one of the plurality of horizontal rows, and the second wiring pattern is formed by connecting in series only all of the through holes located in any one of the plurality of vertical rows. This allows the first wiring pattern and the second wiring pattern to be formed with simple trajectories. [Effects of the Invention]

[0010] According to the present invention, it is possible to easily identify abnormal internal wiring contained in a printed circuit board with a simple configuration. [Brief explanation of the drawing]

[0011] [Figure 1] This is a block diagram showing comparative examples of a substrate inspection system according to an embodiment of the present invention. [Figure 2] This figure shows an example of a printed circuit board used in a circuit board inspection system. [Figure 3] This is a block diagram showing a substrate inspection system according to an embodiment of the present invention. [Figure 4] This is a schematic diagram showing the structure of the first wiring pattern. [Figure 5] This is a table showing an example of routing information for the first wiring pattern. [Figure 6] This is a block diagram showing a circuit board inspection system with a second wiring pattern formed on it. [Figure 7] This is a table showing an example of routing information for the second wiring pattern. [Figure 8] This is a flowchart showing a substrate inspection method according to an embodiment of the present invention. [Figure 9] Here are some other examples of printed circuit boards used in board inspection systems. [Figure 10] This is a block diagram showing a simulated 4-terminal measurement in a modified example 1 of the substrate inspection system according to an embodiment of the present invention. [Figure 11]This is a block diagram showing a 4-terminal measurement in a modified example 2 of the substrate inspection system according to an embodiment of the present invention. [Figure 12] This is a cross-sectional view showing a printed circuit board that is the target of inspection in Modification 3 of the circuit board inspection system. [Modes for carrying out the invention]

[0012] The embodiments of the present invention will be described in detail below, with reference to drawings as appropriate, in comparison with examples previously investigated by the applicant (hereinafter referred to as "comparative examples"). However, the present invention is not limited to the following embodiments. In the drawings, the same or corresponding parts are denoted by the same reference numerals and will not be repeated in the description.

[0013] [Comparative Example] Figure 1 is a block diagram showing a comparative example of the substrate inspection system 10 according to an embodiment of the present invention. The substrate inspection system 10A, which is a comparative example of the substrate inspection system 10, comprises an inspection device 100 and a printed wiring board (PCB) 20. The inspection device 100 inspects the PCB 20. Specifically, the inspection device 100 measures the resistance value of the internal wiring formed on the PCB 20 and determines whether the internal wiring is normal or not based on the measured resistance value.

[0014] The inspection device 100 is connected to the PCB 20 and includes one or more probes 30 that allow an electrical signal to flow between the inspection device 100 and the PCB 20, a resistance measurement unit 130 that measures the resistance value of the internal wiring of the PCB 20 via the probes 30, a monitor 150 that displays a screen showing various data including the measurement results of the resistance measurement unit 130, a control unit 110 that controls the resistance measurement unit 130 and the monitor 150, and a storage unit 120 that stores various data including the measurement results of the resistance measurement unit 130 and programs. The number of probes 30 provided is corresponding to the number of internal wirings of the PCB 20. In the present embodiment, as an example, a case where 30 probes 30 corresponding to 15 internal wirings are provided will be described. Each of the probes 30 is provided with switches SW11 to S15 that switch between connection and disconnection between the internal wiring of the PCB 20 and the resistance measurement unit 130. The switches SW11 to S15 are switching elements such as transistors, for example, and the switching is controlled by a control signal from the control unit 110.

[0015] The control unit 110 includes an arithmetic unit 111 that acquires the measurement results of the resistance measurement unit 130 and performs arithmetic processing, a switch control unit 112 that outputs a control signal for controlling the switching of the switches SW11 to SW15, and an output unit 113 that outputs the measurement results of the resistance measurement unit 130 or the arithmetic results of the arithmetic unit 111, etc. to the monitor 150. The control unit 110 includes a processor such as a CPU (Central Processing Unit). The storage unit 120 includes a storage device such as a hard disk drive (HDD) or a semiconductor memory. The control unit 110 functions as the arithmetic unit 111, the switch control unit 112, and the output unit 113 by reading and executing the programs in the storage unit 120.

[0016] FIG. 2 is a diagram showing an example of a printed wiring board (PCB) used in the substrate inspection system 10A. The PCB 20 includes a substrate 200 on a flat plate and internal wirings formed on at least one surface 200A of the substrate 200, inside the substrate 200, or on the other surface 200B opposite to the one surface 200A. FIG. 2(a) shows one surface 200A of the substrate 200. FIG. 2(b) shows a cross-section taken along the line b-b in FIG. 2(a). FIG. 2(c) shows a cross-section taken along the line c-c in FIG. 2(a).

[0017] The PCB 20 includes, as internal wirings, 15 through-hole vias V11 to V15, V21 to V25, and V31 to V35. Hereinafter, the through-hole vias are simply referred to as vias, and each of the vias is also described as via V. The via V forms a circular through-hole that linearly penetrates the substrate 200 in the thickness direction from one surface 200A to the other surface 200B of the substrate 200. For example, each via V is arranged in a lattice pattern formed by a plurality of vertical rows and a plurality of horizontal rows on the substrate 200. Specifically, the vias V11 to V15, V21 to V25, and V31 to V35 are each arranged in a horizontal row, and the vias V11 to V15, the vias V21 to V25, and the vias V31 to V35 are arranged vertically side by side with each other. The PCB 20 in which the vias V are arranged in a lattice pattern is used as an "interposer substrate" arranged between the mounting substrate and the mounting component.

[0018] On the wall surface of each via V, a conductive pattern wiring Pt is formed respectively. As an example, as shown in FIGS. 2(b) and 2(c), the pattern wiring Pt21 is formed on the wall surface of V21, the pattern wiring Pt22 is formed on the wall surface of V22, the pattern wiring Pt23 is formed on the wall surface of V23, the pattern wiring Pt24 is formed on the wall surface of V24, the pattern wiring Pt25 is formed on the wall surface of V25, the pattern wiring Pt13 is formed on the wall surface of V13, and the pattern wiring Pt33 is formed on the wall surface of V33.

[0019] In the PCB inspection system 10A, the resistance measurement unit 130 of the inspection device 100 measures the resistance value of each of the 15 vias V by two-terminal measurement. The resistance measurement unit 130 includes a constant current source PS and a voltmeter Vm. One end of 15 of the 30 probes 30 is connected in parallel to the current output terminal of the constant current source PS. The other ends of the 15 probes 30 are each connected to the 200A side end of one of the 15 vias V. On the other hand, one end of the remaining 15 probes 30 is connected in parallel to the current input terminal of the constant current source PS. The other ends of the remaining 15 probes 30 are each connected to the 200B side end of the other side of the 15 vias V. In this way, in the PCB inspection system 10A, 15 loops are formed by the constant current source PS, the probes 30, the internal wiring of the PCB 20, and other probes 30.

[0020] The constant current source PS supplies a constant current to 15 loops in accordance with the control unit 110. At this time, the switch control unit 112 outputs a control signal that connects only one of the switches SW11 to SW15 and disconnects the other 14 switches, thereby allowing current to flow to only one loop.

[0021] The voltmeter Vm is connected in parallel to the constant current source PS and measures the voltage between the current output terminal and current input terminal of the constant current source PS. When only one of switches SW11 to SW15 is connected, the voltmeter Vm measures the voltage across one via V.

[0022] The calculation unit 111 acquires the measurement result of the voltmeter Vm and calculates the resistance value of via V based on the measurement result of the voltmeter Vm and the current supplied by the constant current source PS. By sequentially switching the switches connected by the switch control unit 112, the calculation unit 111 can calculate the resistance value of each of the 15 vias V.

[0023] The calculation unit 111 determines whether each of the 15 vias V is normal or not based on the calculated resistance values. The calculation unit 111 stores the calculated resistance values ​​of each of the 15 vias V, or the determination results for each of the 15 vias V, in the storage unit 120, or outputs them to the monitor 150 via the output unit 113.

[0024] [Embodiment] Figure 3 is a block diagram showing a substrate inspection system 10 according to an embodiment of the present invention. The substrate inspection system 10 comprises the same inspection device 100 as the substrate inspection system 10A and a PCB 20.

[0025] The PCB inspection system 10 differs from the PCB inspection system 10A in its inspection method. In the PCB inspection method of this embodiment used in the PCB inspection system 10, a daisy chain DC is formed on the PCB 20 by electrically connecting multiple vias V in series, and the resistance value is measured relative to the daisy chain DC.

[0026] [First Wiring Step] For example, PCB20 forms a daisy chain DC11 in which all vias V11 to V15, which are arranged in a horizontal row, are connected in series; a daisy chain DC12 in which vias V21 to V25 are connected in series; and a daisy chain DC13 in which vias V31 to V35 are connected in series. Daisy chains DC11, DC12, and DC13 are examples of the first wiring pattern.

[0027] Figure 4 is a schematic diagram showing the structure of the daisy chain DC12. Figure 4 shows a cross-section of Figure 2(b) when the daisy chain DC12 is formed. The daisy chain DC12 will be described as a representative example below, but the explanations of daisy chain DC11 and daisy chain DC13 will be omitted as they are similar to daisy chain DC12. For example, the daisy chain DC12 is formed from PCB 20 and flexible printed circuit boards (FPCs) 21A and 21B. Conductive pattern wiring L1 to L6 corresponding to each via of PCB 20 are formed on FPCs 21A and 21B.

[0028] Specifically, FPC21A is positioned to cover one side of PCB20 by 200A. FPC21A has a pattern trace L1 corresponding to via V21 that connects to the end of pattern trace Pt21 on the 200A side of one side, a pattern trace L2 corresponding to vias V22 and V23 that connects the end of pattern trace Pt22 on the 200A side of one side to the end of pattern trace Pt23 on the 200A side of one side, and a pattern trace L3 corresponding to vias V24 and V25 that connects the end of pattern trace Pt24 on the 200A side of one side to the end of pattern trace Pt25 on the 200A side of one side.

[0029] On the other hand, FPC21B is positioned to cover the other side 200B of PCB20. FPC21B has via V21 and pattern wiring L4 which connects the end of pattern wiring Pt21 on the other side 200B to the end of pattern wiring Pt22 on the other side 200B corresponding to via V21, pattern wiring L5 which connects the end of pattern wiring Pt23 on the other side 200B to the end of pattern wiring Pt24 on the other side 200B corresponding to via V23 and via V24, and pattern wiring L6 which connects to the end of pattern wiring Pt25 on the other side 200B corresponding to via V25.

[0030] Therefore, by sandwiching PCB20 between FPC21A and 21B, pattern traces L1 to L6 are connected to vias V21 to V25, forming a daisy chain DC12 that goes from pattern trace L1 through vias V21, L4, V22, L2, V23, L5, V24, L3, and V25 to pattern trace L6.

[0031] In addition to using FPC21A and 21B, the daisy chain DC11, DC12, and DC13 may also be formed by connecting adjacent vias V with probe pins or by connecting vias V using anisotropic conductive rubber.

[0032] [First measurement step] In the board inspection method of this embodiment, the resistance values ​​of each of the daisy chains DC11, DC12, and DC13 are measured. For example, as shown in Figures 3 and 4, probe 30A of the 30 probes 30 is connected to pattern wiring L1, which is one end of daisy chain DC12. On the other hand, probe 30A of the 30 probes 30 is connected to pattern wiring L6, which is the other end of daisy chain DC12. Therefore, when the switch control unit 112 switches only the switch SW22 connected to daisy chain DC12 to the connected state, the voltage across both ends of daisy chain DC12 is measured by the voltmeter Vm of the resistance measurement unit 130.

[0033] In the inspection device 100 of this embodiment, the calculation unit 111 acquires the measurement result of the voltmeter Vm and calculates the resistance value R of the daisy chain DC12 based on the measurement result of the voltmeter Vm and the current flowing from the constant current source PS. The storage unit 120 of the inspection device 100 of this embodiment stores path information that shows the correspondence between the daisy chain DC12 and the vias V21 to V25 included in the daisy chain DC12. For example, the path information is generated based on the operation input to the inspection device 100.

[0034] When the calculation unit 111 calculates the resistance value R of daisy chain DC12, it associates the resistance value R with the path information in the storage unit 120 and updates the path information. Figure 5 is a table showing an example of path information related to the first wiring pattern. Here, for example, in the case of a daisy chain that includes a broken via V, no current flows through the daisy chain, so the resistance value R calculated by the calculation unit 111 indicates high impedance (Hi-Z). In this embodiment, as shown in Figure 5, the resistance value R of daisy chain DC11 and daisy chain DC12 is assumed to be resistance value R1, and the resistance value R of daisy chain DC13 is assumed to be high impedance. For example, the storage unit 120 stores the reference value and error range of the resistance value R of daisy chain DC11, DC12, and DC13. The resistance value R1 is assumed to be within the error range of the reference value.

[0035] The calculation unit 111 determines whether daisy chain DC11, daisy chain DC12, and daisy chain DC13 are normal or not based on the calculated resistance value R. Specifically, the calculation unit 111 refers to the storage unit 120 and compares the resistance value R1 with a reference value, determining that daisy chain DC11 and daisy chain DC12, for which a resistance value R1 was calculated, are normal, and determining that daisy chain DC13, for which a high impedance was calculated, is abnormal. The calculation unit 111 further associates the determination result with the path information in the storage unit 120 and updates the path information.

[0036] Next, in the PCB inspection method of this embodiment, daisy chains DC21, DC22, DC23, DC24, and DC25, which are different from daisy chains DC11, DC12, and DC13, are formed on the PCB20. Each of the daisy chains DC21, DC22, DC23, DC24, and DC25 is formed by electrically connecting one via V included in any of daisy chains DC11, DC12, and DC13 with one or more other via V in series. Daisy chains DC21, DC22, DC23, DC24, and DC25 are examples of second wiring patterns.

[0037] Figure 6 is a block diagram of the board inspection system 10 with the second wiring pattern formed. Daisy chain DC21 is formed on PCB 20 by connecting via V11, which is included in daisy chain DC11, via V21, which is included in another daisy chain DC12, and via V31, which is included in daisy chain DC13, in series with each other. In other words, in daisy chain DC21, only all vias V11, V21, V31, V41, and V51, which are arranged in a vertical line on PCB 20, are connected in series with each other.

[0038] [Second Wiring Step] Similarly, daisy chain DC22 is formed by connecting via V12 in daisy chain DC11, via V22 in daisy chain DC12, and via V32 in daisy chain DC13 in series with each other. Daisy chain DC23 is formed by connecting via V13 in daisy chain DC11, via V23 in daisy chain DC12, and via V33 in daisy chain DC13 in series with each other. Daisy chain DC24 is formed by connecting via V14 in daisy chain DC11, via V24 in daisy chain DC12, and via V34 in daisy chain DC13 in series with each other. Daisy chain DC25 is formed by connecting via V15 in daisy chain DC11, via V25 in daisy chain DC12, and via V35 in daisy chain DC13 in series with each other. The detailed formation methods for daisy chains DC21, DC22, DC23, DC24, and DC25 are the same as those for daisy chains DC11, DC12, and DC13, so the explanation is omitted.

[0039] [Second measurement step] The resistance measurement unit 130 measures the voltage across each of the daisy chains DC21, DC22, DC23, DC24, and DC25. The calculation unit 111 acquires the measurement results from the resistance measurement unit 130 and calculates the resistance value R of each of the daisy chains DC21, DC22, DC23, DC24, and DC25 based on the measurement results from the resistance measurement unit 130 and the current supplied by the constant current source PS. Once the calculation unit 111 has calculated the resistance value R of each of the daisy chains DC21, DC22, DC23, DC24, and DC25, it updates the path information in the storage unit 120 by associating the resistance value R with the path information, similar to the daisy chains DC11, DC12, and DC13. Figure 7 is a table showing an example of path information related to the second wiring pattern. In this embodiment, as shown in Figure 7, the resistance value R of daisy chains DC21, DC23, DC24, and DC25 is R2, which is within the error range of the reference value, and the resistance value R of daisy chain DC22 is high impedance. Based on the calculated resistance value R, the calculation unit 111 determines that daisy chains DC21, DC23, DC24, and DC25, for which resistance value R2 was calculated, are normal, and that daisy chain DC22, for which high impedance was calculated, is abnormal. The calculation unit 111 further associates the determination result with the path information in the storage unit 120 and updates the path information.

[0040] Once the resistance measurements for the first wiring pattern and the second wiring pattern are completed, the calculation unit 111 identifies the abnormal via V based on the measurement results for the first wiring pattern and the measurement results for the second wiring pattern. Specifically, the calculation unit 111 refers to the path information in the storage unit 120 and extracts the daisy chain DC13 and daisy chain DC22 which have been determined to be abnormal. The calculation unit 111 identifies the via V32 which is included in the extracted daisy chain DC13 and daisy chain DC22 in duplicate. The calculation unit 111 stores information indicating that the identified via V32 is abnormal in the storage unit 120 or outputs it to the monitor 150 via the output unit 113.

[0041] As described above, in the PCB inspection method of this embodiment, two types of wiring patterns are formed for multiple internal wirings included in the PCB 20, in which multiple internal wirings are connected in series while overlapping some of the internal wirings. As a result, when measuring the resistance value of multiple internal wirings individually, twice the number of probes and switches are required for each internal wiring. However, by forming two types of wiring patterns, the number of probes and switches required for measuring the resistance value can be reduced to the number of the larger of the two wiring patterns. The larger the circuit size of the PCB 20 and the greater the number of internal wirings, the greater the reduction in the number of probes and switches. Furthermore, since some internal wirings overlap between the two types of wiring patterns, measuring the resistance values ​​of the two types of wiring patterns makes it easy to determine whether the overlapping internal wiring is abnormal or not. Therefore, in the PCB inspection method of this embodiment, abnormal internal wirings among the internal wirings included in the PCB can be easily identified with a simple configuration.

[0042] In particular, in a substrate where vias V are arranged in a grid pattern, such as PCB20 in this embodiment, it is easy to form two types of wiring patterns in which some internal wiring overlaps. Specifically, by forming a first wiring pattern in which internal wiring arranged in a horizontal grid is connected in series, and a second wiring pattern in which internal wiring arranged in a vertical grid is connected in series, two types of wiring patterns can be formed with a simple trajectory.

[0043] Furthermore, in the circuit board inspection method of this embodiment, in addition to identifying a broken via V as an abnormality in internal wiring, it is also possible to identify two or more vias V that are incorrectly conducting within each daisy chain DC. Specifically, if two or more vias V within each daisy chain DC are incorrectly conducting, a resistance value R exceeding the error range of the reference value is measured. Therefore, vias V that are duplicated in the daisy chain DC where a resistance value R exceeding the error range of the reference value is measured are identified as abnormalities in internal wiring.

[0044] Figure 8 is a flowchart showing a substrate inspection method according to an embodiment of the present invention. In the substrate inspection method of this embodiment, first, a daisy chain DC11, DC12, DC13 is formed by electrically connecting a plurality of vias V included in the PCB 20 in series ((first wiring) step S11).

[0045] The control unit 110 and the resistance measuring unit 130 measure the resistance values ​​of each of the daisy-chained DC11, DC12, and DC13 ((first measurement) step S12).

[0046] The control unit 110 stores the measurement results for the daisy-chain DC11, DC12, and DC13 in the storage unit 120 (step S13).

[0047] Next, a daisy chain DC21, DC22, DC23, DC24, DC25 is formed by electrically connecting some of the vias V included in the first wiring pattern with one or more other vias V from among the multiple vias V included in the PCB20 ((second wiring) step S14).

[0048] The control unit 110 and the resistance measuring unit 130 measure the resistance values ​​of each of the daisy-chain DC21, DC22, DC23, DC24, and DC25 ((second measurement) step S15).

[0049] The control unit 110 stores the measurement results for the daisy-chain DC21, DC22, DC23, DC24, and DC25 in the storage unit 120 (step S16).

[0050] The control unit 110 determines whether there are abnormal wiring patterns in the daisy chain DC11, DC12, DC13, DC21, DC22, DC23, DC24, DC25 based on the measurement results for the daisy chain DC11, DC12, DC13, DC21, DC22, DC23, DC24, DC25 (step S17). If there are no abnormal wiring patterns in the daisy chain DC11, DC12, DC13, DC21, DC22, DC23, DC24, DC25 (NO in step S17), the board inspection method is terminated.

[0051] If there is an abnormal wiring pattern in the daisy chain DC11, DC12, DC13, DC21, DC22, DC23, DC24, DC25 (YES in step S17), the calculation unit 111 identifies the via V that is included in the abnormal wiring pattern (identification step S18), and the board inspection method is completed.

[0052] In this embodiment, the PCB 20 has vias V arranged in three vertical and five horizontal rows, but the arrangement of vias V is not particularly limited. Figure 9 shows PCB 20A, which has a different arrangement of vias V than PCB 20. Figure 9(a) shows the formation of the first wiring pattern on PCB 20A.

[0053] As shown in Figure 9(a), PCB20A has five vias V arranged vertically and five horizontally on PCB20, and when forming the first wiring pattern on PCB20A, FPC21C and 21D are used, similar to FPC21A and 21B which correspond to PCB20.

[0054] Figure 9(b) shows the formation of the second wiring pattern on PCB 20A. The arrows in Figure 9 indicate that FPC 21C and 21D are rotated 90 degrees clockwise relative to PCB 20A which is oriented in the same direction. When forming the second wiring pattern on PCB 20A, FPC 21C and 21D, which were used when forming the first wiring pattern, are used with their orientations changed by 90 degrees.

[0055] Thus, as in PCB20A, when the number of vias V in the vertical and horizontal rows is the same and the spacing between the vertical and horizontal rows is the same, the first and second wiring patterns can be accommodated simply by changing the orientation of FPC21C and 21D by 90 degrees. FPC21C and 21D can be reused for forming the first and second wiring patterns, respectively. In contrast to PCB20 (Figure 2), where different FPC21A and 21B are required for the first and second wiring patterns, the number of instruments used in the board inspection method can be reduced.

[0056] [Example 1] Next, a modified example 1 of the substrate inspection system 10 according to an embodiment of the present invention will be described. Modified example 1 of the substrate inspection system 10 is the same as the substrate inspection system 10 except that the method of measuring the resistance value of the daisy-chain DC by the inspection device 100 is different. Specifically, in modified example 1 of the substrate inspection system 10, the resistance measurement unit 130 of the inspection device 100 measures the resistance value of the daisy-chain DC by a simulated four-terminal measurement.

[0057] Figure 10 is a block diagram showing a simulated four-terminal measurement in a modified example 1 of the substrate inspection system according to an embodiment of the present invention. Figure 10 schematically shows the resistance measurement unit 130 when performing a simulated four-terminal measurement on the daisy-chain DC12 shown in Figure 3, etc.

[0058] In a simulated four-terminal measurement, the voltage measurement points differ from those in a two-terminal measurement. Specifically, in a simulated four-terminal measurement, the method of connecting the probe 30 to PCB20 differs from that in a two-terminal measurement. More precisely, in a simulated four-terminal measurement, the probe 30 connected to the constant current source PS and the probe 30 connected to the voltmeter Vm are separated. The probe 30 connected to the constant current source PS is connected to pattern wiring L1 and pattern wiring L6, which are the ends of the daisy chain DC12. The probe 30 connected to the voltmeter Vm is connected to pattern wiring L1 to L6, which are connected to the ends of vias V21 to V25, respectively. The voltmeter Vm measures the voltage between pattern wiring L1 and pattern wiring L4, between pattern wiring L4 and pattern wiring L2, between pattern wiring L2 and pattern wiring L5, between pattern wiring L5 and pattern wiring L3, and between pattern wiring L3 and pattern wiring L6, respectively.

[0059] In the case of simulated four-terminal measurement, the voltage measured is on the PCB20 side rather than the switch SW22. Therefore, the voltage measured by the voltmeter Vm is the voltage after the parasitic resistance of various components such as the switch SW22 has been removed. Thus, simulated four-terminal measurement can measure the resistance value of the daisy-chain DC12 more precisely than two-terminal measurement. In addition, while the reduction rate is smaller in the case of simulated four-terminal measurement compared to measuring the resistance value of multiple internal wirings individually, the number of probes and switches required for resistance measurement can be reduced.

[0060] [Differentiation 2] Next, a modified example 2 of the substrate inspection system 10 according to an embodiment of the present invention will be described. Modified example 2 of the substrate inspection system 10 is the same as the substrate inspection system 10 except that the method of measuring the resistance value of the daisy-chain DC by the inspection device 100 is different. Specifically, in modified example 2 of the substrate inspection system 10, the resistance measurement unit 130 of the inspection device 100 measures the resistance value of the daisy-chain DC by 4-terminal measurement.

[0061] Figure 11 is a block diagram showing a 4-terminal measurement in a modified example 2 of the substrate inspection system according to an embodiment of the present invention. Figure 11 schematically shows the resistance measurement unit 130 when performing a 4-terminal measurement on a daisy-chain DC12 as shown in Figure 3, etc.

[0062] In 4-terminal measurement, the voltage measurement points differ from those in 2-terminal measurement and pseudo-4-terminal measurement. In other words, in 4-terminal measurement, the method of connecting the probe 30 to PCB20 differs from that in 2-terminal measurement and pseudo-4-terminal measurement. Specifically, in 4-terminal measurement, similar to pseudo-4-terminal measurement, the probe 30 connected to the constant current source PS and the probe 30 connected to the voltmeter Vm are separated. The probe 30 connected to the constant current source PS is connected to pattern wiring L1 and pattern wiring L6, which are the ends of the daisy chain DC12. The probe 30 connected to the voltmeter Vm is connected to the ends of vias V21 to V25. The voltmeter Vm measures the voltage between the ends of vias V21 to V25.

[0063] In the case of 4-terminal measurement, the voltage measured by the voltmeter Vm is the voltage after the parasitic resistance of pattern wiring L1 to L6 has been further removed compared to a pseudo-4-terminal measurement. Therefore, 4-terminal measurement can measure resistance values ​​more precisely than a pseudo-4-terminal measurement.

[0064] [Difference 3] Next, a third modification of the substrate inspection system 10 according to an embodiment of the present invention will be described. The third modification of the substrate inspection system 10 is the same as the substrate inspection system 10 except that the object to be inspected is different from the PCB 20.

[0065] Figure 12 is a cross-sectional view showing a PCB 22 that is the object of inspection in Modification 3 of the PCB inspection system 10. The PCB 22 that is the object of inspection in Modification 3 of the PCB inspection system 10 includes a flat substrate 201 and a plurality of pattern wirings Pt3 that have different shapes from vias V. The pattern wirings Pt3 are conductive and extend from one side 201A of the substrate 201 through the interior of the substrate 201 to the other side 201B that faces either side 201A or the opposite side 201A.

[0066] For example, in modified example 3 of the board inspection system 10, two types of daisy chains DC41 and daisy chain DC42 are formed by connecting multiple pattern wirings Pt3 in series using a PCB 22 and FPCs 21E and 21F on which multiple pattern wirings L7 that connect multiple pattern wirings Pt3 are arranged. Daisy chain DC41 goes from pattern wiring L71 (Figure 12) through one or more pattern wirings Pt3 and one or more pattern wirings L7 to pattern wiring L72 (Figure 12). Daisy chain DC42 goes from pattern wiring L72 (Figure 12) through one or more pattern wirings Pt3 and one or more pattern wirings L7 to pattern wiring L73 (Figure 12).

[0067] The control unit 110 and the resistance measurement unit 130 measure the resistance values ​​of daisy chain DC41 and daisy chain DC42 by 2-terminal measurement, pseudo 4-terminal measurement, or 4-terminal measurement. Based on the measurement results of the resistance values ​​of daisy chain DC41 and daisy chain DC42, the control unit 110 identifies abnormalities in the pattern wiring Pt3 included in daisy chain DC41 and daisy chain DC42.

[0068] In this embodiment, the substrate inspection method was performed using the inspection device 100, but the substrate inspection method may be performed without using the inspection device 100. For example, the resistance values ​​of the first wiring pattern and the second wiring pattern formed on the printed circuit board may be measured manually, and abnormal internal wiring may be identified based on the measured resistance values.

[0069] As described above, the substrate inspection method of the present invention is not limited to the embodiments described above, and can be implemented in various forms without departing from the spirit of the invention. Furthermore, the multiple components disclosed in the above embodiments can be modified as appropriate. For example, some components from all the components shown in one embodiment may be added to the components of another embodiment, or some components from all the components shown in one embodiment may be deleted from the embodiment.

[0070] Furthermore, the drawings schematically show each component in order to facilitate understanding of the invention, and the thickness, length, number, spacing, etc. of each component shown may differ from the actual dimensions due to the convenience of drawing creation. Also, the configuration of each component shown in the above embodiments is merely an example and is not particularly limiting, and it goes without saying that various modifications are possible without substantially departing from the effects of the present invention. [Explanation of symbols]

[0071] 10: Circuit board inspection system 20, 20A, 22: PCB 200A, 201A: One side 200B, 201B: Other side DC, DC11-DC13, DC21-DC25, DC41, DC42: Daisy chain L1~L7, L71~L73, Pt, Pt13, Pt21~Pt25, Pt3, Pt33: Pattern wiring R, R1, R2: Resistance values S11: Step (First wiring step) S12: Step (First measurement step) S14: Step (Second wiring step) S15: Step (Second measurement step) S18: Step (Specific step) SW11~SW15, SW22: Switches V, V11-V15, V21-V25, V31-V35, V41, V51: Via (Through-hole Via)

Claims

[Claim 1] A first wiring step is to form a first wiring pattern by electrically connecting at least two of the internal wirings in series with conductive external wiring outside the printed circuit board, to a printed circuit board having a plurality of internal wirings, each of which is conductive and extending from one side of the printed circuit board through the interior of the printed circuit board to the other side facing the opposite side, A first measurement step of measuring the resistance value of the first wiring pattern, A second wiring step of electrically connecting one or more internal wirings included in the first wiring pattern and one or more other internal wirings in series outside the printed circuit board by conductive external wiring to form a second wiring pattern different from the first wiring pattern, A second measurement step of measuring the resistance value of the second wiring pattern, Based on the measurement results of the first measurement step and the measurement results of the second measurement step, a selection step is performed to identify an abnormal internal wiring from among the plurality of internal wirings. Includes, The resistance measurement in the first and second measurement steps is either a two-terminal measurement, a pseudo four-terminal measurement between two adjacent external wirings, or a four-terminal measurement for each internal wiring. For the aforementioned two-terminal measurement, the aforementioned pseudo-four-terminal measurement, and the aforementioned four-terminal measurement, the external wiring is connected to the internal wiring, and a probe for measuring resistance is made externally contacted. The internal wiring forms through holes that penetrate the printed circuit board in a straight line from one side of the printed circuit board to the other side. The printed circuit board has multiple through holes arranged in a grid pattern formed by multiple vertical columns and multiple horizontal rows. The first wiring pattern is formed by connecting all of the through holes in series for each of the plurality of horizontal rows, The second wiring pattern is formed by connecting all of the through holes in series for each of the plurality of vertical columns, In the printed circuit board, the spacing between the vertical rows and the horizontal rows of the plurality of internal wirings are the same. In the first wiring step, a pair of wiring boards are used, each covering one side and the other side of the printed wiring board, and the external wiring is arranged in a direction that connects the horizontal rows of through holes. A method for inspecting a circuit board, wherein in the second wiring step, the pair of wiring boards are used in a orientation such that the external wiring connects the vertically arranged through holes.

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