Image forming apparatus

Abstract

To provide a technique that prevents electrification voltage from becoming excessive even when an image forming apparatus performs a determination as to whether cleaning of electrifying wires is executed.SOLUTION: When an ASIC 61 determines whether electrifying wires 42Y, 42M, 42C are cleaned after an abnormal discharge detection circuit 78 detects abnormal discharge during image formation, the ASIC performs constant voltage control of an electrification voltage generation circuit 70 to generate a predetermined electrification voltage value within a voltage range in which abnormal discharge does not occur in each of a plurality of electrifiers 41Y, 41M, 41C, and executes wire cleaning determination processing of determining whether the electrifying wires 42Y, 42M, 42C are cleaned based on grid currents Ig1 to Ig3 detected by a plurality of grid current detection circuits 82Y, 82M, 82C.SELECTED DRAWING: Figure 6

Description

Technical Field

[0001] This application relates to a process for dealing with abnormal discharge occurring in a charger that charges a photoreceptor.

Background Art

[0002] Patent Document 1 describes an image forming apparatus that charges a photoreceptor by a corona charger having a charging wire and a grid. In this image forming apparatus, when abnormal discharge of the corona charger is detected, an error display is made, and after opening and closing a cover that covers a housing having the corona charger, a process is executed to confirm whether cleaning of the charging wire has been performed by the user. And whether the cleaning of the charging wire has been performed is determined by performing constant current control to change the charging wire voltage so that the grid current becomes constant, and whether constant current control can be performed when the value of the charging wire voltage is below a determination reference voltage. If it can be performed, it is determined that the cleaning of the charging wire has been executed, and if it cannot be performed, it is determined that the cleaning of the charging wire has not been executed.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] As an image forming apparatus having a configuration different from that of the image forming apparatus described in Patent Document 1, there is an image forming apparatus having a plurality of corona chargers, to each of the plurality of corona chargers, the same charging voltage is applied from one charging voltage generation circuit, and to one corona charger, a charging voltage is applied from another charging voltage generation circuit.

[0005] If the above determination of whether or not the charging wire has been cleaned, as performed in the image forming apparatus described in Patent Document 1, is applied to this image forming apparatus, constant current control will be performed so that the grid current with the lowest current value among the grid currents of the multiple corona chargers becomes a predetermined target current value. Therefore, if even one of the charging wires has not been cleaned, there is a risk that the charging voltage will become excessive.

[0006] The present invention aims to provide a technology that suppresses excessive charging voltage even when determining whether or not the charged wire has been cleaned. [Means for solving the problem]

[0007] To achieve the above objective, the present invention provides an image forming apparatus comprising: a plurality of photoreceptors; a plurality of chargers having a charging wire and a grid, each of which charges the plurality of photoreceptors; a charging voltage generation circuit that generates a charging voltage, which is a voltage applied to the charging wire, and applies the charging voltage to each of the plurality of chargers; a plurality of grid voltage adjustment circuits that adjust the grid voltage, which is a voltage applied to the grid; a plurality of grid current detection circuits that detect the grid current, which is a current flowing through the grid; an abnormal discharge detection circuit that detects abnormal discharges occurring in each of the plurality of chargers; and a control device. The control device maintains the surface potential of each of the plurality of photoreceptors at a constant level until the abnormal discharge detection circuit detects an abnormal discharge during image formation, by adjusting the grid of the plurality of chargers. The system is characterized by controlling multiple grid voltage adjustment circuits so that a predetermined grid voltage is applied to each of them, controlling a charging voltage generation circuit so that the grid current with the lowest value among the multiple grid currents detected by multiple grid current detection circuits becomes a constant value, and when the abnormal discharge detection circuit detects an abnormal discharge during image formation and determines whether each charging wire has been cleaned, the charging voltage generation circuit is controlled to a constant voltage so that a predetermined charging voltage value within the voltage range in which no abnormal discharge occurs is generated in each of the multiple chargers, and executing a wire cleaning determination process to determine whether each charging wire has been cleaned based on each grid current detected by the multiple grid current detection circuits.

[0008] This makes it possible to suppress excessive charging voltage even when determining whether or not the charged wire has been cleaned.

[0009] Furthermore, the predetermined charging voltage value is characterized by being lower by a predetermined voltage value than the charging voltage value generated by the charging voltage generation circuit when the abnormal discharge detection circuit detects an abnormal discharge.

[0010] This makes it possible to further enhance the effect of suppressing excessive charging voltage.

[0011] Furthermore, when the control device performs wire cleaning determination processing, it is characterized by changing the grid voltage applied to each grid of multiple chargers to a single voltage value common to all grids, which is lower than the grid voltage before abnormal discharge was detected.

[0012] This makes it possible to further enhance the effect of suppressing excessive charging voltage.

[0013] Furthermore, the image forming apparatus of the present invention further comprises: one photoreceptor different from multiple photoreceptors; one charger having a charging wire and a grid for charging the one photoreceptor; one charging voltage generation circuit that generates a charging voltage which is a voltage applied to the charging wire in the one charger and applies the charging voltage to the one charger; one grid current detection circuit that detects a grid current which is a current flowing through the grid in the one charger; and one abnormal discharge detection circuit that detects abnormal discharge occurring in the one charger. The control device maintains the surface potential of the one photoreceptor at a constant level until the abnormal discharge detection circuit detects an abnormal discharge during image formation by controlling the grid of the one charger. The system is characterized by performing constant current control so that a predetermined grid voltage is applied to the wire, and when determining whether each charged wire has been cleaned after an abnormal discharge detection circuit detects an abnormal discharge during image formation, the system performs constant current control so that the grid current detected by one grid current detection circuit for one charged voltage generation circuit is a constant value lower than a certain value, and performs a wire cleaning determination process to determine whether the charged wire has been cleaned based on the grid current detected by the grid current detection circuit.

[0014] This makes it possible to prevent the charging voltage from becoming excessive, even when determining whether cleaning has been performed on the charging wires within a single charger.

[0015] Furthermore, the control device is characterized by notifying an external party that an abnormal discharge has been detected when the abnormal discharge detection circuit detects an abnormal discharge.

[0016] This allows the user to know that an abnormal discharge has been detected.

[0017] Furthermore, the image forming apparatus of the present invention further comprises a housing in which a charger is arranged inside, a fan for discharging air from inside the housing, and a motor capable of transmitting driving force to the fan, and the control device is characterized in that, when performing wire cleaning determination processing, it outputs a drive signal to the motor for a predetermined time.

[0018] This allows the gas to be discharged to the outside of the enclosure even if gas has accumulated inside the enclosure before the wire cleaning judgment process is executed.

[0019] Furthermore, the image forming apparatus of the present invention further comprises a housing in which a charger is arranged inside, a cover that can be opened and closed relative to the housing, and a sensor that outputs a detection signal according to the open / closed state of the cover, wherein the control device, when the abnormal discharge detection circuit detects an abnormal discharge, waits until the detection signal input from the sensor changes from a first signal indicating that the cover is open to a second signal indicating that the cover is closed.

[0020] This means that when the abnormal discharge detection circuit detects an abnormal discharge, processing will stop until the cover is opened or closed, prompting the user to clean the charged wires. [Brief explanation of the drawing]

[0021] [Figure 1] This is a cross-sectional view showing the schematic configuration of a color laser printer according to one embodiment of the present invention. [Figure 2] Figure 1 is a schematic block diagram relating to the high-voltage power supply unit of the printer. [Figure 3] This is a schematic block diagram relating to the high-voltage power supply unit corresponding to the black color. [Figure 4]It is a diagram showing an abnormal discharge detection circuit and the circuit configuration around it. [Figure 5] It is a flowchart showing the procedure of the control process executed by the ASIC in FIG. 2. [Figure 6] It is a flowchart showing the detailed procedure of the wire cleaning determination process in the control process of FIG. 5.

Mode for Carrying Out the Invention

[0022] Hereinafter, an embodiment of the present application will be described in detail based on the drawings. As shown in FIG. 1, the laser printer 1 according to an embodiment of the present application is a color laser printer that forms a color image on a sheet P or the like by an electrophotographic method, and is a so-called tandem type laser printer that uses four colors of toner. Hereinafter, the laser printer 1 will be simply referred to as the printer 1. In the following description, as shown in FIG. 1, the right side of the paper surface in the figure is defined as the front side of the laser printer 1, and the left side of the paper surface is defined as the rear side. Also, the front side of the paper surface in FIG. 1 is defined as the left side when viewed from the front side of the printer 1, and the back side of the paper surface is defined as the right side. Further, the upper side of the paper surface in FIG. 1 is defined as the upper side of the printer 1, and the lower side of the paper surface is defined as the lower side.

[0023] As shown in Figure 1, the printer 1 has a roughly box-shaped main body 2, which houses a paper feed unit 10, an image forming unit 20, and the like. An output tray 5 is provided on the top surface of the main body 2 for storing stacked sheets of paper P on which images have been formed. The main body 2 has a housing 3 that opens upwards, and a cover 7 that is rotatably connected to the housing 3 via a hinge 4 so as to close the opening of the housing 3. An open / close detection sensor 8 is mounted on the inner wall of the housing 3 to detect the open / closed state of the cover 7. The ASIC 61 of the printer 1 (see Figure 2), which will be described later, can detect the open / closed state of the cover 7 based on the open / closed signal Sg (see Figure 2) from the open / closed detection sensor 8. For example, when the cover 7 is open, the open / closed detection sensor 8 outputs a high-level open / closed signal Sg to the ASIC 61. Also, for example, when the cover 7 is closed, the open / closed detection sensor 8 outputs a low-level open / closed signal Sg to the ASIC 61. This allows the ASIC61 to determine the open / closed state of the cover 7 by checking the signal level of the open / closed signal Sg.

[0024] Furthermore, a display unit 6 is provided at the upper rear of the cover 7. The display unit 6 is, for example, a touch panel and includes a liquid crystal panel, a light source such as an LED that emits light from the back of the liquid crystal panel, and a contact sensing film attached to the surface of the liquid crystal panel. The ASIC 61 of the printer 1 (see Figure 2) displays various information related to the printer 1 on the display unit 6. In the control processing described later using Figures 5 and 6, the ASIC 61 of this embodiment displays on the display unit 6 that the grid 43 is to be cleaned.

[0025] Furthermore, the main body of the device 2 is equipped with an exhaust fan 9. The exhaust fan 9 is located, for example, on the rear side of the main body of the device 2. The exhaust fan 9 rotates based on the control of the ASIC 61 (see Figure 2) of the printer 1, which will be described later, and discharges the air inside the main body of the device 2 to the outside of the main body of the device 2. Inside the main body of the device 2 is a motor 67 (see Figure 2) capable of transmitting driving force to the exhaust fan 9. The ASIC 61 can control the start and stop of the motor 67's operation, as well as its rotation direction and rotation speed, by outputting a drive signal DS to the motor 67.

[0026] The paper feeding unit 10 has a paper feeding tray 11 in which the paper P is stored and various rollers, and drives the various rollers to feed the paper P to the image forming unit 20. The paper feeding tray 11 is also configured to be detachable from the lower part of the main body 2 of the device.

[0027] The image forming unit 20 includes a transport unit 21, four process cartridges 30C, 30M, 30Y, and 30K, an exposure unit 35, and a fixing unit 50. The transport unit 21 is located vertically between the paper feeding unit 10 and the process cartridges 30C, etc., and includes a transport belt 23 and four transfer rollers 25, etc. The transport belt 23 is an endless belt formed by shaping a belt into a ring, and is wrapped around a drive roller 27 located below the rear end of the image forming unit 20 and a driven roller 29 located below the front end. The upper surface of the transport belt 23 extends substantially horizontally directly below the process cartridges 30C, etc., and contacts the back surface of the paper P supplied from the paper feeding unit 10. The drive roller 27 rotates the transport belt 23 in a predetermined direction. Furthermore, the conveyor belt 23 becomes negatively charged when a transfer bias is applied to each transfer roller 25, and uses electrostatic force to attract the paper P to its upper surface, while the attracted paper P is conveyed along the conveyor path R toward the discharge tray 5.

[0028] Each of the process cartridges 30C, 30M, 30Y, and 30K corresponds to one of four colors: cyan (C), magenta (M), yellow (Y), and black (K). Each of the process cartridges 30C, 30M, 30Y, and 30K contains toner of the corresponding color (C, M, Y, K). The four process cartridges 30C, 30M, 30Y, and 30K are arranged in the order of 30K, 30Y, 30M, and 30C from front to back in printer 1.

[0029] Process cartridge 30C includes a drum-shaped photoreceptor 31, a charger 41, and a toner cartridge 33, etc. The configurations of the other process cartridges 30M, 30Y, and 30K are the same as those of process cartridge 30C, except that they contain toner of a different color. Therefore, in the following explanation, process cartridge 30C will be described as a representative example, and explanations of the other process cartridges 30M, 30Y, and 30K will be omitted as appropriate.

[0030] The photoreceptor 31 is located above the transfer roller 25, with a conveyor belt 23 sandwiched between it and the transfer roller 25 in the vertical direction. The charger 41 is a Scorotron-type charger, for example, in which a charging wire 42 and a grid 43 are housed in a shield case 45. The charging wire 42 is made of metal, for example, gold-plated tungsten, or plain tungsten. The shield case 45 is formed in a roughly rectangular tubular shape, elongated in the left-right direction. An opening is formed in the portion of the shield case 45 facing the photoreceptor 31. The grid 43 is constructed by stretching conductive wires in a mesh pattern within the opening of the shield case 45. The charging wire 42 is stretched along the left-right direction within the shield case 45 and is positioned at a distance from the photoreceptor 31 at the upper rear position. Therefore, the grid 43 is positioned between the photoreceptor 31 and the charging wire 42.

[0031] The charger 41 uniformly positively charges the surface of the photoreceptor 31 during image formation. Specifically, when a voltage is applied to the charging wire 42 and the grid 43, an electric field is formed between the charging wire 42 and the photoreceptor 31, causing corona discharge. When the electric field is formed between the charging wire 42 and the grid 43, a different voltage is applied to the grid 43 than that of the charging wire 42, thereby controlling the strength of the electric field and controlling the amount of charge on the photoreceptor 31.

[0032] The exposure unit 35 is located at the top of the inside of the main body 2 of the device and forms an electrostatic latent image based on image data on the surface of each charged photoreceptor 31. The toner cartridge 33 supplies toner to the surface of the photoreceptor 31 by loading the toner it contains onto the surface of the developing roller 47. As a result, a toner image is formed (developed) on the surface of the photoreceptor 31. The transport unit 21 transports the paper P toward the fixing unit 50 and applies a transfer bias to the transfer roller 25 to transfer the toner image developed on the surface of the photoreceptor 31 to the paper P.

[0033] Furthermore, the cleaning roller 26 is located close to the rear side of the photoreceptor 31. When a cleaning voltage is applied to the cleaning roller 26, it collects the toner supported on the surface of the photoreceptor 31.

[0034] The fixing unit 50 is located downstream of the transport path R compared to the transport unit 21. The fixing unit 50 has a heating roller 51 and a pressure roller 52. The heating roller 51 is positioned on the image-forming surface side of the paper P and rotates in sync with the transport belt 23, etc., heating the toner transferred to the paper P while transporting the paper P. The pressure roller 52 rotates in a driven manner, sandwiching the paper P between itself and the heating roller 51 and pressing the paper P towards the heating roller 51. As a result, the fixing unit 50 heats and melts the toner transferred to the paper P and fixes it to the paper P while transporting the paper P along the transport path R.

[0035] Next, the electrical configuration of the printer 1 related to this invention will be described with reference to Figures 2 and 3. Figures 2 and 3 show a schematic block diagram of a high-voltage power supply 60 mounted on a circuit board (not shown) built into the printer 1 and the connection configuration related to the high-voltage power supply 60. In the following description, when distinguishing each component by color, the subscripts Y (yellow), M (magenta), C (cyan), K (black), or subscripts such as "1 to 4" (for example, grid voltage GRID1 to GRID4) will be added to the symbols of each part, and when not distinguishing, the subscripts will be omitted (for example, written as grid voltage GRID).

[0036] The high-voltage power supply unit 60 includes an ASIC (Application-Specific Integrated Circuit) 61, a high-voltage power supply circuit 62 connected to the ASIC 61, a ROM 63, and a RAM 64. In addition to controlling the high-voltage power supply circuit 62, the ASIC 61 provides overall control of the printer 1. The ROM 63 is a storage medium that stores various operation programs executed by the ASIC 61. In this embodiment, the ROM 63 stores a program PG for implementing control processing (see Figures 5 and 6). The RAM 64 stores temporary data for various processes and image data used for printing.

[0037] The high-voltage power supply circuit 62 includes a charging voltage generation circuit 70 and a grid voltage adjustment circuit 81 equipped with a grid current detection circuit 82. The charging voltage generation circuit 70 is connected to a power line PL. Each charger 41 (41Y~41C) is connected in parallel to the power line PL. The charging voltage generation circuit 70 applies a charging voltage CHG to each charger 41 via the power line PL. The grid voltage adjustment circuits 81Y~81C and grid current detection circuits 82Y~82C are provided corresponding to each charger 41Y~41C.

[0038] The charging voltage generation circuit 70 includes, for example, a PWM signal control circuit 71, a transformer drive circuit 72, a boost circuit 73, and an abnormal discharge detection circuit 78. The charging voltage generation circuit 70 generates a charging voltage CHG to be applied to the charging wires 42Y~42C of each charger 41Y~41C. The grid voltages GRID1~GRID3 applied to the grids 43Y~43C are adjusted by the respective grid voltage adjustment circuits 81Y~81C. The charging voltage CHG is, for example, approximately 5.5kV~7kV. The grid voltage GRID is, for example, approximately 700V.

[0039] The PWM signal control circuit 71 includes, for example, a resistor and a capacitor (not shown), and smooths the PWM (Pulse Width Modulation) signal Sp1 from the ASIC 61's port PWM1, and supplies the smoothed PWM signal Sp1 to the transformer drive circuit 72. The transformer drive circuit 72, for example, supplies the smoothed PWM signal Sp1 supplied from the PWM signal control circuit 71 to a drive transistor (not shown), and supplies an oscillation current to the boost circuit 73.

[0040] The transformer 74 of the boost circuit 73 is equipped with a primary winding 74a and a secondary winding 74b. The transformer drive circuit 72 supplies an oscillation current from a drive transistor to the primary winding 74a of the transformer 74. The transformer 74 changes the voltage value of the output voltage (charging voltage CHG) output from the secondary winding 74b according to the duty cycle of the oscillation current. For example, the transformer 74 generates a charging voltage CHG with a larger voltage value as the duty cycle of the PWM signal Sp1 increases. A rectifier diode 75, a smoothing capacitor 76, and an output resistor 77 are connected to the secondary winding 74b. As a result, the boost circuit 73 boosts and rectifies the voltage generated in the primary winding 74a of the transformer 74 and applies it as a charging voltage CHG to the charging wires 42Y~42C of each charger 41Y~41C.

[0041] The abnormal discharge detection circuit 78 is located between the low-voltage output terminal T2 of the boost circuit 73 and ground. The low-voltage output terminal T2 is connected to the low-voltage side of the secondary winding 74b of the transformer 74. The abnormal discharge detection circuit 78 detects the presence or absence of an abnormal discharge based on the abnormal discharge current that flows instantaneously through the grid 43 and ground due to an abnormal discharge occurring in the charger 41. Note that an abnormal discharge, unlike corona discharge, is a spark discharge or arc discharge caused by contamination of the charging wire with toner or paper dust, for example.

[0042] Under normal operation, when a charging voltage CHG is applied to the charger 41 from the high-voltage side of the secondary winding 74b of the transformer 74, the grid current Ig flowing through the grid 43 flows to ground, for example, via the grid current detection circuit 82. On the other hand, if an abnormal discharge occurs in the charger 41, a portion of the abnormal discharge current flows from the grid current detection circuit 82 to the abnormal discharge detection circuit 78 via ground, for example, and returns to the low-voltage side of the secondary winding 74b of the transformer 74 from the low-voltage output terminal T2. When this abnormal discharge current returning via ground exceeds a predetermined current value, the abnormal discharge detection circuit 78 outputs an abnormal discharge detection signal Sv1 indicating the occurrence of an abnormal discharge.

[0043] Furthermore, each of the grid voltage adjustment circuits 81 has a voltage detection circuit 83 and an operational amplifier OP1. Since the circuit configurations of the grid voltage adjustment circuits 81Y to 81C are the same, the following explanation will focus on the grid voltage adjustment circuit 81Y corresponding to the color Y (yellow), and explanations of the other grid voltage adjustment circuits 81Y to 81C will be omitted as appropriate. The voltage detection circuit 83Y has two voltage divider resistors R7 and R8 connected in series. A divided current Id1 of the grid current Ig1 flowing through the grid 43Y flows through the voltage divider resistors R7 and R8. The voltage detection circuit 83Y outputs a detection voltage Vgr1 corresponding to the grid voltage GRID1 applied to the grid 43Y from the connection point of the two voltage divider resistors R7 and R8. The voltage detection circuit 83Y supplies the detection voltage Vgr1 as a voltage divider detection signal Sid1 to the non-inverting input (+) of the operational amplifier OP1 via the output resistor R6. Capacitor C3, when connected in parallel with voltage divider resistor R8, constitutes an RC filter.

[0044] Furthermore, the inverting input (-) of the operational amplifier OP1 is connected to the port PWM2 of the ASIC61 via the output resistor R9. The output side of the output resistor R9 is grounded to GND via the capacitor C4. The ASIC61 supplies the PWM signal Spp1 from port PWM2 and supplies the PWM signal Spp1 to the operational amplifier OP1 via the output resistor R9. Therefore, the ASIC61 is configured to allow the reference voltage of the operational amplifier OP1 to be changed.

[0045] A smoothing circuit, including a voltage divider resistor R4 and a capacitor C2, is connected to the output terminal of the operational amplifier OP1. The connection point of the voltage divider resistor R4 on the grid 43Y side (opposite the output terminal of the operational amplifier OP1) is grounded to GND via capacitor C2. The base of transistor Q1, which is used to stabilize the grid voltage GRID1, is connected to the connection point of the voltage divider resistor R4 on the grid 43Y side. Transistor Q1 is connected to a voltage control line Ln1, which is connected to the connection point between the voltage divider resistor R7 and the grid 43Y. Transistor Q1 is, for example, an NPN transistor, with its collector connected to the connection point on the grid 43Y side (voltage control line Ln1) and its emitter connected to the grid current detection circuit 82Y (resistor R3). Note that transistor Q1 is not limited to a bipolar transistor; for example, it may be an FET (field-effect transistor).

[0046] The base current of transistor Q1 is controlled by the output of operational amplifier OP1. The collector resistance of transistor Q1 changes with the base current, so transistor Q1 functions as a variable resistor. Here, collector resistance is the resistance value obtained by dividing the collector-emitter voltage by the collector current. For example, increasing the base current decreases the resistance, and conversely, decreasing the base current increases the resistance. This changes the collector-emitter voltage.

[0047] The operational amplifier OP1 changes the base voltage of transistor Q1 and the grid voltage GRID1 based on the difference between the detected voltage Vgr1 (voltage divider detection signal Sid1) detected by the voltage detection circuit 83Y and the PWM signal Spp1 from ASIC61. Therefore, ASIC61 can change the voltage value of the grid voltage GRID1 to a predetermined target voltage value by changing the duty cycle of the PWM signal Spp1. A capacitor C1 is provided between the voltage control line Ln1 and the grid 43Y, which charges the grid voltage GRID.

[0048] Furthermore, a grid current detection circuit 82Y is connected to the voltage control line Ln1 to detect a line current Ir1 corresponding to the grid current Ig1 flowing through the grid 43Y. The resistor R3 of the grid current detection circuit 82Y is connected between the emitter of transistor Q1 and GND. The grid current detection circuit 82Y supplies the voltage of the positive terminal of resistor R3 as a line voltage detection signal Sir1 to the A / D2 port of the ASIC61.

[0049] In this embodiment, the ASIC 61 controls the voltage value of the charging voltage CHG supplied from the charging voltage generation circuit 70 based on the current value of the grid current Ig. For example, the ASIC 61 controls the charging voltage CHG based on the grid current Ig with the smallest current value among the three grid currents Ig1 to Ig3. For example, due to the adhesion of toner to the charging wire 42, variations occur in the increase of the current values ​​of the grid currents Ig1 to Ig3. Therefore, the control of the charging voltage CHG is performed using the grid current Ig with the smallest increase in current value as a reference. This ensures that when there are variations in the amount of change of the grid currents Ig1 to Ig3, the current values ​​of all grid currents Ig1 to Ig3 can be reliably increased to a magnitude greater than or equal to the target current value.

[0050] For example, let's consider the case where the grid current Ig1 is the minimum current value (the current to be controlled). ASIC61 calculates the line current Ir1 (grid current Ig1) from, for example, the resistance value of resistor R3 and the voltage value of the line voltage detection signal Sir1. Based on the calculated grid current Ig1, ASIC61 controls the charging voltage generation circuit 70 to match the grid current Ig1 to the desired target current value. ASIC61 changes the duty cycle of the PWM signal Sp1 output from port PWM1 to match the grid current Ig1 to the desired target current value. This ensures that the current values ​​of all grid currents Ig1 to Ig3 are increased to a magnitude greater than or equal to the target current value.

[0051] Figure 3 shows a schematic block diagram of the charge voltage generation circuit 70K, which is provided specifically for K, and the connection configuration related to the charge voltage generation circuit 70K. The configuration in Figure 3 is actually included in the configuration in Figure 2, but for convenience it has been made into a separate diagram. Therefore, in Figure 3, components that are the same as those in Figure 2 are denoted by the same reference numerals, and their explanations are omitted as appropriate.

[0052] The charging voltage generation circuit 70K has the same configuration as the charging voltage generation circuit 70 in Figure 2, so its configuration will be omitted. The charging voltage generation circuit 70K is connected to the power line PLK. Only the charger 41K is connected to the power line PLK. The charging voltage generation circuit 70K applies the charging voltage CHGK to the charger 41K via the power line PLK.

[0053] A grid current detection circuit 82K is connected to the voltage control line Ln4 via resistor R11 to detect a line current Ir4 corresponding to the grid current Ig4 flowing through the grid 43K. Resistor R11, along with resistor R3 included in the grid current detection circuit 82K, generates the grid voltage GRID4 as the line current Ir4 flows through it. The grid voltage GRID4 is, for example, about 700V, similar to the grid voltages GRID1 to 3, but unlike the other line currents Ir1 to 3, the line current Ir4 can be matched to a desired target value. In other words, while it is possible to match one of the other line currents Ir1 to 3 to a desired target value, it is difficult to match all of the line currents Ir1 to 3 to their respective target values. This is because, as described above, a single charging voltage generation circuit 70 applies a charging voltage CHG to multiple chargers 41. For this reason, a grid voltage adjustment circuit 81 is provided to control each grid voltage GRID1 to 3 at a constant voltage. In contrast, since the line current Ir4 can be adjusted to the desired target value, the desired grid voltage GRID4 can be obtained simply by providing a resistor R11 with a predetermined resistance value. Therefore, the grid voltage adjustment circuit 81 for K is unnecessary.

[0054] ASIC61 controls the voltage value of the charging voltage CHGK supplied from the charging voltage generation circuit 70K based on the current value of the grid current Ig4. ASIC61 calculates the line current Ir4 (grid current Ig4) from the resistance value of resistor R3 included in the grid current detection circuit 82K and the voltage value of the line voltage detection signal Sir4. ASIC61 controls the charging voltage generation circuit 70K based on the calculated grid current Ig4 to match the current value of the grid current Ig4 to the desired target current value. ASIC61 changes the duty cycle of the PWM signal Sp2 output from port PWM5 to match the current value of the grid current Ig4 to the desired target current value. This makes it possible to set the grid voltage GRID4 to the desired voltage value.

[0055] Figure 4 shows the abnormal discharge detection circuit 78,78K and the surrounding circuit configuration. The abnormal discharge detection circuit 78,78K includes, for example, a Zener diode 91, a detection resistor 92, a capacitor 93, a transistor Tr1, resistors 94, 95, and a capacitor 96. The positive terminals of the detection resistor 92 and capacitor 93 are connected to the low-voltage output terminal T2 of the boost circuit 73. The negative terminals of the detection resistor 92 and capacitor 93 are grounded. The detection resistor 92 and capacitor 93 smooth the abnormal discharge current returning through the ground. The positive terminals of the detection resistor 92 and capacitor 93 are connected to the anode of the Zener diode 91.

[0056] Transistor Tr1 is, for example, a PNP transistor, and a DC power supply Vcc1 is connected to its emitter. The voltage of the DC power supply Vcc1 is, for example, 5.0V. The cathode of a Zener diode 91 is connected to the base of transistor Tr1 via a resistor 94. Resistor 95 is connected between the emitter of transistor Tr1 and the base terminal of resistor 94. Similarly, capacitor 96 is connected between the emitter of transistor Tr1 and the base terminal of resistor 94. Note that the circuit configuration of the abnormal discharge detection circuits 78,78K in this embodiment is an example and can be changed as appropriate. For example, the abnormal discharge detection circuits 78,78K do not need to include capacitor 96. Also, transistor Tr1 is not limited to a bipolar transistor, but may be, for example, an FET (field-effect transistor).

[0057] For example, when a spark discharge occurs between the charged wire 42Y and the grid 43Y, the abnormal discharge current flowing through the grid 43K fluctuates significantly and intermittently. A portion of the abnormal discharge current flows through the ground to the detection resistor 92, causing the voltage at the positive terminal of the detection resistor 92 to drop. When the voltage at the positive terminal of the detection resistor 92 drops to the Zener voltage (breakdown voltage) of the Zener diode 91, a base current flows rapidly to the base of the transistor Tr1. Then, when an abnormal discharge current (spark discharge) exceeding a predetermined current value occurs, the transistor Tr1 turns ON. When the transistor Tr1 turns ON, current flows between the emitter and collector of the transistor Tr1, and an abnormal discharge detection signal Sv1 corresponding to the voltage value of the DC power supply Vcc1 is output from the collector.

[0058] As shown in Figure 4, each of the two abnormal discharge detection circuits 78 and 78K is connected to a common signal line, SL. The collector of transistor Tr1 in each abnormal discharge detection circuit 78 and 78K is connected to port A / D1 of ASIC61 via the common signal line SL. Therefore, although a charge voltage generation circuit 70 is provided corresponding to each color, the signal paths of the abnormal discharge detection signals Sv1 and Sv2 output from the charge voltage generation circuits 70 and 70K (abnormal discharge detection circuits 78 and 78K) are made common.

[0059] The ASIC61 in this embodiment has a port A / D1 connected to two abnormal discharge detection circuits 78 and 78K, and is configured to input abnormal discharge detection signals Sv1 and Sv2 from each abnormal discharge detection circuit 78 to port A / D1. Each of the abnormal discharge detection circuits 78 and 78K is connected to a different boost circuit 73 and 73K.

[0060] A detection resistor 101 is connected between the common signal line SL and the ASIC61 to detect the abnormal discharge detection signal Sv. A resistor 103 and a capacitor 104 are connected to the terminal of the detection resistor 101 on the ASIC61 side. One end of the resistor 103 and capacitor 104 is connected to the detection resistor 101 (ASIC61 port A / D1), and the other end is grounded. The resistor 103 and capacitor 104 smooth the abnormal discharge detection signal Sv detected by the detection resistor 101.

[0061] Under normal conditions, transistor Tr1 is in the off state. The abnormal discharge detection signal Sv is not output from the collector of transistor Tr1. When an abnormal discharge occurs, transistor Tr1 turns on. The abnormal discharge detection signal Sv is input from transistor Tr1 to ASIC61. Based on the abnormal discharge detection signal Sv input from port A / D1, ASIC61 can detect whether or not an abnormal discharge has occurred. For example, if ASIC61 detects an abnormal discharge, it will notify the user and prompt them to clean the charged wire 42.

[0062] Here, the on / off characteristics of transistor Tr1 in the abnormal discharge detection circuit 78, that is, the characteristics (sensitivity) of outputting an abnormal discharge detection signal Sv in response to the magnitude of abnormal discharge (abnormal discharge current), can be changed by changing the circuit constants of the abnormal discharge detection circuit 78. For example, Zener diode 91 can be changed to one with a different Zener voltage (breakdown voltage). Resistors 94, 95 and capacitor 96 can be changed to ones with different resistance and capacitance values. Alternatively, transistor Tr1 can be changed to one with different IV characteristics.

[0063] For example, in an abnormal discharge detection circuit 78 where the connection path between the detection resistor 92 and the corona charger 41 via ground is long, and the attenuation of the abnormal discharge current from the corona charger 41 to the detection resistor 92 is large, it becomes necessary to increase the sensitivity compared to other abnormal discharge detection circuits 78. To increase sensitivity, for example, the absolute value of the Zener voltage (breakdown voltage) of the Zener diode 91 is reduced, making it easier to turn on the transistor Tr1 (to turn on with an abnormal discharge current of a smaller value), thereby increasing the sensitivity of the abnormal discharge detection circuit 78. Conversely, to decrease sensitivity, for example, the absolute value of the Zener voltage of the Zener diode 91 is increased, making it more difficult to turn on the transistor Tr1 (to turn on with an abnormal discharge current of a larger value), thereby decreasing the sensitivity of the abnormal discharge detection circuit 78. By adjusting the sensitivity of each abnormal discharge detection circuit 78 in this way, it is possible to average the sensitivity of abnormal discharges and improve detection accuracy. Note that reducing the sensitivity of a highly sensitive abnormal discharge detection circuit 78 will reduce the overall sensitivity. For this reason, it is preferable to increase the sensitivity of the less sensitive abnormal discharge detection circuits 78 when adjusting sensitivity.

[0064] On the other hand, the two abnormal discharge detection circuits 78 in this embodiment have the same circuit configuration. Although the abnormal discharge detection circuits 78 have the same circuit configuration, their sensitivity can be adjusted by changing circuit constants and the like. Therefore, it is possible to individually change the sensitivity of each abnormal discharge detection circuit 78 while reducing manufacturing costs.

[0065] The control processes performed by printer 1, configured as described above, will be explained in detail with reference to Figures 5 and 6. Figure 5 shows the procedure for the control processes performed by ASIC 61. The control processes start, for example, when the power to printer 1 is turned on. Hereafter, in the explanation of each process procedure, steps will be denoted as "S".

[0066] In Figure 5, the ASIC61 first waits until it is instructed to start charging (S10: NO), and when it is instructed to start charging (S10: YES), the ASIC61 sets the target grid current value (S12). The instruction to start charging is given, for example, when a print instruction is received or when the printer 1 performs a warm-up operation. The target grid current value is, for example, 250 μA, but is not limited to this. In this embodiment, the target grid current value is set to a common value for K and non-K, but different values ​​may be set. The target grid current value is set, for example, by reading a value that has been predetermined and stored in the ROM63.

[0067] Next, the ASIC61 sets each target grid voltage value (except K) (S14). For each target grid voltage adjustment circuit 81Y to 81C, for example, 650V, 700V, and 680V are set, but these specific values ​​are not limited to these. Each target grid voltage value is also set by reading from a predetermined value stored in ROM63.

[0068] Next, ASIC61 starts grid constant current control (S16). Specifically, for the charging voltage generation circuit 70, ASIC61 changes the duty cycle of the PWM signal Sp1 output from port PWM1 so that the grid current Ig, which has the smallest current value among the grid currents Ig1 to Ig3, matches the target grid current value. Furthermore, for the charging voltage generation circuit 70K, ASIC61 changes the duty cycle of the PWM signal Sp2 output from port PWM5 so that the grid current Ig4 matches the target grid current value.

[0069] Next, ASIC61 starts grid constant voltage control (except for K) (S18). Specifically, ASIC61 changes the duty cycles of the PWM signals Spp1 to Spp3 for the grid voltage adjustment circuits 81Y to 81C so that the voltage values ​​of the grid voltages GRID1 to GRID3 match the respective target grid voltage values.

[0070] Next, ASIC61 starts saving the charged voltage (S20). Specifically, the charged voltage to be saved is the charged voltage CHG generated by the charged voltage generation circuit 70. The process of saving the charged voltage can be performed, for example, by a timer interrupt process that occurs every 1 msec, in which case, in S20, ASIC61 enables the timer interrupt process. The charged voltage can be saved in the RAM64 mentioned above, but since the process in S32, which will be described later, reads the charged voltage saved a predetermined time ago, it is necessary to save the charged voltage up to at least the predetermined time ago.

[0071] Next, ASIC61 determines whether or not an abnormal discharge has occurred (S22). Specifically, as described above, ASIC61 determines whether or not an abnormal discharge has occurred based on the abnormal discharge detection signal Sv input from port A / D1. If no abnormal discharge occurs in this determination (S22: NO), ASIC61 continues to execute the process in S22 until it receives an instruction to terminate charging (S24: NO). When it receives an instruction to terminate charging (S24: YES), ASIC61 stops the grid constant current control and the grid constant voltage control (other than K) (S26) and then terminates the control process.

[0072] On the other hand, if an abnormal discharge occurs in the judgment of S22 (S22: YES), the ASIC61 stops the grid constant current control started in S16 (S28), stops the grid constant voltage control (other than K) started in S18 (S29), and also starts displaying an abnormal discharge error (S30). In the abnormal discharge error display, the ASIC61 displays on the display unit 6 (see Figure 1) a message, for example, that the toner attached to the charged wire 42 should be cleaned. This allows the user who sees the display on the display unit 6 to be prompted to clean the charged wire 42.

[0073] Next, ASIC61 reads the value of the charge voltage CHG stored before the abnormal discharge detected in S22 occurred from RAM64 (S32). The time before the abnormal discharge occurred is, for example, 120 msec before the time when "NO" was determined in S22, but it is not limited to this time, as long as it is before the abnormal discharge occurs (preferably immediately before).

[0074] Next, the ASIC61 determines whether the voltage value of the read-out charging voltage CHG is equal to or greater than the threshold TH1 (S34). Here, if an abnormal discharge occurs due to toner adhering to the charging wire 42, the charging voltage CHG before the abnormal discharge increases due to a decrease in the resistance value of the charging wire 42. On the other hand, if an abnormal discharge occurs because the insulation distance at a specific point between the charging wire 42 and the grid 43 is temporarily shortened, such as when conductive foreign matter adheres to the charging wire 42, the resistance value of the charging wire 42 does not decrease, and the charging voltage CHG before the abnormal discharge is unlikely to increase compared to when toner adheres. Therefore, in S34, the ASIC61 uses the threshold TH1 to determine whether the charging voltage CHG had increased before the abnormal discharge. For this reason, the threshold TH1 used in S34 is a value that can distinguish between the charging voltage CHG that increased before the abnormal discharge due to toner adhesion and the charging voltage CHG before the abnormal discharge due to foreign matter, etc. The threshold TH1 can be, for example, an intermediate value between the voltage value of the charging voltage CHG before abnormal discharge caused by toner adhesion (high voltage) and the voltage value of the charging voltage CHG before abnormal discharge caused by foreign matter, etc. This allows the ASIC61 to determine whether or not abnormal discharge occurred due to toner adhesion.

[0075] In the judgment in S34, if the voltage value of the read charge voltage CHG is less than the threshold TH1 (S34:NO), it is highly likely that the abnormal discharge is not due to toner adhesion, but rather to the adhesion of conductive foreign matter. In this case, even if the charged wire 42 is cleaned, the reduction in the charge voltage CHG during normal operation (constant current control) after cleaning is less than that during the abnormal discharge. For this reason, the ASIC 61 of this embodiment does not perform the wire cleaning judgment process if the voltage value of the charge voltage CHG is less than the threshold TH1 (S34:NO). Details of the wire cleaning judgment process will be described later with reference to Figure 6.

[0076] If cover 7 is not opened, or has been opened but not closed (S36:NO), it is likely that cleaning of the charged wire 42 has not been performed or is in the process of being cleaned. Therefore, ASIC 61 repeatedly executes process S36 until it detects that cover 7 has been opened and then closed (S36:NO).

[0077] Furthermore, in response to the cover 7 being opened and then closed (S36: YES), the ASIC 61 stops the abnormal discharge error display that was started in S30 (S38). Specifically, the ASIC 61 erases the display unit 6 (see Figure 1) that indicated in S30 that the toner adhering to the charged wire 42 should be cleaned. Then, the ASIC 61 terminates the control process.

[0078] On the other hand, in the determination in S34 above, if the voltage value of the read charge voltage CHG is greater than or equal to the threshold TH1 (S34: YES), the ASIC61 executes the wire cleaning determination process (S40) and then terminates the control process.

[0079] Figure 6 shows the detailed procedure for the wire cleaning determination process. In Figure 6, first, the ASIC61 sets the target charging voltage value (other than K) for determination (S50). The target charging voltage value (other than K) for determination is a voltage value that is a predetermined voltage lower than the charging voltage read in S32. Specifically, if the read charging voltage is 6.9kV and the predetermined voltage is 1kV, then the target charging voltage value (other than K) for determination is 5.9kV. This specific value is not limited to this, but it must be a voltage value within the voltage range in which abnormal discharge does not occur in each charger 41Y to 41C.

[0080] Next, ASIC61 sets the target grid voltage value (other than K) for the determination (S52). For each of the grid voltage adjustment circuits 81Y to 81C, a target grid voltage value (other than K) is set to, for example, 400V. While 650V, 700V, and 680V were set during image formation as described above, a lower value of 400V is set during the determination phase, and a common voltage value is also set. The reason for this is that we want to set a voltage value that allows wire cleaning determination within a voltage range where abnormal discharge does not occur in each charger 41Y to 41C, and furthermore, even if a common voltage value is set, wire cleaning determination can still be performed.

[0081] Next, ASIC61 sets the target grid current value (K) for the determination (S54). The target grid current value (K) for the determination is set to a value lower than the target grid current value set in S12, for example, 250 μA, for example, 200 μA. The reason for setting a value lower than the target grid current value set during image formation at the time of determination is to prevent abnormal discharge from occurring in the charger 41K.

[0082] Next, ASIC61 determines whether the charged wire 42 has been cleaned based on whether the cover 7 has been opened or closed, similar to S36 (Figure 5) above (S56). If the cover 7 is not opened, or has been opened but not closed (S56: NO), ASIC61 repeats the process in S56. During this time, the cleaning of the charged wire 42 is considered incomplete.

[0083] On the other hand, in response to the cover 7 being opened and then closed (S56: YES), the ASIC 61 starts full-speed operation of the exhaust fan 9 (S58). This is to expel the air inside the main body 2 of the device. For example, during toner cleaning or other maintenance performed in conjunction with toner cleaning, the user may perform maintenance inside the main body 2 using a spray or the like. In this case, if the cover 7 is closed immediately after maintenance, gas may accumulate inside the main body 2 of the device. The accumulated gas may cause malfunctions (such as abnormal discharge) in the printer 1. Therefore, prior to returning to the normal operating state, the ASIC 61 outputs a drive signal DS (see Figure 2) to control the motor 67 and rotate the exhaust fan 9 at full speed to expel the air inside the main body 2 of the device. Note that the ASIC 61 does not necessarily have to rotate the exhaust fan 9 at full speed.

[0084] Next, ASIC61 starts constant voltage control of the charging voltage CHG and grid voltages GRID1 to GRID3 for the charging voltage generation circuit 70 and grid voltage adjustment circuits 81Y to 81C, respectively (S60). Specifically, for the charging voltage generation circuit 70, ASIC61 changes the duty cycle of the PWM signal Sp1 output from port PWM1 so that the charging voltage CHG matches the target charging voltage value (other than K) at the time of determination. Furthermore, for the grid voltage adjustment circuits 81Y to 81C, ASIC61 changes the duty cycles of the PWM signals Spp1 to Spp3 so that the respective voltage values ​​of the grid voltages GRID1 to GRID3 match the target grid voltage value (other than K) at the time of determination.

[0085] Next, ASIC61 starts constant current control of the grid current (K) (S62). Specifically, ASIC61 changes the duty cycle of the PWM signal Sp2 output from port PWM5 to the charging voltage generation circuit 70K so that the grid current Ig4 matches the target grid current value (K) at the time of the determination.

[0086] Next, ASIC61 determines whether or not cleaning has been performed on the charged wires 42Y~42K (S64). Specifically, this determination is made when the grid currents Ig1~Ig3 are all above the threshold Th2, and the charging voltage CHGK is below the threshold Th3, in which case cleaning is considered to have been performed; otherwise, cleaning is considered not to have been performed. This is because when the charged wires 42Y~42K are cleaned, the impedance of the charged wires 42Y~42K decreases, causing the grid currents Ig1~Ig3 to increase, and the grid current Ig4 also increases, resulting in a decrease in the charging voltage CHGK. For this reason, the threshold Th2 can be predetermined based on the correlation between the grid currents Ig1~Ig3 during abnormal discharge and the grid currents Ig1~Ig3 after cleaning the charged wires 42Y~42K. Similarly, the threshold Th3 can also be determined based on the correlation between the charging voltage CHGK during abnormal discharge and the charging voltage CHGK after cleaning the charged wire 42K.

[0087] In the judgment in S64 above, if cleaning is performed (S64: YES), the ASIC61 stops the abnormal discharge error display that was started in S30 (Figure 5) (S66), stops the full-speed operation of the exhaust fan 9 that was started in S58 (S68), and then terminates the wire cleaning judgment process.

[0088] On the other hand, if cleaning is not performed in the judgment of S64 (S64:NO), ASIC61 determines whether this is the third time that cleaning has been determined not to be performed in S64 (S70). If it is not the third time (S70:NO), ASIC61 maintains the abnormal discharge error display (S80). Then, ASIC61 waits until cover 7 is opened (S81:NO), and when cover 7 is opened (S81:YES), it stops the constant voltage control started in S60 (S82), stops the constant current control started in S62 (S83), and also stops the full-speed operation of exhaust fan 9 in the same manner as in S68 (S84). Furthermore, ASIC61 waits until cover 7 is closed (S85:NO), and once cover 7 is closed (S85:YES), it starts full-speed operation of exhaust fan 9 in the same manner as in S58 (S86), restarts the constant voltage control that was stopped in S82 (S87), and restarts the constant current control that was stopped in S83 (S88), before returning to processing in S64.

[0089] On the other hand, in the judgment in S70 above, if it is the third time (S70:YES), ASIC61 stops the constant voltage control in the same manner as in S82 (S71), stops the constant current control in the same manner as in S83 (S72), and maintains the abnormal discharge error display in the same manner as in S80 (S73). Then, ASIC61 waits until a predetermined time has elapsed (S74:NO), and once the predetermined time has elapsed (S74:YES), the process proceeds to S66. The predetermined time is, for example, 120 seconds, but is not limited to this. Also, it may be any number of times other than three.

[0090] As described above, the printer 1 of this embodiment has a plurality of photoreceptors 31Y, 31M, 31C, charging wires 42Y, 42M, 42C and grids 43Y, 43M, 43C, a plurality of chargers 41Y, 41M, 41C for charging each of the plurality of photoreceptors 31Y, 31M, 31C, and a charging voltage generation circuit that generates a charging voltage CHG, which is the voltage applied to the charging wires 42Y, 42M, 42C, and applies the charging voltage CHG to each of the plurality of chargers 41Y, 41M, 41C. The system includes 70, multiple grid voltage adjustment circuits 81Y, 81M, and 81C that adjust the grid voltages GRID1 to GRID3, which are the voltages applied to grids 43Y, 43M, and 43C, multiple grid current detection circuits 82Y, 82M, and 82C that detect the grid currents Ig1 to Ig3, which are the currents flowing through grids 43Y, 43M, and 43C, an abnormal discharge detection circuit 78 that detects abnormal discharges occurring in each of the multiple chargers 41Y, 41M, and 41C, and an ASIC 61.

[0091] Then, until the abnormal discharge detection circuit 78 detects an abnormal discharge during image formation, the ASIC 61 controls multiple grid voltage adjustment circuits 81Y, 81M, 81C so that a predetermined grid voltage is applied to each grid 43Y, 43M, 43C of the multiple chargers 41Y, 41M, 41C, in order to keep the surface potentials of the multiple photoreceptors 31Y, 31M, 31C constant. At the same time, it generates a charging voltage such that the grid current with the lowest value among the multiple grid currents Ig1 to Ig3 detected by the multiple grid current detection circuits 82Y, 82M, 82C becomes a constant value. The circuit 70 is controlled, and after the abnormal discharge detection circuit 78 detects an abnormal discharge during image formation, it is determined whether each charged wire 42Y, 42M, 42C has been cleaned. At the same time, the charging voltage generation circuit 70 is controlled to a constant voltage so that a predetermined charging voltage value is generated within a voltage range in which no abnormal discharge occurs in each of the multiple chargers 41Y, 41M, 41C. A wire cleaning determination process is also performed to determine whether each charged wire 42Y, 42M, 42C has been cleaned based on the grid currents Ig1 to Ig3 detected by the multiple grid current detection circuits 82Y, 82M, 82C. Incidentally, in this embodiment, ASIC61 is an example of a "control device".

[0092] Thus, in the printer 1 of this embodiment, when the wire cleaning determination process is executed, the charging voltage generation circuit 70 is controlled to a constant voltage so as to generate a predetermined charging voltage value within a voltage range in which abnormal discharge does not occur in each of the multiple chargers 41Y, 41M, and 41C. At the same time, it is determined whether or not each charging wire 42Y, 42M, and 42C has been cleaned based on the grid currents Ig1 to Ig3 detected by the multiple grid current detection circuits 82Y, 82M, and 82C. Therefore, even when it is determined whether or not the charging wires 42Y, 42M, and 42C have been cleaned, it is possible to suppress the charging voltage CHG from becoming excessive.

[0093] Furthermore, the predetermined charging voltage value is 1kV lower than the charging voltage value generated by the charging voltage generation circuit 70,70K when the abnormal discharge detection circuit 78,78K detects an abnormal discharge. 1kV is an example of a "predetermined voltage value".

[0094] This makes it possible to further enhance the effect of suppressing excessive charge voltage CHG.

[0095] Furthermore, when ASIC61 performs wire cleaning determination processing, it changes the grid voltages GRID1 to GRID3, which are applied to each grid 43Y, 43M, and 43C of the multiple chargers 41Y, 41M, and 41C, to a single common determination target grid voltage value (other than K) across all grids 43Y, 43M, and 43C, and applies a value lower than the grid voltages GRID1 to GRID3 before abnormal discharge was detected.

[0096] This makes it possible to further enhance the effect of suppressing excessive charge voltage CHG.

[0097] Furthermore, the printer 1 includes one photoreceptor 31K different from the multiple photoreceptors 31Y, 31M, and 31C, a charging wire 42K and a grid 43K, a charging device 41K for charging the one photoreceptor 31K, a charging voltage generation circuit 70K that generates a charging voltage CHGK which is the voltage applied to the charging wire 42K within the charging device 41K and applies the charging voltage CHGK to the charging device 41K, a grid current detection circuit 82K that detects a grid current Ig4 which is the current flowing through the grid 43K within the charging device 41K, and an abnormal discharge detection circuit 78K that detects abnormal discharges occurring in the charging device 41K.

[0098] Then, during image formation, until one abnormal discharge detection circuit 78K detects an abnormal discharge, the ASIC61 performs constant current control so that a predetermined grid voltage is applied to the grid 43K of one charger 41K, in order to maintain a constant surface potential of one photoreceptor 31K. This control is performed so that the grid current detected by one grid current detection circuit 82K is a constant value for one charging voltage generation circuit 70K. After one abnormal discharge detection circuit 78K detects an abnormal discharge during image formation, when determining whether each charging wire has been cleaned, the ASIC61 performs constant current control so that the grid current detected by one grid current detection circuit 82K is a constant value lower than a certain value for one charging voltage generation circuit 70K. At the same time, it performs a wire cleaning determination process to determine whether the charging wire 42K has been cleaned based on the grid current detected by the grid current detection circuit 82K.

[0099] Thus, in the printer 1 of this embodiment, when the wire cleaning determination process is executed, constant current control is performed so that the grid current detected by one grid current detection circuit 82K is lower than a certain value for one charging voltage generation circuit 70K, and a determination is made as to whether or not the charged wire 42K has been cleaned based on the grid current detected by the grid current detection circuit 82K. Therefore, even when it is determined whether or not the charged wire 42K has been cleaned, it is possible to suppress the charging voltage CHGK from becoming excessive.

[0100] Furthermore, when the abnormal discharge detection circuits 78 and 78K of the ASIC61 detect an abnormal discharge, the ASIC61 displays a notification on the display unit 6 indicating that an abnormal discharge has been detected. Incidentally, this display is just one example of a notification. This allows the user to know that an abnormal discharge has been detected.

[0101] Furthermore, the printer 1 comprises a housing 3 in which chargers 41Y, 41M, 41C, and 41K are placed inside, an exhaust fan 9 for expelling air from inside the housing 3, and a motor 67 capable of transmitting driving force to the exhaust fan 9. When the ASIC 61 performs the wire cleaning determination process, it outputs a drive signal to the motor 67 for a predetermined time. Incidentally, the exhaust fan 9 is just one example of a "fan". As a result, even if gas is accumulating inside the housing 3 before the wire cleaning determination process is performed, that gas can be expelled to the outside of the housing 3.

[0102] Furthermore, the printer 1 comprises a housing 3 in which chargers 41Y, 41M, 41C, and 41K are placed inside, a cover 7 that can be opened and closed relative to the housing 3, and an open / close detection sensor 8 that outputs an open / close signal Sg according to the open / closed state of the cover 7. When the abnormal discharge detection circuits 78 and 78K detect an abnormal discharge, the ASIC 61 waits until the open / close signal Sg input from the open / close detection sensor 8 changes from a high-level open / close signal Sg indicating that the cover 7 is open to a low-level open / close signal Sg indicating that the cover 7 is closed. Incidentally, the open / close detection sensor 8 is an example of a "sensor". The open / close signal Sg is an example of a "detection signal". The high-level open / close signal Sg is an example of a "first signal". The low-level open / close signal Sg is an example of a "second signal". In this way, when the abnormal discharge detection circuits 78 and 78K detect an abnormal discharge, processing stops until the cover 7 is opened or closed, making it possible to prompt the user to clean the charged wire 42.

[0103] It should be noted that the present invention is not limited to the embodiments described above, and various modifications are possible without departing from the spirit of the invention.

[0104] (1) In the above embodiment, the charging voltage CHG applied to the chargers 41Y to 41C corresponding to the three colors Y, M, and C other than K is generated by one charging voltage generation circuit 70, and the charging voltage CHGK applied to the charger 41K corresponding to the color K is generated by a charging voltage generation circuit 70K independent of the charging voltage generation circuit 70. However, the embodiment is not limited to this, and the charging voltage CHG applied to the chargers 41Y to 41K corresponding to four colors including K may be generated by one charging voltage generation circuit 70. Also, the number of colors is not limited to four.

[0105] (2) In the above embodiment, an example was described in which one photoreceptor 31 is associated with one charger 41, but the invention is not limited to this. The invention can also be applied to a configuration in which multiple corona chargers 41 are associated with one photoreceptor 31, for example, to a printer (image forming apparatus) that superimposes toner images of each color onto one photoreceptor 31 and then transfers them all at once to paper P. [Explanation of Symbols]

[0106] 1...Printer, 3...Housing, 7...Cover, 8...Open / Close Detection Sensor, 9...Exhaust Fan, 20...Image Forming Unit, 25...Transfer Roller, 31...Photoreceptor, 41...Charger, 42...Charging Wire, 43...Grid, 47...Developing Roller, 61...ASIC, 65...Transfer Output Circuit, 66...Developing Output Circuit, 67...Motor, 71...Charging Voltage Output Circuit, 72...Abnormal Discharge Detection Circuit, 78...Charging Voltage Detection Circuit, 81...Grid Voltage Adjustment Circuit, 82...Grid Current Detection Circuit, 83...Voltage Detection Circuit, CHG...Charging Voltage, Sv...Abnormal Discharge Detection Signal, A / D1, A / D2, A / D4, A / D6, A / D8...Ports, Th1~Th3...Threshold, Ig...Grid Current, GRID...Grid Voltage, DS...Drive Signal, Sg...Open / Close Signal.

Claims

1. Multiple photoreceptors, Multiple chargers having charging wires and grids, which charge each of the multiple photoreceptors, A charging voltage generation circuit generates a charging voltage which is a voltage applied to the charging wire, and applies the charging voltage to each of the plurality of chargers, Multiple grid voltage adjustment circuits that adjust the grid voltage, which is the voltage applied to the grid, Multiple grid current detection circuits for detecting grid current, which is the current flowing through the grid, An abnormal discharge detection circuit for detecting abnormal discharges occurring in each of the aforementioned multiple chargers, Control device and Equipped with, The control device is Until the abnormal discharge detection circuit detects an abnormal discharge during image formation, the grid voltage adjustment circuits are controlled so that a predetermined grid voltage is applied to each grid of the multiple chargers in order to maintain a constant surface potential for each of the multiple photoreceptors, and the charging voltage generation circuit is controlled so that the grid current with the lowest current value among the multiple grid currents detected by the multiple grid current detection circuits becomes a constant value. When the abnormal discharge detection circuit detects an abnormal discharge during image formation and determines whether each charged wire has been cleaned, the charging voltage generation circuit is controlled to a constant voltage so as to generate a predetermined charging voltage value within a voltage range in which no abnormal discharge occurs in each of the multiple chargers, and a wire cleaning determination process is performed to determine whether each charged wire has been cleaned based on the grid currents detected by the multiple grid current detection circuits. An image forming apparatus characterized by the following features.

2. The predetermined charging voltage value is a value that is lower by a predetermined voltage value than the charging voltage value generated by the charging voltage generation circuit when the abnormal discharge detection circuit detects an abnormal discharge. The image forming apparatus according to feature 1.

3. Multiple photoreceptors, Multiple chargers having charging wires and grids, which charge each of the multiple photoreceptors, A charging voltage generation circuit generates a charging voltage which is a voltage applied to the charging wire, and applies the charging voltage to each of the plurality of chargers, Multiple grid voltage adjustment circuits that adjust the grid voltage, which is the voltage applied to the grid, Multiple grid current detection circuits for detecting grid current, which is the current flowing through the grid, An abnormal discharge detection circuit for detecting abnormal discharges occurring in each of the aforementioned multiple chargers, Control device and Equipped with, The control device is Until the abnormal discharge detection circuit detects an abnormal discharge during image formation, the grid voltage adjustment circuits are controlled so that a predetermined grid voltage is applied to each grid of the multiple chargers in order to maintain a constant surface potential for each of the multiple photoreceptors, and the charging voltage generation circuit is controlled so that the grid current with the lowest current value among the multiple grid currents detected by the multiple grid current detection circuits becomes a constant value. When the abnormal discharge detection circuit detects an abnormal discharge during image formation and determines whether each charged wire has been cleaned, the charging voltage generation circuit is controlled to a constant voltage so as to generate a predetermined charging voltage value within a voltage range in which no abnormal discharge occurs in each of the multiple chargers, and a wire cleaning determination process is executed to determine whether each charged wire has been cleaned based on the grid currents detected by the multiple grid current detection circuits. When performing the wire cleaning determination process, the grid voltage applied to each grid of the plurality of chargers is changed to a single voltage value common to all grids, which is lower than the grid voltage before abnormal discharge was detected. An image forming apparatus characterized by the following features.

4. A photoreceptor different from the aforementioned plurality of photoreceptors, A charger having a charging wire and a grid, which charges one of the photoreceptors, A charging voltage generation circuit generates a charging voltage which is a voltage applied to the charging wire in the one charger, and applies the charging voltage to the one charger, A grid current detection circuit for detecting the grid current, which is the current flowing through the grid in the aforementioned charger, An abnormal discharge detection circuit for detecting abnormal discharges occurring in the aforementioned one charger, Furthermore, The control device is Until the abnormal discharge detection circuit detects an abnormal discharge during image formation, constant current control is performed on the charging voltage generation circuit so that the grid current detected by the grid current detection circuit remains constant, so that a predetermined grid voltage is applied to the grid of the charging device, in order to maintain a constant surface potential of the photoreceptor. When an abnormal discharge detection circuit detects an abnormal discharge during image formation, and it is determined whether each charged wire has been cleaned, the charging voltage generation circuit is subjected to constant current control such that the grid current detected by the grid current detection circuit is lower than the aforementioned constant value and is set to another constant value. At the same time, a wire cleaning determination process is performed to determine whether the charged wire has been cleaned based on the grid current detected by the grid current detection circuit. The image forming apparatus according to feature 3.

5. The control device, when the abnormal discharge detection circuit detects an abnormal discharge, notifies the external party that an abnormal discharge has been detected. The image forming apparatus according to claim 3 or 4.

6. A housing with the aforementioned charger placed inside, A fan for expelling air from inside the aforementioned enclosure, A motor capable of transmitting driving force to the aforementioned fan, Furthermore, When the control device performs the wire cleaning determination process, it outputs a drive signal to the motor for a predetermined time. The image forming apparatus according to any one of claims 3 to 5.

7. A housing with the aforementioned charger placed inside, The aforementioned housing is provided with an openable and closable cover, A sensor that outputs a detection signal corresponding to the open / closed state of the cover, Furthermore, When the abnormal discharge detection circuit detects an abnormal discharge, the control device waits until the detection signal input from the sensor changes from a first signal indicating the cover is open to a second signal indicating the cover is closed. The image forming apparatus according to any one of claims 3 to 6.

Images