Computational architecture for active noise reduction devices

A computational architecture with multiple processors optimizes task alignment and reduces power consumption in ANR devices, addressing the challenge of complex computing requirements and enhancing performance.

JP7883020B2Active Publication Date: 2026-06-30BOSE CORP

Patent Information

Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
BOSE CORP
Filing Date
2025-05-02
Publication Date
2026-06-30

AI Technical Summary

Technical Problem

Existing personal active noise reduction (ANR) devices face challenges in efficiently handling complex computing requirements, leading to increased cost and power consumption due to the addition of more complex hardware and features such as multiple I/O ports, high-quality telephone service, and noise level control management.

Method used

A computational architecture is introduced that utilizes at least three separate processors, each configured to perform specific computing functions, optimizing task alignment and reducing power consumption by dividing functions among processors.

Benefits of technology

This architecture enhances computing efficiency and reduces power consumption by aligning processing power with specific tasks, improving performance and managing complex features in ANR devices.

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Abstract

To provide a computational architecture for efficiently processing a different ANR processing function.SOLUTION: A personal active noise reduction (ANR) device 10 includes: a communication interface 12 that receives an audio stream 32, a driver 26, a microphone system 28 from a DSP system 14, and an outgoing audio stream 36; a first DSP 20 that receives a signal from the audio stream and the microphone system, performs ANR on the audio stream according to a set of parameters to be implemented, and outputs the processed audio stream 34; a second DSP 22 that generates state data in response to analysis of the audio stream 32, and analysis of a signal from the microphone system and the processed audio stream and changes an operation parameter on the first DSP; and a general purpose processor 24 that communicates a control signal 40 with a communication interface, processes the state data from the second DSP, and changes a parameter on the first DSP.SELECTED DRAWING: Figure 1
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Description

Technical Field

[0001] (Claim of Priority) This application claims priority to U.S. Patent Application No. 16 / 788,365, filed on February 12, 2020, which is hereby incorporated by reference in its entirety.

[0002] (Field of the Invention) The present disclosure generally relates to personal active noise reduction (ANR) devices. More specifically, the present disclosure relates to a computing architecture for efficiently processing different ANR processing functions.

Background Art

[0003] For the purpose of isolating a user's ear from unwanted ambient sound, headphones and other physical configurations of personal ANR devices worn around the user's ear have become common. ANR headphones counter unwanted ambient noise by actively generating noise cancellation signals. These ANR headphones are in contrast to passive noise reduction (PNR) headsets that only physically isolate the user's ear from ambient noise. Of particular interest to users are ANR headphones that incorporate a voice listening function to enable the user to listen to electronically provided voice (e.g., playback of recorded voice or voice received from another device) without intrusion of unwanted ambient noise.

[0004] As ANR devices become more popular, the need to improve performance and add more robust features increases the need for more complex computing requirements. For example, in addition to providing state-of-the-art signal processing, ANR devices are tasked with providing enhanced features such as multiple I / O ports (e.g., Bluetooth, USB, etc.), high-quality telephone service, noise level control management, event handling, user experience command processing, and the like. Along with the increasing computing requirements, more complex hardware is added to ANR devices, increasing both cost and power consumption.

Summary of the Invention

[0005] All the examples and features mentioned below can be combined in any technically feasible way.

[0006] A system and method are disclosed that describe a computational architecture for efficiently handling different ANR processing functions of an ANR device.

[0007] In some implementations, the described computing architecture includes at least three separate processors, each configured to perform a set of computing functions suited to its individual processor. In such cases, the architecture allows different types of required functions to be handled by processors that match the task requirements (e.g., priority, speed, memory resources). By dividing functions among different processors, computing efficiency is improved and power consumption is reduced.

[0008] One embodiment provides a personal active noise reduction (ANR) device comprising a communication interface configured to receive a source audio stream and control signals, a driver, a microphone system, and an ANR computing architecture.

[0009] In a particular implementation, the ANR computation architecture includes: a first DSP processor configured to receive a source audio stream and signals from a microphone system, which performs ANR on the source audio stream according to a set of operating parameters introduced to the first DSP processor and outputs the processed audio stream to a driver; a second DSP processor which generates state data in response to an analysis of at least one of the source audio stream, signals from the microphone system, and the processed audio stream, and modifies the set of operating parameters on the first DSP processor; and a general-purpose processor operably coupled to the first and second DSP processors, which communicates with a communication interface and control signals, processes state data from the second DSP processor, and modifies the set of operating parameters on the first DSP processor.

[0010] The implementation may include one of the following characteristics, or any combination thereof.

[0011] In certain embodiments, the operating parameters are selected from a group consisting of filter coefficients, compressor settings, signal mixer, gain conditions, and signal routing options.

[0012] In other embodiments, the state data generated by the second DSP processor includes error conditions detected in the processed audio stream.

[0013] In a further embodiment, the state data generated by the second DSP processor includes frequency domain overload conditions detected in the processed audio stream.

[0014] In some implementations, the state data generated by the second DSP includes sound pressure level (SPL) information detected from the microphone system and the processed audio stream.

[0015] In further implementations, the communication interface may include a Bluetooth system.

[0016] In certain cases, the general-purpose processor includes a sleep mode for power saving, and the sleep mode is configured to be activated by at least one of a first DSP processor, a second DSP processor, and a communication interface.

[0017] In certain embodiments, the general-purpose processor is further configured to apply machine learning to state data received from a second DSP processor.

[0018] In certain implementations, the general-purpose processor is further configured to apply machine learning to time-based signals. In some cases, the time-based signal includes blocks of raw audio data received from a microphone system and / or via a Bluetooth system.

[0019] In other embodiments, the operating parameters include filter coefficients, and the general-purpose processor is further configured to calculate and install the updated filter coefficients on the first DSP processor.

[0020] In some cases, the general-purpose processor is further configured to evaluate state data to identify damage status of the personal ANR.

[0021] Two or more of the features described in this disclosure, including the features described in this summary section, may be combined to form implementations not specifically described herein.

[0022] Details of one or more implementations are described in the accompanying drawings and the following description. Other features, purposes, and advantages will become apparent from this description and drawings, as well as from the claims. [Brief explanation of the drawing]

[0023] [Figure 1]A block diagram of an ANR device having a hierarchical computing architecture according to various implementation forms. [Figure 2] A detailed diagram of a computing architecture according to various implementation forms is shown. [Figure 3] Exemplary personal ANR wearables according to various implementations are shown.

[0024] Note that the drawings of various implementation forms are not necessarily to scale. The drawings are intended to show only typical aspects of the present disclosure and should not be regarded as limiting the scope of the implementation. In the drawings, like numerals represent like elements among the drawings.

Embodiments for Carrying Out the Invention

[0025] Various implementation forms of the present disclosure describe a computing architecture for an active noise reduction (ANR) device that includes at least three separate processors configured to execute a set of computing functions suitable for individual processors. Thus, the architecture enables each required function to be processed by a processor that matches the task requirements (e.g., priority, speed, memory resources). By dividing functions among different processors, computing efficiency can be obtained and power consumption can be reduced.

[0026] The present disclosure provides an architecture for devices such as headphones that employ ANR, but a comprehensive description of ANR is omitted for the sake of brevity. If necessary, exemplary ANR systems are described in, for example, U.S. Patent No. 8,280,066 titled "Binaural Feedforward-based ANR" issued to Joho et al. on October 2, 2012, and U.S. Patent No. 8,184,822 titled "ANR Signal Processing Topology" issued to Carreras et al. on May 22, 2012, and the contents of both patents are incorporated herein by reference.

[0027] The solutions disclosed herein are intended to be applicable to a wide variety of personal ANR devices, i.e., devices that are at least partially worn by a user near at least one of the user's ears and are structured to provide ANR functionality to at least one ear. Various specific implementations of personal ANR devices may include headphones, two-way communication headsets, earphones, earbuds, voice glasses, wireless headsets (also known as “earsets”), and ear protectors, but it should be noted that the presentation of specific implementations is intended to facilitate understanding by use of the embodiments and should not be construed as limiting the scope of this disclosure or the claims.

[0028] Furthermore, the solutions disclosed herein are applicable to personal ANR devices that provide two-way voice communication, one-way voice communication (i.e., acoustic output of voice electronically provided by another device), or no communication. Furthermore, what is disclosed herein is applicable to personal ANR devices that are wirelessly connected to other devices, connected to other devices via electrically and / or optically conductive cables, or not connected to any other device. These teachings are applicable to personal ANR devices having physical structures configured to be worn near one or both of the user's ears, including, but not limited to, headphones with one or two earpieces, overhead headphones, behind-the-neck headphones, headsets with communication microphones (e.g., boom microphones), wireless headsets (i.e., headsets), voice glasses, single earphones or a pair of earphones, as well as hats, helmets, clothing, or any physical structures that incorporate one or two earpieces to enable voice communication and / or ear protection.

[0029] Beyond personal ANR devices, the disclosures and claims herein are also applicable to providing ANR in relatively small spaces where a person can sit or stand, including but not limited to telephone booths and car cabins.

[0030] Figure 1 is a block diagram of a personal ANR device 10, which in one embodiment may be worn by a user and configured to provide active noise reduction (ANR) near at least one of the user's ears. The personal ANR device 10 may have any of several physical configurations, including a configuration incorporating a single earpiece to provide ANR to only one of the user's ears, another configuration incorporating a pair of earpieces to provide ANR to both of the user's ears, and another configuration incorporating one or more standalone speakers to provide ANR to the environment surrounding the user. However, for the sake of simplicity, it should be noted that only a single device 10 is illustrated and described in relation to Figure 1. As will be described in more detail, the personal ANR device 10 incorporates the ability to provide either or both feedback-based ANR and feedforward-based ANR, in addition to being able to provide further pass-through speech.

[0031] In the exemplary embodiment shown in Figure 1, the ANR device 10 includes a wireless communication interface, in this case a Bluetooth system 12, that provides communication with a voice gateway device (or simply a gateway device) 30 such as a smartphone, wearable smart device, laptop, tablet, or server. The Bluetooth system 12 may be implemented, for example, as a Bluetooth system-on-a-chip (SoC), a Bluetooth Low Energy (BLE) module, or in any other way. While the ANR device 10 is shown to provide wireless communication using the Bluetooth system 12, it should be noted that any type of wireless technology (e.g., Wi-Fi Direct, cellular, etc.) may be used instead. Communication with the ANR device 10 may also occur via a first Universal Serial Bus (USB) port 16 that interfaces with the Bluetooth system 12, and / or a second USB port 18 that interfaces with a General Purpose (GP) processor 24. The GP processor 24 is one of at least three processors implemented in the ANR device 10, the other being a first digital signal processing (DSP) processor 20 and a second DSP processor 22, the two of which form a DSP system 14.

[0032] In a typical application, the source audio stream 32 is received from the gateway device 30 via the Bluetooth system 12 and sent to the DSP system 14, where the first DSP processor 20 performs ANR and generates a processed audio stream 34, which is then distributed via the acoustic driver 26 (i.e., speaker). The microphone system 28 captures ambient noise sounds provided to the DSP system 14 and provides a reference signal to generate, for example, a noise-canceling tone for ANR. For example, using the captured sound, the noise-canceling signal is calculated and output by the acoustic driver 26 with an amplitude and time shift calculated to acoustically interact with undesirable noise sounds in the surrounding environment. The microphone system 28 may also be used to capture the voice of a user, such as in a telephone application, which can communicate via the output audio stream 36 to the Bluetooth system 12 and then to the gateway device 30. It is understood that the number and position of individual microphones in the microphone system 28 will depend on the specific requirements of the ANR device 10. Furthermore, as described above, instead of using the Bluetooth system 12 to communicate with the gateway device 30, any type of communication interface, such as USB ports 16, 18, or other communication ports and protocols (not shown), can be implemented.

[0033] In addition to the audio stream, control signals 40 may also be communicated between the gateway device 30 and the GP processor 24. Control signals 40 may include, for example, data packets from the gateway device 30 (e.g., for updating the controllable noise cancellation (CNC) level), ANR device-generated data packets communicated to the gateway device 30 (e.g., for providing adjustments between a pair of earbuds), and user-generated control signals (e.g., for skipping to the next song, answering a call, setting the CNC level, etc.). Furthermore, as will be described in more detail herein, the GP processor 24 may generate feedback 42 (e.g., product usage characteristics, fault detection, etc.) which may be reported to the gateway device 30 and / or remote services such as the cloud platform 31. Feedback 42 may be used to enhance the user experience, for example, by providing details on how the ANR device 10 is being used, reporting error conditions, etc.

[0034] The ANR device 10 generally includes additional components, such as power supplies, visual inputs / outputs including GUIs and / or LED indicators, tactile inputs / outputs, power and control switches, additional memory, capacitive inputs, sensors, etc., which are generally omitted for simplicity.

[0035] As described above, the computing architecture of the ANR device 10 utilizes at least three separate processors that provide a modular, hierarchical operational platform for performing the functions associated with the ANR device 10. Using this architecture, the processing power of each processor is aligned with specific tasks to enhance the efficiency of the system. Generally, the first DSP processor 20 provides a set of core ANR algorithms 50 designed to provide active noise reduction to the audio stream 32. The second DSP processor 22 provides a set of signal analysis (SA) algorithms 52 designed to analyze ANR operation, provide state data such as operational characteristics and faults, and automatically adjust parameters in the ANR algorithms 50 in response to any available signals within the ANR device 10, and the GP processor 24 provides a set of high-level functions 54 such as managing user controls, providing I / O processing, and processing events generated by the DSP system 14.

[0036] Figure 2 shows the processor hierarchy and characteristics in more detail. In this exemplary embodiment, both the first DSP processor 20 and the second DSP processor 22 share a common bus 21 to access the GP processor 24, microphone system 28, audio stream, etc. As described herein, the first DSP processor 20 includes a set of core ANR algorithms 50 that process the input audio stream 32 (Figure 1), including, for example, feedback loop processing, compensation processing, feedforward loop processing, and audio equalization. The core ANR algorithms 50 may include operational ANR parameters that specify, for example, filter coefficients, compressor settings, signal mixers, gain conditions, signal routing options, etc. The core ANR algorithms 50 can generally be characterized as stream processing-preferred processes that require a high level of processor performance but are relatively low in complexity. In particular, the functions performed by the core ANR algorithms 50 are intended to operate very quickly with a minimal amount of processing options and memory requirements. For these types of stream processing functions, only very short latency, for example, of about 1 to 10 microseconds, is required. Furthermore, since the first DSP processor 20 provides core ANR functionality, it must be continuously powered as long as the ANR device 10 is operating. Therefore, the first DSP processor 20 is configured to perform the calculations of the ANR algorithm 50 using the least possible amount of power.

[0037] The second DSP processor 22 does not directly provide ANR processing, but instead includes a set of signal analysis algorithms 52 that analyze the signal and generate, for example, state data characterizing the signal within the ANR device 10, while the ANR processing is performed by the first DSP processor 20. The state data may include, for example, fault information, instability detection, performance characteristics, error status, frequency domain overload status, sound pressure level (SPL) information, etc. The signal analysis algorithms 52 perform different types of analysis that may use thresholds and rules. For example, if a series of frequency characteristics deviate from the expected range, a fault can be triggered, a corresponding "event" can be output to the GP processor 24, and corrective action can then be taken.

[0038] Any process adapted to analyze the signal can be deployed on the second DSP processor 22. Non-limiting exemplary signal analysis algorithms 52 are described, for example, in U.S. Patent Application Publication 2018 / 0286374, published March 26, 2019, entitled “Real-time detection of feedback instability” (for example, describing instability detection), U.S. Patent Application Publication 2018 / 0286374, entitled “Parallel Compensation in Active Noise Reduction Devices,” U.S. Patent Application Publication 2018 / 0286373, entitled “Active Noise Reduction Devices,” U.S. Patent Application Publication 2018 / 0286375, entitled “Automatic Gain Control in Active Noise Reduction (ANR) Signal Flow Path” (for example, describing an overload situation), and U.S. Patent Application Publication 2019 / 0130928, entitled “Compressive Hear-through in Personal Acoustic Devices” (for example, describing control of an ANR that generates maximum volume in the ear), the entirety of which is incorporated herein by reference.

[0039] As described herein, the second DSP processor 22 can also directly modify the operating (i.e., ANR) parameters of the first DSP processor 20. For example, in a particular case, the signal analysis algorithm 52 is introduced to automatically adjust the ANR parameters (i.e., within the core ANR algorithm 50) to achieve a desired experience based on internal signals captured from algorithms 50, 52, from the GP processor 24, from any of the microphones 28, from the input audio stream 32, and / or the control signals 40. For example, in a particular implementation, the ANR parameters are adjusted using an external signal monitored by algorithm 52, such as an external sound pressure level (SPL) characteristic received by the microphone(s) 28.

[0040] The second DSP processor 22 does not directly perform core ANR services and therefore requires relatively less performance but provides a relatively large amount of computational complexity. For example, in certain cases, tasks performed by the second DSP processor 22 may tolerate longer latency, for example, about 100 microseconds to 10 milliseconds. Similar to the first DSP processor 20, the second DSP processor is continuously powered while the device 10 is operating. In certain implementations, the second DSP processor 22 is configured to perform both stream and block processing and includes a moderate amount of data storage and programmability to effectively perform analytical tasks.

[0041] The GP processor 24 includes a set of high-level functions 54, which are one level removed from the ANR processing performed by the first DSP processor 20. The specific functions 54 performed by the GP processor 24 may depend on the requirements of the ANR device 10. An exemplary set of functions is shown in Figure 2. In a particular exemplary implementation, the communication algorithm 56 handles I / O and command processing functions. In some cases, the communication algorithm 56 includes a unified messaging interface for translating different communication protocols (e.g., USB vs. Bluetooth) to a common protocol. The unified messaging interface allows commands for interpreting commands to be stored and implemented in a single location (i.e., the GP processor 24), and thus allows all commands to be routed to the GP processor 24 for processing.

[0042] The GP processor 24 is generally tasked with handling more and more complex calculations. In some implementations, the GP processor 24 calculates customized "one-time" filter coefficients for individual users based on how the product fits their heads. In certain implementations, a user experience algorithm 64 analyzes the user's fit based, for example, on control signals 40 and feedback 42, and a communication algorithm 56 notifies the user to adjust the fit of the device 10 in response to the fitting algorithm.

[0043] In various implementations, the GP processor 24 further includes an ANR control algorithm 58 that updates the operating parameters of the first DSP processor 20 in response to events received from the DSP system 14 or to control signals 40 received from the gateway device 30 (Figure 1). In some cases, the control algorithm 58 implements CNC (controllable noise cancellation) features, etc.

[0044] As described above, the GP processor 24 may receive “events” from the second DSP processor 22 that indicate instability or some other problem, for example, using the techniques described in U.S. Patent No. 10,244,306 (which is incorporated herein by reference). If immediate changes are required to mitigate the instability based on one or more received events, the second DSP processor 22 is typically responsible for changing the ANR parameters in the first DSP processor 20. Regardless of whether immediate changes are required, the GP processor 24 may record the events generated in local memory and report the event(s) via the Bluetooth system 12 (Figure 1).

[0045] After collecting a series of events, the GP processor 24 can use one or more of its algorithms to identify and / or address the situation. For example, if multiple instability events are detected, the system health algorithm 62 is deployed to determine if a more severe problem exists (e.g., a malfunction of the ANR device 10). If a malfunction is identified, the system health algorithm 62 is configured to characterize the malfunction, and based on the nature of the malfunction, the system health algorithm 62 directly initiates ANR parameter changes on the DSP processor 20. In other cases, the system health algorithm 62 performs other actions such as analyzing event data, reporting the analysis to the gateway device 30, and applying machine learning to determine the cause of the malfunction. As described, the damage status of the ANR device 10 is reported to the gateway device 30 to notify the device user (or another user) that the ANR device 10 is malfunctioning.

[0046] For example, if an instability event is detected using the technology described in U.S. Patent No. 10,244,306 (which is incorporated herein by reference), the GP processor 24 records the event. If the number of detected instability events exceeds a predetermined threshold, the GP processor 24 is configured to provide a notification (e.g., to the device user or another user) that the device 10 appears to be malfunctioning. Similarly, if the data measured when calculating customized filter coefficients for individual users based on how the product fits the user's head indicates an anomaly (e.g., poor fit characterized by an unexpected difference between the feedback and feedforward microphone signals), the GP processor 24 provides feedback instructing the user to adjust the device for a better fit.

[0047] In other cases, the adjustment algorithm 60 is introduced to adjust the performance between a pair of earphones (e.g., earbuds, over-ear audio devices, etc.). For example, in response to detecting that the first earphone is operating at a low ANR performance level (e.g., due to a detected fault), the adjustment algorithm 60 matches the ANR performance level of the first earphone to that of the second earphone to avoid performance mismatch and ensure a better user experience.

[0048] In various embodiments, the user experience algorithm 64 is introduced to provide user controls such as volume and equalization, and to implement different operating modes such as phone calls and music listening. The user experience algorithm 64 can be implemented to analyze sensor data to automatically control the ANR device 10 (e.g., to provide special settings when on an airplane), to collect and provide feedback that can be analyzed remotely, etc. In other cases, the algorithm 64 responds to state data indicating that the ANR device 10 is not properly fitted (e.g., proper sealing with the user's ear canal is not detected) and outputs a warning (e.g., to the device user or another user).

[0049] In additional implementations, the GP processor 24 is configured to implement a machine learning model or an event classifier. In some embodiments, the GP processor 24 is configured to apply machine learning to state data received from the second DSP processor 22. In more specific embodiments, the GP processor 24 is configured to apply machine learning to state data received from the second DSP processor 22 and to time-based signals such as blocks of raw audio data. In some cases, time-based signals (which may include raw or unprocessed audio data) are received via the microphone system 28 and / or the Bluetooth system 12 (for example, as an audio stream 32). Exemplary machine learning techniques involving signal processing are described in U.S. Patent Application No. 16 / 425,550, “Automatic Active Noise Reduction (ANR) Control,” filed May 29, 2019, and U.S. Patent Application No. 16 / 690,675, filed November 21, 2019, which are incorporated herein by reference in their entirety.

[0050] In further implementations, a lightweight operating system (OS) and / or a function library 66 can be implemented to instantiate various functions 54 on the GP processor 24, thereby allowing easy access, addition, and removal of algorithms and routines, enabling software updates, providing access to storage, and providing the use of higher-level scripting and / or programming languages.

[0051] Because the GP processor 24 does not perform arbitrary time-constrained signal processing services, it can be implemented with relatively low performance, but requires a relatively large amount of computational complexity to provide a wide range of functions. Latency can be relatively high when performing functions, for example, about 100 milliseconds to 10 seconds. Furthermore, since its functionality is not always necessary, the GP processor 24 is configured to be put into a low-power mode or sleep mode when not needed (e.g., when no events are detected or when analysis is required). The sleep mode is configured to be activated by at least one of the control signals received from the first DSP processor 20, the second DSP processor 22, and / or one of the communication interfaces. In general, the GP processor 24 does not need to handle arbitrary stream processing and processes data as blocks using a standard memory configuration. Data storage can be implemented, for example, using internal storage and / or flash drives as needed.

[0052] Figure 3 is a schematic diagram of an exemplary wearable voice device 70 including the ANR device 10 of Figure 1. In this embodiment, the wearable voice device 70 is a voice headset including two earphones (e.g., in-ear headphones also called "earbuds") 72, 74. The earphones 72, 74 are shown in a "true" wireless configuration (i.e., without tethering between the earphones 72, 74), but in additional implementations, the voice headset 70 includes a tethered wireless configuration (wherein the earphones 72, 74 are connected to a playback device via a telephone line in a wireless connection), or a wired configuration (wherein at least one of the earphones 72, 74 has a wired connection to a playback device). Each illustrated earphone 72, 74 includes a body 76 which may include a casing formed of one or more plastic or composite materials. The body 76 may include a nozzle 78 for insertion into the user's ear canal entrance and a support member 80 for holding the nozzle 78 in a resting position in the user's ear. Each earphone 72, 74 includes an ANR device 10 for performing some or all of the various functions described herein. Other wearable device forms can similarly be implemented using analog devices 10, such as around-ear headphones, audio glasses, and open-ear audio devices.

[0053] One or more functions of the ANR device 10 may be implemented as hardware and / or software, and the various components may include communication paths connecting the components by any conventional means (e.g., wired and / or wireless connections). For example, one or more non-volatile devices (e.g., centralized or distributed devices such as flash memory devices) can store and / or execute programs, algorithms, and / or parameters of one or more systems within the ANR device 10 (e.g., Bluetooth system 12, DSP system 14, GP24, etc.). Furthermore, the functionalities or parts thereof described herein, and various modifications thereof (hereinafter "Functions") may be implemented at least in part via computer program products (e.g., computer programs tangibly embodied in information carriers such as one or more non-temporary machine-readable media for execution by the operation of one or more data processing devices (e.g., programmable processors, computers, multiple computers, and / or programmable logical components, etc.) or for controlling the operation thereof).

[0054] Computer programs can be written in any form of programming language, including compiled or interpreted languages, and can be deployed as standalone programs or in any form, including modules, components, subroutines, or other units suitable for use in a computing environment. Computer programs can be deployed to run on one computer or on multiple computers at one site, or they can be distributed across multiple sites and interconnected by a network.

[0055] Actions associated with performing all or part of a function may be performed by one or more programmable processors that execute one or more computer programs to perform the function. All or part of the function may be implemented as special-purpose logic circuits, such as FPGAs (Field-Programmable Gate Arrays) and / or ASICs (Application-Specific Integrated Circuits). Suitable processors for executing computer programs also include, by example, both general-purpose and special-purpose microprocessors, and any one or more processors in any type of digital computer. Generally, a processor may receive instructions and data from read-only memory, random-access memory, or both. The components of a computer include a processor for executing instructions, and one or more memory devices for storing instructions and data.

[0056] Furthermore, any actions associated with implementing all or part of the functions described herein may be performed by one or more networked computing devices. Networked computing devices may be connected via one or more wired and / or wireless networks, such as a local area network (LAN), wide area network (WAN), personal area network (PAN), internet-connected devices, and / or networks, and / or cloud-based computing (e.g., cloud-based servers).

[0057] In various implementations, electronic components described as "connected" can be linked via conventional wired and / or wireless means so that these electronic components can communicate data with one another. Furthermore, subcomponents within a given component can be considered to be linked via conventional paths, although this is not necessarily illustrated.

[0058] Several implementation forms have been described. Nevertheless, additional modifications can be made without departing from the scope of the concept of the present invention as described herein, and it is understood that other implementation forms also fall within the scope of the following claims. [Explanation of symbols]

[0059] 10 ANR devices 12 Bluetooth systems 14 DSP System 16 USB ports 18 USB ports 20. First DSP processor 21 Common Bus 22. Second DSP processor 24 General-Purpose (GP) Processors 26 Acoustic Drivers 28 Microphones 30 Gateway devices 31 Cloud Platform 32 audio streams 34 Processed audio stream 36 Output audio streams 40 Control signals 42 Feedback 50 ANR algorithms 52 SA Algorithms 54 functions 56 Communication Algorithms 58 ANR control algorithm 60 Adjustment Algorithms 62 System Health Algorithms 64 User Experience Algorithms 66 Lightweight operating systems and libraries 70 Wearable Voice Devices 72 earphones 74 earphones 76 Main unit 78 nozzles 80 Support member

Claims

1. A personal active noise reduction (ANR) device, A communication interface configured to receive source audio streams and control signals, Driver and Microphone system and, ANR computing architecture, A first DSP processor configured to receive the source audio stream and signals from the microphone system, perform ANR on the source audio stream according to a core algorithm that utilizes a set of operating parameters stored in the first DSP processor, and output the processed audio stream to the driver, A second DSP processor configured to detect a series of instability or error condition events, A general-purpose (GP) processor operably coupled to the first DSP processor and the second DSP processor, configured to characterize failures by collecting and analyzing a series of instability or error condition events detected by the second DSP processor, An ANR computing architecture comprising, Equipped with, The first DSP processor and the second DSP processor share signals via a common bus that is also accessible by the GP processor, and the first DSP processor and the second DSP processor operate at different speeds such that the first DSP processor functions with lower latency than the second DSP processor. ANR device.

2. The ANR device according to claim 1, wherein at least one of the second DSP processor and the GP processor communicates signals to the first DSP processor via the common bus to change the set of operating parameters stored in the first DSP processor.

3. The ANR device according to claim 1, wherein characterizing the failure in the GP processor includes determining that a damaged state exists within the device.

4. The ANR device according to claim 3, further comprising reporting the damage condition to the user via the communication interface.

5. The ANR device according to claim 1, wherein characterizing the failure in the GP processor includes determining that the device is not properly installed on the user.

6. The ANR device according to claim 5, further comprising reporting an improper fitting condition to the user via the communication interface.

7. The ANR device according to claim 1, wherein characterizing the failure in the GP processor includes determining that the first earphone is operating at a low ANR performance level.

8. The ANR device according to claim 7, further comprising matching the second earphone to the low ANR performance level of the first earphone.

9. The ANR device according to claim 1, wherein the GP processor characterizes the failure using a machine learning model.

10. The ANR device according to claim 9, wherein the machine learning model evaluates state data received from the second DSP processor and time-based signals collected from the microphone system or communication interface.

11. An active noise reduction (ANR) computation architecture, A first DSP processor configured to receive a source audio stream and signals from a microphone system, perform ANR on the source audio stream according to a core algorithm that utilizes a set of operating parameters stored in the first DSP processor, and output the processed audio stream to a driver, A second DSP processor configured to detect a series of instability or error condition events, A general-purpose (GP) processor operably coupled to the first DSP processor and the second DSP processor, configured to characterize failures by collecting and analyzing a series of instability or error condition events detected by the second DSP processor, Equipped with, The first DSP processor and the second DSP processor share signals via a common bus that is also accessible by the GP processor, and the first DSP processor and the second DSP processor operate at different speeds such that the first DSP processor functions with lower latency than the second DSP processor. ANR computing architecture.

12. The ANR computing architecture according to claim 11, wherein at least one of the second DSP processor and the GP processor communicates signals to the first DSP processor via the common bus to change the set of operating parameters stored in the first DSP processor.

13. The ANR computing architecture according to claim 11, wherein characterizing the failure in the GP processor includes determining that a damaged state exists within the device.

14. The ANR calculation architecture according to claim 13, further comprising reporting the damage condition to a user via a communication interface.

15. The ANR computation architecture according to claim 11, wherein characterizing the failure in the GP processor includes determining that the wearable voice device is not properly fitted to the user.

16. The ANR calculation architecture according to claim 15, further comprising reporting an inappropriate fitting state to the user via a communication interface.

17. The ANR computation architecture according to claim 11, wherein characterizing the failure in the GP processor includes determining that the first earphone is operating at a low ANR performance level.

18. The ANR calculation architecture according to claim 17, further comprising matching the second earphone to the low ANR performance level of the first earphone.

19. The GP processor is an ANR computation architecture according to claim 11, wherein the GP processor uses a machine learning model to characterize the failure.

20. The ANR computation architecture according to claim 19, wherein the machine learning model evaluates state data received from the second DSP processor and time-based signals collected from the microphone system or communication interface.