Display panel and method for manufacturing a display panel

Abstract

The present application discloses a display panel and a method for manufacturing the display panel, the display panel including an edge portion and a non-edge portion at least partially surrounded by the edge portion, the display panel including a substrate, an array composite layer disposed on the substrate, a plurality of light emitting diodes disposed on the array composite layer, and an encapsulation layer disposed on the light emitting diodes, wherein the array composite layer exposes the substrate at the edge portion and the encapsulation layer is disposed in contact with the substrate, and the present application improves the life and reliability of the display panel.

Description

Technical Field

[0001] This application relates to the display field, specifically to a display panel and a method for manufacturing the display panel.

Background Art

[0002] With the development of display technology, display panels are widely used in people's daily lives, such as display screens of mobile phones, computers, televisions, etc. Micro light-emitting diode (Min-LED, Micro-LED, etc.) display panels, which have advantages across generations in terms of brightness, resolution, energy consumption, service life, response speed, thermal stability, etc., have been developed, and they are recognized as leading display technologies in the world.

[0003] However, in current micro light-emitting diode display panels, water vapor and oxygen enter from the side edges into the interior, causing problems such as reduced lifespan and malfunctions in the micro light-emitting diode display panels.

Summary of the Invention

Problems to be Solved by the Invention

[0004] Embodiments of this application provide a display panel and a method for manufacturing the display panel, which can solve the problem that in current micro light-emitting diode display panels, water vapor and oxygen enter from the side edges into the interior, causing problems such as reduced lifespan and malfunctions in the micro light-emitting diode display panels.

Means for Solving the Problems

[0005] This application provides a display panel, the display panel includes an edge portion and a non-edge portion at least partially surrounded by the edge portion, and the display panel a substrate, an array composite layer disposed on the substrate, a plurality of light-emitting diodes disposed on the array composite layer, a sealing layer disposed on the light-emitting diodes, and includes Here, at the edge portion, the array composite layer exposes the substrate, and the sealing layer is positioned in contact with the substrate.

[0006] Preferably, in some embodiments of the present application, the sealing layer includes a cover layer and an optical adhesive layer, the optical adhesive layer being positioned between the cover layer and the light-emitting diode, and at the edge portion, the optical adhesive layer being connected to the substrate and the cover layer.

[0007] Preferably, in some embodiments of the present application, the display panel includes a bezel portion and a display portion at least partially surrounded by the bezel portion, The edge portion includes a first edge portion, the non-edge portion includes a first non-edge portion, the first edge portion corresponds to the bezel portion, and the first non-edge portion corresponds to the display portion.

[0008] Preferably, in some embodiments of the present application, the display panel includes a bezel portion and a display portion at least partially surrounded by the bezel portion, The display unit includes a plurality of light-emitting diodes, and at least one aperture is arranged between at least some of two adjacent light-emitting diodes. The edge portion includes a second edge portion, the non-edge portion includes a second non-edge portion, the second edge portion corresponds to the opening, and the second non-edge portion corresponds to the light-emitting diode on the opening side.

[0009] Preferably, in some embodiments of the present application, the array composite layer forms a first bevel at the boundary between the edge portion and the non-edge portion, the optical adhesive layer covers the first bevel, and the angle between the first bevel and the substrate at the edge portion is obtuse.

[0010] Preferably, in some embodiments of the present application, the array composite layer includes a conductive metal oxide layer and a thin-film transistor layer, wherein the thin-film transistor layer forms a second slope corresponding to the first slope, the metal oxide layer includes a first sub-protection portion, the first sub-protection portion covers the second slope and extends to the edge portion and in contact with the substrate, and the optical adhesive layer covers the first sub-protection portion.

[0011] Preferably, in some embodiments of the present application, the second slope and the substrate at the edge portion are in the range of 110° to 140°.

[0012] Preferably, in some embodiments of the present application, the array composite layer further includes a first insulating layer disposed between the thin-film transistor layer and the metal oxide layer, the metal oxide layer includes a second sub-protection portion located at the non-edge portion, and the entire second sub-protection portion is disposed on the first insulating layer.

[0013] Preferably, in some embodiments of the present application, the first insulating layer is a flat layer of organic material.

[0014] Preferably, in some embodiments of the present application, the layer structure of the thin-film transistor layer is Displaced on the substrate, a plurality of thin-film transistors comprising at least a semiconductor layer, a gate insulating layer, a gate, a source, and a drain, A first insulating layer is disposed on the side of multiple thin-film transistors away from the substrate, A plurality of first through-holes that penetrate at least the first insulating layer, The first metal layer includes a first metal layer disposed on the side of the first insulating layer away from the substrate, comprising a plurality of pads, wherein at least some of the pads are connected to the drain of the corresponding thin-film transistor via the first through-hole.

[0015] Preferably, the metal oxide layer further includes a third sub-protective portion, the third sub-protective portion covering the first metal layer.

[0016] Preferably, in some embodiments of the present application, the third sub-protection portion includes a plurality of protective members, the protective members covering the corresponding pads, and the light-emitting diodes are connected to the corresponding pads by the protective members.

[0017] Preferably, in some embodiments of the present application, the thin-film transistor layer further includes a second insulating layer, the second insulating layer is disposed between the plurality of thin-film transistors and the first insulating layer, the second insulating layer is made of an inorganic material, the first insulating layer is made of an organic material, and the first through-holes further penetrate the second insulating layer.

[0018] In response to the above, the embodiments of the present application further provide a method for manufacturing a display panel, and this method for manufacturing a display panel is: The steps include providing a substrate and The steps include forming an array composite layer on the substrate, the array composite layer exposing the substrate and forming a first slope, and the first slope dividing the display panel into an edge portion and a non-edge portion at least partially surrounded by the edge portion, The steps include transferring multiple light-emitting diodes to the array composite layer, The process includes the steps of manufacturing a sealing layer for the light-emitting diode, and at the edge portion, the sealing layer being positioned in contact with the substrate.

[0019] Preferably, in some embodiments of the present application, manufacturing a sealing layer on the light-emitting diode includes arranging a cover layer and an optical adhesive layer on the light-emitting diode, wherein the optical adhesive layer is positioned between the cover layer and the light-emitting diode, and at the edge portion, the optical adhesive layer is in contact with the substrate and connected to the substrate and the cover layer.

[0020] Preferably, in some embodiments of the present application, forming an array composite layer is Form a thin film transistor layer on the substrate, form a first insulating layer on the thin film transistor layer, the thin film transistor layer includes a plurality of thin film transistors disposed on the substrate and a second insulating layer disposed on the plurality of thin film transistors, the second insulating layer is an inorganic material, the first insulating layer is an organic material, and the thin film transistor includes at least a semiconductor layer, a gate insulating layer, a gate, a source, and a drain, Open a hole in the first insulating layer to form a first through hole, and remove the first insulating layer at the edge portion, Open a hole in the second insulating layer to further penetrate the second insulating layer into the first insulating layer, and remove the second insulating layer and other film layers in the array composite layer at the edge portion, Here, the first insulating layer, the second insulating layer, and other film layers in the array composite layer form a second inclined surface at the edge portion.

[0021] Preferably, in some embodiments of the present application, forming the array composite layer is after opening a hole in the second insulating layer, Form a first metal layer on the first insulating layer, pattern the first metal layer to form a plurality of pads, and at least a part of the pads are electrically connected to the drain through the first through hole.

[0022] Preferably, in some embodiments of the present application, forming the array composite layer is after forming a first metal layer on the first insulating layer, Form a metal oxide layer on the first metal layer, pattern the metal oxide layer to form a first sub-protection part, a second sub-protection part, and a third sub-protection part, the first sub-protection part covers the second inclined surface to form the first inclined surface, extends to the edge portion and contacts the substrate, the entire second sub-protection part is disposed on the first insulating layer, the third sub-protection part covers the first metal layer, the third sub-protection part includes a plurality of protection members, and the protection members cover the corresponding pads.

Effect of the Invention

[0023] In embodiments of the present invention, a display panel and a method for manufacturing the display panel are provided, the display panel comprising an edge portion and a non-edge portion at least partially surrounded by the edge portion, the display panel comprising a substrate, an array composite layer disposed on the substrate, a plurality of light-emitting diodes disposed on the array composite layer, and a sealing layer disposed on the light-emitting diodes, wherein at the edge portion, the array composite layer exposes the substrate and the sealing layer is disposed in contact with the substrate. In the present invention, at the edge portion, the array composite layer exposes the substrate and the sealing layer is disposed in contact with the substrate, forming a sealing structure between the sealing layer and the substrate, and when this sealing structure is located between the bezel portion and the display portion, it is possible to avoid the array composite layer being exposed to the side edge of the display panel and to prevent water vapor and oxygen from diffusing or being transmitted into the interior of the display panel by the array composite layer, thereby improving the lifespan and reliability of the display panel. At the same time, when this sealing structure is located between two adjacent pixels or light-emitting diodes in the display portion, the sealing structure blocks the path for the diffusion or transmission of water vapor and oxygen, preventing the expansion of display defects, thereby improving the lifespan and reliability of the display panel. [Brief explanation of the drawing]

[0024] To more clearly explain the technical concept in the embodiments of this application, the attached drawings used in the description of the embodiments will be briefly described below. However, it is clear that the drawings in the following description represent only a portion of the embodiments of this application, and those skilled in the art can obtain other drawings from these without any creative effort.

[0025] [Figure 1] This is a schematic top view of a first type display panel according to Embodiment 1 of the present application. [Figure 2] This is a schematic top view of a Type 2 display panel according to Embodiment 1 of the present application. [Figure 3] This is a schematic cross-sectional view showing a part of the structure of a Type 1 display panel according to Embodiment 1 of the present application. [Figure 4] This is a schematic top view of a local part showing a Type 2 display panel according to Embodiment 1 of the present application. [Figure 5] This is a schematic cross-sectional view in the direction of the dashed line DD in Figure 4. [Figure 6] This is a schematic diagram showing the flow steps of the manufacturing method of a display panel according to Embodiment 2 of the present application. [Figure 7] This is a schematic diagram showing other flow steps for the manufacturing method of the display panel according to Embodiment 2 of the present application. [Figure 8] This is a schematic diagram showing the first intermediate step of the method for manufacturing a display panel according to Embodiment 2 of the present application. [Figure 9] This is a schematic diagram showing the second intermediate step of the method for manufacturing a display panel according to Embodiment 2 of the present application. [Figure 10] This is a schematic diagram showing the third intermediate step of the method for manufacturing a display panel according to Embodiment 2 of the present application. [Figure 11] This is a schematic diagram showing the fourth intermediate step of the method for manufacturing a display panel according to Embodiment 2 of the present application. [Figure 12] This is a schematic diagram showing the fifth intermediate step of the method for manufacturing a display panel according to Embodiment 2 of the present application. [Modes for carrying out the invention]

[0026] The technical solutions in the embodiments of this application are described below clearly and completely with reference to the accompanying drawings. It is clear that the embodiments described are only a part of the embodiments of this application, and not all embodiments. All other embodiments that a person skilled in the art could obtain without inventive effort based on the embodiments of this application are within the scope of protection of this application. It should be understood that the modes for carrying out the invention described herein are for illustrative and explanatory purposes only and are not intended to limit this application. In this application, unless otherwise stated, directional terms such as “up” and “down” usually refer to the up and down directions in which the device is actually used or operating, particularly the drawing directions in the accompanying drawings. On the other hand, “inside” and “outside” refer to the contours of the device.

[0027] Embodiments of the present invention provide a display panel comprising an edge portion and a non-edge portion at least partially surrounded by the edge portion, the display panel comprising a substrate, an array composite layer disposed on the substrate, a plurality of light-emitting diodes disposed on the array composite layer, and a sealing layer disposed on the light-emitting diodes, wherein at the edge portion, the array composite layer exposes the substrate and the sealing layer is disposed in contact with the substrate.

[0028] This application further provides a method for manufacturing a display panel. Each of these methods will be described in detail below. The order in which the following embodiments are described is not limited to a preferred order.

[0029] Example 1

[0030] Referring to Figures 1 to 5, Figure 1 is a schematic top view of the first type of display panel according to Embodiment 1 of the present application. Figure 2 is a schematic top view of the second type of display panel according to Embodiment 1 of the present application. Figure 3 is a schematic cross-sectional view showing a part of the structure of the first type of display panel according to Embodiment 1 of the present application. Figure 4 is a schematic top view of a local part of the second type of display panel according to Embodiment 1 of the present application. Figure 5 is a schematic cross-sectional view in the direction of the dashed line DD in Figure 4. Figures 1 to 3 show the first type of display panel, and Figure 2 shows the shape of the metal oxide layer in comparison with Figure 1. Figures 4 and 5 show the second type of display panel. Here, the features relating to the embodiment of the first type of display panel can be combined with the features relating to the embodiment of the second type of display panel.

[0031] Embodiments of the present invention provide a display panel 100 which includes an edge portion 100B and a non-edge portion 100A at least partially surrounded by the edge portion, and the display panel 100 includes a substrate 11, an array composite layer 101Z, a plurality of light-emitting diodes 30, and a sealing layer 431. The array composite layer 101Z is disposed on the substrate 11. The plurality of light-emitting diodes 30 are disposed on the array composite layer 101Z. The sealing layer 431 is disposed on the light-emitting diodes 30. Here, at the edge portion 100B, the array composite layer 101Z exposes the substrate 11, and the sealing layer 431 is disposed in contact with the substrate 11.

[0032] Specifically, the substrate 11 may be a glass substrate, but is not limited to this.

[0033] In this embodiment, at the edge portion 100B, the array composite layer 101Z exposes the substrate 11, and the sealing layer 431 is positioned in contact with the substrate 11, forming a sealing structure between the sealing layer 431 and the substrate 11. When this sealing structure is located between the bezel portion BB and the display portion AA, the array composite layer 101Z is prevented from being exposed to the side edge of the display panel 100, preventing water vapor and oxygen from diffusing or being transmitted into the interior of the display panel 100 by the array composite layer 101Z, thereby improving the lifespan and reliability of the display panel 100. On the other hand, when this sealing structure is located between two adjacent pixels or light-emitting diodes 30 in the display portion AA, the sealing structure blocks the path for the diffusion or transmission of water vapor and oxygen, preventing the expansion of display defects, thereby improving the lifespan and reliability of the display panel.

[0034] In some embodiments, the sealing layer 431 includes a cover layer 40 and an optical adhesive layer 31, the optical adhesive layer 31 being positioned between the cover layer 40 and the light-emitting diode 30, and at the edge portion 100B, the optical adhesive layer 31 is connected to the substrate 11 and the cover layer 40.

[0035] Specifically, the optical adhesive layer 31 may be an optically transparent adhesive (abbreviated as OCA) or an optically transparent resin (abbreviated as OCR).

[0036] Specifically, the cover layer 40 may be a glass cover, a metal cover, a ceramic cover, etc., but is not limited to these.

[0037] Specifically, at the edge portion 100B, the optical adhesive layer 31 is connected to the substrate 11 and the cover layer 40 to form a sealing structure.

[0038] Referring to the first type of display panel shown in Figures 1 to 3, in some embodiments, the display panel 100 includes a bezel portion BB and a non-edge portion display portion AA that is at least partially surrounded by the bezel portion BB. The edge portion 100B includes a first edge portion 101B, and the non-edge portion 100A includes a first non-edge portion 101A, with the first edge portion 101B corresponding to the bezel portion BB and the first non-edge portion 101A corresponding to the display portion AA.

[0039] Specifically, as shown in Figures 1 to 3, the first edge portion 101B corresponds to the bezel portion BB, and the first non-edge portion 101A corresponds to the display portion AA. That is, at the edge portion 100B, the array composite layer 101Z shrinks relative to the substrate 11, and the sealing layer 431 is positioned in contact with the substrate 11.

[0040] Specifically, as shown in Figure 1, the display panel 100 includes an edge portion 100B (or a first edge portion 101B) and a non-edge portion 100A (or a first non-edge portion 101A), where the edge portion 100B completely or partially surrounds the non-edge portion 100A, and in Figure 1, the boundary between the edge portion 100B and the non-edge portion 100A is the first slope 101 and / or the second slope 102, which will be described in the embodiments described later.

[0041] Specifically, the array composite layer 101Z may include a drive circuit and wiring for driving the light emission of the micro light-emitting diode 30.

[0042] Specifically, the display panel 100 includes a plurality of light-emitting diodes 30 arranged on the substrate 11, the light-emitting diodes 30 may be used as a light source for the backlight of the display panel, or the light-emitting diodes 30 may be used as part of the subpixels of the image that the display panel directly displays.

[0043] Specifically, as shown in Figure 1, the first edge portion 101B refers to the part of the display panel 100 that is close to the side edge, and is typically located in the non-display area or bezel portion BB.

[0044] Specifically, the non-edge portion 100A may refer to the portion including the display unit AA, or it may refer to the display unit AA.

[0045] Specifically, a portion of the first edge portion 101B surrounds the first non-edge portion 101A, or the first edge portion 101B surrounds the first non-edge portion 101A. Specifically, the shrinkage of the array composite layer 101Z relative to the substrate 11 means that, in the plane of the display panel, the edge of the array composite layer 101Z and the edge of the substrate 11 do not overlap, and the edge of the array composite layer 101Z is located on the side of the edge of the substrate 11 that is closer to the center of the substrate 11.

[0046] Specifically, when we say that the array composite layer 101Z shrinks relative to the substrate 11, it means that, in the plane of the display panel, the edge of the substrate 11 is located outside the edge of the array composite layer 101Z.

[0047] In this embodiment, at the edge portion 100B, the array composite layer 101Z shrinks relative to the substrate 11, exposing the substrate 11, and the sealing layer 431 is positioned in contact with the substrate 11. This prevents the array composite layer 101Z from being exposed at the side edge of the display panel 100, and prevents water vapor and oxygen from diffusing or being transmitted into the interior of the display panel 100 via the array composite layer 101Z, thereby improving the lifespan and reliability of the display panel 100.

[0048] Referring to Figures 4 and 5, in some embodiments, the display panel 100 includes a bezel BB and a display section AA at least partially surrounded by the bezel BB. The display section AA includes a plurality of light-emitting diodes 30, with at least one aperture 301 positioned between at least some adjacent pairs of light-emitting diodes 30. The edge section 100B includes a second edge section 102B, and the non-edge section 100A includes a second non-edge section 102A, where the second edge section 102B corresponds to the aperture 301 and the second non-edge section 102A corresponds to the light-emitting diode 30 on the aperture 301 side.

[0049] Specifically, at least one aperture 301 is positioned between at least some adjacent light-emitting diodes 30, i.e., the display panel 100 includes at least one aperture 301.

[0050] Specifically, the second edge portion 102B corresponds to the aperture 301, and the second non-edge portion 102A corresponds to the light-emitting diode 30 on the aperture 301 side. In other words, in this embodiment, the edge portion 100B or the second edge portion 102B is positioned between two adjacent subpixels or two adjacent light-emitting diodes 30 in the display portion AA. Since the two adjacent light-emitting diodes 30 must be driven by the same wiring, such as the same scan line or the same data line, it is difficult to position the second edge portion 102B so as to completely surround the corresponding subpixel or light-emitting diode 30. Therefore, it is necessary to position the aperture 301 to form the second edge portion 102B.

[0051] Specifically, as shown in Figures 4 and 5, the display panel 100 includes an edge portion 100B (or a first edge portion 102B) and a non-edge portion 100A (or a first non-edge portion 102A), where the edge portion 100B completely or partially surrounds the non-edge portion 100A. In Figure 4, the boundary between the edge portion 100B and the non-edge portion 100A is the first slope 101 and / or the second slope 102, which will be described in the embodiments described later. In Figure 4, the boundary between the edge portion 100B and the non-edge portion 100A is also the edge of the opening 301.

[0052] Specifically, as shown in Figures 4 and 5, at the edge portion 100B (or the second edge portion 102B), the array composite layer 101Z exposes the substrate 11, and the sealing layer 431 is positioned in contact with the substrate 11, forming a sealing structure between the sealing layer 431 and the substrate 11. When this sealing structure is located between two adjacent pixels or light-emitting diodes 30 in the display unit AA, the sealing structure blocks the diffusion or transmission paths of water vapor and oxygen, preventing the expansion of display defects and thereby improving the lifespan and reliability of the display panel.

[0053] In this embodiment, the first type of display panel 100 shown in Figures 1 to 3 and the second type of display panel shown in Figures 4 and 5 will be described. The first edge portion 101B of the first type of display panel and the second edge portion 102B of the second type of display panel may be arranged on the same display panel, in which case the beneficial effects of both will be obtained.

[0054] In the above embodiment, the division between the first edge portion 101B and the first non-edge portion 101A is the same as the division between the second edge portion 102B and the second non-edge portion 102A. Therefore, in this embodiment, the structure will be described in detail using the edge portion 100B and the non-edge portion 100A.

[0055] In some embodiments, as shown in Figures 1 to 5, the array composite layer 101Z forms a first bevel 101 at the boundary between the edge portion 100B and the non-edge portion 100A, the optical adhesive layer 31 covers the first bevel 101, and the angle between the first bevel 101 and the substrate 11 at the edge portion 100B is obtuse.

[0056] Specifically, the array composite layer 101Z shrinks to form the first bevel 101, and the angle between the first bevel 101 and the substrate 11 at the edge portion 100B is obtuse. This prevents air bubbles from forming between the array composite layer 101Z and the optical adhesive layer 31 when the optical adhesive layer 31 is bonded to it.

[0057] Specifically, as shown in Figures 3 and 5, the first inclined plane 101 or its extension intersects the substrate 11, and the angle between the first inclined plane 101 and the substrate 11 at the edge portion 100B refers to the angle located at the edge portion 100B, or the angle on the side of the first inclined plane 101 that is away from the non-edge region 100A.

[0058] Specifically, as shown in Figures 3 and 5, the first inclined surface 101 divides the display panel into an edge portion 100B and a non-edge portion 100A. In the plane of the display panel, the side of the first inclined surface 101 closer to the light-emitting diode 30 is designated as the non-edge portion 100A, and the side of the first inclined surface 101 further from the light-emitting diode 30 is designated as the edge portion 100B.

[0059] In some embodiments, the array composite layer 101Z includes a conductive metal oxide layer 22 and a thin-film transistor layer 101Y, the thin-film transistor layer 101Y forming a second bevel 102 corresponding to a first bevel 101, the metal oxide layer 22 including a first sub-protection portion 221, the first sub-protection portion 221 covering the second bevel 102 and extending to the edge portion 100B and in contact with the substrate 11, and the optical adhesive layer 31 covering the first sub-protection portion 221. The optical adhesive layer 31 may also further cover the portion of the substrate 11 that protrudes from the first sub-protection portion 221 on the plane of the display panel.

[0060] Specifically, the portion of the substrate 11 that protrudes relative to the first sub-protection portion 221 on the plane of the display panel means that, on the plane of the display panel, the first sub-protection portion 221 contracts relative to the substrate 11, causing the substrate 11 to protrude relative to the first sub-protection portion 221. This protruding portion is the portion of the substrate 11 that protrudes relative to the first sub-protection portion 221 on the plane of the display panel.

[0061] Specifically, the thin-film transistor layer 101Y refers to a plurality of thin film layers between the metal oxide layer 22 and the substrate 11, and the thin-film transistor layer 101Y may include a plurality of thin-film transistors 103.

[0062] Specifically, the conductive metal oxide layer 22 may be indium tin oxide (ITO).

[0063] Specifically, as shown in Figures 2 and 3, in the first type of display panel, the entire metal oxide layer 22 is arranged, and the metal oxide layer 22 includes an oxide opening 220 corresponding to the light-emitting diode 30 or a pad, and the oxide opening 220 exposes the pad connected to the light-emitting diode 30.

[0064] Specifically, the first sub-protection part 221 covers the second inclined surface part 102 and extends to the edge part 100B, contacting the substrate 11. Since the first sub-protection part 221 has excellent water vapor and oxygen barrier capabilities, it prevents the thin film transistor layer 101Y from being exposed to the edge part 100B, or forms a barrier that blocks the transmission of water vapor and oxygen, thereby preventing water vapor and oxygen from entering the interior of the display panel by the thin film transistor layer 101Y, or preventing water vapor and oxygen from being transmitted to the interior of the display panel by the thin film transistor layer 101Y, thereby improving the lifespan and reliability of the display panel.

[0065] Specifically, the first sub-protection section 221 covers the second slope 102 and extends to the edge section 100B, contacting the substrate 11 and blocking the diffusion paths of water vapor and oxygen, thereby blocking water vapor and oxygen.

[0066] In some embodiments, the angle between the second inclined surface 102 and the substrate 11 at the edge portion 100B is in the range of 110° to 140°.

[0067] Specifically, since the angle α between the second inclined surface 102 and the substrate 11 at the edge portion 100B is in the range of 110° to 140°, the first sub-protective portion 221 is made to thoroughly cover or adhere to the second inclined surface 102, and also extends to the edge portion 100B and contact the substrate 11, thereby improving the coating performance and contact performance of the metal oxide layer 22 and preventing cracks from forming.

[0068] In some embodiments, the array composite layer 101Z further includes a first insulating layer 20 disposed between the thin-film transistor layer 101Y and the metal oxide layer 22, the metal oxide layer 22 includes a second sub-protection portion 222 located at the non-edge portion 100A, and the entire second sub-protection portion 222 is disposed on the first insulating layer 20.

[0069] Specifically, the entire second sub-protection section 222, by being placed on the first insulating layer 20, can further perform the role of blocking water vapor and oxygen. The second sub-protection section 222 functions as a protective layer, and even if water vapor or oxygen enters the optical adhesive layer 31, the second sub-protection section 222 can also block water vapor and oxygen from entering the thin-film transistor 103.

[0070] In some embodiments, the first insulating layer 20 is a flat layer of organic material.

[0071] Specifically, since the first insulating layer 20 is a flat layer of organic material, it can function as a flat layer, and as a result, the metal oxide layer 22 adheres well to the thin-film transistor layer 101Y and undesirable cracks do not occur.

[0072] In some embodiments, the layer structure of the thin-film transistor layer 101Y includes a plurality of thin-film transistors 103, a first insulating layer 20, a plurality of first through-holes 201, and a first metal layer 21, wherein the plurality of thin-film transistors 103 are arranged on a substrate 11, and each thin-film transistor 103 includes at least a semiconductor layer 14, a gate insulating layer 15, a gate 16, a source 181, and a drain 182. The first insulating layer 20 is located on the side of the plurality of thin-film transistors 103 away from the substrate 11. The plurality of first through-holes 201 penetrate at least the first insulating layer 20. The first metal layer 21 is located on the side of the first insulating layer 20 away from the substrate 11, and the first metal layer 21 includes a plurality of pads, at least some of which are connected to the drain 182 of the corresponding thin-film transistor 103 via the first through-holes 201.

[0073] Specifically, the multiple pads include a first pad 211 and a second pad 212, and the two electrodes of the micro light-emitting diode 30 are connected to the corresponding first pad 211 and the corresponding second pad 212, respectively.

[0074] Specifically, the thin-film transistor 103 drives the corresponding micro light-emitting diode 30 to emit light.

[0075] In some embodiments, the metal oxide layer 22 further includes a third sub-protective portion 223, which covers the first metal layer 21.

[0076] Specifically, the metal oxide layer 22 has excellent conductivity and barrier properties against water vapor and oxygen, the third sub-protection part 223 covers the first metal layer 21, and the third sub-protection part 223 functions as the first metal layer 21, so that even if water vapor or oxygen enters the inside of the display panel, the third sub-protection part 223 can prevent oxidation or corrosion of the first metal layer 21.

[0077] In some embodiments, the thin-film transistor layer 101Y further includes a second insulating layer 19, and the thin-film transistor layer 101Y is positioned between a plurality of thin-film transistors 103 and a first insulating layer 20, the second insulating layer 19 being made of an inorganic material and the first insulating layer 20 being made of an organic material, and the first through-hole 201 further penetrates the second insulating layer 19.

[0078] Specifically, since the first insulating layer 20 is made of an organic material, it provides a smooth adhesion surface to the metal oxide layer 22 and also provides excellent flatness to the microlight-emitting diode 30, thereby improving the transition yield of the microlight-emitting diode.

[0079] Specifically, the second insulating layer 19 is made of an inorganic material and has excellent barrier properties against water vapor and oxygen. Even if water vapor or oxygen enters the interior of the display panel, the second insulating layer 19 can also block the water vapor or oxygen from entering the thin-film transistor 103.

[0080] Figures 3 and 5 show the layer structure of the display panel 100. The display panel 100 includes sequentially stacked substrates 11, a light-shielding layer 12, a buffer layer 13, a semiconductor layer 14, a gate insulating layer 15, a gate 16, an interlayer insulating layer 17, a source-drain metal layer 18, a second insulating layer 19, a first insulating layer 20, a first metal layer 21, a metal oxide layer 22, a micro light-emitting diode 30, an optical adhesive layer 31, and a cover layer 40. The source-drain metal layer 18 is patterned to form a source 181 and a drain 182.

[0081] Example 2

[0082] Referring to Figures 6 to 12, Figure 6 is a schematic diagram showing the flow steps of the method for manufacturing a display panel according to Embodiment 2 of the present application. Figure 7 is a schematic diagram showing other flow steps of the method for manufacturing a display panel according to Embodiment 2 of the present application. Figure 8 is a schematic diagram showing the first intermediate step of the method for manufacturing a display panel according to Embodiment 2 of the present application. Figure 9 is a schematic diagram showing the second intermediate step of the method for manufacturing a display panel according to Embodiment 2 of the present application. Figure 10 is a schematic diagram showing the third intermediate step of the method for manufacturing a display panel according to Embodiment 2 of the present application. Figure 11 is a schematic diagram showing the fourth intermediate step of the method for manufacturing a display panel according to Embodiment 2 of the present application. Figure 12 is a schematic diagram showing the fifth intermediate step of the method for manufacturing a display panel according to Embodiment 2 of the present application.

[0083] Any one of the above embodiments of the display panel 100 can be manufactured by the method for manufacturing a display panel according to this embodiment.

[0084] Specifically, as shown in Figure 6, this embodiment provides a method for manufacturing a display panel, which includes steps S100, S200, S300, and S400.

[0085] S100 provides a circuit board.

[0086] Specifically, a substrate 11 is provided.

[0087] In S200, an array composite layer is formed on the substrate, the array composite layer exposes the substrate and forms a first bevel, the first bevel divides the display panel into an edge portion and a non-edge portion that is at least partially surrounded by the edge portion.

[0088] Specifically, an array composite layer 101Z is formed on the substrate 11, the array composite layer 101Z shrinks relative to the substrate 11 to form a first slope 101, and the first slope 101 divides the display panel 100 into an edge portion 100B and a non-edge portion 100A that is at least partially surrounded by the edge portion 100B.

[0089] In S300, multiple light-emitting diodes are transferred to an array composite layer.

[0090] Specifically, multiple light-emitting diodes 30 are transferred to the array composite layer 101Z.

[0091] In S400, a sealing layer is manufactured for the light-emitting diode, and at the edge, the sealing layer is positioned in contact with the substrate.

[0092] Specifically, a sealing layer 431 is manufactured on the light-emitting diode 30, and at the edge portion 100B, the sealing layer 431 is positioned in contact with the substrate 11.

[0093] In some embodiments, manufacturing a encapsulation layer on a light-emitting diode includes placing a cover layer 40 and an optical adhesive layer 31 on the light-emitting diode 30. Here, the optical adhesive layer 31 is placed between the cover layer 40 and the light-emitting diode 30, and at the edge portion 100B, the optical adhesive layer 31 is in contact with the substrate 11 and connected to the substrate 11 and the cover layer 40.

[0094] In some embodiments, as shown in Figure 7, forming the array composite layer includes the steps of S210, S220, and S230.

[0095] In S210, a thin-film transistor layer is formed on a substrate, a first insulating layer is formed on the thin-film transistor layer, the thin-film transistor layer includes a plurality of thin-film transistors arranged on the substrate and a second insulating layer arranged on the plurality of thin-film transistors, the second insulating layer is made of an inorganic material and the first insulating layer is made of an organic material, and the thin-film transistor includes at least a semiconductor layer, a gate insulating layer, a gate, a source and a drain.

[0096] Specifically, as shown in Figure 8, a thin-film transistor layer 101Y is formed on a substrate 11, a first insulating layer 20 is formed on the thin-film transistor layer 101Y, the thin-film transistor layer 101Y includes a plurality of thin-film transistors 103 arranged on the substrate 11, and a second insulating layer 19 arranged on the plurality of thin-film transistors 103, the second insulating layer 19 is an inorganic material, and the first insulating layer 20 is an organic material, and the thin-film transistor 103 includes at least a semiconductor layer 14, a gate insulating layer 15, a gate 16, a source 181, and a drain 182.

[0097] In S220, a hole is made in the first insulating layer to form the first through-hole 201, and the first insulating layer is removed at the edge portion 100B.

[0098] Specifically, as shown in Figure 9, a hole is made in the first insulating layer 20 to form a first through-hole 201, and the first insulating layer 20 is removed at the edge portion 100B.

[0099] In S230, a hole is made in the second insulating layer to further penetrate the first through-hole, and at the edge, the second insulating layer and other film layers in the array composite layer are removed. Here, the first insulating layer, the second insulating layer, and the other film layers in the array composite layer form a second bevel at the edge.

[0100] Specifically, as shown in Figure 10, a hole is made in the second insulating layer 19 to further penetrate the first through-hole 201, and the second insulating layer 19 and other film layers in the array composite layer 101Z are removed at the edge portion 100B. Here, the first insulating layer 20, the second insulating layer 19, and the other film layers in the array composite layer 101Z form the second bevel 102 at the edge portion 100B.

[0101] In some embodiments, as shown in Figure 11, forming the array composite layer 101Z further includes the steps of forming a first metal layer 21 on the first insulating layer 20 after opening a second insulating layer 19, patterning the first metal layer 21 to form a plurality of pads 211, and at least some of the pads 211 being electrically connected to a drain 182 through a first through-hole 201.

[0102] In some embodiments, as shown in Figure 12, forming the array composite layer 101Z further includes the steps of forming a metal oxide layer 22 on the first metal layer 21 after forming a first metal layer 21 on the first insulating layer 20, patterning the metal oxide layer 22 to form a first sub-protection portion 221, a second sub-protection portion 222, and a third sub-protection portion 223, wherein the first sub-protection portion 221 covers the second slope 102 to form the first slope 101, extends to the edge portion 100B and contacts the substrate 11, the entire second sub-protection portion 222 is positioned on the first insulating layer 20, the third sub-protection portion 223 covers the first metal layer 21, the third sub-protection portion 223 includes a plurality of protective members, and the protective members cover the corresponding pads.

[0103] This embodiment has the same beneficial effects as Example 1, and therefore its explanation is omitted here.

[0104] The display panel and the method for manufacturing the display panel provided by the embodiments of this application have been described in detail above. However, this specification uses specific examples to describe the principles and embodiments of this application, and the descriptions of the embodiments above are intended to aid in understanding the methods and core ideas of this application. Furthermore, those skilled in the art should understand that modifications can be made in specific embodiments and scope of application based on the ideas of this application, and that the disclosures in this specification are not intended to limit this application. [Explanation of Symbols]

[0105] 11: Circuit board 12: Light shielding layer 13: Buffer Layer 14: Semiconductor layer 15: Gate insulation layer 16: Gate 17: Interlayer insulating layer 18: Source-drain metal layer 19: Second insulating layer 20: First insulating layer 21: 1st metal layer 22: Conductive metal oxide layer 30: Light-emitting diode 31: Optical adhesive layer 40: Cover layer 100: Display Panel 101: First slope 102: Second slope 103: Thin-film transistor 181: Source 182: Drain 201: First through hole 211: First pad 212: Second pad 220: Oxide opening 221: First sub-protection section 222: Second sub-protection section 223: Third sub-protection section 301 :Aperture 431: Sealing layer

Claims

1. A display panel comprising an edge portion and a non-edge portion at least partially surrounded by the edge portion, wherein the display panel is circuit board and The array composite layer arranged on the substrate, Multiple light-emitting diodes arranged in the array composite layer, The light-emitting diode includes a sealing layer disposed on the light-emitting diode, Here, at the edge portion, the array composite layer exposes the substrate, and the sealing layer is positioned in contact with the substrate. The sealing layer includes a cover layer and an optical adhesive layer, the optical adhesive layer is disposed between the cover layer and the light-emitting diode, and at the edge portion, the optical adhesive layer is connected to the substrate and the cover layer. The array composite layer has a first bevel at the boundary between the edge portion and the non-edge portion, the optical adhesive layer covers the first bevel, and the angle between the first bevel and the substrate at the edge portion is obtuse. The array composite layer includes a conductive metal oxide layer and a thin-film transistor layer, the thin-film transistor layer forming a second slope corresponding to the first slope, the metal oxide layer including a first sub-protection portion, the first sub-protection portion covering the second slope around the entire circumference of the thin-film transistor layer, extending to the edge portion and in contact with the substrate, and the optical adhesive layer covering the first sub-protection portion. Display panel.

2. The display panel includes a bezel portion and a display portion at least partially surrounded by the bezel portion. The edge portion includes a first edge portion, the non-edge portion includes a first non-edge portion, the first edge portion corresponds to the bezel portion, and the first non-edge portion corresponds to the display portion. The display panel according to claim 1.

3. The display panel includes a bezel portion and a display portion at least partially surrounded by the bezel portion. The display unit includes a plurality of light-emitting diodes, and at least one aperture is arranged between at least some of two adjacent light-emitting diodes. The edge portion includes a second edge portion, the non-edge portion includes a second non-edge portion, the second edge portion corresponds to the opening, and the second non-edge portion corresponds to the light-emitting diode on the opening side. The display panel according to claim 1.

4. The angle between the second slope and the substrate at the edge is in the range of 110° to 140°. The display panel according to claim 1.

5. The array composite layer further includes a first insulating layer disposed beneath the metal oxide layer, the metal oxide layer includes a second sub-protective portion located at the non-edge portion, and the entire second sub-protective portion is disposed on the first insulating layer. The display panel according to claim 1.

6. The first insulating layer is a flat layer of organic material. The display panel according to claim 5.

7. The layer structure of the thin-film transistor layer is Displaced on the substrate, a plurality of thin-film transistors comprising at least a semiconductor layer, a gate insulating layer, a gate, a source, and a drain, The first insulating layer is located on the side of the multiple thin-film transistors away from the substrate, A plurality of first through-holes that penetrate at least the first insulating layer, A first metal layer, disposed on the side of the first insulating layer away from the substrate, comprising a plurality of pads, wherein at least some of the pads are connected to the drain of the corresponding thin-film transistor via a first through-hole, The display panel according to claim 5.

8. The metal oxide layer further includes a third sub-protective portion, the third sub-protective portion covering the first metal layer. The display panel according to claim 7.

9. The third sub-protection section includes a plurality of protective members, each protective member covering the corresponding pad, and the light-emitting diode is connected to the corresponding pad by the protective member. The display panel according to claim 8.

10. The thin-film transistor layer further includes a second insulating layer, the second insulating layer is disposed between the plurality of thin-film transistors and the first insulating layer, the second insulating layer is made of an inorganic material, the first insulating layer is made of an organic material, and the first through-hole further penetrates the second insulating layer. The display panel according to claim 7.

11. The steps include providing a substrate and The steps include forming an array composite layer on the substrate, the array composite layer exposing the substrate and forming a first slope, and the first slope dividing the display panel into an edge portion and a non-edge portion at least partially surrounded by the edge portion, The steps include transferring multiple light-emitting diodes to the array composite layer, The steps include manufacturing a sealing layer for the light-emitting diode, and positioning the sealing layer in contact with the substrate at the edge portion, Manufacturing a sealing layer for the light-emitting diode includes placing a cover layer and an optical adhesive layer on the light-emitting diode. Here, the optical adhesive layer is positioned between the cover layer and the light-emitting diode, and at the edge portion, the optical adhesive layer is in contact with the substrate and connected to the substrate and the cover layer. Forming the aforementioned array composite layer is The steps include forming a thin-film transistor layer on the substrate, forming a first insulating layer on the thin-film transistor layer, the thin-film transistor layer comprising a plurality of thin-film transistors disposed on the substrate and a second insulating layer disposed on the plurality of thin-film transistors, the second insulating layer being an inorganic material and the first insulating layer being an organic material, and the thin-film transistor comprising at least a semiconductor layer, a gate insulating layer, a gate, a source, and a drain, The steps include: creating a hole in the first insulating layer to form a first through-hole, and removing the first insulating layer at the edge portion; The step includes making a hole in the second insulating layer to allow the second insulating layer to penetrate the first insulating layer further, and removing the second insulating layer and other film layers in the array composite layer at the edge portion, Here, the first insulating layer, the second insulating layer, and the other film layers in the array composite layer form a second bevel at the edge portion. Forming the array composite layer is done after opening holes in the second insulating layer, The process further includes the steps of forming a first metal layer on the first insulating layer, patterning the first metal layer to form a plurality of pads, and at least some of the pads being electrically connected to the drain through the first through-hole, Forming the array composite layer is done after forming the first metal layer on the first insulating layer. The steps include forming a metal oxide layer on the first metal layer, patterning the metal oxide layer to form a first sub-protection portion, a second sub-protection portion, and a third sub-protection portion, wherein the first sub-protection portion covers the second slope over the entire circumference of the thin-film transistor layer to form the first slope, extends to the edge portion and contacts the substrate, the entire second sub-protection portion is placed on the first insulating layer, the third sub-protection portion covers the first metal layer, the third sub-protection portion includes a plurality of protective members, and the protective members further include covering the corresponding pads. A method for manufacturing a display panel.

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