Silicon carbide substrate, silicon carbide epitaxial substrate and method for producing silicon carbide semiconductor device
Patent Information
- Application Number
- JP2024533659
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Filing Date
- 2025-01-14
- Publication Date
- 2025-03-25
AI Technical Summary
The existing methods for manufacturing silicon carbide substrates and semiconductor devices face challenges in suppressing the occurrence of cracks, which can lead to stress and reliability issues due to differences in lattice spacing and basal plane dislocation densities across the substrate surfaces.
The method involves controlling the lattice spacing difference between the central and outer peripheral portions of the silicon carbide substrate's (11-20) plane to be within specific ranges (-0.00081 nm to 0.00065 nm or -0.00083 nm to -0.00009 nm) and maintaining a basal plane dislocation density of 700 cm^-2 or higher to reduce stress and prevent cracking, while also optimizing the substrate diameter and epitaxial layer formation for enhanced reliability.
This approach effectively suppresses the generation of cracks in silicon carbide substrates and maintains the reliability of silicon carbide semiconductor devices by managing stress and dislocation density, ensuring stable performance across varying substrate diameters.