Transmitter including selectively enabled clock source based on digital transmit data
By integrating an idle data detector to manage the LO clock signal in digital transmitters, the power consumption is reduced during idle periods, enhancing the power efficiency of these devices.
WO2025064126A1 Publication Date: 2025-03-27QUALCOMM INC
0 Cites 0 Cited by
Patent Information
- Application Number
- PCT/US2024/043184
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2023-09-19
- Filing Date
- 2024-08-21
- Publication Date
- 2025-03-27
AI Technical Summary
Technical Problem
Digital transmitters using RF DACs face challenges in reducing power consumption due to the continuous toggling of high-frequency local oscillator (LO) clock signals.
Method used
Incorporating an idle data detector to selectively enable or disable the LO clock signal based on the presence of idle data in the transmit data signal, thereby reducing power consumption during periods of inactivity.
Benefits of technology
This approach effectively conserves power by ceasing the generation of the LO clock signal during streams of idle data, leading to improved power efficiency in digital transmitters.
✦ Generated by Eureka AI based on patent content.
Abstract
An apparatus, including: a clock source configured to generate a local oscillator (LO) clock signal; a radio frequency digital-to-analog converter (RF DAC) configured to generate a radio frequency (RF) signal based on a data signal and the LO clock signal; and an idle data detector configured to: detect a stream of idle data in the data signal; and disable providing the LO clock signal to at least a portion of the RF DAC in response to detecting the stream of idle data.
Need to check novelty before this filing date? Find Prior Art