Control circuit for ring oscillator, and ring oscillation apparatus

By dynamically adjusting the power supply voltage of the ring oscillator through feedback, the problem of frequency instability was solved, and the stability and accuracy of the frequency were improved, thus ensuring the reliability of the output signal.

WO2026113049A1PCT designated stage Publication Date: 2026-06-04BCD (SHANGHAI) MICRO ELECTRONICS LTD

Patent Information

Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
BCD (SHANGHAI) MICRO ELECTRONICS LTD
Filing Date
2024-12-06
Publication Date
2026-06-04

AI Technical Summary

Technical Problem

Existing ring oscillators suffer from problems such as large frequency distribution and poor accuracy in their output clock signal, and are greatly affected by changes in device parameters and power supply voltage, resulting in frequency instability.

Method used

By dynamically adjusting the feedback, a stable power supply voltage is generated using a reference voltage generation module and an operational amplifier. The voltage at the non-inverting input of the operational amplifier is then adjusted in real time by a feedback control module, forming a feedback closed-loop control to ensure that the output signal frequency remains within a stable range.

Benefits of technology

It improves the frequency stability and reliability of the ring oscillator output signal, reduces frequency distribution, improves frequency accuracy, and avoids the influence of device parameters and power supply voltage.

✦ Generated by Eureka AI based on patent content.

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Abstract

A control circuit for a ring oscillator, and a ring oscillation apparatus, relating to the field of oscillator signals. A power supply provides a power supply voltage for the ring oscillator by means of a reference voltage generation module and an operational amplifier, and a feedback control module regulates the voltage of a non-inverting input end of the operational amplifier on the basis of a real-time situation of the frequency of an output signal of the ring oscillator, thereby affecting the power supply voltage outputted by means of the operational amplifier to the ring oscillator. The frequency of the output signal of the ring oscillator is adjusted by regulating the power supply voltage to form feedback control on the output signal of the ring oscillator, and the frequency of the output signal of the ring oscillator is kept within a stable small range by means of feedback of dynamic adjustment, thereby improving the stability and reliability of the frequency of the output signal of the ring oscillator, reducing frequency distribution of the output signal of the ring oscillator, avoiding the impact of factors such as device parameters on the frequency of the output signal of the ring oscillator, and thus improving frequency accuracy.
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Description

A control circuit for a ring oscillator and a ring oscillation device

[0001] This application claims priority to Chinese Patent Application No. 202411745595.3, filed on November 29, 2024, entitled "A Control Circuit and Ring Oscillator for a Ring Oscillator", the entire contents of which are incorporated herein by reference. Technical Field

[0002] This invention relates to the field of oscillation signals, and in particular to a control circuit for a ring oscillator and a ring oscillation device. Background Technology

[0003] With the widespread application of ring oscillators, users have increasingly higher requirements for them. Current ring oscillators are generally implemented using a multi-stage series inverter configuration. The gate capacitance, source-drain on-resistance, and threshold voltage of the transistors within each inverter all affect the final output frequency of the ring oscillator. Simultaneously, the power supply voltage of the ring oscillator also influences the final output frequency. Device parameters are affected by process parameters, and the power supply voltage varies depending on the application scenario. These parameter variations lead to problems such as large frequency distribution and poor accuracy in the clock signal output by the ring oscillator. Therefore, improving the frequency accuracy and stability of the clock signal output by the ring oscillator has become an urgent technical problem to be solved. Summary of the Invention

[0004] The purpose of this invention is to provide a control circuit and a ring oscillator for a ring oscillator. By dynamically adjusting the feedback, the frequency of the output signal of the ring oscillator is kept within a stable small range, thereby improving the stability and reliability of the output signal frequency of the ring oscillator, reducing the frequency distribution of the output signal of the ring oscillator, and avoiding the influence of factors such as device parameters on the frequency of the output signal of the ring oscillator, thus improving the frequency accuracy.

[0005] To solve the above-mentioned technical problems, the present invention provides a control circuit for a ring oscillator, comprising:

[0006] A reference voltage generation module, with its input terminal connected to a power supply, is used to generate a reference voltage based on the power supply.

[0007] An operational amplifier, with its inverting input connected to the output of the reference voltage generation module and its output connected to the power supply of a ring oscillator, is used to amplify the difference between the inverted voltage received at the inverting input and the non-inverting voltage received at the non-inverting input, and to provide a power supply voltage to the ring oscillator based on the difference.

[0008] The feedback control module has its input terminal connected to the output terminal of the ring oscillator and its output terminal connected to the non-inverting input terminal of the operational amplifier. It is used to adjust the non-inverting voltage output to the non-inverting input terminal of the operational amplifier based on the frequency of the output signal of the ring oscillator, so as to control the frequency of the output signal of the ring oscillator to be stable within a preset frequency range.

[0009] Optionally, the control circuit further includes:

[0010] The grounding capacitor has its first end connected to the output terminal of the operational amplifier and the power supply terminal of the ring oscillator, and its second end grounded.

[0011] Optionally, the ring oscillator includes N inverters connected in series, where N is an odd number greater than 3. The power supply terminals of all inverters are connected to the output terminal of the operational amplifier, and the ground terminal is grounded. The output terminal of the last inverter connected in series is connected to the input terminal of the first inverter connected in series.

[0012] Optionally, for any two inverters connected in series in the ring oscillator, the ring oscillator further includes:

[0013] The delay resistor, with its first end connected to the output of an inverter;

[0014] The first end of the delay capacitor is connected to the second end of the delay resistor and the input end of another inverter, and the second end is grounded.

[0015] Optionally, the ring oscillator further includes:

[0016] The power supply resistor has its first end connected to the output terminal of the operational amplifier and its second end connected to the power supply terminal of the inverter.

[0017] The grounding resistor has its first end connected to the grounding terminal of the inverter, and its second end grounded.

[0018] Optionally, the feedback control module includes:

[0019] A pull-up resistor, with a preset voltage connected to its first terminal;

[0020] The first capacitor has its first terminal grounded.

[0021] The first control switch has its first terminal connected to the second terminal of the first capacitor, the second terminal of the pull-up resistor, and the non-inverting input terminal of the operational amplifier, respectively.

[0022] The second capacitor has its first terminal grounded.

[0023] The second control switch has its first terminal connected to the second terminal of the first control switch and the second terminal of the second capacitor, and its second terminal is grounded.

[0024] The non-overlapping control module has its input terminal connected to the output terminal of the ring oscillator, its first output terminal connected to the control terminal of the first control switch, and its second output terminal connected to the control terminal of the second control switch.

[0025] Optionally, the non-overlapping control module includes:

[0026] The first inverter has its input terminal connected to the output terminal of the ring oscillator;

[0027] The input terminal of the second inverter is connected to the output terminal of the first inverter;

[0028] The first NOT gate has its first input terminal connected to the output terminal of the second inverter.

[0029] The third inverter's output terminal serves as the first output terminal of the non-overlapping control module.

[0030] The fourth inverter has its input terminal connected to the output terminal of the ring oscillator;

[0031] The second NOT gate has its first input terminal connected to the output terminal of the first NOT gate and the input terminal of the third inverter, and its second input terminal connected to the output terminal of the fourth inverter.

[0032] The fifth inverter has its input terminals connected to the second input terminal of the first NOT gate and the output terminal of the second NOT gate, respectively.

[0033] The sixth inverter has its input terminal connected to the output terminal of the fifth inverter, and its output terminal serves as the second output terminal of the non-overlapping control module.

[0034] Optionally, the control circuit further includes:

[0035] The frequency jitter control circuit has its output terminal connected to the pull-up resistor or the reference voltage generation module, and is used to periodically change the frequency of the output signal of the ring oscillator by adjusting the resistance value of the pull-up resistor or the magnitude of the reference voltage.

[0036] Optionally, the pull-up resistor includes several sub-resistors connected in series;

[0037] The frequency jitter control circuit includes a controller and several parallel switches connected in parallel across the two ends of the sub-resistor, wherein each parallel switch is connected in parallel to the sub-resistor in a one-to-one correspondence.

[0038] The controller is used to control the conduction or cutoff of each of the parallel switches based on a preset method, so as to periodically change the frequency of the output signal of the ring oscillator by adjusting the resistance value of the pull-up resistor.

[0039] To solve the above-mentioned technical problems, the present invention also provides a ring oscillation device, including a ring oscillator and a control circuit for the ring oscillator as described above, wherein the power supply terminal of the ring oscillator is connected to the output terminal of the control circuit for the ring oscillator.

[0040] This invention provides a control circuit for a ring oscillator, including a reference voltage generation module, an operational amplifier, and a feedback control module. A power supply provides the ring oscillator with a power supply voltage through the reference voltage generation module and the operational amplifier. Simultaneously, the feedback control module adjusts the voltage at the non-inverting input of the operational amplifier based on the real-time frequency of the ring oscillator's output signal, thereby affecting the power supply voltage output from the operational amplifier to the ring oscillator. By adjusting the power supply voltage to regulate the frequency of the ring oscillator's output signal, feedback control of the ring oscillator's output signal is formed. This dynamic feedback adjustment keeps the frequency of the ring oscillator's output signal within a stable, small range, thereby improving the stability and reliability of the ring oscillator's output signal frequency, reducing the frequency distribution of the ring oscillator's output signal, and avoiding the influence of device parameters and other factors on the frequency of the ring oscillator's output signal, thus improving frequency accuracy.

[0041] The present invention also provides a ring oscillation device that has the same beneficial effects as the control circuit of the ring oscillator described above. Attached Figure Description

[0042] To more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings used in the prior art and embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0043] Figure 1 is a schematic diagram of the control circuit of a ring oscillator provided by the present invention;

[0044] Figure 2 is a schematic diagram of the structure of a ring oscillation device provided by the present invention;

[0045] Figure 3 is a schematic diagram of the ring oscillator using the first frequency reduction method provided by the present invention;

[0046] Figure 4 is a schematic diagram of the ring oscillator using the second frequency reduction method provided by the present invention;

[0047] Figure 5 is a schematic diagram of the ring oscillator using the third frequency reduction method provided by the present invention;

[0048] Figure 6 is a waveform diagram of the output signal of a non-overlapping control module provided by the present invention;

[0049] Figure 7 is a structural schematic diagram of a non-overlapping control module provided by the present invention;

[0050] Figure 8 is a schematic diagram of the frequency waveform of a frequency jittering method provided by the present invention;

[0051] Figure 9 is a schematic diagram of the frequency waveform of another frequency jittering method provided by the present invention;

[0052] Figure 10 is a schematic diagram of the frequency waveform of a clock signal without frequency jitter function provided by the present invention;

[0053] Figure 11 is a schematic diagram of another ring oscillation device provided by the present invention. Detailed Implementation

[0054] The core of this invention is to provide a control circuit and a ring oscillator for a ring oscillator. By dynamically adjusting the feedback, the frequency of the output signal of the ring oscillator is kept within a stable small range, thereby improving the stability and reliability of the output signal frequency of the ring oscillator, reducing the frequency distribution of the output signal of the ring oscillator, and avoiding the influence of factors such as device parameters on the frequency of the output signal of the ring oscillator, thus improving the frequency accuracy.

[0055] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0056] Please refer to Figure 1, which is a schematic diagram of the control circuit of a ring oscillator provided by the present invention; please refer to Figure 2, which is a schematic diagram of the ring oscillation device provided by the present invention; to solve the above technical problems, the present invention provides a control circuit for a ring oscillator (OSC), comprising:

[0057] Reference voltage generation module 1 has its input terminal connected to the power supply VDD and is used to generate a reference voltage based on the power supply VDD.

[0058] The operational amplifier TCA has its inverting input connected to the output of the reference voltage generation module 1 and its output connected to the power supply of the ring oscillator OSC. It is used to amplify the difference between the inverted voltage received at the inverting input and the non-inverting voltage received at the non-inverting input, and to provide the power supply voltage VDD_SUB to the ring oscillator OSC based on the difference.

[0059] Feedback control module 3 has its input terminal connected to the output terminal of the ring oscillator OSC and its output terminal connected to the non-inverting input terminal of the operational amplifier TCA. It is used to adjust the non-inverting voltage output to the non-inverting input terminal of the operational amplifier TCA based on the frequency of the output signal of the ring oscillator OSC, so as to control the frequency of the output signal of the ring oscillator OSC to stabilize within a preset frequency range.

[0060] Understandably, the clock signal output by the ring oscillator (OSC) changes with the power supply voltage VDD_SUB. A higher VDD_SUB results in a higher frequency output signal. The OSC's power supply terminal is connected to the output of the operational amplifier (TCA), and its power supply voltage VDD_SUB depends on the voltage levels at the two input terminals of the TCA. The inverting input of the TCA remains at the reference voltage VREF_REG. The output of the feedback control module 3 is connected to the non-inverting input of the TCA, providing a voltage to it. This voltage is controlled by the feedback control module 3. When the frequency of the clock signal output by the OSC is too high, it indicates that the power supply voltage VDD_SUB at the OSC's power supply terminal is too high. In this case, the feedback control module 3 needs to reduce the voltage at the non-inverting input of the TCA, thereby reducing the frequency of the clock signal output by the TCA. The voltage, specifically the reduction of the power supply voltage VDD_SUB of the ring oscillator OSC, controls the frequency of the clock signal output by the ring oscillator OSC to decrease. When the frequency of the clock signal output by the ring oscillator OSC is too low, it indicates that the power supply voltage VDD_SUB at the power supply terminal of the ring oscillator OSC is too low. In this case, the feedback control module 3 needs to increase the voltage at the non-inverting input terminal of the operational amplifier TCA, thereby increasing the output voltage at the output terminal of the operational amplifier TCA, which in turn increases the power supply voltage VDD_SUB of the ring oscillator OSC. By increasing the power supply voltage VDD_SUB of the ring oscillator OSC, the frequency of the clock signal output by the ring oscillator OSC is controlled to increase.

[0061] It should be noted that the feedback control module 3 dynamically adjusts the voltage at the non-inverting input of the operational amplifier TCA in real time based on the detected frequency of the output signal of the ring oscillator (OSC). This feedback closed-loop control, formed by the feedback control module 3, achieves dynamic adjustment of the OSC's output signal. This application does not impose specific limitations on the specific implementation of the feedback control module 3, nor on the adjustment accuracy and frequency of each adjustment. These can be set and adjusted according to the specific operating conditions of the OSC in the actual application. When high accuracy is required, the frequency of the clock signal output by the OSC needs to be stable at a certain frequency value. When low accuracy is required, the frequency of the clock signal output by the OSC only needs to be stable within a small frequency range to ensure a small frequency distribution. This application does not impose specific limitations on the specific type and implementation method of the preset frequency range that the final output signal of the OSC needs to be stable. It can be a frequency range around one frequency value or a frequency range containing multiple frequency values.

[0062] It is easy to understand that the reference voltage generation module 1 needs to provide a stable reference voltage to the inverting input terminal of the operational amplifier TCA based on the power supply VDD, and control the voltage of the inverting input terminal of the operational amplifier TCA to remain constant. This ensures that the feedback control module 3 can control the final output power supply voltage VDD_SUB simply by adjusting the voltage of the non-inverting input terminal of the operational amplifier TCA. This application does not make any special restrictions on the specific type and implementation method of the reference voltage generation module 1. It can be implemented by means of voltage divider, etc. This application does not make any special restrictions on the specific setting value of the reference voltage it generates. Generally, the value of the reference voltage is lower than the voltage of the power supply VDD.

[0063] It is understandable that by setting up a feedback closed-loop control circuit for the output signal of the ring oscillator OSC, which is composed of the feedback control module 3 and the non-inverting input terminal of the operational amplifier TCA, the frequency of the clock signal output by the ring oscillator OSC can be dynamically adjusted, ensuring that the frequency of the clock signal output by the ring oscillator OSC is within a certain preset frequency range, avoiding excessive frequency distribution, improving the frequency accuracy of the ring oscillator OSC, and realizing a high-performance ring oscillator.

[0064] This invention provides a control circuit for a ring oscillator (OSC), including a reference voltage generation module 1, an operational amplifier (TCA), and a feedback control module 3. The power supply VDD provides the OSC with a power supply voltage VDD_SUB through the reference voltage generation module 1 and the operational amplifier (TCA). Simultaneously, the feedback control module 3 adjusts the voltage at the non-inverting input of the operational amplifier (TCA) based on the real-time frequency of the OSC's output signal, thereby affecting the power supply voltage VDD_SUB output from the operational amplifier (TCA) to the OSC. By adjusting the power supply voltage VDD_SUB, the frequency of the OSC's output signal is adjusted, forming feedback control of the OSC's output signal. This dynamic feedback adjustment keeps the OSC's output signal frequency within a stable, small range, thereby improving the stability and reliability of the OSC's output signal frequency, reducing the frequency distribution of the OSC's output signal, and avoiding the influence of device parameters and other factors on the OSC's output signal frequency, thus improving frequency accuracy.

[0065] Based on the above embodiments:

[0066] As an optional embodiment, the control circuit further includes:

[0067] The grounding capacitor C0 has its first end connected to the output terminal of the operational amplifier TCA and the power supply terminal of the ring oscillator OSC, and its second end grounded.

[0068] It is easy to understand that, considering that the output of the operational amplifier TCA is directly connected to the power supply of the ring oscillator OSC, a grounding capacitor C0 can be added to the output of the operational amplifier TCA to serve as an energy storage, bypass, and filter. The grounding capacitor C0 can effectively achieve the power supply filtering process, and at the same time, it can stabilize the power supply voltage VDD_SUB by utilizing its own energy storage, and bypass the pulsation caused by the circuit to ground. This application does not make any special restrictions on the specific type and implementation method of the grounding capacitor C0.

[0069] Specifically, a grounding capacitor C0 can be further added and connected to the output terminal of the operational amplifier TCA. The grounding capacitor C0 can effectively improve the stability of the power supply voltage VDD_SUB output to the ring oscillator OSC. The structure is simple, easy to implement, and the components used are small in size and low in cost, which is conducive to the simple implementation of the entire control circuit.

[0070] Please refer to Figure 3, which is a schematic diagram of the ring oscillator using the first frequency reduction method provided by the present invention. As an optional embodiment, the ring oscillator OSC includes N inverters connected in series, where N is an odd number greater than 3. The power supply terminals of the inverters are all connected to the output terminal of the operational amplifier TCA, and the ground terminal is grounded. The output terminal of the last inverter connected in series is connected to the input terminal of the first inverter connected in series.

[0071] Furthermore, to improve the operational stability of the ring oscillator (OSC) loop, especially after the non-overlapping controller is set in the feedback control module 3, the OSC needs to be frequency-reduced to ensure timing stability during startup. There are several ways to achieve this frequency reduction. One approach is to adjust the number of inverter stages in the OSC. Typically, the OSC has three inverter stages. By increasing the number of inverter stages from three to N, the OSC's frequency is reduced. This application does not impose specific limitations on the value of N; the frequency reduction requirement can be determined based on the actual application, and the value of N can be adjusted accordingly. The power supply terminals of the OSC are also the power supply terminals of all its inverters. As shown in Figure 3, the OSC contains N inverters, including INV1, INV2, INV3, and so on up to INVN.

[0072] Specifically, adding frequency reduction processing to the ring oscillator (OSC) can effectively improve the performance of the entire control circuit and the ring oscillator (OSC), improve the working stability of the entire ring oscillation system, and ensure the stable operation of the ring oscillator (OSC).

[0073] Please refer to Figure 4, which is a schematic diagram of the ring oscillator using the second frequency reduction method provided by the present invention; as an optional embodiment, for any two inverters connected in series in the ring oscillator OSC, the ring oscillator OSC further includes:

[0074] The delay resistor, with its first end connected to the output of an inverter;

[0075] The first terminal of the delay capacitor is connected to the second terminal of the delay resistor and the input terminal of another inverter, and the second terminal is grounded.

[0076] It is easy to understand that to achieve frequency reduction of a ring oscillator (OSC), an RC delay circuit consisting of delay resistors and delay capacitors can be added between the inverters in the OSC. The delay effect of the RC delay circuit achieves frequency reduction of the OSC. This application does not impose specific limitations on the specific types and implementation methods of the delay resistors and capacitors; the resistance values ​​of the delay resistors and the capacitance values ​​of the delay capacitors can be appropriately selected according to the actual circuit and frequency reduction requirements. As shown in Figure 4, N delay resistors, including resistors R1, R2, R3 up to RN, and N delay capacitors, including capacitors C11, C12, C13 up to C1N, are set.

[0077] Specifically, the frequency reduction processing of the ring oscillator (OSC) can also be achieved by adding an RC delay circuit. The circuit structure is simple and easy to implement. Adding frequency reduction processing to the ring oscillator (OSC) can effectively improve the performance of the entire control circuit and the ring oscillator (OSC), improve the working stability of the entire ring oscillation system, and ensure the stable operation of the ring oscillator (OSC).

[0078] Please refer to Figure 5, which is a schematic diagram of the ring oscillator using the third frequency reduction method provided by the present invention; as an optional embodiment, the ring oscillator OSC further includes:

[0079] The power supply resistor has its first end connected to the output terminal of the operational amplifier TCA and its second end connected to the power supply terminal of the inverter.

[0080] The grounding resistor has its first end connected to the grounding terminal of the inverter, and its second end grounded.

[0081] It is easy to understand that to achieve frequency reduction of the ring oscillator (OSC), a resistor can be added between the power supply and ground of the inverter in the OSC. Specifically, a power supply resistor can be added between the power supply terminal of the inverter and the power supply voltage VDD_SUB, and a grounding resistor can be added between the ground terminal of the inverter and ground. This application does not impose any special restrictions on the specific types and implementation methods of the power supply and grounding resistors, and the specific resistor values ​​can be appropriately selected according to actual needs. As shown in Figure 5, N power supply resistors, including resistors R11, R21, R31 up to resistor RN1, are set, and N grounding resistors, including resistors R12, R22, R32 up to resistor RN2, are set.

[0082] It should be noted that the above embodiments provide three methods for frequency reduction processing. Two or three methods can be selected simultaneously or used in combination, or only one method can be selected for use alone. There are other implementation methods for frequency reduction processing, which are not limited to the three embodiments proposed in this application.

[0083] Specifically, frequency reduction of the ring oscillator (OSC) can also be achieved by increasing the power supply resistance and grounding resistance. The circuit structure is simple and easy to implement. Adding frequency reduction processing to the OSC can effectively improve the performance of the entire control circuit and the OSC, improve the working stability of the entire ring oscillation system, and ensure the stable operation of the OSC.

[0084] As an optional embodiment, the feedback control module 3 includes:

[0085] The pull-up resistor Rpull-up has a preset voltage connected to its first terminal.

[0086] The first capacitor C1 has its first terminal grounded.

[0087] The first control switch K1 has its first terminal connected to the second terminal of the first capacitor C1, the second terminal of the pull-up resistor Rpull-up, and the non-inverting input terminal of the operational amplifier TCA, respectively.

[0088] The first terminal of the second capacitor C2 is grounded.

[0089] The first terminal of the second control switch K2 is connected to the second terminal of the first control switch K1 and the second terminal of the second capacitor C2, and the second terminal is grounded.

[0090] The non-overlapping control module has its input terminal connected to the output terminal of the ring oscillator OSC, its first output terminal connected to the control terminal of the first control switch K1, and its second output terminal connected to the control terminal of the second control switch K2.

[0091] It is understandable that the feedback control module 3 specifically includes a pull-up resistor Rpull-up, a first capacitor C1, a second capacitor C2, a first control switch K1, a second control switch K2, and a non-overlapping control module. The pull-up resistor Rpull-up uses its preset voltage to pull up the non-inverting input of the operational amplifier TCA, providing a voltage to the non-inverting input of the operational amplifier TCA. The non-overlapping control module generates two non-overlapping control signals CLK_K1 and CLK_K2 based on the clock signal CLK_IN output by the ring oscillator OSC, thereby controlling the first... Control switch K1 and second control switch K2 are alternately turned on. When first control switch K1 is on and second control switch K2 is off, the on-screen first control switch K1 controls the first capacitor C1 and the second capacitor C2 to achieve charge averaging. When first control switch K1 is off and second control switch K2 is on, the second capacitor C2 discharges through the on-screen second control switch K2, reducing its own charge. When first control switch K1 is turned on and second control switch K2 is off again, the charge averaging between the two capacitors causes the voltage at the non-inverting input of the operational amplifier TCA to drop. This application does not specifically limit the specific types and implementation methods of the first capacitor C1, second capacitor C2, first control switch K1, second control switch K2, and the non-overlapping control module. The capacitance values ​​of the first capacitor C1 and the second capacitor C2 can also be adjusted according to the actual circuit conditions. The first control switch K1 and the second control switch K2 can be implemented using switching devices such as MOSFETs (Metal Oxide Semiconductor Field Effect Transistors).

[0092] It should be noted that this application does not impose any special restrictions on the specific implementation method of the preset voltage. It can be implemented by directly reusing the power supply VDD or the reference voltage, or by using an independent voltage. As shown in Figure 2, the pull-up resistor Rpull-up can be set between the power supply VDD and the non-inverting input terminal of the operational amplifier TCA. The power supply VDD is connected to the non-inverting input terminal of the operational amplifier TCA through the pull-up resistor Rpull-up, providing a voltage to the non-inverting input terminal, thereby using the power supply VDD to maintain the power supply to the non-inverting input terminal of the operational amplifier TCA. The operational amplifier TCA can effectively amplify the difference between the reference voltage and the voltage at the second end of the pull-up resistor Rpull-up, realizing the process of using the power supply VDD to power the ring oscillator OSC. At the same time, the two input terminals cooperate with the feedback control structure to realize the controllable process of the power supply voltage VDD_SUB output to the ring oscillator OSC. This application does not make any special restrictions on the specific type and implementation method of the pull-up resistor Rpull-up and the operational amplifier TCA. The resistance value of the pull-up resistor Rpull-up can be set and adjusted according to the specific voltage conditions of the power supply VDD and the power supply voltage VDD_SUB required by the ring oscillator OSC.

[0093] It's easy to understand that, taking the preset voltage directly reused power supply VDD as an example, when the ring oscillator OSC starts up, the power supply VDD initially charges the first capacitor C1. The voltage at the non-inverting input of the operational amplifier TCA is relatively high. After being amplified by the operational amplifier TCA, the power supply voltage VDD_SUB output to the ring oscillator OSC is relatively high, and the frequency of the ring oscillator OSC output signal is high. At this time, due to the high frequency of the ring oscillator OSC output signal, the frequency of the control signal output by the non-overlapping control module will also be relatively high, and the operating frequency of the first control switch K1 and the second control switch K2 will also be relatively high. The higher the operating frequency of the two control switches, the more energy the second capacitor C2 releases during the whole process, and the lower the voltage at the non-inverting input of the operational amplifier TCA. After being amplified by the operational amplifier TCA, the output power supply voltage VDD_SUB becomes lower, which in turn causes the frequency of the clock signal output by the ring oscillator OSC to become lower. After achieving dynamic balance, the voltage at the non-inverting input of the operational amplifier TCA reaches a stable value and eventually approaches the reference voltage.

[0094] After reaching dynamic equilibrium, the expression for the frequency Freq of the clock signal output by the ring oscillator (OSC) is:

[0095] Where VDD is the voltage value of the power supply VDD, VREF_REG is the voltage value of the reference voltage, and VREF_REG=k*VDD, 0 <k<1,R pullupLet Rpull-up be the resistance of the pull-up resistor, and C2 be the capacitance of the second capacitor. It's easy to see from the formula that the frequency of the clock signal output by the ring oscillator (OSC) depends only on the resistance of Rpull-up and the capacitance of the second capacitor, and is independent of other process parameters and the power supply voltage VDD_SUB. Changing the total resistance of Rpull-up will result in the frequency of the clock signal output by the OSC being inversely proportional to the total resistance of Rpull-up. This formula can be used to design a method for controlling the resistance of Rpull-up when implementing frequency jittering.

[0096] Specifically, for higher precision circuit design, this invention employs a non-overlapping controller design to control the voltage at the non-inverting input of the operational amplifier TCA, further improving frequency accuracy. Moreover, the oscillation frequency of the clock signal output by the final ring oscillator OSC is unaffected by the power supply voltage VDD_SUB, resulting in significantly improved stability.

[0097] Please refer to Figure 6, which is a waveform diagram of the output signal of a non-overlapping control module provided by the present invention; please refer to Figure 7, which is a structural diagram of a non-overlapping control module provided by the present invention. As an optional embodiment, the non-overlapping control module includes:

[0098] The input terminal of the first inverter U1 is connected to the output terminal of the ring oscillator OSC.

[0099] The input terminal of the second inverter U2 is connected to the output terminal of the first inverter U1;

[0100] The first input terminal of the first NOT gate U11 is connected to the output terminal of the second inverter U2;

[0101] The third inverter U3 has its output terminal serving as the first output terminal of the non-overlapping control module.

[0102] The fourth inverter U4 has its input terminal connected to the output terminal of the ring oscillator OSC;

[0103] The second NOT gate U12 has its first input terminal connected to the output terminal of the first NOT gate U11 and the input terminal of the third inverter U3, and its second input terminal connected to the output terminal of the fourth inverter U4.

[0104] The input terminals of the fifth inverter U5 are connected to the second input terminal of the first NOT gate U11 and the output terminal of the second NOT gate U12, respectively.

[0105] The input terminal of the sixth inverter U6 is connected to the output terminal of the fifth inverter U5, and the output terminal serves as the second output terminal of the non-overlapping control module.

[0106] It is easy to understand that the non-overlapping control module specifically includes a first inverter U1, a second inverter U2, a first NOT gate U11, a third inverter U3, a fourth inverter U4, a second NOT gate U12, a fifth inverter U5, and a sixth inverter U6. Taking the first control switch K1 as a PMOS transistor and the second control switch K2 as an NMOS transistor as an example, CLK_IN is the oscillation signal input to the non-overlapping control module, which is the clock signal output by the ring oscillator OSC. CLK_K1 and CLK_K2 are the two output control signals. The CLK_K1 and CLK_K2 signals do not overlap, and there is a dead time Td between their edges. Figure 6 shows a typical implementation waveform of the non-overlapping control module, and Figure 7 shows a typical circuit diagram of the non-overlapping control module. The parasitic delay of the inverter is denoted as Tpd1, and the parasitic delay of the NOT gate is denoted as Tpd2. The circuit implementation and control timing of the non-overlapping control module are not limited to the implementation method provided in this embodiment. There are many ways to implement non-overlapping control circuits or dead-time control circuits, and there are also many ways to implement non-overlapping control timing.

[0107] Specifically, the non-overlapping control module can be implemented using a combination circuit of inverters and NOT gates. The entire circuit structure is simple and easy to implement, and it can effectively output two non-overlapping control signals, which is beneficial to the simple implementation of the entire control circuit.

[0108] Please refer to Figure 8, which is a frequency waveform diagram of one frequency jitter method provided by the present invention; please refer to Figure 9, which is a frequency waveform diagram of another frequency jitter method provided by the present invention; please refer to Figure 10, which is a frequency waveform diagram of a clock signal without frequency jitter function provided by the present invention; as an optional embodiment, the control circuit further includes:

[0109] The frequency jitter control circuit has its output terminal connected to the pull-up resistor Rpull-up or the reference voltage generation module 1. It is used to periodically change the frequency of the output signal of the ring oscillator OSC by adjusting the resistance value of the pull-up resistor Rpull-up or the magnitude of the reference voltage.

[0110] It's easy to understand that, to further improve EMC (Electromagnetic Compatibility) performance, frequency jitter can be added to the control circuit. Frequency jitter refers to the fact that the frequency of the clock signal output by the ring oscillator (OSC) is not fixed but varies periodically within a certain frequency range. To achieve frequency jitter of the clock signal output by the OSC, the power supply voltage VDD_SUB output to the OSC needs to be jittered. Therefore, the voltage at the non-inverting or inverting input of the operational amplifier TCA can be affected by controlling the value of the pull-up resistor Rpull-up or the magnitude of the reference voltage output by the reference voltage generation module 1, thereby achieving jitter of the OSC's power supply voltage VDD_SUB. This application does not impose any specific limitations on the type and implementation method of the frequency jitter control circuit. There are various options for the specific frequency jitter method of the clock signal, including triangular waves as shown in Figure 8, pseudo-random waves as shown in Figure 9, and many other forms. Different frequency jitter methods will have different performance characteristics, and the choice can be made according to the actual application requirements. This application does not impose any specific limitations here. As shown in Figure 10, without frequency jitter control, the frequency of the clock signal output by the ring oscillator (OSC) is usually stable at a certain frequency value.

[0111] It should be noted that there are multiple ways to control the value of the pull-up resistor Rpull-up and the magnitude of the reference voltage output by the reference voltage generation module 1. The pull-up resistor Rpull-up can be implemented using a programmable resistor to facilitate resistance adjustment; the magnitude of the reference voltage can be adjusted by adjusting the voltage divider resistor of the reference voltage generation module 1, etc. This application does not impose any particular limitation on these methods. When it is necessary to maintain the frequency jitter of the triangular wave as shown in Figure 8, this can be achieved by controlling the reference voltage generation module 1 to generate a reference voltage with the jitter of the triangular wave as shown in Figure 8.

[0112] Specifically, the addition of frequency jitter can, to some extent, offset the influence of interference signals on the clock signal output by the ring oscillator (OSC). In particular, when the clock signal is used for communication, it can effectively improve the anti-interference and confidentiality of the communication process and ensure the accuracy of the clock signal. At the same time, it can also improve the EMI (Electromagnetic Interference) and EMC performance of the entire ring oscillator system.

[0113] Please refer to Figure 11, which is a schematic diagram of another ring oscillation device provided by the present invention; as an optional embodiment, the pull-up resistor Rpull-up includes several sub-resistors connected in series;

[0114] The frequency jitter control circuit includes a controller and several parallel switches connected in parallel across the two ends of the sub-resistors. The parallel switches are connected in parallel with the sub-resistors one by one.

[0115] The controller is used to control the on or off of each parallel switch based on a preset method, so as to periodically change the frequency of the output signal of the ring oscillator OSC by adjusting the resistance value of the pull-up resistor Rpull-up.

[0116] It is understandable that frequency jitter control can be achieved by adjusting the resistance value of the pull-up resistor Rpull-up. As shown in Figure 11, the pull-up resistor Rpull-up can be set as a resistor array composed of a series of sub-resistors. Each sub-resistor in the resistor array is controlled by parallel switches K1, K2, ..., Kn-1, Kn-2, etc. The frequency jitter controller can adjust the total resistance of the pull-up resistor Rpull-up by adjusting the number of on and off parallel switches, thereby achieving frequency jitter of the final output clock signal. This application does not impose any special limitations on the specific control method of the controller; it can be set according to the specific frequency jitter method. This application does not impose any special limitations on the type, resistance value, specific implementation method of each sub-resistor, or the specific type and implementation method of each parallel switch. There are also multiple choices for the number of sub-resistors and parallel switches, not limited to the one-to-one correspondence proposed in this embodiment, and can be flexibly adjusted according to actual application requirements.

[0117] Specifically, by setting the pull-up resistor Rpull-up as multiple sub-resistors and flexibly adjusting the number of sub-resistors connected to the circuit, the resistance value of the pull-up resistor Rpull-up can be controlled, thereby achieving the function of frequency jittering. The entire circuit structure is simple and easy to implement.

[0118] To solve the above-mentioned technical problems, the present invention also provides a ring oscillation device, including a ring oscillator and a control circuit for the ring oscillator as described above, wherein the power supply terminal of the ring oscillator is connected to the output terminal of the control circuit for the ring oscillator.

[0119] For a description of the ring oscillation device provided by the present invention, please refer to the embodiment of the control circuit of the ring oscillator described above. The present invention will not be described again here.

[0120] It should also be noted that, in this specification, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0121] The above description of the disclosed embodiments enables those skilled in the art to make or use the invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the invention. Therefore, the invention is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A control circuit for a ring oscillator, characterized by include: A reference voltage generation module, with its input terminal connected to a power supply, is used to generate a reference voltage based on the power supply. An operational amplifier, with its inverting input connected to the output of the reference voltage generation module and its output connected to the power supply of a ring oscillator, is used to amplify the difference between the inverted voltage received at the inverting input and the non-inverting voltage received at the non-inverting input, and to provide a power supply voltage to the ring oscillator based on the difference. The feedback control module has its input terminal connected to the output terminal of the ring oscillator and its output terminal connected to the non-inverting input terminal of the operational amplifier. It is used to adjust the non-inverting voltage output to the non-inverting input terminal of the operational amplifier based on the frequency of the output signal of the ring oscillator, so as to control the frequency of the output signal of the ring oscillator to be stable within a preset frequency range.

2. The control circuit for a ring oscillator as defined in claim 1, wherein, The control circuit also includes: The grounding capacitor has its first end connected to the output terminal of the operational amplifier and the power supply terminal of the ring oscillator, and its second end grounded.

3. The control circuit for a ring oscillator as defined in claim 1, wherein, The ring oscillator includes N inverters connected in series, where N is an odd number greater than 3. The power supply terminals of each inverter are connected to the output terminal of the operational amplifier, and the ground terminal is grounded. The output terminal of the last inverter connected in series is connected to the input terminal of the first inverter connected in series.

4. The control circuit for the ring oscillator as described in claim 3, characterized in that, For any two inverters connected in series in the ring oscillator, the ring oscillator further includes: The delay resistor, with its first end connected to the output of an inverter; The first end of the delay capacitor is connected to the second end of the delay resistor and the input end of another inverter, and the second end is grounded.

5. The control circuit for the ring oscillator as described in claim 4, characterized in that, The ring oscillator also includes: The power supply resistor has its first end connected to the output terminal of the operational amplifier and its second end connected to the power supply terminal of the inverter. The grounding resistor has its first end connected to the grounding terminal of the inverter, and its second end grounded.

6. The control circuit for the ring oscillator as described in any one of claims 1 to 5, characterized in that, The feedback control module includes: A pull-up resistor, with a preset voltage connected to its first terminal; The first capacitor has its first terminal grounded. The first control switch has its first terminal connected to the second terminal of the first capacitor, the second terminal of the pull-up resistor, and the non-inverting input terminal of the operational amplifier, respectively. The second capacitor has its first terminal grounded. The second control switch has its first terminal connected to the second terminal of the first control switch and the second terminal of the second capacitor, and its second terminal is grounded. The non-overlapping control module has its input terminal connected to the output terminal of the ring oscillator, its first output terminal connected to the control terminal of the first control switch, and its second output terminal connected to the control terminal of the second control switch.

7. The control circuit for the ring oscillator as described in claim 6, characterized in that, The non-overlapping control module includes: The first inverter has its input terminal connected to the output terminal of the ring oscillator; The input terminal of the second inverter is connected to the output terminal of the first inverter; The first NOT gate has its first input terminal connected to the output terminal of the second inverter. The third inverter's output terminal serves as the first output terminal of the non-overlapping control module. The fourth inverter has its input terminal connected to the output terminal of the ring oscillator; The second NOT gate has its first input terminal connected to the output terminal of the first NOT gate and the input terminal of the third inverter, and its second input terminal connected to the output terminal of the fourth inverter. The fifth inverter has its input terminals connected to the second input terminal of the first NOT gate and the output terminal of the second NOT gate, respectively. The sixth inverter has its input terminal connected to the output terminal of the fifth inverter, and its output terminal serves as the second output terminal of the non-overlapping control module.

8. The control circuit for the ring oscillator as described in claim 6, characterized in that, The control circuit also includes: The frequency jitter control circuit has its output terminal connected to the pull-up resistor or the reference voltage generation module, and is used to periodically change the frequency of the output signal of the ring oscillator by adjusting the resistance value of the pull-up resistor or the magnitude of the reference voltage.

9. The control circuit for the ring oscillator as described in claim 8, characterized in that, The pull-up resistor includes several sub-resistors connected in series; The frequency jitter control circuit includes a controller and several parallel switches connected in parallel across the two ends of the sub-resistor, wherein each parallel switch is connected in parallel to the sub-resistor in a one-to-one correspondence. The controller is used to control the conduction or cutoff of each of the parallel switches based on a preset method, so as to periodically change the frequency of the output signal of the ring oscillator by adjusting the resistance value of the pull-up resistor.

10. A ring oscillation device, characterized in that, The device includes a ring oscillator and a control circuit for the ring oscillator as described in any one of claims 1 to 9, wherein the power supply terminal of the ring oscillator is connected to the output terminal of the control circuit for the ring oscillator.