Information processing method and apparatus

Abstract

An information processing method and apparatus. The method comprises: acquiring a first bit sequence; performing low-density parity check (LDPC) encoding on the first bit sequence on the basis of a first shift value matrix and a first lifting factor to obtain a second bit sequence, wherein a first shift value of a first region in the first shift value matrix is obtained on the basis of a second shift value in a second shift value matrix, the first lifting factor is greater than a first value, and the first value and the first lifting factor belong to the same lifting factor set; and outputting the second bit sequence. In the method, the first lifting factor is greater than the first value, so that a larger-scale check matrix can be obtained; and LDPC encoding is performed on the basis of the check matrix, so that a longer code length and a higher throughput can be supported, thereby improving the performance of an LDPC code.

Description

An information processing method and apparatus

[0001] This application claims priority to Chinese Patent Application No. 202411756831.1, filed on December 2, 2024, entitled "An Information Processing Method and Apparatus", the entire contents of which are incorporated herein by reference. Technical Field

[0002] This application relates to the field of communications, and more specifically, to an information processing method and apparatus. Background Technology

[0003] In the field of channel coding, low-density parity check (LDPC) codes are one of the most mature and widely used coding schemes. LDPC codes are a channel coding scheme very close to Shannon lines, featuring good performance and low complexity. LDPC codes have been adopted by the 3rd Generation Partnership Project (3GPP) as a data channel coding scheme.

[0004] With the development of communications, various services have placed higher demands on the code length, throughput, and hardware compatibility of encoding and decoding. Currently, LDPC cannot fully meet these extremely high requirements. Summary of the Invention

[0005] This application provides an information processing method and apparatus to improve the performance of LDPC codes.

[0006] In a first aspect, embodiments of this application provide an information processing method that can be applied to the encoding side, such as an encoding device, modules within the encoding device (e.g., circuits, chips, or chip systems (such as modem chips (also known as baseband chips), or system-on-a-chip (SoC) chips or system-in-package (SIP) chips containing modem cores)), or logical nodes, logical modules, or software capable of implementing all or part of the encoding device. The encoding device can be a terminal or network device.

[0007] The method includes: obtaining a first bit sequence; performing low-density parity-check (LDPC) encoding on the first bit sequence based on a first shift value matrix and a first expansion factor to obtain a second bit sequence, wherein the first shift value of the first region in the first shift value matrix is ​​obtained based on the second shift value in the second shift value matrix, the first expansion factor is greater than the first value, and the first value and the first expansion factor belong to the same set of expansion factors; and outputting the second bit sequence.

[0008] In the above method, the first expansion factor is greater than the first value. Based on the first expansion factor, a larger parity check matrix can be obtained. LDPC encoding based on this parity check matrix can support longer code lengths and higher throughput, thus improving the performance of LDPC codes.

[0009] In this application, the first region can be a submatrix or multiple scattered submatrixes. The size of the multiple submatrixes can be the same or different. This application does not limit the first region.

[0010] In conjunction with the first aspect, in one possible implementation, the first region is a portion of the first translation value matrix, and the regions in the first translation value matrix other than the first region can use translation values ​​from existing communication protocols. This method, by modifying only a portion of the region, can achieve hardware compatibility across multiple generations of communication system devices, reducing hardware implementation complexity.

[0011] In conjunction with the first aspect, in one possible implementation, the first translation value is greater than or equal to the second translation value.

[0012] In conjunction with the first aspect or any of its implementations, in another possible implementation, the first value is greater than or equal to 384. That is to say, the first expansion factor is greater than 384.

[0013] In conjunction with the first aspect or any implementation thereof, in another possible implementation, the first translation value is obtained based on the second translation value and the first expansion factor. Based on this implementation, the second translation value can be obtained through a new radio (NR) translation value matrix or list, which can reuse existing NR translation value matrices or lists.

[0014] In conjunction with the first aspect or any of its implementations, in another possible implementation, the second translation value is p, the first translation value is p+k*Z, the set of extension factors to which the first extension factor belongs includes the second extension factor Z, k is a non-negative number, and p and Z are positive integers.

[0015] In conjunction with the first aspect or any of its implementations, in another possible implementation, the second shift value matrix is ​​BG_S, the set of expansion factors to which the first expansion factor belongs includes the second expansion factor Z, where Z is a positive integer; the first shift value matrix is ​​BG_S+Z*F, where at least one element in F is a positive integer.

[0016] Optionally, the second expansion factor can be one of the expansion factors in the existing NR expansion factor set. For example, the second expansion factor can be the largest expansion factor in the set, or it can be another expansion factor in the set. This method can reuse the existing NR expansion factor set.

[0017] In conjunction with the first aspect or any of its implementations, in another possible implementation, the first translation value matrix corresponds to the first base matrix; wherein, the first region corresponds to the first a rows or a partial column or a partial row of the first a rows in the first base matrix, where a is a positive integer; or, the first region corresponds to the first b columns or a partial column or a partial row of the first b columns in the first base matrix, where b is a positive integer; or, the first region corresponds to the X1 row or X2 column in the first base matrix, where X1 is the row with the row weight preceding X1 in the first base matrix, and X2 is the column with the column weight preceding X2 in the first base matrix, where X1 and X2 are positive integers.

[0018] In conjunction with the first aspect or any implementation thereof, in another possible implementation, the aforementioned LDPC is a quasi-cyclic low-density parity check (QC-LDPC) code. It should be understood that QC-LDPC requires implementation using a hardware structure of a QC-LDPC shifting network (QSN). The QSN needs to consider the types of shift values ​​it supports during its design. In this embodiment, most shift values ​​are concentrated in a relatively small interval (i.e., the first region corresponds to a portion of the first base matrix), which reduces the number of shift value types and thus reduces hardware complexity.

[0019] Secondly, embodiments of this application provide an information processing method that can be applied to a decoding side, such as a decoding device, a module within the decoding device (e.g., a circuit, chip, or chip system (such as a modem chip, or a SoC chip or SIP chip containing a modem core)), or a logical node, logical module, or software capable of implementing all or part of the decoding device. The decoding device can be a network device or a terminal. This second aspect corresponds to the decoding side of the first aspect. Terms or features identical to those in the second aspect or implementations of the first aspect can be referenced in the first aspect or its implementation. The technical effects of the second aspect can also be referenced in the first aspect or its implementation, and will not be repeated here.

[0020] The method includes: obtaining a second bit sequence; performing LDPC decoding on the second bit sequence based on a first shift value matrix and a first expansion factor to obtain a first bit sequence, wherein the first shift value in the first region of the first shift value matrix is ​​obtained based on the second shift value in the second shift value matrix, the first expansion factor is greater than the first value, and the first value and the first expansion factor belong to the same set of expansion factors.

[0021] In conjunction with the second aspect, in one possible implementation, the first translation value is greater than or equal to the second translation value.

[0022] In conjunction with the second aspect or any of its implementations, in another possible implementation, the first value is greater than or equal to 384.

[0023] In conjunction with the second aspect or any of its implementations, in another possible implementation, the first translation value is obtained based on the second translation value and the first expansion factor.

[0024] In conjunction with the second aspect or any of its implementations, in another possible implementation, the second translation value is p, the first translation value is p+k*Z, the set of extension factors to which the first extension factor belongs includes the second extension factor Z, k is a non-negative number, and p and Z are positive integers.

[0025] In conjunction with the second aspect or any of its implementations, in another possible implementation, the second shift value matrix is ​​BG_S, the set of expansion factors to which the first expansion factor belongs includes the second expansion factor Z, where Z is a positive integer; the first shift value matrix is ​​BG_S+Z*F, where at least one element in F is a positive integer.

[0026] In conjunction with the second aspect or any of its implementations, in another possible implementation, the first translation value matrix corresponds to the first base matrix; wherein, the first region corresponds to the first a rows or a partial column or a partial row of the first a rows in the first base matrix, where a is a positive integer; or, the first region corresponds to the first b columns or a partial column or a partial row of the first b columns in the first base matrix, where b is a positive integer; or, the first region corresponds to the X1 row or X2 column in the first base matrix, where X1 is the row with the row weight preceding X1 in the first base matrix, and X2 is the column with the column weight preceding X2 in the first base matrix, where X1 and X2 are positive integers.

[0027] Optionally, the positions of the aforementioned partial columns in the first base matrix may be adjacent or not adjacent. For example, the first region corresponds to the first three columns in the first base matrix, or the first region corresponds to the first and third columns in the first base matrix; the positions of the aforementioned partial rows in the first base matrix may be adjacent or not adjacent. For example, the first region corresponds to the first four rows in the first base matrix, or the first region corresponds to the first and fourth rows in the first base matrix. This application does not limit the positions of the aforementioned partial rows and partial columns in the first base matrix.

[0028] Optionally, the first region may correspond to a single matrix in the first basis matrix. For example, the first region may correspond to a 4x22 matrix in the first basis matrix, where the 4x22 matrix can be located in the first 4 rows from top to bottom and the first 22 rows from left to right in the first basis matrix. Alternatively, the first region may correspond to multiple matrices in the first basis matrix, such as multiple rows in the first basis matrix, where the lengths of the rows can vary. This application does not limit which elements in the first basis matrix the first region corresponds to.

[0029] Thirdly, embodiments of this application provide an information processing method that can be applied to the encoding side, such as an encoding device, modules within the encoding device (e.g., circuits, chips, or chip systems (such as modem chips, or SoC chips or SIP chips containing modem cores)), or logical nodes, logical modules, or software that can implement all or part of the encoding device. The encoding device can be a terminal or a network device.

[0030] The method includes: obtaining a first bit sequence; performing low-density parity-check (LDPC) encoding on the first bit sequence based on a first shift value matrix and a first expansion factor to obtain a second bit sequence, wherein the first shift value matrix includes the shift value matrix of a first region, the first expansion factor is greater than a first value, and the first value and the first expansion factor belong to the same set of expansion factors; and outputting the second bit sequence.

[0031] Optionally, the first translation value matrix is ​​matrix H. SV1 Or with matrix H SV1 The matrix H that satisfies the first transformation relation SV2 The first transformation relationship may include at least one of the following: row transformation relationship, column transformation relationship, or translation value transformation relationship. This is related to matrix H. SV1 The matrix H that satisfies the first transformation relation SV2 It could refer to: the matrix H SV2 It is composed of matrix H SV1 The matrix H is obtained by performing a first transformation, wherein the first transformation includes at least one of the following operations: row permutation, column permutation, or translation value transformation. For example, matrix H SV2 With matrix H SV1Satisfying row transformation relations can mean that matrix H SV2 It is composed of matrix H SV1 Obtained by row permutation; for example, matrix H SV2 With matrix H SV1 Satisfying column transformation relations can mean that matrix H SV2 It is composed of matrix H SV1 Obtained by column permutation; for example, matrix H SV2 With matrix H SV1 Satisfying the translation value transformation relationship can refer to: matrix H SV2 It is composed of matrix H SV1 It is obtained by permuting at least two translation values.

[0032] Optionally, the translation value matrix of the first region is matrix H. SV1-1 Or with matrix H SV1-1 The matrix H that satisfies the first transformation relation SV2-1 The first transformation relationship may include at least one of the following: row transformation relationship, column transformation relationship, or translation value transformation relationship. This is related to matrix H. SV1 The matrix H that satisfies the first transformation relation SV2-1 It could refer to: the matrix H SV2-1 It is composed of matrix H SV1-1 The matrix H is obtained by performing a first transformation, wherein the first transformation includes at least one of the following operations: row permutation, column permutation, or translation value transformation. For example, matrix H SV2-1 With matrix H SV1-1 Satisfying row transformation relations can mean that matrix H SV2-1 It is composed of matrix H SV1-1 Obtained by row permutation; for example, matrix H SV2-1 With matrix H SV1-1 Satisfying column transformation relations can mean that matrix H SV2-1 It is composed of matrix H SV1-1 Obtained by column permutation; for example, matrix H SV2-1 With matrix H SV1-1 Satisfying the translation value transformation relationship can refer to: matrix H SV2-1 It is composed of matrix H SV1-1 It is obtained by permuting at least two translation values.

[0033] In conjunction with the third aspect, in one possible implementation, the translation value matrix of the first region in the first translation value matrix can be the following first matrix:

[0034] In this application, the translation value matrix can be represented by a table (as in the first matrix described above), or by a sequence or other forms; this application does not limit this representation. For example, the first matrix described above can also be represented by the following sequence:

[0035] {250, 69, 994, 671, -1, 100, 778, -1, -1, 59, 997, 622, 447, 9, -1, 707, 279, -1, 958, 547, 495, 31;

[0036] 258, -1, 239, 885, 380, 327, -1, 734, 360, 429, -1, 988, 614, -1, 877, 900, 654, 155, -1, 1023, -1, 284;

[0037] 618, 367, 441, -1, 575, 629, 93, 997, 689, 607, 39, -1, -1, 398, 225, 225, -1, 501, 205, 251, 629, -1;

[0038] 889, 601, -1, 84, 788, -1, 406, 131, 1011, -1, 392, 86, 1014, 731, 467, -1, 1008, 588, 500, -1, 912, 524}.

[0039] In conjunction with the third aspect or any of its implementations, in another possible implementation, the translation value matrix of the first region in the first translation value matrix may include some rows, some columns, or some elements of the aforementioned first matrix.

[0040] In conjunction with the third aspect, in another possible implementation, the aforementioned LDPC is a QC-LDPC code. In this embodiment, concentrating most of the translation values ​​in a smaller interval (i.e., the first region corresponds to a portion of the first base matrix) can reduce the types of translation values, thereby reducing hardware complexity.

[0041] In combination with the third aspect or any of its implementations, in another possible implementation, the first value is greater than or equal to 384.

[0042] In conjunction with the third aspect or any of its implementations, in another possible implementation, the first translation value matrix corresponds to the first base matrix; wherein, the first region corresponds to the first a rows or a partial column or a partial row of the first a rows in the first base matrix, where a is a positive integer; or, the first region corresponds to the first b columns or a partial column or a partial row of the first b columns in the first base matrix, where b is a positive integer; or, the first region corresponds to the X1 row or X2 column in the first base matrix, where X1 is the row with the row weight preceding X1 in the first base matrix, and X2 is the column with the column weight preceding X2 in the first base matrix, where X1 and X2 are positive integers.

[0043] Fourthly, embodiments of this application provide an information processing method that can be applied to a decoding side, such as a decoding device, a module within the decoding device (e.g., a circuit, chip, or chip system (such as a modem chip, or a SoC chip or SIP chip containing a modem core)), or a logical node, logical module, or software capable of implementing all or part of the decoding device. The decoding device can be a network device or a terminal. This fourth aspect corresponds to the decoding side of the third aspect. Terms or features identical to those in the third aspect or its implementation in the fourth aspect can be referenced in the third aspect or its implementation. The technical effects of the fourth aspect can also be referenced in the third aspect or its implementation, and will not be repeated here.

[0044] The method includes: obtaining a second bit sequence; performing low-density parity-check (LDPC) decoding on the second bit sequence based on a first shift value matrix and a first expansion factor to obtain a first bit sequence, wherein the first shift value matrix includes the shift value matrix of a first region, the first expansion factor is greater than a first value, and the first value and the first expansion factor belong to the same set of expansion factors.

[0045] In conjunction with the fourth aspect, in one possible implementation, the translation value matrix of the first region in the first translation value matrix can be a first matrix, as shown below:

[0046] In conjunction with the fourth aspect or any of its implementations, in another possible implementation, the translation value matrix of the first region in the first translation value matrix may include some rows, some columns, or some elements of the aforementioned first matrix.

[0047] In conjunction with the fourth aspect, in another possible implementation, the aforementioned LDPC is a QC-LDPC code. In this embodiment, concentrating most of the translation values ​​in a smaller interval (i.e., the first region corresponds to a portion of the first base matrix) can reduce the types of translation values, thereby reducing hardware complexity.

[0048] In conjunction with the fourth aspect or any of its implementations, in another possible implementation, the first value is greater than or equal to 384.

[0049] In conjunction with the fourth aspect or any of its implementations, in another possible implementation, the first translation value matrix corresponds to the first base matrix; wherein, the first region corresponds to the first a rows or a partial column or a partial row of the first a rows in the first base matrix, where a is a positive integer; or, the first region corresponds to the first b columns or a partial column or a partial row of the first b columns in the first base matrix, where b is a positive integer; or, the first region corresponds to the X1 row or X2 column in the first base matrix, where X1 is the row with the row weight preceding X1 in the first base matrix, and X2 is the column with the column weight preceding X2 in the first base matrix, where X1 and X2 are positive integers.

[0050] Fifthly, embodiments of this application provide a communication device that has the function of implementing any of the above aspects or any possible implementation methods. For example, the communication device includes modules, units, or means corresponding to the operations involved in performing any of the above aspects or any possible implementation methods. These modules, units, or means can be implemented by software, hardware, or a combination of software and hardware.

[0051] Sixthly, embodiments of this application provide a communication device including an interface circuit and one or more processors. The one or more processors are coupled to a memory. The memory stores part or all of the necessary computer program or instructions for implementing the functions involved in any of the above aspects or any possible implementations thereof. The one or more processors can execute the computer program or instructions, and when the computer program or instructions are executed, cause the communication device to implement the methods in any of the above aspects or any possible implementations thereof. The interface circuit is used to implement the communication functions within the communication device and / or the communication functions between the communication device and other devices or components.

[0052] In one possible implementation, the processor is used to communicate with other devices or components through the interface circuit.

[0053] In one possible implementation, the communication device may also include the memory.

[0054] The aforementioned communication device may be a terminal, or a communication module in a terminal, or a chip in a terminal that is responsible for communication functions, such as a modem chip or a SoC or SIP chip containing a modem module.

[0055] The aforementioned communication device may also be a network device, a module (e.g., a circuit, chip, or chip system) within a network device, or a logical node, logical module, or software that can implement all or part of a network device.

[0056] In a seventh aspect, embodiments of this application provide a communication system including at least one of the encoding or decoding devices described above.

[0057] Eighthly, embodiments of this application provide a computer-readable storage medium storing computer-readable instructions, which, when read and executed by a computer, cause the computer to perform any of the above aspects or any possible implementation thereof.

[0058] Ninthly, embodiments of this application provide a computer program product that, when read and executed by a computer, causes the computer to perform any of the above aspects or any possible implementation thereof.

[0059] In a tenth aspect, embodiments of this application provide a computer program that, when run on a computer, causes the methods provided in any of the above aspects or any possible implementations thereof to be executed. Attached Figure Description

[0060] Figure 1 is a schematic diagram of a network architecture applicable to embodiments of this application.

[0061] Figure 2 is a schematic diagram of the information transmission process applicable to embodiments of this application.

[0062] Figure 3 is the Tanner plot of the parity-check matrix H.

[0063] Figure 4 shows the fifth generation (5) th A schematic diagram of the matrix structure of the base graph of the LDPC code (generation, 5G).

[0064] Figure 5 is a schematic diagram of 5G LDPC code.

[0065] Figure 6 is a schematic flowchart of the information processing method 600 provided in this application.

[0066] Figure 7 is a schematic diagram of the encoding chain provided in an embodiment of this application.

[0067] Figures 8a to 8d are schematic diagrams illustrating the specific process of generating the translation value matrix of the first region according to the embodiments of this application.

[0068] Figure 9 is a schematic flowchart of the information processing method 900 provided in this application.

[0069] Figures 10a to 10f are some examples of the translation value matrix of the first region in an embodiment of this application.

[0070] Figures 10g and 10h are some examples of translation value matrices in embodiments of this application.

[0071] Figure 11 shows the performance simulation results of LDPC codes corresponding to the three translation value matrices.

[0072] Figure 12 shows the performance comparison results of LDPC codes corresponding to the three translation value matrices.

[0073] Figure 13 is a schematic diagram of a device provided in an embodiment of this application.

[0074] Figure 14 is another structural schematic diagram of the device provided in the embodiment of this application.

[0075] Figure 15 is a schematic diagram of a chip system provided in an embodiment of this application. Detailed Implementation

[0076] To facilitate understanding of the embodiments of this application, the following points will be explained before introducing the embodiments of this application.

[0077] The terms "for indicating" or "instruction" can include both direct and indirect indication, or they can be explicit and / or implicit. The various numerical designations such as "first," "second," etc., are merely for descriptive convenience and are not intended to limit the scope of the embodiments of this application, such as distinguishing different messages or different information. "Predefined" can be implemented by pre-storing corresponding codes, tables, or other methods that can be used to indicate relevant information in the device; this application does not limit the specific implementation method. The "protocol" involved can refer to standard protocols in the field of communication, such as the Long Term Evolution (LTE) protocol, the NR protocol, and related protocols applied to future communication systems; this application does not limit this. Words such as "exemplary," "for example," "exemplarily," and "as (another) example" are used to indicate that something is an example, illustration, or description. Any embodiment or design described as an "example" in this application should not be construed as being better or more advantageous than other embodiments or designs. The terms "comprising," "including," "having," and variations thereof all mean "including but not limited to," unless otherwise specifically emphasized. "At least one" means one or more, and "more than one" means two or more. "At most one" means one or zero. "And / or" describes the relationship between related objects, indicating that three relationships can exist. For example, R and / or U can mean: R alone, R and U simultaneously, or U alone, where R and U can be singular or plural. The character " / " generally indicates that the preceding and following related objects are in an "OR" relationship. "At least one of the following" or similar expressions refer to any combination of these items, including any combination of single or plural items. For example, at least one of a, b, and c can mean: a, or, b, or, c, or, a and b, or, a and c, or, b and c, or, a, b, and c. Here, a, b, and c can be single or multiple. Descriptions relating to network element S sending messages, information, or data to network element T, and network element T receiving messages, information, or data from network element S, aim to specify which network element the message, information, or data is to be sent to, without specifying whether the transmission is direct or indirect via other network elements. Descriptions such as "when," "under the circumstances," "if," and "if" indicate that the device will take corresponding action under certain objective circumstances, not that there is a time limit, nor that the device must perform a judgment action during implementation, nor do they imply any other limitations.

[0078] Furthermore, the network architecture and business scenarios described in the embodiments of this application are for the purpose of more clearly illustrating the technical solutions of the embodiments of this application, and do not constitute a limitation on the technical solutions provided in the embodiments of this application. As those skilled in the art will know, with the evolution of network architecture and the emergence of new business scenarios, the technical solutions provided in the embodiments of this application are also applicable to similar technical problems.

[0079] The following describes a communication system that can be applied to embodiments of this application.

[0080] The embodiments of this application can be applied to various communication systems, including but not limited to: 5G or NR systems, LTE systems, Long Term Evolution-Advanced (LTE-A) systems, LTE Frequency Division Duplex (FDD) systems, LTE Time Division Duplex (TDD) systems, etc. They can also be applied to future communication systems. Furthermore, they can be applied to device-to-device (D2D) communication, vehicle-to-everything (V2X) communication, machine-to-machine (M2M) communication, machine-type communication (MTC), Internet of Things (IoT) communication systems, narrowband Internet of Things (NB-IoT) systems, or other communication systems. In addition, they can be extended to similar wireless communication systems, such as Wireless Fidelity (WiFi), Worldwide Interoperability for Microwave Access (WIMAX), and 3GPP-related communication systems, without limitation.

[0081] The communication system applicable to the embodiments of this application may include one or more transmitting devices and one or more receiving devices. Optionally, one of the transmitting device and the receiving device may be a terminal, and the other may be a network device. Optionally, both the transmitting device and the receiving device may be terminals. Optionally, both the transmitting device and the receiving device may be network devices.

[0082] In this application, the transmitting device can be understood as a data or information transmitting device, or an encoding device. The receiving device can be understood as a data or information receiving device, or a decoding device. The following description uses the terms encoding device and decoding device to describe the scheme of this application.

[0083] For example, Figure 1 shows a schematic diagram of a network architecture that can be applied to embodiments of this application.

[0084] Figure 1 illustrates a possible, non-limiting system diagram. As shown in Figure 1, the communication system 10 includes a radio access network (RAN) 100 and a core network (CN) 200. RAN 100 includes at least one RAN node (110a and 110b in Figure 1, collectively referred to as 110) and at least one terminal (120a-120j in Figure 1, collectively referred to as 120). RAN 100 may also include other RAN nodes, such as wireless relay devices and / or wireless backhaul devices (not shown in Figure 1). Terminal 120 is wirelessly connected to RAN node 110. RAN node 110 is wirelessly or wired connected to core network 200. The core network equipment in core network 200 and RAN node 110 in RAN 100 can be different physical devices, or they can be the same physical device integrating core network logical functions and radio access network logical functions.

[0085] RAN100 can be a 3GPP-related cellular system, such as a 4G, 5G mobile communication system, or a future-oriented evolution system. RAN100 can also be an open access network (O-RAN or ORAN), a cloud radio access network (CRAN), or a wireless fidelity (WiFi) system. RAN100 can also be a communication system that integrates two or more of the above systems.

[0086] RAN node 110, sometimes also referred to as access network equipment, RAN entity, or access node, constitutes part of the communication system and is used to help terminals achieve wireless access. Multiple RAN nodes 110 in communication system 10 can be of the same type or different types. In some scenarios, the roles of RAN node 110 and terminal 120 are relative. For example, network element 120i in Figure 1 can be a helicopter or drone, which can be configured as a mobile base station. For terminals 120j accessing RAN 100 through network element 120i, network element 120i is a base station; but for base station 110a, network element 120i is a terminal. RAN node 110 and terminal 120 are sometimes both referred to as communication devices. For example, network elements 110a and 110b in Figure 1 can be understood as communication devices with base station functions, and network elements 120a-120j can be understood as communication devices with terminal functions.

[0087] In one possible scenario, the RAN node can be a base station, an evolved NodeB (eNodeB), an access point (AP), a transmission reception point (TRP), a next-generation NodeB (gNB), a base station in a future mobile communication system, or an access node in a WiFi system. The RAN node can be a macro base station (as shown in Figure 1, 110a), a micro base station or indoor station (as shown in Figure 1, 110b), a relay node or donor node, or a radio controller in a CRAN scenario. Optionally, the RAN node can also be a server, wearable device, vehicle, or in-vehicle equipment. For example, the access network equipment in vehicle-to-everything (V2X) technology can be a roadside unit (RSU). All or part of the functions of the RAN node in this application can also be implemented through software functions running on hardware, or through virtualization functions instantiated on a platform (e.g., a cloud platform). The RAN node can also be equipped with communication modules, circuits, or chips that perform corresponding communication functions. The RAN node can also be configured with program instructions for performing corresponding communication functions, as well as corresponding program instructions. The RAN node in this application can also be a logical node, logical module, or software capable of implementing all or part of the RAN node's functions.

[0088] In another possible scenario, multiple RAN nodes collaborate to assist the terminal in achieving wireless access, with each RAN node performing a portion of the base station's functions. For example, RAN nodes can be central units (CUs), distributed units (DUs), CU-control plane (CPs), CU-user plane (UPs), or radio units (RUs), etc. CUs and DUs can be separate entities or included in the same network element, such as a baseband unit (BBU). RUs can be included in radio frequency equipment or radio frequency units, such as remote radio units (RRUs), active antenna units (AAUs), or remote radio heads (RRHs).

[0089] In different systems, CU (or CU-CP and CU-UP), DU, or RU may have different names, but those skilled in the art will understand their meaning. For example, in an ORAN system, CU can also be called O-CU (open CU), DU can also be called O-DU, CU-CP can also be called O-CU-CP, CU-UP can also be called O-CU-UP, and RU can also be called O-RU. For ease of description, this application uses CU, CU-CP, CU-UP, DU, and RU as examples. Any of the units among CU (or CU-CP, CU-UP), DU, and RU in this application can be implemented through software modules, hardware modules, or a combination of software and hardware modules.

[0090] In this embodiment of the application, the access network device may also be referred to as a network device.

[0091] A terminal can be a device or module that accesses the aforementioned communication system and has corresponding communication functions. A terminal can also be called a terminal device, user equipment (UE), mobile station, mobile terminal, etc. Terminals can be widely used in various scenarios, such as D2D, V2X, MTC, IoT, virtual reality, augmented reality, industrial control, autonomous driving, telemedicine, smart grids, smart furniture, smart offices, smart wearables, smart transportation, smart cities, etc. Terminals can be mobile phones, tablets, computers with wireless transceiver capabilities, wearable devices, vehicles, drones, helicopters, airplanes, ships, robots, robotic arms, smart home devices, transportation vehicles with wireless communication capabilities, communication modules, etc. This application does not limit the device form of the terminal. Terminals typically contain communication modules, circuits, or chips that perform corresponding communication functions. The terminal can also be configured with program instructions for performing corresponding communication functions.

[0092] Unless otherwise specified, the means for implementing the functions of a terminal or network device in this application can refer to the terminal or network device itself, or it can refer to a means that enables the terminal or network device to implement the function, such as a system-on-a-chip (SoC) or a chip, specifically a SoC or a modem. This means can be installed in the terminal or network device. In the embodiments of this application, the SoC can be composed of chips, or it can include chips and other discrete devices.

[0093] It should also be noted that some embodiments in this article use a 5G system as an example to introduce specific solution details. It is understood that when this solution is used in other communication systems, such as LTE systems, or future communication systems, the messages, channels, or information in the solution can be replaced with messages, channels, or information in other communication systems that can achieve the corresponding functions, and this application does not limit this.

[0094] Figure 2 is a schematic diagram of the information transmission process applicable to embodiments of this application. As shown in Figure 2, information is sent from the source, undergoes source coding, channel coding, modulation, air interface transmission, demodulation, channel decoding, and source recovery, and finally reaches the destination, completing the transmission of information from the source to the destination. The processing shown in the upper layer of Figure 2 (including source coding, channel coding, and modulation) is performed on the coding side, while the processing shown in the lower layer (including demodulation, channel decoding, and source recovery) is performed on the decoding side.

[0095] The embodiments of this application can be implemented in hardware, such as through a dedicated chip or a programmable chip, or by a processor executing software instructions, and mainly involve channel coding and channel decoding as shown in Figure 2. It should be noted that the embodiments of this application can be used for the channel decoding part. The decoding method of the embodiments of this application is a general decoding means, effective for any coding scheme; therefore, the embodiments of this application do not limit the channel coding scheme.

[0096] Furthermore, the embodiments of this application can be applied to one or more specific application scenarios, or they can be general methods applicable to various application scenarios. Application scenarios may include peak rate scenarios, high throughput scenarios, high reliability scenarios, low latency scenarios, high reliability low latency scenarios, or low power consumption scenarios, etc. High-throughput scenarios include enhanced mobile broadband (eMBB), eMBB+, extended-reality (XR), cloud gaming (CG), and augmented reality (AR). High-reliability and low-latency scenarios include ultra-reliable low-latency communication (URLLC) and hyper-reliable low-latency communication (HRLLC). Low-power scenarios include M2M, MTC, massive MTC (mMTC), IoT, narrowband Internet of Things (NB-IoT), advanced Internet of Things (A-IoT), and low-power wide-area (LPWA).

[0097] To facilitate understanding of the embodiments of this application, several concepts or terms involved in the embodiments of this application are briefly explained. The concepts or terms described below are based on the concepts or terms specified in the agreement, but do not mean that the embodiments of this application can only be applied to existing systems. The concepts or terms involved in the embodiments of this application can be applied to future systems. Furthermore, the specific names of the concepts or terms (e.g., concepts or terms involving functional descriptions) can be adjusted as the system develops in the future.

[0098] 1. LDPC code

[0099] LDPC codes are linear block codes with sparse parity-check matrices. The proportion of non-zero elements in the parity-check matrix of an LDPC code is extremely small; in other words, the row and column weights of the parity-check matrix are very small compared to the code length of the LDPC. For an LDPC code with K information bits and a code length of N, the dimension of its parity-check matrix H is (NK) × N, and the corresponding codeword c can be defined by the parity-check matrix H as follows:

[0100] c = {c|HcT = 0, c ∈ {0, 1}N}

[0101] In the parity-check matrix H, each row corresponds to a parity-check equation of the LDPC code, and the NK parity-check equations correspond to the NK parity-check nodes of the LDPC code; each column corresponds to a symbol of the LDPC code, and the N symbols correspond to the N variable nodes of the LDPC code. The non-zero elements h in the parity-check matrix H... i,j This indicates that the i-th check node and the j-th variable node are connected. In the check matrix, the number of non-zero elements in each row represents the degree of the check node, and the number of non-zero elements in each column represents the degree of the variable node. If all check nodes have the same degree, all variable nodes also have the same degree; the corresponding LDPC code is a regular code. Otherwise, it is an irregular code. For example, the check matrix H of a regular LDPC code with a code length of 10 and a code rate of 1 / 2 can be as follows:

[0102] Where v0, v1, ..., v9 represent variable nodes, and c0, c1, ..., c4 represent check nodes.

[0103] LDPC codes can be represented using graphical models, such as Tanner graphs, factor graphs, and tree graphs, with Tanner graphs offering the most concise and intuitive representation. The Tanner graph of the parity-check matrix H is shown in Figure 3. The degree in Figure 3 corresponds to the definition of degree in the parity-check matrix H, where the degree of a node is defined as the number of edges connected to it. In a Tanner graph, a cycle is defined as a structure that starts from a vertex, follows non-repeating edges, passes through non-repeating vertices, and eventually returns to the starting point. Since a Tanner graph is bipartite, the length of its cycles can only be an even number greater than 2, such as 4, 6, or 8. Short cycles are detrimental to LDPC codes, primarily in two ways: short cycles form trap sets, significantly impacting the code distance; and short cycles introduce correlations into the confidence propagation decoding algorithm, leading to inaccurate mutual information estimation. Therefore, short cycles should be avoided as much as possible in the design of LDPC codes.

[0104] 2. Quasi-cyclic low-density parity check (QC-LDPC) code

[0105] QC-LDPC codes are a type of structured LDPC codes. Due to the unique structure of their parity-check matrix, encoding can be achieved using a simple feedback shift register, reducing the encoding complexity of LDPC codes.

[0106] QC-LDPC codes are represented using BG (Browser Group). Elements in BG are either 0 or 1, and a 1 in BG can be extended to Z. C ×Z C The cyclic displacement matrix BG, where 0 can be extended to Z C ×Z C The zero matrix is ​​expanded to obtain the parity matrix. Where Z... C Z is the lifting size. C It can also be referred to as boost size, boost value, boost factor, expansion value, expansion coefficient, or boost dimension, etc. Z C It can also be denoted as Z. The BG model of the QC-LDPC code is BG = (X, Y, F), where X corresponds to the variables, Y corresponds to the check equation, and F represents the edge relationships. After expansion factor Z... C After QC expansion, we obtain the Tanner graph, which is a bipartite graph G = (V, C, E), where V are variable nodes, C are check nodes, and E are the edges between variable nodes and check nodes, corresponding to the number of columns in the check matrix N = |V| = Z. c |X|, the number of rows in the parity check matrix M = |C| = Z c The number of non-zero elements in the parity check matrix is ​​|E| = Z. c |F|.

[0107] BG can also be expressed in matrix form, denoted as H. BG Based on the basis matrix H BG And the expansion factor Zc, which can transform the basis matrix H BG It is expanded into a complete parity-check matrix for encoding or decoding. The lifting process involves... BG The element in the middle is promoted to a Z. C ×Z C A square matrix, where 0 is promoted to Z. C ×Z C A 0 matrix, promote the 1s to an identity matrix by cyclic shifting P (to the right). i,j The matrix, where P i,j This represents the shifting value (SV) corresponding to the i-th row and j-th column. Let Z be the shifting value. C The results of a cyclic shift of 4, -1, 0, 1, 2, 3 are shown below:

[0108] 3. Base map of 5G LDPC code

[0109] The base diagram of the 5GLDPC code includes BG1 and BG2, which share a common matrix structure.

[0110] Figure 4 is a schematic diagram of the matrix structure of the 5G LDPC code base map. The 5G LDPC code base map can be divided into five regions: A, B, C, D, and E. Region A is the high-rate region, corresponding to the high-rate information columns. Region B is the core check region, corresponding to the high-rate. Region C is an all-zero region, a zero matrix. Region D is the incremental redundancy region, corresponding to the low-rate. Region E is a diagonal region (e.g., a raptor-like region), possessing an identity matrix structure.

[0111] The elements of the base graph take values ​​of 0 or 1, where a value of 0 represents an empty element or a zero element, and a value of 1 represents an edge present at that position in the base graph or an association between the corresponding check node and the variable node.

[0112] In 5G LDPC codes, the protocol specifies storing the largest possible base map. In practical applications, different matrix regions are selected based on the code rate. Specifically, rows 1 to M0 and columns 1 to N0 are selected. As the code rate decreases, M0 and N0 gradually increase, and the area of ​​the matrix used also gradually expands. For example, the dashed boxes in Figure 5 that contain high code rate regions correspond to different code rates.

[0113] The base map of 5G LDPC code has a nested characteristic, meaning that low code rate regions contain high code rate regions.

[0114] The 5G LDPC code stores the following information regarding the translation values: 1. A list of expansion factors; 2. A list of translation values ​​that corresponds one-to-one with each row of the expansion factor list. Table 1 shows an example of the expansion factor list.

[0115] Table 1

[0116] The main characteristic of an expanded factor list is that the j-th row of the list... Where a j ∈{2,3,5,7,9,11,13,15}, max(k j )∈{7,7,6,5,5,5,4,4}.

[0117] Table 2 is a list of edge connections and translation values ​​for a certain part of BG1 (referred to as the translation value list), where the first two columns correspond to the basis matrix of that part, and the last eight columns correspond to the translation values ​​of that part.

[0118] Table 2

[0119] The row indices of the expanded factor list correspond one-to-one with the column indices of the shift values. That is, each row of the expanded factor list corresponds to a set of shift values ​​for each expanded factor. Multiple expanded factors share the same set of shift values. For example, in Table 2, the set index i... LS The spread factor {2, 4, 8, 16, 32, 64, 128, 256} with a value of 0 corresponds to the shift value {250, 69, 226, 159, 100, 10, 59, 229, 110, 191, 9, 195, 23, 190, 35, 239, 31, 1, 0}. In code rate matching, 5G LDPC first determines the spread factor and then selects the corresponding shift value to construct the parity check matrix.

[0120] It should be noted that, in the embodiments of this application, the base matrix can refer to a matrix with elements of 0 or 1, wherein elements represented as 0 can be replaced by a Z*Z all-zero matrix, and elements represented as 1 can be replaced by a Z*Z cyclic permutation matrix, as shown in the first two columns of Table 2.

[0121] It should also be noted that the embodiments of this application are described based on code length, information length, and code rate, and these terms are explained here. Information length refers to the number of information bits to be transmitted. These information bits may or may not include cyclic redundancy check (CRC) bits, and are not limited thereto. Code length refers to the length of the (to be) transmitted bits, which can be the number of transmitted bits corresponding to the modulated symbol. Code rate refers to the ratio of the number of information bits to the number of transmitted bits. Code length, information length, and code rate can be pre-configured by higher-layer signaling, medium access control (MAC) layer, or downlink physical layer signals, and can also be directly obtained and calculated by the transceiver. More specifically, code length can be determined by the frame structure, number of layers, and modulation scheme of the encoded and transmitted information bits; code rate can be indicated in the above ways or given in the modulation and coding scheme (MCS) table.

[0122] The relevant terms used in the embodiments of this application have been described above, and will not be explained further below.

[0123] Current LDPC code performance is poor and cannot meet higher encoding requirements. To address this issue, this application provides an information processing method and apparatus to improve the performance of LDPC codes.

[0124] The method embodiments of this application are described below with reference to the accompanying drawings.

[0125] Figure 6 is a schematic flowchart of the information processing method 600 provided in this application.

[0126] It is understood that this application uses encoding and decoding devices as examples to illustrate the execution of the interaction, but this application does not limit the execution entities of the interaction. For example, the method executed by the encoding device in this application can also be implemented by modules in the encoding device, or by logic nodes, logic modules, or software that can implement all or part of the functions of the encoding device; similarly, the method executed by the decoding device in this application can also be implemented by modules in the decoding device, or by logic nodes, logic modules, or software that can implement all or part of the functions of the decoding device. Modules in the encoding device and / or decoding device can be, for example, circuits, chips, or chip systems (such as modem chips, or SoC chips or SIP chips containing modem cores, etc.). The encoding device can be a terminal device or a network device, and the decoding device can be a network device or a terminal device.

[0127] Method 600 may include at least a portion of the following.

[0128] Step 601: The encoding device acquires the first bit sequence.

[0129] In other words, if the encoding device needs to communicate with the decoding device, that is, if the encoding device needs to send a signal to the decoding device, the encoding device needs to first obtain the first bit sequence corresponding to the signal to be sent to the decoding device.

[0130] The phrase "the encoding device acquires the first bit sequence" can refer to: the encoding device performing source encoding on the source symbols to generate the first bit sequence. Alternatively, it can refer to: the encoding device receiving the first bit sequence from other communication devices.

[0131] Step 602: The encoding device performs LDPC encoding on the first bit sequence based on the first shift value matrix and the first expansion factor to obtain the second bit sequence. The first shift value of the first region in the first shift value matrix is ​​obtained based on the second shift value in the second shift value matrix. The first expansion factor is greater than the first value, and the first value and the first expansion factor belong to the same set of expansion factors.

[0132] In one implementation, the encoding device may select a first base matrix and a first spreading factor based on at least one of the target code length, target code rate, or application scenario. Then, based on the first base matrix and the first spreading factor, a first shift value matrix is ​​determined. Next, based on the first spreading factor and the first shift value matrix, the first base matrix is ​​expanded into a parity-check matrix. Finally, the expanded parity-check matrix is ​​used to perform LDPC encoding on the first bit sequence to obtain the second bit sequence. In this application, the first base matrix can be BG1, BG2, or other base maps; this application does not limit its scope.

[0133] For example, the first value is greater than or equal to 384.

[0134] In one implementation, the first translation value can be any translation value in the first translation value matrix, and the second translation value can be any translation value in the second translation value matrix.

[0135] Optionally, the first translation value is greater than or equal to the second translation value.

[0136] Optionally, the first translation value is obtained based on the second translation value and the first expansion factor.

[0137] For example, the second shift value is p, the first shift value is p+k*Z, the set of expansion factors to which the first expansion factor belongs includes the second expansion factor Z, k is a non-negative number, and p and Z are positive integers. For example, k can be a non-negative integer; or, k is g / 4, that is, the first shift value is p+g / 4*Z, and g is a non-negative integer.

[0138] For example, the set of expansion factors to which the first expansion factor belongs includes all or part of a set of expansion factors in Table 1 (i.e., a row in Table 1, referred to as the original set of expansion factors), and Z can be the maximum value in the original set of expansion factors. For instance, if the set of expansion factors to which the first expansion factor belongs includes all the sets of expansion factors with set index 0 in Table 1, then Z can be 256. Or, for another example, if the set of expansion factors to which the first expansion factor belongs includes all the sets of expansion factors with set index 1 in Table 1, then Z can be 384.

[0139] For example, the first translation value matrix corresponds to the first base matrix; wherein, the first region corresponds to the first a rows or a partial column or a partial row of the first a rows in the first base matrix, where a is a positive integer; or, the first region corresponds to the first b columns or a partial column or a partial row of the first b columns in the first base matrix, where b is a positive integer; or, the first region corresponds to the X1 row or X2 column in the first base matrix, where X1 is the row with the first X1 row weight in the first base matrix, and X2 is the column with the first X2 column weight in the first base matrix, where X1 and X2 are positive integers.

[0140] Optionally, the first translation value and the second translation value both correspond to the same element in the first basis matrix.

[0141] For example, the table to which the first expansion factor belongs is shown in Table 6a below. The set index of the expansion factor set to which the first expansion factor belongs is the first index. The largest expansion factor in the first index of the 5G protocol expansion factor list (i.e., Table 1 above) is the second expansion factor.

[0142] In one possible implementation, the encoding device can store a second translation value matrix and generate the aforementioned first translation value matrix based on the second translation value matrix. For example, if the encoding device stores the second translation value matrix and a first correspondence, then the encoding device can obtain the second expansion factor Z from the set of expansion factors to which the first expansion factor belongs, based on the first expansion factor. Furthermore, the encoding device can first determine the second translation value matrix based on the first base matrix and the second expansion factor, and then determine the first translation value matrix based on the second translation value matrix and the first correspondence. For example, the second translation value matrix can be a translation value matrix of the 5G protocol, as shown in Table 3a.

[0143] The first correspondence can be between the first translation value and the second translation value, such as the first correspondence being p + k*Z where the second translation value is p; or, the first correspondence can be between the first translation value matrix and the second translation value matrix, such as the first correspondence being BG_S, where the second translation value matrix includes the translation value matrix BG_S of the first region, and the translation value matrix corresponding to the first region is BG_S + Z*F. The first translation value matrix can be obtained by modifying the first region in the second translation value matrix. That is to say, the first translation value matrix and the second translation value matrix have the same number of rows and columns, and the parts of the first translation value matrix and the second translation value matrix are the same except for the first region. At least one element in F is a positive integer. The generation of the translation value matrix of the first region based on BG_S + Z*F can be found below, and will not be elaborated here.

[0144] It should be noted that the aforementioned first correspondence can be presented in text, tables, formulas, or other ways, and this application does not limit this. For example, the first correspondence can also be p1 = p2 + σ0 * 2. 0 *Z+σ1*2 1 *Z+…+σ n-1 *2 n-1 *Z, where p1 is the first translation value, p2 is the second translation value, and σ i ={0,1}, i = 1,2,…,n-1, where n is a positive integer. For an explanation of Z, please refer to the above text.

[0145] For example, some or all of the translation values ​​in the second translation value matrix may be taken from the NR translation value list.

[0146] For example, the second translation value matrix can be shown in Table 3a, and the first translation value matrix can be shown in Table 3b. It should be noted that Tables 3a and 3b are arranged horizontally because the table content is large. Table 3a can be seen in Figure 10g, and Table 3b can be seen in Figure 10h.

[0147] Table 3a

[0148] Table 3b

[0149] This application does not limit the representation of the first translation value matrix and the second translation value matrix. For example, the second translation value matrix can be represented by a list as shown in Table 3a, or by a matrix, or by the following sequence:

[0150] {250, 69, 226, 159, -1, 100, 10, -1, -1, 59, 229, 110, 191, 9, -1, 195, 23, -1, 190, 35, 239, 31, 1, 0, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1;

[0151] 2, -1, 239, 117, 124, 71, -1, 222, 104, 173, -1, 220, 102, -1, 109, 132, 142, 155, -1, 255, -1, 28, 0, 0, 0, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1;

[0152] 106，111，185，-1，63，117，93，229，177，95，39，-1，-1，142，225，225，-1，245，205，251，117，-1，-1，-1，0，0，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1；

[0153] 121，89，-1，84，20，-1，150，131，243，-1，136，86，246，219，211，-1，240，76，244，-1，144，12，1，-1，-1，0，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1；

[0154] 157，102，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，0，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1；

[0155] 205，236，-1，194，-1，-1，-1，-1，-1，-1，-1，-1，231，-1，-1，-1，28，-1，-1，-1，-1，123，115，-1，-1，-1，-1，0，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1；

[0156] 183，-1，-1，-1，-1，-1，22，-1，-1，-1，28，67，-1，244，-1，-1，-1，11，157，-1，211，-1，-1，-1，-1，-1，-1，-1，0，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1；

[0157] 220，44，-1，-1，159，-1，-1，31，167，-1，-1，-1，-1，-1，104，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，0，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1；

[0158] 112，4，-1，7，-1，-1，-1，-1，-1，-1，-1，-1，211，-1，-1，-1，102，-1，-1，164，-1，109，241，-1，90，-1，-1，-1，-1，-1，0，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1；

[0159] 103，182，-1，-1，-1，-1，-1，-1，-1，-1，109，21，-1，142，-1，-1，-1，14，61，-1，216，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，0，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1；

[0160] -1，98，149，-1，167，-1，-1，160，49，-1，-1，-1，-1，-1，58，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，0，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1；

[0161] 77，41，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，83，-1，-1，-1，182，-1，-1，-1，-1，78，252，22，-1，-1，-1，-1，-1，-1，-1，-1，-1，0，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1；

[0162] 160，42，-1，-1，-1，-1，-1，-1，-1，-1，21，32，-1，234，-1，-1，-1，-1，7，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，0，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1；

[0163] 177，-1，-1，248，-1，-1，-1，151，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，185，-1，-1，62，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，0，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1；

[0164] 206，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，55，-1，-1，206，127，16，-1，-1，-1，229，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，0，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1；

[0165] 40，96，-1，-1，-1，-1，-1，-1，-1，-1，65，-1，-1，63，-1，-1，-1，-1，75，-1，-1，-1，-1，-1，-1，179，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，0，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1；

[0166] -1，64，-1，49，-1，-1，-1，-1，-1，-1，-1，49，-1，-1，-1，-1，-1，-1，-1，-1，51，-1，154，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，0，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1；

[0167] 7，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，164，-1，59，1，-1，-1，-1，144，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，0，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1；

[0168] -1，42，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，233，8，-1，-1，-1，-1，155，147，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，0，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1；

[0169] 60，73，-1，-1，-1，-1，-1，72，127，-1，224，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，0，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1；

[0170] 151，-1，-1，186，-1，-1，-1，-1，-1，217，-1，47，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，160，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，0，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1；

[0171] -1，249，-1，-1，-1，121，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，109，-1，-1，-1，131，171，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，0，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1；

[0172] 64，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，142，188，-1，-1，-1，158，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，0，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1；

[0173] -1，156，147，-1，-1，-1，-1，-1，-1，-1，170，-1，-1，-1，-1，-1，-1，-1，152，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，0，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1；

[0174] 112，-1，-1，86，236，-1，-1，-1，-1，-1，-1，116，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，222，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，0，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1；

[0175] -1，23，-1，-1，-1，-1，136，116，-1，-1，-1，-1，-1，-1，182，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，0，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1；

[0176] 195，-1，243，-1，215，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，61，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，0，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1；

[0177] -1，25，-1，-1，-1，-1，104，-1，194，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，0，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1；

[0178] 128，-1，-1，-1，165，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，181，-1，63，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，0，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1；

[0179] -1，86，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，236，-1，-1，-1，84，-1，-1，-1，-1，-1，-1，6，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，0，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1；

[0180] 216，-1，-1，-1，-1，-1，-1，-1，-1，-1，73，-1，-1，120，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，9，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，0，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1；

[0181] -1，95，-1，-1，-1，-1，-1，177，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，172，-1，-1，61，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，0，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1；

[0182] 221，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，112，-1，199，-1，-1，-1，-1，-1，-1，-1，-1，-1，121，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，0，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1；

[0183] -1，2，187，-1，-1，-1，-1，-1，-1，-1，-1，41，-1，-1，-1，-1，-1，-1，-1，-1，-1，211，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，0，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1；

[0184] 127，-1，-1，-1，-1，-1，-1，167，-1，-1，-1，-1，-1，-1，-1，164，-1，159，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，0，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1；

[0185] -1，161，-1，-1，-1，-1，197，-1，-1，-1，-1，-1，207，-1，-1，-1，-1，-1，-1，-1，-1，-1，103，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，0，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1；

[0186] 37，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，105，51，-1，-1，120，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，0，-1，-1，-1，-1，-1，-1，-1，-1，-1；

[0187] -1，198，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，220，-1，-1，-1，-1，-1，-1，-1，-1，-1，122，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，0，-1，-1，-1，-1，-1，-1，-1，-1；

[0188] 167，-1，-1，-1，-1，-1，-1，-1，-1，151，157，-1，163，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，0，-1，-1，-1，-1，-1，-1，-1；

[0189] -1，173，-1，139，-1，-1，-1，149，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，0，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，0，-1，-1，-1，-1，-1，-1；

[0190] 157，-1，-1，-1，-1，-1，-1，-1，137，-1，-1，-1，-1，-1，-1，-1，-1，149，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，0，-1，-1，-1，-1，-1；

[0191] -1，167，-1，173，-1，-1，-1，-1，-1，139，-1，-1，-1，-1，-1，-1，-1，-1，151，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，0，-1，-1，-1，-1；

[0192] 149, -1, -1, -1, 157, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, 137, -1 ...

[0193] -1,151,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-163,-1,173,-1 ...

[0194] 139, -1, -1, -1, -1, -1, -1, 157, -1, 163, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, 173, -1 ...

[0195] -1,149,-1,-1,-1,-1,151,-1,-1,-1,167,-1 ...

[0196] For example, the first translation value matrix can be represented by a list as shown in Table 3b, or by a matrix, or by the following sequence:

[0197] {250，69，994，671，-1，100，778，-1，-1，59，997，622，447，9，-1，707，279，-1，958，547，495，31，1，0，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1；

[0198] 258，-1，239，885，380，327，-1，734，360，429，-1，988，614，-1，877，900，654，155，-1，1023，-1，284，0，0，0，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1；

[0199] 618，367，441，-1，575，629，93，997，689，607，39，-1，-1，398，225，225，-1，501，205，251，629，-1，-1，-1，0，0，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1；

[0200] 889，601，-1，84，788，-1，406，131，1011，-1，392，86，1014，731，467，-1，1008，588，500，-1，912，524，1，-1，-1，0，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1；

[0201] 157，102，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，0，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1；

[0202] 205，236，-1，194，-1，-1，-1，-1，-1，-1，-1，-1，231，-1，-1，-1，28，-1，-1，-1，-1，123，115，-1，-1，-1，-1，0，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1；

[0203] 183，-1，-1，-1，-1，-1，22，-1，-1，-1，28，67，-1，244，-1，-1，-1，11，157，-1，211，-1，-1，-1，-1，-1，-1，-1，0，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1；

[0204] 220，44，-1，-1，159，-1，-1，31，167，-1，-1，-1，-1，-1，104，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，0，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1；

[0205] 112，4，-1，7，-1，-1，-1，-1，-1，-1，-1，-1，211，-1，-1，-1，102，-1，-1，164，-1，109，241，-1，90，-1，-1，-1，-1，-1，0，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1；

[0206] 103，182，-1，-1，-1，-1，-1，-1，-1，-1，109，21，-1，142，-1，-1，-1，14，61，-1，216，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，0，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1；

[0207] -1，98，149，-1，167，-1，-1，160，49，-1，-1，-1，-1，-1，58，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，0，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1；

[0208] 77，41，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，83，-1，-1，-1，182，-1，-1，-1，-1，78，252，22，-1，-1，-1，-1，-1，-1，-1，-1，-1，0，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1；

[0209] 160，42，-1，-1，-1，-1，-1，-1，-1，-1，21，32，-1，234，-1，-1，-1，-1，7，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，0，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1；

[0210] 177，-1，-1，248，-1，-1，-1，151，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，185，-1，-1，62，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，0，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1；

[0211] 206，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，55，-1，-1，206，127，16，-1，-1，-1，229，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，0，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1；

[0212] 40，96，-1，-1，-1，-1，-1，-1，-1，-1，65，-1，-1，63，-1，-1，-1，-1，75，-1，-1，-1，-1，-1，-1，179，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，0，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1；

[0213] -1，64，-1，49，-1，-1，-1，-1，-1，-1，-1，49，-1，-1，-1，-1，-1，-1，-1，-1，51，-1，154，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，0，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1；

[0214] 7，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，164，-1，59，1，-1，-1，-1，144，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，0，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1；

[0215] -1，42，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，233，8，-1，-1，-1，-1，155，147，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，0，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1；

[0216] 60，73，-1，-1，-1，-1，-1，72，127，-1，224，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，0，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1；

[0217] 151，-1，-1，186，-1，-1，-1，-1，-1，217，-1，47，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，160，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，0，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1；

[0218] -1，249，-1，-1，-1，121，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，109，-1，-1，-1，131，171，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，0，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1；

[0219] 64，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，142，188，-1，-1，-1，158，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，0，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1；

[0220] -1，156，147，-1，-1，-1，-1，-1，-1，-1，170，-1，-1，-1，-1，-1，-1，-1，152，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，0，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1；

[0221] 112，-1，-1，86，236，-1，-1，-1，-1，-1，-1，116，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，222，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，0，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1；

[0222] -1，23，-1，-1，-1，-1，136，116，-1，-1，-1，-1，-1，-1，182，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，0，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1；

[0223] 195，-1，243，-1，215，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，61，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，0，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1；

[0224] -1，25，-1，-1，-1，-1，104，-1，194，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，0，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1；

[0225] 128，-1，-1，-1，165，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，181，-1，63，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，0，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1；

[0226] -1，86，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，236，-1，-1，-1，84，-1，-1，-1，-1，-1，-1，6，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，0，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1；

[0227] 216，-1，-1，-1，-1，-1，-1，-1，-1，-1，73，-1，-1，120，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，9，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，0，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1；

[0228] -1，95，-1，-1，-1，-1，-1，177，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，172，-1，-1，61，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，0，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1；

[0229] 221，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，112，-1，199，-1，-1，-1，-1，-1，-1，-1，-1，-1，121，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，0，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1；

[0230] -1，2，187，-1，-1，-1，-1，-1，-1，-1，-1，41，-1，-1，-1，-1，-1，-1，-1，-1，-1，211，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，0，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1；

[0231] 127，-1，-1，-1，-1，-1，-1，167，-1，-1，-1，-1，-1，-1，-1，164，-1，159，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，0，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1；

[0232] -1，161，-1，-1，-1，-1，197，-1，-1，-1，-1，-1，207，-1，-1，-1，-1，-1，-1，-1，-1，-1，103，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，0，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1；

[0233] 37，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，105，51，-1，-1，120，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，0，-1，-1，-1，-1，-1，-1，-1，-1，-1；

[0234] -1，198，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，220，-1，-1，-1，-1，-1，-1，-1，-1，-1，122，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，0，-1，-1，-1，-1，-1，-1，-1，-1；

[0235] 167，-1，-1，-1，-1，-1，-1，-1，-1，151，157，-1，163，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，0，-1，-1，-1，-1，-1，-1，-1；

[0236] -1，173，-1，139，-1，-1，-1，149，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，0，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，0，-1，-1，-1，-1，-1，-1；

[0237] 157，-1，-1，-1，-1，-1，-1，-1，137，-1，-1，-1，-1，-1，-1，-1，-1，149，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，0，-1，-1，-1，-1，-1；

[0238] -1，167，-1，173，-1，-1，-1，-1，-1，139，-1，-1，-1，-1，-1，-1，-1，-1，151，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，0，-1，-1，-1，-1；

[0239] 149，-1，-1，-1，157，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，137，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，0，-1，-1，-1；

[0240] -1，151，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，163，-1，173，-1，-1，-1，-1，-1，-1，139，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，-1，0，-1，-1；

[0241] 139, -1, -1, -1, -1, -1, -1, 157, -1, 163, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, 173, -1 ...

[0242] -1,149,-1,-1,-1,-1,151,-1,-1,-1,167,-1 ...

[0243] For example, the table to which the first expansion factor belongs is shown in Table 6a below. The set index of the expansion factor set to which the first expansion factor belongs is the first index. Then, the second expansion factor can be the expansion factor with the largest value in the index set corresponding to the first index in the expansion factor list of the 5G protocol (i.e., Table 1 above). For example, if the first index is 0, then the second expansion factor is 256. The second translation value matrix can be the translation value matrix corresponding to the first index in the 5G protocol. For example, the second translation value matrix can be obtained based on the first index and the translation value list of the 5G protocol.

[0244] For example, Figure 7 is a schematic diagram of an encoding chain provided in an embodiment of this application. The encoding chain in Figure 7 includes: given a target code length, a target code rate, and an application scenario; selecting a first base matrix and a first expansion factor based on the target code length, target code rate, and application scenario; determining the translation value matrix corresponding to the first base matrix based on the first base matrix and the first expansion factor; and completing the encoding based on the first base matrix, the first expansion factor, and the translation value matrix. Optionally, one implementation of the encoding device selecting the first base matrix based on information such as the target code length, target code rate, and application scenario is as follows: the encoding device selects part or all of the matrix regions from the largest stored base matrix based on at least one of the target code length, target code rate, and application scenario.

[0245] In step 603, the encoding device sends a symbol sequence to the decoding device based on the second bit sequence. Accordingly, the decoding device receives the symbol sequence from the encoding device.

[0246] The symbol sequence can be a rate-matched sequence or a modulated sequence. For example, the encoding device performs rate matching on the second bit sequence, then modulates the rate-matched sequence to obtain the symbol sequence, and then maps the modulated symbol sequence onto physical resources for transmission.

[0247] Understandably, since channel noise signals may be introduced during the transmission of the symbol sequence, the symbol sequence sent by the encoding device and the symbol sequence received by the decoding device may be different.

[0248] Step 604: The decoding device decodes the second bit sequence based on the first shift value matrix and the first expansion factor to obtain the first bit sequence.

[0249] For example, the second bit sequence can be a symbol sequence.

[0250] Another example is that the second bit sequence can also be information obtained based on the symbol sequence; in other words, the decoding device can process the received symbol sequence to obtain the second bit sequence. For example, the second bit sequence can be information obtained after demodulating the symbol sequence. Yet another example is that the second bit sequence can be information obtained after demodulation and distribution matching processing.

[0251] In some implementations, the decoding device can select a first basis matrix and a first expansion factor based on at least one of the target code length, target code rate, or application scenario. Then, based on the first basis matrix and the first expansion factor, it determines the shift values ​​corresponding to the non-zero elements of the first basis matrix. Next, based on the first expansion factor and the shift values ​​corresponding to the non-zero elements of the first basis matrix, it expands the first basis matrix into a parity check matrix. Finally, it uses the expanded parity check matrix to decode the second bit sequence to obtain the first bit sequence. One implementation where the decoding device selects the first basis matrix based on information such as the target code length, target code rate, and application scenario involves the decoding device selecting a portion or all of the matrix region from the largest stored basis matrix, based on at least one of the target code length, target code rate, and application scenario.

[0252] The following section uses BG1 as an example to introduce the specific process of generating the translation value matrix of the first region based on BG_S+Z*F.

[0253] In this embodiment, the first device is described as the execution subject. The first device can be the encoding device and / or decoding device in the above-described method 600; or, the first device can also be a computing device, which, after determining the translation value matrix of the first region, sends the translation value matrix (or the first translation value matrix) of the first region to the encoding device and / or decoding device in the above-described method 600.

[0254] For example, the first translation value matrix corresponds to BG1. The first translation value matrix includes the translation value matrix of the first region and the elements of the non-first region. The values ​​of the elements of the non-first region are derived from the NR translation value. The first region corresponds to region A of BG1 (as shown in Table 4a). Figure 8a is a schematic diagram of Table 4a. The translation value matrix of the first region is obtained through the following steps S1 to S2:

[0255] S1: The first device determines matrix F based on region A of BG1.

[0256] In this matrix, matrix F has the same size as region A, meaning they have the same number of rows and columns, so F is a 4x22 matrix. Region A has 0s, so matrix F can be empty. The non-empty elements in matrix F can be any of 0, 1, 2, or 3. The arrangement rule is as follows: from left to right, each column of matrix F is arranged from top to bottom as 0, 1, 2, 3, 0, 1, 2, 3, and so on, until the last non-empty element. Matrix F can be represented as shown in Table 4b, and a schematic diagram of Table 4b can be found in Figure 8b.

[0257] In this application, -1 in the translation value matrix (as shown in Table 4c or Table 4d) means that the value at the position of its corresponding basis matrix is ​​0, that is, the block corresponding to -1 after lifting is a 0 matrix of Zc x Zc.

[0258] Optionally, the position of the translation value matrix -1 may not have a translation value. For example, the protocol may skip the position instead of showing -1 and not store the translation value at that position.

[0259] For example, the first device can generate a 4x22 matrix with all elements empty based on region A; then, following the order of columns from left to right and each column from top to bottom, the matrix is ​​filled with 0, 1, 2, 3, 0, 1, 2, 3, ... in a cyclical manner, skipping the position where region A is 0, resulting in the matrix shown in Table 4b. In this application, the first device can be the encoding device and / or decoding device described in method 600; or, the first device can be used to calculate the translation value matrix of the first region and send the information of the translation value matrix of the first region to the encoding device and / or decoding device in method 600 or method 900 described below.

[0260] Table 4a: Region A of BG1

[0261] Table 4b: Matrix F

[0262] S2: The first device determines the translation value matrix of the first region based on matrix F, the second expansion factor Z, and the translation value matrix BG_S.

[0263] For example, for a certain set of expansion factors, Z is the maximum value of the set of expansion factors stored in the 5G protocol, BG_S is the translation value matrix of region A stored in the 5G protocol, and the translation value matrix of the first region is BG_S+Z*F.

[0264] Taking the 0th group of expansion factors as an example, the maximum value of this group of expansion factors stored in the 5G protocol is 256. The translation value matrix of region A stored in the 5G protocol is BG_S as shown in Table 4c. Then, the modified translation value matrix of region A (i.e., the translation value matrix of the first region) is BG_S+256*F. The translation value matrix of the first region can be shown in Table 4d. To clearly illustrate the matrices in Tables 4c and 4d, this application also provides Figures 8c and 8d. Figure 8c is a schematic diagram of Table 4c, and Figure 8d is a schematic diagram of Table 4d.

[0265] Table 4c: Translation Value Matrix BG_S

[0266] Table 4d: Translation value matrix of the first region

[0267] For example, the element in the first row and first column of the translation value matrix of the first region is 250 + 0 = 250; the element in the first row and second column of the translation value matrix of the first region is 2 + 256 * 1 = 258.

[0268] In some embodiments of this application, matrix F may also be preset, in which case the first device may not need to perform the above step S1.

[0269] Figure 9 is a schematic flowchart of the information processing method 900 provided in this application.

[0270] It is understood that this application uses encoding and decoding devices as examples to illustrate the execution of the interaction, but this application does not limit the execution entities of the interaction. For example, the method executed by the encoding device in this application can also be implemented by modules in the encoding device, or by logic nodes, logic modules, or software that can implement all or part of the functions of the encoding device; similarly, the method executed by the decoding device in this application can also be implemented by modules in the decoding device, or by logic nodes, logic modules, or software that can implement all or part of the functions of the decoding device. Modules in the encoding device and / or decoding device can be, for example, circuits, chips, or chip systems (such as modem chips, or SoC chips or SIP chips containing modem cores, etc.). The encoding device can be a terminal device or a network device, and the decoding device can be a network device or a terminal device.

[0271] Method 900 may include at least a portion of the following.

[0272] Step 901: The encoding device acquires the first bit sequence.

[0273] In other words, if the encoding device needs to communicate with the decoding device, that is, if the encoding device needs to send a signal to the decoding device, the encoding device needs to first obtain the first bit sequence corresponding to the signal to be sent to the decoding device.

[0274] The phrase "the encoding device acquires the first bit sequence" can refer to: the encoding device performing source encoding on the source symbols to generate the first bit sequence. Alternatively, it can refer to: the encoding device receiving the first bit sequence from other communication devices.

[0275] Step 902: The encoding device performs LDPC encoding on the first bit sequence based on the first shift value matrix and the first expansion factor to obtain the second bit sequence. The first shift value matrix includes the shift value matrix of the first region, the first expansion factor is greater than the first value, and the first value and the first expansion factor belong to the same set of expansion factors.

[0276] In one implementation, the encoding device may select a first base matrix and a first expansion factor based on at least one of the target code length, target code rate, or application scenario, then determine a first shift value matrix based on the first base matrix and the first expansion factor, then expand the first base matrix into a parity check matrix based on the first expansion factor and the first shift value matrix, and then use the expanded parity check matrix to perform LDPC encoding on the first bit sequence to obtain the second bit sequence.

[0277] For example, the first value is greater than or equal to 384.

[0278] For example, the set of expansion factors to which the first expansion factor belongs includes all or part of a set of expansion factors in Table 1 (i.e., a row in Table 1, referred to as the original expansion factor set), and Z can be the maximum value in the original expansion factor set. For instance, if the set of expansion factors to which the first expansion factor belongs includes all or part of the set of expansion factors with set index 0 in Table 1, then Z can be 256. As another example, if the set of expansion factors to which the first expansion factor belongs includes all or part of the set of expansion factors with set index 1 in Table 1, then Z can be 384.

[0279] For example, the first translation value matrix corresponds to the first base matrix; wherein, the first region corresponds to the first a rows or a partial column or a partial row of the first a rows in the first base matrix, where a is a positive integer; or, the first region corresponds to the first b columns or a partial column or a partial row of the first b columns in the first base matrix, where b is a positive integer; or, the first region corresponds to the X1 row or X2 column in the first base matrix, where X1 is the row with the first X1 row weight in the first base matrix, and X2 is the column with the first X2 column weight in the first base matrix, where X1 and X2 are positive integers.

[0280] In one possible implementation, the translation value matrix of the first region can be as shown in Table 4d.

[0281] In this application, if the third translation value matrix can be obtained by performing a first transformation on the first translation value matrix provided in the embodiments of this application, then the third translation value matrix is ​​considered to be included within the protection scope of this application; if the first sub-matrix can be obtained by performing a first transformation on the translation value matrix of the first region provided in the embodiments of this application, then the first sub-matrix is ​​considered to be included within the protection scope of this application. The first transformation includes at least one of the following operations: row permutation, column permutation, or translation value transformation. Row permutation may include permuting one or more rows. Column permutation may include permuting one or more columns. Translation value transformation may include: simultaneously adding or subtracting non-negative integers to the translation values ​​corresponding to the non-zero elements of one or more rows, and / or simultaneously adding or subtracting non-negative integers to the translation values ​​corresponding to the non-zero elements of one or more columns.

[0282] In other words, the third translation value matrix can be obtained from the first translation value matrix through a first transformation. Therefore, "based on the first translation value matrix and the first expansion factor, the first bit sequence is LDPC encoded to obtain the second bit sequence" can be replaced with "the encoding device, based on the third translation value matrix and the first expansion factor, performs LDPC encoding on the first bit sequence to obtain the second bit sequence." And / or, the first sub-matrix can be obtained from the translation value matrix of the first region through a first transformation. Therefore, the aforementioned "the first translation value matrix includes the translation value matrix of the first region" can be replaced with "the first translation value matrix includes the first sub-matrix."

[0283] In other words, the first translation value matrix or the translation value matrix of the first region can be modified to its equivalent or equivalent form. Compared with the translation value matrix provided in the embodiments of this application, the equivalent or equivalent first translation value matrix or the translation value matrix of the first region has a different row arrangement order, and / or a different column arrangement order, and / or the translation values ​​of one or more rows are shifted, and / or the translation values ​​of one or more columns are shifted. For example, the translation value matrix of the first region can be as shown in Table 4d. Assuming the first transformation is a column permutation, and the first submatrix A is obtained by permuting the first and second columns in Table 4d, then the first submatrix A is considered to be within the protection scope of this application. Assuming the first transformation is a row permutation, and the first submatrix B is obtained by permuting the first and second rows in Table 4d, then the first submatrix B is considered to be within the protection scope of this application. Assuming the first transformation is a translation value transformation, and the first submatrix C is obtained by permuting the translation values ​​of the first column and first row in Table 4d and the translation values ​​of the second column and second row, then the first submatrix C is considered to be within the protection scope of this application.

[0284] In another possible implementation, the translation value matrix of the first region may include any row in Table 4d. For example, the translation value matrix of the first region may include the first row in Table 4d, as shown in Figure 10a. Alternatively, the translation value matrix of the first region may include the second row, or the third row, or the fourth row in Table 4d. This application does not limit the elements of the translation value matrix of the first region other than any of the aforementioned rows; the elements of other rows can be found in Table 4c.

[0285] Table 5a

[0286] Optionally, the translation value matrix shown in Table 5a above can also be represented by the following sequence:

[0287] {250, 69, 994, 671, -1, 100, 778, -1, -1, 59, 997, 622, 447, 9, -1, 707, 279, -1, 958, 547, 495, 31;

[0288] 2, -1, 239, 117, 124, 71, -1, 222, 104, 173, -1, 220, 102, -1, 109, 132, 142, 155, -1, 255, -1, 28;

[0289] 106, 111, 185, -1, 63, 117, 93, 229, 177, 95, 39, -1, -1, 142, 225, 225, -1, 245, 205, 251, 117, -1;

[0290] 121, 89, -1, 84, 20, -1, 150, 131, 243, -1, 136, 86, 246, 219, 211, -1, 240, 76, 244, -1, 144, 12}.

[0291] In another possible implementation, the translation value matrix of the first region may include any two rows from Table 4d. For example, the translation value matrix of the first region may include the first and second rows from Table 4d, as shown in Figure 10b. Alternatively, the translation value matrix of the first region may include the first and third rows from Table 4d; or the first and fourth rows; the second and third rows; or the second and fourth rows; or the third and fourth rows, without limitation in this application. This application does not limit the elements of the translation value matrix of the first region other than any two rows mentioned above; for example, the elements of other rows can be found in Table 4c.

[0292] Table 5b

[0293] Optionally, the translation value matrix shown in Table 5b above can also be represented by the following sequence:

[0294] {250, 69, 994, 671, -1, 100, 778, -1, -1, 59, 997, 622, 447, 9, -1, 707, 279, -1, 958, 547, 495, 31;

[0295] 258, -1, 239, 885, 380, 327, -1, 734, 360, 429, -1, 988, 614, -1, 877, 900, 654, 155, -1, 1023, -1, 284;

[0296] 106, 111, 185, -1, 63, 117, 93, 229, 177, 95, 39, -1, -1, 142, 225, 225, -1, 245, 205, 251, 117, -1;

[0297] 121, 89, -1, 84, 20, -1, 150, 131, 243, -1, 136, 86, 246, 219, 211, -1, 240, 76, 244, -1, 144, 12}.

[0298] In another possible implementation, the translation value matrix of the first region may include any three rows from Table 4d. For example, the translation value matrix of the first region may include the first, second, and third rows from Table 4d, as shown in Figure 10c. Alternatively, the translation value matrix of the first region may include the first, second, and fourth rows from Table 4d; or the first, third, and fourth rows; or the second, third, and fourth rows. This application does not limit the specific elements of the translation value matrix of the first region other than the aforementioned three rows; for example, the elements of other rows can be found in Table 4c.

[0299] Table 5c

[0300] Optionally, the translation value matrix shown in Table 5c above can also be represented by the following sequence:

[0301] {250, 69, 994, 671, -1, 100, 778, -1, -1, 59, 997, 622, 447, 9, -1, 707, 279, -1, 958, 547, 495, 31;

[0302] 258, -1, 239, 885, 380, 327, -1, 734, 360, 429, -1, 988, 614, -1, 877, 900, 654, 155, -1, 1023, -1, 284;

[0303] 618, 367, 441, -1, 575, 629, 93, 997, 689, 607, 39, -1, -1, 398, 225, 225, -1, 501, 205, 251, 629, -1;

[0304] 121, 89, -1, 84, 20, -1, 150, 131, 243, -1, 136, 86, 246, 219, 211, -1, 240, 76, 244, -1, 144, 12}.

[0305] In another possible implementation, the translation value matrix of the first region may include any column of Table 4d. For example, the translation value matrix of the first region may include the first column of Table 4d, as shown in Figure 10d. This application does not limit the elements of the translation value matrix of the first region other than any of the columns mentioned above; for example, the elements of other rows can be referred to Table 4c.

[0306] Table 5d

[0307] Optionally, the translation value matrix shown in Table 5b above can also be represented by the following sequence:

[0308] {250, 69, 226, 159, -1, 100, 10, -1, -1, 59, 229, 110, 191, 9, -1, 195, 23, -1, 190, 35, 239, 31;

[0309] 258, -1, 239, 117, 124, 71, -1, 222, 104, 173, -1, 220, 102, -1, 109, 132, 142, 155, -1, 255, -1, 28;

[0310] 618, 111, 185, -1, 63, 117, 93, 229, 177, 95, 39, -1, -1, 142, 225, 225, -1, 245, 205, 251, 117, -1;

[0311] 889, 89, -1, 84, 20, -1, 150, 131, 243, -1, 136, 86, 246, 219, 211, -1, 240, 76, 244, -1, 144, 12}.

[0312] In another possible implementation, the translation value matrix of the first region may include any number of columns from Table 4d, wherein the positions of these columns may be adjacent or non-adjacent, and this application does not limit this. For example, the translation value matrix of the first region may include the first and second columns from Table 4d, as shown in Figure 10e. As another example, the translation value matrix of the first region may include the first and third columns from Table 4d, as shown in Figure 10f. This application does not limit the elements of the translation value matrix of the first region other than the aforementioned arbitrary columns; for example, the elements of other columns can be referred to Table 4c.

[0313] Table 5e

[0314] Optionally, the translation value matrix shown in Table 5e above can also be represented by the following sequence:

[0315] {250, 69, 226, 159, -1, 100, 10, -1, -1, 59, 229, 110, 191, 9, -1, 195, 23, -1, 190, 35, 239, 31;

[0316] 258, -1, 239, 117, 124, 71, -1, 222, 104, 173, -1, 220, 102, -1, 109, 132, 142, 155, -1, 255, -1, 28;

[0317] 618, 367, 185, -1, 63, 117, 93, 229, 177, 95, 39, -1, -1, 142, 225, 225, -1, 245, 205, 251, 117, -1;

[0318] 889, 601, -1, 84, 20, -1, 150, 131, 243, -1, 136, 86, 246, 219, 211, -1, 240, 76, 244, -1, 144, 12}.

[0319] Table 5f

[0320] Optionally, the translation value matrix shown in Table 5f above can also be represented by the following sequence:

[0321] {250, 69, 994, 159, -1, 100, 10, -1, -1, 59, 229, 110, 191, 9, -1, 195, 23, -1, 190, 35, 239, 31;

[0322] 258, -1, 239, 117, 124, 71, -1, 222, 104, 173, -1, 220, 102, -1, 109, 132, 142, 155, -1, 255, -1, 28;

[0323] 618, 111, 441, -1, 63, 117, 93, 229, 177, 95, 39, -1, -1, 142, 225, 225, -1, 245, 205, 251, 117, -1;

[0324] 889, 89, -1, 84, 20, -1, 150, 131, 243, -1, 136, 86, 246, 219, 211, -1, 240, 76, 244, -1, 144, 12}.

[0325] To clearly illustrate the matrices shown in Tables 5a to 5f, this application also provides Figures 10a to 10f.

[0326] For example, the first translation value matrix can be as shown in Table 3b.

[0327] For example, the encoding process of step 902 can be seen in Figure 9 and related descriptions.

[0328] In step 903, the encoding device sends a symbol sequence to the decoding device based on the second bit sequence. Correspondingly, the decoding device receives the symbol sequence from the encoding device.

[0329] The symbol sequence can be a rate-matched sequence or a modulated sequence. For example, the encoding device performs rate matching on the second bit sequence, then modulates the rate-matched sequence to obtain the symbol sequence, and then maps the modulated symbol sequence onto physical resources for transmission.

[0330] Understandably, since channel noise signals may be introduced during the transmission of the symbol sequence, the symbol sequence sent by the encoding device and the symbol sequence received by the decoding device may be different.

[0331] Step 904: The decoding device decodes the second bit sequence based on the first shift value matrix and the first expansion factor to obtain the first bit sequence.

[0332] For example, the second bit sequence can be a symbol sequence.

[0333] Another example is that the second bit sequence can also be information obtained based on the symbol sequence; in other words, the decoding device can process the received symbol sequence to obtain the second bit sequence. For example, the second bit sequence can be information obtained after demodulating the symbol sequence. Yet another example is that the second bit sequence can be information obtained after demodulation and distribution matching processing.

[0334] In some implementations, the decoding device can select a first basis matrix and a first expansion factor based on at least one of the target code length, target code rate, or application scenario. Then, based on the first basis matrix and the first expansion factor, it determines the shift values ​​corresponding to the non-zero elements of the first basis matrix. Next, based on the first expansion factor and the shift values ​​corresponding to the non-zero elements of the first basis matrix, it expands the first basis matrix into a parity check matrix. Finally, it uses the expanded parity check matrix to decode the second bit sequence to obtain the first bit sequence. One implementation where the decoding device selects the first basis matrix based on information such as the target code length, target code rate, and application scenario involves the decoding device selecting a portion or all of the matrix region from the largest stored basis matrix, based on at least one of the target code length, target code rate, and application scenario.

[0335] Tables 6a and 6b are two lists of expansion factors provided exemplary in embodiments of this application. Both Tables 6a and 6b include the aforementioned first expansion factor. The expansion factor list used in methods 600 and 900 may be Table 6a or Table 6b, such that the encoding device and / or the decoding device can determine the aforementioned first expansion factor from Table 6a or Table 6b. Optionally, the encoding device and / or the decoding device may store Table 6a or Table 6b.

[0336] Table 6a

[0337] Where a0, a1, a2, a3, a4, a5, a6, and a7 are positive integers; Table 6a includes at least one expansion factor with a value greater than 384.

[0338] Table 6b

[0339] Where, m, b m c m , m are all positive integers; lines 8 to 7+m must include at least one expansion factor with a value greater than 384.

[0340] Optionally, Table 6b may include only the first 8 rows, with the 8th row including at least one expansion factor with a value greater than 384. This application does not limit the value of b1; for example, b1 may be 17 or 19.

[0341] For example, b m The value can be, but is not limited to, 17, 19, or 21.

[0342] The performance of the LDPC code provided in the embodiments of this application is described below based on simulation results.

[0343] Figure 11 shows the performance simulation results of LDPC codes corresponding to the three translation value matrices.

[0344] Figure 11 shows the simulation results of LDPC codes obtained using the Min-sum decoding algorithm with 5 iteration rounds. The horizontal axis represents the number of rows in the basis matrix used. The information length K = 2² * 10²⁴, the code length N = (20 + number of rows) * 10²⁴, and the code rate = 2² / (20 + number of rows). In Figure 11, the code rates range from 11 / 12 to 2 / 3 depending on the number of rows (4 to 13). The vertical axis represents the signal-to-noise ratio (SNR) corresponding to a block error ratio (BLER) of 1e⁻². A lower value on the vertical axis indicates better performance.

[0345] Curve 1 (the "diamond" line) represents an information length K = 22 * ​​1024, a basis matrix BG1, and an expansion factor of 1024. Its corresponding translation matrix is ​​obtained through a random search based on BG1 and the expansion factor. This randomly searched matrix is ​​generally considered optimal. Curve 1 corresponds to the optimal solution.

[0346] Curve 2 (the "+" line) is the simulation performance curve of the LDPC code in this application embodiment. Its corresponding information length K = 22 * ​​1024, the basis matrix (i.e., the first basis matrix mentioned above) is BG1, and its corresponding translation value matrix (i.e., the first translation value matrix) is generated by this application embodiment. This curve 2 corresponds to the scheme of this application.

[0347] Curve 3 (the "x" line) has an information length K = 22 * ​​1024, a basis matrix of BG1, and a spread factor of 1024. The corresponding translation value matrix is ​​the translation value corresponding to a spread factor of 256 in NR. This curve 3 corresponds to the NR scheme.

[0348] Figure 12 shows the performance comparison results of LDPC codes corresponding to the three translation value matrices.

[0349] The first curve in Figure 12 (the "*" line) is obtained by subtracting the corresponding positions of curve 3 and curve 1 in Figure 11. A value less than 0 on the ordinate indicates that the optimal LDPC code has a performance gain compared to the NR scheme. The first curve can characterize the performance gain effect of the optimal LDPC code compared to the NR scheme.

[0350] The second curve ("*") in Figure 12 is obtained by subtracting the corresponding positions of curves 3 and 2 in Figure 11. A value less than 0 on the vertical axis indicates that the LDPC code of this embodiment has a performance gain compared to the NR scheme. The second curve can characterize the performance gain effect of the LDPC code of this embodiment compared to the NR scheme.

[0351] As can be seen from Figure 12, the first curve is similar to the second curve. That is to say, the performance gain effect of the LDPC code in this embodiment compared to the NR scheme is similar to that of the optimal LDPC code compared to the NR scheme. In this embodiment, the performance gain effect is close to that of the optimal scheme by only modifying the translation value matrix of some regions.

[0352] The method embodiments provided in this application have been described in detail above with reference to Figures 1 to 12. The device embodiments of this application will be described below with reference to Figures 13 to 15.

[0353] It is understood that, in order to achieve the functions in the above embodiments, the devices in Figures 13 to 15 include hardware structures and / or software modules corresponding to perform each function. These devices can be used to implement the functions of the encoding or decoding devices in the above method embodiments, and thus can also achieve the beneficial effects of the above method embodiments. Those skilled in the art should readily recognize that, based on the units and method steps of the various examples described in conjunction with the embodiments disclosed in this application, this application can be implemented in hardware or a combination of hardware and computer software.

[0354] Figure 13 is a schematic diagram of a device provided in an embodiment of this application.

[0355] This application embodiment can divide the encoding or decoding device into functional units according to the above method examples. For example, each function can be divided into different functional units, or two or more functions can be integrated into one unit. Each function can be implemented in hardware or as a software functional module. It should be noted that the division shown in Figure 13 is illustrative and is only one logical functional division. In actual implementation, there may be other division methods.

[0356] As shown in Figure 13, the device 10 includes a transceiver unit 11 and a processing unit 12.

[0357] For example, when device 10 is used to implement the function of the encoding device in the above method embodiments, transceiver unit 11 is used to execute the transceiver steps of the encoding device, such as steps 601 and 603, and processing unit 12 is used to execute the processing step 602 of the encoding device. When device 10 is used to implement the function of the decoding device in the above method embodiments, transceiver unit 11 is used to execute the transceiver steps of the decoding device, such as step 603, and processing unit 12 is used to execute the processing steps of the decoding device, such as step 604.

[0358] As another example, when device 10 is used to implement the function of the encoding device in the above method embodiments, transceiver unit 11 is used to execute the transceiver steps of the encoding device, such as steps 901 and 903, and processing unit 12 is used to execute the processing step 902 of the encoding device. When device 10 is used to implement the function of the decoding device in the above method embodiments, transceiver unit 11 is used to execute the transceiver steps of the decoding device, such as step 903, and processing unit 12 is used to execute the processing steps of the decoding device, such as step 904.

[0359] Optionally, the device 10 also includes a storage unit 13 for storing instructions and / or data.

[0360] For a more detailed description of the transceiver unit 11 and the processing unit 12, please refer to the relevant descriptions in the above method embodiments, which will not be repeated here.

[0361] Figure 14 is another structural schematic diagram of the device provided in the embodiment of this application.

[0362] The device 20 includes a processor 21. The processor 21 is coupled to a memory 23, which stores instructions. When the device 20 is used to implement the method described above, the processor 21 executes the instructions in the memory 23 to implement the function of the processing unit 12 described above.

[0363] Optionally, the device 20 further includes a memory 23 for implementing the functions of the aforementioned storage unit 13.

[0364] Optionally, the device 20 further includes an interface circuit 22. The interface circuit may be referred to as a communication interface or transceiver circuit. The processor 21 and the interface circuit 22 are coupled to each other. It is understood that the interface circuit 22 can be a transceiver or an input / output interface. When the device 20 is used to implement the method described above, the processor 21 is used to execute instructions to implement the function of the processing unit 12, and the interface circuit 22 is used to implement the function of the transceiver unit 11.

[0365] Optionally, device 20 can be an encoding device or a decoding device, and correspondingly, the interface circuit can be a transceiver.

[0366] Optionally, the device 20 can be a chip used in encoding or decoding equipment, and correspondingly, the interface circuit can be an input / output interface.

[0367] For example, when device 20 is a chip applied to an encoding or decoding device, the chip implements the functions of the encoding or decoding device in the above method embodiments. The chip receives information from other modules (such as radio frequency modules or antennas) in the encoding or decoding device, which is sent to the encoding or decoding device by other devices; or, the chip sends information to other modules (such as radio frequency modules or antennas) in the encoding or decoding device, which is sent to other devices by the encoding or decoding device.

[0368] Figure 15 is a schematic diagram of a chip system provided in an embodiment of this application. The chip system 30 (or may also be called a processing system) includes logic circuitry 31 and an input / output interface 32.

[0369] The logic circuit 31 can be a processing circuit in the chip system 30. The logic circuit 31 can be coupled to a memory unit, calling instructions from the memory unit, enabling the chip system 30 to implement the methods and functions of the embodiments of this application. The input / output interface 32 can be an input / output circuit in the chip system 30, outputting processed information from the chip system 30, or inputting data or signaling information to be processed into the chip system 30 for processing.

[0370] As an alternative, the chip system 30 may also include a memory unit.

[0371] As one approach, the chip system 30 is used to implement the operations performed by the encoding or decoding device in the various method embodiments described above.

[0372] For example, logic circuit 31 is used to implement processing-related operations performed by the encoding or decoding device in the above method embodiments; input / output interface 32 is used to implement sending and / or receiving-related operations performed by the encoding or decoding device in the above method embodiments.

[0373] This application also provides a communication device including a processing circuit coupled to a memory for storing computer programs or instructions and / or data. The processing circuit is used to execute the computer programs or instructions stored in the memory, or to read the data stored in the memory, to perform the methods in the above-described method embodiments. Optionally, the processing circuit may be one or more. Optionally, the communication device includes a memory. Optionally, the memory may be one or more. Optionally, the memory may be integrated with the processing circuit, or may be separately disposed.

[0374] This application also provides a chip including a processing circuit coupled to a memory. The memory is used to store computer programs or instructions, and the processing circuit is used to execute the computer programs or instructions stored in the memory to implement the methods executed by the encoding or decoding device in the above-described method embodiments. The memory may be located within the chip or independently of the chip, located outside the chip; this is not limited thereto.

[0375] This application also provides a computer-readable storage medium having stored thereon computer instructions for implementing the methods executed by an encoding device or a decoding device in the above-described method embodiments.

[0376] This application also provides a computer program product comprising instructions that, when executed by a computer, implement the methods performed by an encoding or decoding device in the above-described method embodiments.

[0377] This application also provides a computer program that, when executed by a computer, implements the methods performed by the encoding or decoding device in the above-described method embodiments.

[0378] This application also provides a communication system that includes at least one of the encoding or decoding devices described in the above embodiments.

[0379] The explanations and beneficial effects of the relevant contents in any of the devices provided above can be found in the corresponding method embodiments provided above, and will not be repeated here.

[0380] It is understood that the processing circuit in the embodiments of this application may be a processor or a circuit in a processor for performing processing operations. The processor may include one or more of the following: a central processing unit (CPU), a digital signal processor (DSP), a microprocessor unit (MPU), a microcontroller unit (MCU), a graphics processing unit (GPU), a field programmable gate array (FPGA), an artificial intelligence processor (AI processor), or a neural processing unit (NPU).

[0381] The aforementioned memory may include one or more of the following storage media: random access memory (RAM), static random access memory (SRAM), dynamic random access memory (DRAM), phase-change memory (PCM), resistive random access memory (ReRAM), magnetoresistive random access memory (MRAM), ferroelectric random access memory (FRAM), cache, register, read-only memory (ROM), flash memory, erasable programmable read-only memory (EPROM), hard disk, etc. In one example, computer program instructions for executing the above embodiments may be stored in non-volatile memory, such as the aforementioned memory 23 or at least a portion of the memory cells (e.g., one or more of ROM, flash memory, EPROM, or hard disk).

[0382] The method steps in this embodiment can be implemented in hardware or by a processor executing software instructions. The software instructions can consist of corresponding software modules, which can be stored in random access memory, flash memory, read-only memory, programmable read-only memory, erasable programmable read-only memory, electrically erasable programmable read-only memory, registers, hard disks, portable hard disks, compact disc read-only memory (CD-ROM), or any other form of storage medium known in the art. An exemplary storage medium is coupled to a processor, enabling the processor to read information from and write information to the storage medium. Of course, the storage medium can also be a component of the processor. The processor and storage medium can reside in an application-specific integrated circuit (ASIC). Furthermore, the ASIC can reside in an encoding or decoding device. Alternatively, the processor and storage medium can exist as discrete components in the encoding or decoding device.

[0383] In the above embodiments, implementation can be achieved entirely or partially through software, hardware, firmware, or any combination thereof. When implemented using software, it can be implemented entirely or partially in the form of a computer program product. The computer program product includes one or more computer programs or instructions. When the computer program or instructions are loaded and executed on a computer, the processes or functions described in the embodiments of this application are performed entirely or partially. The computer can be a general-purpose computer, a special-purpose computer, a computer network, a network device, a user equipment, or other programmable device. The computer program or instructions can be stored in a computer-readable storage medium or transferred from one computer-readable storage medium to another. For example, the computer program or instructions can be transferred from one website, computer, server, or data center to another website, computer, server, or data center via wired or wireless means. The computer-readable storage medium can be any available medium that a computer can access or a data storage device such as a server or data center that integrates one or more available media. The available medium can be a magnetic medium, such as a floppy disk, hard disk, or magnetic tape; it can also be an optical medium, such as a digital video optical disc; or it can be a semiconductor medium, such as a solid-state drive.

[0384] In the various embodiments of this application, unless otherwise specified or in case of logical conflict, the terminology and / or descriptions of different embodiments are consistent and can be referenced by each other. The technical features of different embodiments can be combined to form new embodiments according to their inherent logical relationship.

[0385] Unless otherwise stated, all technical and scientific terms used in the embodiments of this application have the same meaning as commonly understood by one of ordinary skill in the art. The terminology used in this application is for the purpose of describing specific embodiments only and is not intended to limit the scope of this application. It should be understood that the above are illustrative examples, and the examples above are merely to help those skilled in the art understand the embodiments of this application, and are not intended to limit the embodiments of the application to the specific numerical values ​​or specific scenarios exemplified. Those skilled in the art can obviously make various equivalent modifications or variations based on the examples given above, and such modifications and variations also fall within the scope of the embodiments of this application.

Claims

1. An information processing method characterized by comprising: The method includes: Obtain the first bit sequence; Based on the first shift value matrix and the first expansion factor, the first bit sequence is encoded by low-density parity-check code (LDPC) to obtain the second bit sequence. The first shift value of the first region in the first shift value matrix is ​​obtained based on the second shift value in the second shift value matrix. The first expansion factor is greater than the first value, and the first value and the first expansion factor belong to the same set of expansion factors. Output the second bit sequence.

2. The method of claim 1, wherein, The first translation value is greater than or equal to the second translation value.

3. The method according to claim 1 or 2, characterized in that, The first value is greater than or equal to 384.

4. The method according to any one of claims 1-3, characterized in that, The first translation value is obtained based on the second translation value and the first expansion factor.

5. The method according to any one of claims 1-4, characterized in that, The second translation value is p, the first translation value is p+k*Z, the set of extension factors to which the first extension factor belongs includes the second extension factor Z, and k is a non-negative number.

6. The method according to any one of claims 1-5, characterized in that, The first translation value matrix corresponds to the first basis matrix; where, The first region corresponds to the first a rows or a partial column of the first a rows or a partial row of the first base matrix, where a is a positive integer; Alternatively, the first region corresponds to the first b columns or a portion of the first b columns or a portion of the first b columns in the first base matrix, where b is a positive integer. Alternatively, the first region corresponds to row X1 or column X2 in the first base matrix, where row X1 is the row with the first row weight X1 in the first base matrix, and column X2 is the column with the first column weight X2 in the first base matrix, and X1 and X2 are positive integers.

7. An information processing method, characterized in that, The method includes: Obtain the second bit sequence; Based on the first shift value matrix and the first expansion factor, the second bit sequence is decoded by low-density parity-check code (LDPC) to obtain the first bit sequence. The first shift value in the first region of the first shift value matrix is ​​obtained based on the second shift value in the second shift value matrix. The first expansion factor is greater than the first value, and the first value and the first expansion factor belong to the same set of expansion factors.

8. The method according to claim 7, characterized in that, The first translation value is greater than or equal to the second translation value.

9. The method according to claim 7 or 8, characterized in that, The first value is greater than or equal to 384.

10. The method according to any one of claims 7-9, characterized in that, The first translation value is obtained based on the second translation value and the first expansion factor.

11. The method according to any one of claims 7-10, characterized in that, The second translation value is p, the first translation value is p+k*Z, the set of extension factors to which the first extension factor belongs includes the second extension factor Z, and k is a non-negative number.

12. The method according to any one of claims 7-11, characterized in that, The first translation value matrix corresponds to the first basis matrix; where, The first region corresponds to the first a rows or a partial column of the first a rows or a partial row of the first base matrix, where a is a positive integer; Alternatively, the first region corresponds to the first b columns or a portion of the first b columns or a portion of the first b columns in the first base matrix, where b is a positive integer. Alternatively, the first region corresponds to row X1 or column X2 in the first base matrix, where row X1 is the row with the first row weight X1 in the first base matrix, and column X2 is the column with the first column weight X2 in the first base matrix, and X1 and X2 are positive integers.

13. A communication device, characterized in that, The device includes a processor and an interface circuit, wherein the interface circuit is used to receive signals from other communication devices besides the communication device and transmit them to the processor, or to send signals from the processor to other communication devices besides the communication device, and the processor is used to implement the method as described in any one of claims 1 to 12 through logic circuits or execution code instructions.

14. The communication device according to claim 13, characterized in that, The communication device is a terminal device, network device, chip, or chip system.

15. A computer-readable storage medium, characterized in that, The storage medium stores a computer program or instructions, which, when executed by a communication device, implement the method as described in any one of claims 1 to 12.

16. A computer program product, characterized in that, Includes a computer program that, when run, implements the method as described in any one of claims 1 to 12.

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