MEMS microphone

Abstract

A MEMS microphone according to an embodiment of the present invention comprises: a first substrate; a second substrate disposed on the first substrate; an adhesive layer disposed between the first substrate and the second substrate; a MEMS structure disposed on the second substrate; and a capacitor spaced apart from the MEMS structure. The capacitor comprises a first external electrode and a second external electrode disposed at both ends thereof, and a dielectric layer disposed between the first external electrode and the second external electrode. The first external electrode and the second external electrode of the capacitor are soldered to a plating region formed on the second substrate.

Description

MEMS microphone

[0001] The present invention relates to a MEMS microphone.

[0002] Generally, audio devices generate sound by vibrating a diaphragm using electrodes, and significant advancements are being made in the field of audio equipment alongside recent technological developments. The applications of these devices are becoming increasingly diverse, such as in portable terminals and hearing aids, and as the devices in which they are applied become slimmer, the size of the audio devices themselves is also being miniaturized.

[0003] In addition, microphones utilizing MEMS (Micro Electro Mechanical Systems), a semiconductor technology, have recently been developed and are in use. MEMS is a technology that enables the fabrication of small mechanical components on the surface of silicon wafers. These MEMS microphones can be classified into electrostatic and piezoelectric types, including general capacitor types.

[0004] Recently, mobile communication terminals such as mobile phones and smartphones, as well as electronic devices like tablet PCs and MP3 players, are becoming smaller. Consequently, the components of these electronic devices are also becoming more miniaturized. Therefore, Micro Electro Mechanical System (MEMS) technology is required to overcome the physical limitations of these components.

[0005] The technical problem that the present invention aims to solve is to provide a MEMS microphone.

[0006] To solve the above technical problem, a MEMS microphone according to the present embodiment comprises: a first substrate; a second substrate disposed on the first substrate; an adhesive layer disposed between the first substrate and the second substrate; a MEMS structure disposed on the second substrate; and a capacitor disposed spaced apart from the MEMS structure, wherein the capacitor comprises a first external electrode and a second external electrode disposed at both ends, and a dielectric layer disposed between the first external electrode and the second external electrode, and the first external electrode and the second external electrode of the capacitor are soldered to a plating area formed on the second substrate.

[0007] The second substrate includes a region that is connected to the first surface where the plating region is formed and is subjected to half-etching treatment, and the first surface and the region subjected to half-etching treatment may form a step.

[0008] A PSR (Photo Solder Resist) may be placed on the area where the above half-etching process is performed.

[0009] The first substrate, the adhesive layer, and the second substrate are stacked in a first direction, and the half-etched area and the dielectric layer may be spaced apart from each other in the first direction.

[0010] The distance between the region that is half-etched in the first direction and the dielectric layer may be 10 µm to 30 µm.

[0011] The thickness of the solder placed in the area where the half-etching process is performed in the first direction may be 2 / 5 to 2 / 4 of the thickness of the capacitor.

[0012] To solve the above technical problem, a MEMS microphone according to another embodiment of the present invention comprises: a first substrate; a second substrate disposed on the first substrate; an adhesive layer disposed between the first substrate and the second substrate; a MEMS structure disposed on the second substrate; and a capacitor disposed spaced apart from the MEMS structure, wherein the capacitor comprises a first external electrode and a second external electrode disposed at both ends, and a dielectric layer disposed between the first external electrode and the second external electrode, and the second substrate comprises a cavity that exposes a first pad formed on the first substrate, and the first external electrode and the second external electrode of the capacitor may be disposed on the first pad.

[0013] To solve the above technical problem, a MEMS microphone according to another embodiment of the present invention comprises: a first substrate; a second substrate disposed on the first substrate; an adhesive layer disposed between the first substrate and the second substrate; a MEMS structure disposed on the second substrate; and a capacitor disposed spaced apart from the MEMS structure, wherein the second substrate includes a cavity exposing a first pad formed on the first substrate and a first region spaced apart from the inner surface of the cavity, and at least a portion of the capacitor may be disposed on the first region of the second substrate.

[0014] The bridge connecting the first region and the inner surface of the cavity is cut, and a PSR can be placed on the first substrate in the region where the bridge is cut.

[0015] The capacitor comprises a first external electrode and a second external electrode disposed at both ends, and a dielectric layer disposed between the first external electrode and the second external electrode, and the first external electrode of the capacitor may be disposed on the first region of the second substrate.

[0016] The first region of the second substrate includes a first plating region, and the first external electrode of the capacitor can be soldered to the first plating region.

[0017] The second external electrode of the capacitor is disposed in a second plating area formed on the second substrate, and the second substrate includes an area connected to the second plating area and subjected to half-etching treatment, and the second plating area and the area subjected to half-etching treatment may form a step.

[0018] According to these embodiments, noise generation in the MEMS microphone can be minimized through the capacitor placement design.

[0019] In addition, since noise generated by the capacitor can be reduced, the capacitor can be directly mounted on the substrate without wire bonding, and manufacturing costs can be reduced as the plating process for wire bonding is not required.

[0020] FIG. 1 is a side view illustrating the structure of a MEMS microphone according to the present embodiment.

[0021] FIG. 2 is an exploded view of a substrate unit of a MEMS microphone according to the present embodiment.

[0022] FIG. 3 is a top view of a MEMS microphone according to the present embodiment.

[0023] Figure 4 is a diagram illustrating the structure of a capacitor.

[0024] Figure 5 is a diagram illustrating the arrangement of capacitors on the substrate unit of a MEMS microphone.

[0025] FIG. 6 is a diagram illustrating the arrangement of a capacitor on a substrate unit of a MEMS microphone according to the present embodiment.

[0026] FIG. 7 is a diagram illustrating the arrangement of a capacitor on a substrate unit of a MEMS microphone according to a modified example of the present embodiment.

[0027] FIGS. 8 and 9 are drawings for explaining the arrangement of PSR and solder when a capacitor is placed on a substrate unit of a MEMS microphone according to a modified example of the present embodiment.

[0028] FIGS. 10 and FIGS. 11 are drawings for explaining the shape of a substrate unit and the arrangement of a capacitor of a MEMS microphone according to another embodiment of the present invention.

[0029] FIGS. 12 to 16 are drawings for explaining the shape of a substrate unit and the arrangement of a capacitor of a MEMS microphone according to another embodiment of the present invention.

[0030] Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the attached drawings.

[0031] However, the technical concept of the present invention is not limited to some of the described embodiments but can be implemented in various different forms, and within the scope of the technical concept of the present invention, one or more of the components among the embodiments may be selectively combined or substituted.

[0032] In addition, terms used in this embodiment (including technical and scientific terms) may be interpreted in a sense that is generally understood by those skilled in the art to which this embodiment belongs, unless explicitly and specifically defined otherwise. Terms that are commonly used, such as terms defined in advance, may be interpreted in consideration of their meaning in the context of the relevant technology.

[0033] Furthermore, the terms used in this embodiment are for the purpose of describing the embodiment and are not intended to limit the invention.

[0034] In this specification, the singular form may include the plural form unless specifically stated otherwise in the text, and when described as "at least one of A and B and C (or more than one)," it may include one or more of all combinations that can be formed from A, B, and C.

[0035] In addition, terms such as first, second, A, B, (a), (b), etc., may be used when describing the components of the present embodiment. These terms are used merely to distinguish the components from other components and are not intended to limit the essence, order, or sequence of the components.

[0036] And, where it is stated that a component is 'connected', 'combined', or 'connected' to another component, this may include not only cases where the component is directly 'connected', 'combined', or 'connected' to the other component, but also cases where it is 'connected', 'combined', or 'connected' due to another component located between the component and the other component.

[0037] Furthermore, when described as being formed or placed "above" or "below" each component, "above" or "below" includes not only cases where two components are in direct contact with each other, but also cases where one or more other components are formed or placed between the two components. Additionally, when expressed as "above" or "below," it may include the meaning of a downward direction as well as an upward direction relative to a single component.

[0038]

[0039] FIG. 1 is a side view illustrating the structure of a MEMS microphone according to the present embodiment, FIG. 2 is an exploded view of a substrate unit of a MEMS microphone according to the present embodiment, FIG. 3 is a top view of a MEMS microphone according to the present embodiment, FIG. 4 is a drawing for explaining the structure of a capacitor, FIG. 5 is a drawing for explaining the arrangement of a capacitor on a substrate unit of a MEMS microphone, FIG. 6 is a drawing for explaining the arrangement of a capacitor on a substrate unit of a MEMS microphone according to the present embodiment, FIG. 7 is a drawing for explaining the arrangement of a capacitor on a substrate unit of a MEMS microphone according to a modified example of the present embodiment, FIG. 8 and FIG. 9 are drawings for explaining the arrangement of PSR and solder when a capacitor is arranged on a substrate unit of a MEMS microphone according to a modified example of the present embodiment, FIG. 10 and FIG. 11 are drawings for explaining the shape of a substrate unit of a MEMS microphone and the arrangement of a capacitor according to another embodiment of the present invention, and FIG. 12 to 16 are drawings of a MEMS according to yet another embodiment of the present invention This is a drawing to explain the shape of the circuit board unit of the microphone and the arrangement of the capacitor.

[0040] Referring to FIG. 1, the MEMS microphone according to the present embodiment may include a first substrate (100), a second substrate (200), a MEMS structure (300), a housing (400), a signal processing element (500), and at least one capacitor (600).

[0041] The first substrate (100) is placed at the bottom of the MEMS microphone, has a plate shape, and can be electrically connected to the outside. The second substrate (200) is placed on the upper part of the first substrate (100), so that the first substrate (100) and the second substrate (200) can form a single substrate unit, and the substrate unit can form an internal space together with the housing (400).

[0042] The first substrate (100) is a flexible substrate and may be a Chip on Film (COF) substrate or a flexible printed circuit board (FPCB). A Chip on Film (COF) substrate is a substrate formed by forming a circuit on a base film or mounting a component such as a chip, and has a film shape, so it is a substrate with a thickness that is considerably thinner than other substrates. By using a COF substrate as the substrate for a MEMS microphone, the thickness can be reduced compared to the case where a conventional rigid substrate is used.

[0043] The first substrate (100) is a COF substrate and may include a 2-metal COF substrate. The 2-metal COF may be formed in a structure in which a metal layer is laminated on the upper and lower surfaces of a base film so as to form a circuit or mount a device on both sides of a base film.

[0044] A flexible printed circuit board (FPCB) is a flexible circuit board that is also flexible and has a thinner thickness compared to a standard PCB board, so the thickness can be reduced by using a flexible printed circuit board as a substrate for a MEMS microphone. Other types of flexible substrates may be included. For example, the first substrate (100) may be an LCP (Liquid Crystal Polymer)-based FPCB, a PI (Polyimide)-based FPCB, or a PI-based COF, and the type of the first substrate (100) is not limited to the examples described above.

[0045] A hole may be formed in the first substrate (100) at a position facing the lower part of the MEMS structure (300). The cross-sectional area of ​​the hole may be circular, but is not limited thereto. Here, the hole may be an acoustic hole.

[0046] The first substrate (100) may include a first pad (110). The first substrate (100) may have a first front pad formed on its front surface to be electrically connected to a second pad of the second substrate (200) and a first rear pad formed to be electrically connected to a rear external configuration. That is, the first pad (110) may include a first front pad and a first rear pad.

[0047] A plurality of first front pads and a first connection circuit connecting them may be formed on the front surface of the first substrate (100). A signal processing element and a capacitor may be electrically connected to the plurality of first front pads and the first connection circuit. A plurality of first rear pads and a second connection circuit may be formed on the rear surface of the first substrate (100).

[0048] The first substrate (100) may include via holes. In this case, the first substrate (100) may connect the first front pad and the first rear pad formed on both sides through a metal layer (e.g., via) formed in the via holes. Some of the first pads (110) may be exposed through the cavity (210) of the second substrate (200).

[0049]

[0050] The second substrate (200) is a substrate having a plate shape that is stacked to be placed on top of the first substrate (100). The second substrate (200) may include a rigid substrate, and may include, for example, a printed circuit board (PCB), a semiconductor substrate, or a ceramic substrate, a metal plate, etc. The second substrate (200) may be composed of a single layer or may be formed by stacking a plurality of substrates.

[0051] The second substrate (200) may include via holes. In this case, the second substrate (200) may connect circuits or components formed on both sides through a metal layer (e.g., via) formed in the via holes. Here, the via holes may be micro via holes and may be configured with a size of 25 μm or less.

[0052] The second substrate (200) may include an acoustic hole. The cross-sectional area of ​​the acoustic hole may be circular, but is not limited thereto. The hole formed in the second substrate (200) may be arranged to communicate with the hole formed in the first substrate (100), and a MEMS structure (300) may be arranged on the upper part of the hole communicating with the first substrate (100) and the second substrate (200).

[0053] The second substrate (200) can be electrically connected to the first substrate (100). The second substrate (200) may include a plurality of pads for electrically connecting to the first substrate (100).

[0054] The second substrate (200) may include a second pad. The second pad may include a plurality of second front pads formed on the front surface of the second substrate (200) and a plurality of second rear pads formed on the rear surface of the second substrate (200). That is, the second pad may include a second front pad and a second rear pad. The second front pad may be electrically connected to a signal processing element (500) and a capacitor (600), and the second rear pad may be electrically connected to the first front pad of the first substrate (100). The second rear pad of the second substrate (200) may be formed to have the same or similar shape and size as the first front pad of the first substrate (100), and may be electrically connected by being stacked so that at least a portion overlaps vertically.

[0055] The second substrate (200) may include one or more cavities (210). The second substrate (200) is placed on top of the first substrate (100), and the first substrate (100) may be exposed to the top of the second substrate (200) through the cavity (210) of the second substrate (200). The first substrate (100) may be exposed to the top of the second substrate (200) by having a first pad (110), etc., placed in the space where the cavity (210) of the second substrate (200) is formed. In this case, since the upper surface of the first substrate (100) is placed on the lower surface of the second substrate (200), the first front pad, etc. formed on the upper surface of the first substrate (100) may be exposed to the top of the second substrate (200) through the cavity (210) of the second substrate (200). The first pad (110) of the first substrate (100) can be electrically connected to a signal processing element (500) and a capacitor (600) through a cavity (210) formed in the second substrate (200).

[0056] The second substrate (200) can be electrically connected to the signal processing element (500) and the capacitor (600). The second substrate (200) may include a plurality of pads, a plurality of connection circuits, and a plurality of vias for electrically connecting to the signal processing element (500) and the capacitor (600). The plurality of pads may overlap and contact the vias perpendicularly, or may contact an external substrate or element. The connection circuits may connect the second pads disposed on the same layer. The vias may be formed in via holes penetrating a base film or an insulating layer.

[0057] The second substrate (200) is laminated on top of the first substrate (100) so that the first substrate (100) and the second substrate (200) can form a single substrate unit. An adhesive layer (700) is disposed between the lower part of the second substrate (200) and the upper part of the first substrate (100) to bond the first substrate (100) and the second substrate (200). The adhesive layer (700) may have a shape and size corresponding to the shape and size of the first substrate (100) or the second substrate (200) as a means of bonding the first substrate (100) and the second substrate (200). The adhesive layer (700) may be made of a conductive material, but is not limited thereto and may be made of a non-conductive material.

[0058] A PSR (Photo Solder Resist) (800) may be disposed on the upper surface of the second substrate (200). The PSR (800) is formed by applying ink used to protect and form circuits on the substrate, and serves to protect circuits formed on the surface of the substrate to prevent corrosion or short circuits, and allows plating to be performed only on the necessary parts during the soldering process. The PSR (800) may be referred to as either an ink layer or a surface protection layer.

[0059] As the first substrate (100) and the second substrate (200) form a substrate unit, the second substrate (200) not only complements the rigidity of the first substrate (100) but also simplifies the pad design structure of the second substrate (200), and since the first substrate (100) is a flexible substrate that enables fine pitch, it is implemented to have a thinner thickness and increased fine pitch realization compared to a substrate unit using a rigid substrate where the existing pad design is performed, thereby having the effect of high freedom in circuit design.

[0060] A housing (400), a MEMS structure (300), a signal processing element (500), and a capacitor (600) may be disposed on the second substrate (200). The capacitor (600) may be optionally disposed on the second substrate (200) as needed.

[0061] A housing (400) is a means for being placed on top of a second substrate (200) and forming a receiving space inside. The housing (400) may be formed in a cover shape with an open bottom surface, and the receiving space may be formed by the bottom surface of the housing (400) being joined to the top surface of the second substrate (200). The housing (400) and the second substrate (200) may be joined by solder being placed on top of the second substrate (200) and adhering to the bottom surface of the housing (400). Noise conditions such as SNR, PSR, and PSRR may be determined according to the size (Back Volume) of the receiving space formed inside the housing (400).

[0062] The housing (400) may be made of nickel silver or stainless steel (SUS). Nickel silver is a material containing 15-30% zinc and 10-20% nickel in copper, and allows for solder bonding without plating in its raw material state. Applying plating to the seating area of ​​the housing (400) can improve the solder bond adhesion. Ni+Au plating can be applied. Both electroless and electrolytic plating processes can be applied. Although stainless steel (SUS) contains Ni, the solder bond adhesion may decrease if plating is not performed. Therefore, plating can be applied. Unlike nickel silver, the plating adhesion on the surface of stainless steel may decrease when electroless plating is applied, so plating can be performed using an electrolytic plating process.

[0063] The MEMS structure (300) may be placed within a receiving space formed by a housing (400). The MEMS structure (300) may include a body (310), a backplate (330), and a diaphragm (320). The MEMS structure (300) may be placed on top of a second substrate (200), and the lower part of the MEMS structure (300) may be placed at a position adjacent to an acoustic hole (10) of the second substrate (200).

[0064] The body (310) is a means for forming a partition wall that surrounds the acoustic hole (10) formed in the second substrate (200). The body (310) can be coupled to the second substrate (200) so as to be electrically connected to the first substrate (100) through the second substrate (200). Additionally, an acoustic hole (360) communicating with the acoustic hole (10) can be formed in the body (310). The body (310) can be electrically connected to the second substrate (200).

[0065] An acoustic hole (360) may be formed in the body (310). When the body (310) is coupled to the second substrate (200), the acoustic hole (10) formed in the first substrate (100) and the second substrate (200) and the acoustic hole (360) of the body (310) may be arranged to communicate with each other, and thus, sound from the outside may be designed to flow in through the acoustic hole (10).

[0066] The backplate (330) and the diaphragm (320) can be placed in the acoustic hole (10) formed in the body (310). The diaphragm (320) can vibrate due to the sound pressure of the sound when sound is introduced from the outside through the acoustic hole (10), and the backplate (330) can sense the acoustic signal by measuring the capacitance according to the vibration of the diaphragm (320). Although the backplate is shown as being located above the diaphragm (320) in the drawing, the diaphragm (320) may also be located above the backplate.

[0067] One or more body pads for electrical connection may be formed on the upper surface of the body (310). The body pads may be electrically connected to the backplate (330) and the diaphragm (320), and may be electrically connected to the signal processing element (500), which will be described later, via a wire. However, the connection method is merely an example, and as needed, the body pads may be placed in a form directly mounted on the pads of the second substrate (200) and electrically connected to the signal processing element (500) through a connection circuit. As the shape and material of the body pads are known technologies for electrical connection, a description thereof is omitted.

[0068] The signal processing element (500) is electrically connected to the MEMS structure (300) and can process electrical signals sensed from the MEMS structure (300). The MEMS structure (300) and the signal processing element (500) can be electrically connected through a body pad. For example, the MEMS structure (300) and the signal processing element (500) can be connected by a wire through wire bonding. As another example, the MEMS structure (300) and the signal processing element (500) can be electrically connected through a connection circuit of the second substrate (200) while mounted on the second substrate (200) in a flip-chip form. When the MEMS structure (300) and the signal processing element (500) are wire-bonded, a signal pad may be placed on the signal processing element (500) to be connected to the body pad of the MEMS structure (300) through wire bonding.

[0069] The signal processing element (500) can amplify a signal sensed from the MEMS structure (300). Here, the signal processing element (500) may include an Application-Specific Integrated Circuit (ASIC), but is not limited thereto. The signal processing element (500) may be formed as a single module or may be formed in the form of a chip. The signal processing element (500) may include an ASIC and an En-cap that coats the ASIC.

[0070] A signal processing element (500) may be placed on a second substrate (200). The signal processing element (500) may be electrically connected to a first substrate (100) through the second substrate (200). The signal processing element (500) may be placed on the second substrate (200) spaced apart from the MEMS structure (300). The signal processing element (500) may be placed in a receiving space formed inside a housing (400) spaced apart from the MEMS structure (300) and may receive a signal from the MEMS structure (300). Since signal transmission between the MEMS structure (300) and the signal processing element (500) takes place in the receiving space formed by the housing (400), external interference is reduced, and thereby noise can be reduced.

[0071] The signal processing element (500) can be electrically connected to the MEMS structure (300) and the first substrate (100). The signal processing element (500) can be electrically connected to the MEMS structure (300). The signal processing element (500) can be electrically connected to a body pad formed on the body (310) of the MEMS structure (300) by having a signal pad disposed on its upper surface. The signal pad of the signal processing element (500) and the body pad of the MEMS structure (300) can be electrically connected through wire bonding, thereby allowing the signal processing element (500) and the MEMS structure (300) to be electrically connected.

[0072] The signal processing element (500) can be electrically connected to the first substrate (100) by being electrically connected to the second substrate (200). The signal processing element (500) can be electrically connected to the second substrate (200) through wire bonding or electrically connected by being mounted on the second substrate (200) in the form of a flip chip. Since a plurality of pads are arranged on the second substrate (200), the signal processing element (500) can be electrically connected to the pads of the second substrate (200) through wire bonding or electrically connected by being mounted on the pads of the second substrate (200) in the form of a flip chip, and can be electrically connected to the first substrate (100) through the pads of the second substrate (200). The signal processed by the signal processing element (500) can be transmitted to an external location requiring the signal through one or more of the pads, connection circuits, and vias formed on the second substrate (200) and through the pads formed on the first substrate (100).

[0073] A capacitor (600) may be optionally placed on the upper part of the second substrate (200) as needed. When the capacitor (600) is placed, the performance of PSRR, which is RF-related noise, and the performance of PSR, which is power-related noise, may be improved. That is, through the capacitor (600), noise-related performance such as SNR, PSRR, and PSR can be improved. The capacitor (600) may be electrically connected to the signal processing element (500). As a result, the capacitor (600) can remove noise during the process of processing signals in the signal processing element (500).

[0074] The capacitor (600) is positioned on the upper part of the second substrate (200) and can be electrically connected to the signal processing element (500) and can be electrically connected to the first substrate (100) through the second substrate (200). The capacitor (600) can be electrically connected to the signal processing element (500) and the first substrate (100) via wires. The capacitor (600) can be electrically connected to the signal pad of the signal processing element (500) via wire bonding and can be electrically connected to the pad of the second substrate (200) via wire bonding.

[0075] However, the capacitor (600) can be electrically connected to the first substrate (100) not only by bonding via wires but also by mounting it on the second substrate (200) or the signal processing element (500) in a flip-chip form. For example, the capacitor (600) can be mounted on a second pad formed on the upper part of the second substrate (200). The capacitor (600) can be mounted on a second front pad formed on the front surface of the second substrate (200). As the fine-pitch circuit implementation of the second substrate (200) becomes possible, the effect of securing mounting space for the capacitor is achieved.

[0076] According to another embodiment, the capacitor (600) may be placed on the upper portion of the first substrate (100). The capacitor (600) may be placed on the first pad (110) of the first substrate (100) which is exposed through the cavity (210) of the second substrate (200). The capacitor (600) may be soldered to the first pad (110) of the first substrate (100).

[0077]

[0078] Referring to FIG. 4, the capacitor (600) may be a Multi Layer Ceramic Capacitor (MLCC). The capacitor (600) may include a first external electrode (601) and a second external electrode (603) disposed at both ends, a plurality of internal electrodes disposed between the first external electrode (601) and the second external electrode (603), and a dielectric layer (604). The first external electrode (601) and the second external electrode (603) can electrically connect the internal electrodes and the external circuit. The dielectric layer (604) is a material that serves as an electrical storage for the capacitor, and the capacitance increases as the dielectric layer (604) increases. The dielectric layer (604) may be disposed between the first external electrode (601) and the second external electrode (603) and between the plurality of internal electrodes. The plurality of internal electrodes are electrodes inserted between the dielectric layer (604).

[0079] The overall exterior of the capacitor (600) may be in the shape of a rectangular prism. The capacitor (600) may be classified into two types according to size. The first type of capacitor may be larger than the second type of capacitor. The number of capacitor types is merely illustrative and is not necessarily limited thereto.

[0080] The length (T) of the first direction (z-axis direction) of the first type capacitor (600) may be 0.3 mm ± 0.03 mm, the length (L) of the second direction (y-axis direction) may be 0.6 mm ± 0.03 mm, and the length (W) of the third direction (x-axis direction) may be 0.3 mm ± 0.03 mm. In the first direction (z-axis direction), the length (o) of the first external electrode (601) and the second external electrode (603) of the first type capacitor (600) may be approximately 0.1 mm to approximately 0.2 mm, the length (p) of the dielectric layer (604) may be approximately 0.2 mm, and the error range of ±5% or less may be satisfied. Here, the first direction may be perpendicular to the second direction and the third direction, and the second direction may be perpendicular to the third direction.

[0081] The length (T) of the first direction (z-axis direction) of the second type capacitor (600) may be 0.2 mm ± 0.02 mm, the length (L) of the second direction (y-axis direction) may be 0.4 mm ± 0.02 mm, and the length (W) of the third direction (x-axis direction) may be 0.2 mm ± 0.02 mm. In the first direction (z-axis direction), the length (o) of the first external electrode (601) and the second external electrode (603) of the first type capacitor (600) may be approximately 0.07 mm to approximately 0.14 mm, the length (p) of the dielectric layer (604) may be approximately 0.13 mm, and the error range may be satisfied as ±5% or less.

[0082]

[0083] The sizes of the first substrate (100) and the second substrate (200) may be the same. The length of the first substrate (100) and the second substrate (200) in the second direction (y-axis direction) may satisfy approximately 3.6 mm and may satisfy an error range of 5% or less. The length of the first substrate (100) and the second substrate (200) in the third direction (x-axis direction) may satisfy approximately 2.65 mm and may satisfy an error range of 5% or less. The sizes of the first substrate (100) and the second substrate (200) may be different from each other. When the sizes of the first substrate (100) and the second substrate (200) are different from each other, the length in the second direction (y-axis direction) of the substrate with the larger size between the first substrate (100) and the second substrate (200) can satisfy about 3.6 mm, the length in the third direction (x-axis direction) can satisfy about 2.65 mm, and the error range can satisfy 5% or less.

[0084]

[0085] When a capacitor (600) is mounted inside a MEMS microphone, vibrations generated from the capacitor (600) are transmitted to the substrate unit, and this causes noise generation and a decrease in the PSR performance of the MEMS microphone.

[0086] In order to solve this problem in conventional MEMS microphones, a capacitor (600) was fixed on a second substrate (200) that is thicker than the first substrate (100) through a bonding member (900). The external electrodes (601, 603) of the capacitor (600) were connected to a first pad (110) formed on the first substrate (100) and a wire (20) for power supply and signal connection. In this connection structure, there is a problem of an additional wire bonding process, and in order to minimize power and signal loss, the external electrodes (601, 603) of the capacitor (600) needed to be gold (Au) plated.

[0087] Unlike the existing structure, the present invention can simplify the process and reduce manufacturing costs by designing a change in the arrangement structure of the capacitor (600), and can minimize noise generation due to vibration of the capacitor (600).

[0088] A second substrate (200) of a MEMS microphone according to the present embodiment may have a plating area (30) formed therein. The plating area (30) may be plated with an electrically conductive material. The plating area (30) may be plated with copper (Cu) or gold (Au). If the second substrate (200) is stainless steel (SUS), the plating adhesion on the second substrate (200) is poor, so after nickel treatment in the electrolytic plating process, it may be plated with a conductive material such as gold (Au).

[0089] The first external electrode (601) and the second external electrode (603) of the capacitor (600) can be soldered (S) to a plating area (30) formed on the second substrate (200). The plating area (30) can be formed as an area wider than one side of the first external electrode (601) and the second external electrode (603) disposed on the plating area (30).

[0090] The first external electrode (601) and the second external electrode (603) of the capacitor (600) may be arranged to be in contact with the plating area (30) of the second substrate (200). The first external electrode (601) and the second external electrode (603) of the capacitor (600) are arranged to overlap the plating area (30) of the second substrate (200) in a first direction (z-axis direction), and solder (S) may be arranged between the first external electrode (601) and the plating area (30) and between the second external electrode (603) and the plating area (30). Through this, the first external electrode (601) and the plating area (30) and the second external electrode (603) and the plating area (30) may be electrically connected.

[0091] The surfaces of the first external electrode (601) and the second external electrode (603) of the capacitor (600) can be plated with tin (Sn). Although gold (Au) plating was applied to the surfaces of the first external electrode (601) and the second external electrode (603) for conventional wire bonding, the present invention directly solders (S) the first external electrode (601) and the second external electrode (603) to the plating area (30) formed on the second substrate (200), so the surfaces of the first external electrode (601) and the second external electrode (603) can be plated with tin (Sn), which has a lower manufacturing cost than gold (Au).

[0092] A PSR (800) may be placed on one side of the area surrounding the plating area (30) on the second substrate (200). The PSR (800) can prevent the solder (S) placed in the plating area (30) from overflowing into an area other than the plating area (30).

[0093] The second substrate (200) may include a first surface (201) where a plating area (30) is formed, and a half-etched area connected to the first surface (201). Half etching is a process of reducing the thickness by etching a portion of the second substrate (200), which is a metal plate, and can be implemented through a chemical method. The thickness of the half-etched area on the second substrate (200) may be smaller than the thickness of the area that is not half-etched. In the first direction (z-axis direction), the thickness of the half-etched area of ​​the second substrate (200) may satisfy about 40% to about 60% of the thickness of the area that is not half-etched, and may satisfy an error range of ±5%. The first surface (201) and the half-etched area may form a step.

[0094] The half-etched area may include a second surface (202) that overlaps the capacitor (600) in a first direction (z-axis direction) and a third surface (203) that does not overlap the capacitor (600) in a first direction (z-axis direction). The first surface (201), the second surface (202), and the third surface (203) of the second substrate (200) may face the same direction. A PSR (800) may be placed on the half-etched area. A PSR (800) may be placed on the second surface (202) and the third surface (203) of the half-etched area. The PSR (800) can prevent the solder (S) placed in the plating area (30) from overflowing into an area other than the plating area (30).

[0095] The second surface (202) of the half-etched area may be positioned to face the dielectric layer (602) of the capacitor (600). The half-etched area and the dielectric layer (602) of the capacitor (600) may be spaced apart from each other in a first direction (z-axis direction). A gap (g1) may be formed between the second surface (202) of the half-etched area and the dielectric layer (602) of the capacitor (600). The distance (a1) between the second surface (202) of the half-etched area and the dielectric layer (602) of the capacitor (600) in the first direction (z-axis direction) may be about 10 µm to about 30 µm.

[0096] Through this, the dielectric layer (602) of the capacitor (600) is suspended on the second substrate (200), so that even if a bias power supply is applied to the capacitor (600) and vibration occurs, the physical effect of vibration being transmitted to the second substrate (200) can be minimized.

[0097]

[0098] FIG. 8 is a side cross-sectional view showing a capacitor placed on a substrate unit of a MEMS microphone according to the present embodiment, and FIG. 9 is a side cross-sectional view showing a capacitor placed on a substrate unit of a MEMS microphone with the size of the open area of ​​the PSR (800) changed in FIG. 8.

[0099] Referring to FIGS. 8 and 9, the thickness of the solder (S) in the first direction (z-axis direction) can be controlled by adjusting the size of the area where the PSR (800) is placed on the second substrate (200). Specifically, an open area where the PSR (800) is not applied can be formed on the second substrate (200), and the solder (S) can be placed on the open area.

[0100] The process of forming the PSR (800) layer first removes oxides, contaminants, and oil from the surface of the second substrate (200) to ensure that the PSR (800) adheres well. Afterward, the PSR (800) is applied using methods such as screen printing, spray coating, and roller coating. To form open areas where the PSR (800) is not applied, an exposure and development process is performed. A UV light source is selectively irradiated using a photomask on areas where the PSR (800) is not required. At this time, the PSR (800) in the exposed areas is not cured, and only the unexposed areas are cured.

[0101] Afterward, the uncured PSR (800) is removed with a developer, and UV curing is performed to enhance the durability of the PSR (800) layer. Unlike the process described above, depending on the characteristics of the photo solder resist, the PSR (800) in the exposed area may be cured, while the unexposed area may not be cured. The description of the process for forming the PSR (800) layer is merely illustrative and is not necessarily limited thereto.

[0102] FIGS. 8 and 9 illustrate that a hole is formed in the region of the second substrate (200) that overlaps with the dielectric layer (602) of the capacitor (600) in the first direction (z-axis direction), but this is not necessarily limited thereto, and the second substrate (200) may not have a hole formed in the region facing the dielectric layer (602) of the capacitor (600).

[0103] An open area where the PSR (800) is not applied may be formed on the substrate unit, and solder (S) for fixing the capacitor (600) may be placed in the open area where the PSR (800) is not applied. That is, the placement area and thickness of the solder (S) may be determined according to the size of the area where the PSR (800) is not applied on the substrate unit. The PSR (800) can prevent the solder (S) from overflowing or spreading.

[0104] The open area (d1) where the PSR (800) is not applied on the third surface (203) of the second substrate (200) shown in FIG. 8 may be smaller than the open area (d2) where the PSR (800) is not applied on the third surface (203) of the second substrate (200) shown in FIG. 9. At this time, the thickness (h1) of the solder (S) in the first direction (z-axis direction) shown in FIG. 8 may be larger than the thickness (h2) of the solder (S) in the first direction (z-axis direction) shown in FIG. 9. That is, when the solder (S) is applied in a constant amount, the larger the size of the open area (d1) where the PSR (800) is not applied, the smaller the thickness of the solder (S) applied.

[0105] For example, in the first direction (z-axis direction) shown in FIG. 8, the thickness (h1) of the solder (S) may be about 2 / 5 to about 2 / 4 of the thickness (i) of the capacitor (600). In the first direction (z-axis direction) shown in FIG. 9, the thickness (h2) of the solder (S) may be about 1 / 5 to about 1 / 4 of the thickness (i) of the capacitor (600).

[0106] In FIGS. 8 and 9, the size of the open area (c) where the PSR (800) is not applied on the second surface (202) of the second substrate (200) is shown as not being deformed, but it is obvious that it can be varied depending on the amount of solder (S) applied and the thickness of the solder (S).

[0107] If the thickness of the solder (S) in the first direction (z-axis direction) is formed to be more than half the thickness (i) of the capacitor (600), there is a problem that the vibration of the capacitor (600) increases due to increased stress. Therefore, the thickness of the solder (S) can be optimized and the PSR performance improved by appropriately designing the size of the open area where the PSR (800) is not applied on the second surface (202) and the third surface (203) of the second substrate (200).

[0108] The size of the open area where the PSR (800) is not applied on the second surface (202) and third surface (203) of the second substrate (200) can be adjusted according to the guide pad formed on the second substrate (200) so that the external electrodes (601, 603) are placed on the second substrate (200). The size of the open area where the PSR (800) is not applied on the second surface (202) and third surface (203) of the second substrate (200) can be reduced to about 30% or less of the guide pad.

[0109] For example, in the second direction (x-axis direction) shown in FIG. 8, the length (c) of the second surface (202) and the length (d1) of the third surface (203), each may be about 15% to about 30% of the length (f) of the external electrode (603) of the capacitor (600). In the second direction (x-axis direction) shown in FIG. 9, the length (c) of the second surface (202) and the length (d2) of the third surface (203), each may be about 15% to about 60% of the length (f) of the external electrode (603) of the capacitor (600).

[0110]

[0111] Referring to FIG. 10 and FIG. 11, a second substrate (200) of a MEMS microphone according to another embodiment of the present invention includes a cavity (210) that exposes a first pad (110) formed on a first substrate (100), and a first external electrode (601) and a second external electrode (603) of a capacitor (600) may be disposed on the first pad (110).

[0112] The first pad (110) may include a first capacitor pad (115a) on which a first external electrode (601) is disposed and a second capacitor pad (115b) on which a second external electrode (603) is disposed. The first external electrode (601) and the second external electrode (603) of the capacitor (600) may be soldered onto the first capacitor pad (115a) and the second capacitor pad (115b), respectively. The first capacitor pad (115a) and the second capacitor pad (115b) may be spaced apart from each other. The first capacitor pad (115a) and the second capacitor pad (115b) may be plated with copper (Cu) or gold (Au), which are conductive materials.

[0113] For example, a first type capacitor of relatively large size may be difficult to place within the cavity (210) because the cavity (210) area is limited, but a second type capacitor of relatively small size may be placed in the first capacitor pad (115a) and the second capacitor pad (115b) exposed by the cavity (210).

[0114] The first type of capacitor has a larger size and guide pad size than the second type of capacitor, which leads to more severe noise generation. Additionally, when the relatively smaller second type of capacitor is used, the back volume of the MEMS microphone increases, resulting in a higher degree of noise improvement.

[0115]

[0116] Referring to FIGS. 12 to 16, a second substrate (200) of a MEMS microphone according to another embodiment of the present invention may include a first region (220) spaced apart from the inner surface of a cavity (210).

[0117] When a capacitor (600) is mounted on a first pad (110) of a first substrate (100) using SMT, the first pad (110) may be made of a conductive material such as copper (Cu). In contrast, when a capacitor (600) is placed on a second substrate (200), since the second substrate (200), which is a metal plate, can only be applied as a single electrode, a structure is required to separately form a power (VDD) electrode and a ground (GND) electrode. A MEMS microphone according to another embodiment of the present invention can separately implement a power (VDD) electrode and a ground (GND) electrode by forming a first region (220) within a cavity (210).

[0118] The first region (220) of the second substrate (200) can serve as a power (VDD) electrode. The region excluding the first region (220) of the second substrate (200) can serve as a ground (GND) electrode. A power (VDD) electrode is formed on the first substrate (100) on which the first region (220) of the second substrate (200) is placed, and the first region (220) of the second substrate (200) can serve as a power (VDD) electrode because it is electrically connected to the power (VDD) electrode formed on the first substrate (100) through a conductive adhesive layer (700).

[0119] According to a variation, a power (VDD) pad may be formed on a different area of ​​the first substrate (100) that does not come into contact with the first area (220) of the second substrate (200). The first area (220) of the second substrate (200) may be connected by a line to the power (VDD) pad on the first substrate (100). Alternatively, the first area (220) of the second substrate (200) may be connected by a via to the power (VDD) pad formed on the first substrate (100).

[0120] Referring to FIG. 12, the first region (220) of the second substrate (200) is connected to the inner surface of the cavity (210) through a bridge (221). Then, referring to FIG. 13, the bridge (221) is cut by laser processing to create a structure in which the inner surface of the cavity (210) of the second substrate (200) and the first region (220) are separated. First, the first substrate (100) and the second substrate (200) are joined through an adhesive layer (700), and the bridge (221) is cut by laser processing.

[0121] At this time, the adhesive layer (700) or the first substrate (100) may be penetrated by the laser processing process to form a groove or hole. If a hole is formed in the MEMS microphone, a path for sound pressure or air leakage is formed, which may result in performance degradation. Therefore, after laser processing, a PSR (800) may be additionally applied to the area where the bridge (221) was cut to cover the groove or hole. The PSR (800) may be placed on the area where the bridge (221) was cut on the first substrate (100). The PSR (800) may be placed on the area where the bridge (221) was placed and then removed on the first substrate (100).

[0122] At least a portion of the capacitor (600) may be disposed on a first region (220) of the second substrate (200). A first external electrode (601) of the capacitor (600) may be disposed in an area adjacent to a cavity (210) on the second substrate (200), and a second external electrode (603) may be disposed on the first region (220) of the second substrate (200). The first region (220) of the second substrate (200) may include a first plating region. The second external electrode (603) of the capacitor (600) may be soldered to a first plating region formed in the first region (220). The first external electrode (601) of the capacitor (600) may be soldered to a second plating region formed in the second substrate (200).

[0123] The dielectric layer (602) of the capacitor (600) may be positioned to face the first substrate (100). A gap (g2) may be formed between the dielectric layer (602) of the capacitor (600) and the first substrate (100). The distance (a2) between the dielectric layer (602) of the capacitor (600) and the first substrate (100) in the first direction (z-axis direction) may be approximately 10 µm to approximately 30 µm. Through this, the dielectric layer (602) of the capacitor (600) is positioned to float on the first substrate (100), thereby minimizing the physical effect of vibration being transmitted to the second substrate (200) even if a bias power source is applied to the capacitor (600) and vibration occurs.

[0124] A PSR (800) may be disposed on a first substrate (100) facing the dielectric layer (602) of the capacitor (600). A PSR (800) may be disposed on one side of the area surrounding the second plating region (30) on the second substrate (200). The PSR (800) can prevent the solder (S) disposed in the second plating region (30) from overflowing into an area other than the second plating region (30).

[0125] The second substrate (200) may include a half-etched area (205) connected to the second plating area (30). The second plating area (30) and the half-etched area (205) may form a step. Through this, the half-etched area (205) on the second substrate (200) can guide the area where solder (S) is placed or the area where PSR (800) is applied, and can improve the performance of PSR (Power Supply Rejection) by reducing the back volume of the MEMS microphone.

[0126]

[0127] Those skilled in the art related to the embodiments described above will understand that they may be implemented in modified forms without departing from the essential characteristics of the description. Therefore, the disclosed methods should be considered in an illustrative rather than a restrictive sense. The scope of the invention is defined by the claims, not by the foregoing description, and all variations within the scope of equivalence should be interpreted as being included in the invention.

Claims

1. First substrate; A second substrate disposed on the first substrate; An adhesive layer disposed between the first substrate and the second substrate; A MEMS structure disposed on the second substrate; and It includes a capacitor spaced apart from the above MEMS structure, and The capacitor comprises a first external electrode and a second external electrode disposed at both ends, and a dielectric layer disposed between the first external electrode and the second external electrode. The first external electrode and the second external electrode of the capacitor are soldered to a plating area formed on the second substrate.

2. In Paragraph 1, The second substrate includes a region that is connected to the first surface where the plating region is formed and is subjected to half-etching treatment, and A MEMS microphone in which the first surface and the half-etched area form a step.

3. In Paragraph 2, A MEMS microphone having a PSR (Photo Solder Resist) placed on the area subjected to the above-mentioned half-etching process.

4. In Paragraph 2, The first substrate, the adhesive layer, and the second substrate are laminated in a first direction, and A MEMS microphone in which the region subjected to the half-etching process and the dielectric layer are spaced apart from each other in the first direction.

5. In Paragraph 4, A MEMS microphone in which the distance between the region subjected to the half-etching treatment in the first direction and the dielectric layer is 10 µm to 30 µm.

6. In Paragraph 1, A MEMS microphone in which the thickness of the solder disposed in the area where the half-etching process is performed in the first direction is 2 / 5 to 2 / 4 of the thickness of the capacitor.

7. First substrate; A second substrate disposed on the first substrate; An adhesive layer disposed between the first substrate and the second substrate; A MEMS structure disposed on the second substrate; and It includes a capacitor spaced apart from the above MEMS structure, and The capacitor comprises a first external electrode and a second external electrode disposed at both ends, and a dielectric layer disposed between the first external electrode and the second external electrode. The second substrate includes a cavity that exposes a first pad formed on the first substrate, and A MEMS microphone in which the first external electrode and the second external electrode of the capacitor are disposed on the first pad.

8. First substrate; A second substrate disposed on the first substrate; An adhesive layer disposed between the first substrate and the second substrate; A MEMS structure disposed on the second substrate; and It includes a capacitor spaced apart from the above MEMS structure, and The second substrate includes a cavity that exposes a first pad formed on the first substrate and a first region spaced apart from the inner surface of the cavity. A MEMS microphone in which at least a portion of the capacitor is disposed on the first region of the second substrate.

9. In Paragraph 8, The bridge connecting the first region and the inner surface of the cavity is cut, and A MEMS microphone in which a PSR is disposed in a bridge-cut area on the first substrate.

10. In Paragraph 8, The capacitor comprises a first external electrode and a second external electrode disposed at both ends, and a dielectric layer disposed between the first external electrode and the second external electrode. The first external electrode of the capacitor is a MEMS microphone disposed on the first region of the second substrate.

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