Apparatuses and methods for redundancy information for memory with multiple storage modes

WO2026128569A1PCT designated stage Publication Date: 2026-06-18MICRON TECHNOLOGY INC

Patent Information

Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
MICRON TECHNOLOGY INC
Filing Date
2025-12-10
Publication Date
2026-06-18

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    Figure US2025058937_18062026_PF_FP_ABST
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Abstract

A memory device may have multiple storage modes. The memory array may be arranged differently for the storage modes. For the storage modes, the memory device may store information to correctly map logical addresses to physical memory locations that have been repaired. In some examples, additional fuses storing addresses for the storage modes are included. In some examples, additional fuses encoding address shift information are included. In some examples, a mode register write may initiate a broadcast operation to provide mapping information for the different storage modes. In some examples, the memory device may include additional logic circuits for shifting the addresses for the different storage modes.
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