Display device and electronic apparatus

Abstract

[Problem] To improve the quality of an image. [Solution] This display device is a pixel circuit that drives a light-emitting element, and comprises first to third transistors, a control transistor, a drive transistor, and first and second capacitors. A first end of the drive transistor is connected to a power supply line. A first end of the control transistor is connected to a second end of the drive transistor, and a second end of the control transistor is connected to the light-emitting element. A first end of the first transistor is connected to a signal line. A first end of the first capacitor is connected to a second end of the first transistor, and a second end of the first capacitor is connected to a drive terminal of the drive transistor. A first end of the second transistor is connected to the second end of the first capacitor. A first end of the second capacitor is connected to the power supply line, and a second end of the second capacitor is connected to the drive terminal of the drive transistor. A first end of the third transistor is connected to the second end of the drive transistor, and a second end of the third transistor is connected to the drive terminal of the drive transistor.

Description

Display device and electronic device

[0007] ,

[0001] The present disclosure relates to a display device and an electronic device.

[0002] Elements such as Light Emitting Diode (LED) and Organic electro - luminescence element (organic EL element) are used as light - emitting elements for displaying images and videos in a display device. This light - emitting element constitutes a pixel together with a circuit for driving it, and emits light with appropriate luminance by controlling this pixel.

[0003] Transistors for driving the light - emitting element are provided in each pixel, but their characteristics are not constant. Variations in the characteristics of these transistors, particularly variations in the threshold voltage, may cause variations in the light emission of the light - emitting element even when the same luminance value is input.

[0004] The light - emitting device corrects the characteristics of this driving transistor in order to suppress variations in light emission, and then causes the light - emitting element to emit light. However, the correction for this threshold value is affected by the influence of the parasitic capacitance added to the gate of the driving transistor due to the bootstrap operation during light emission and the influence of the substrate bias effect. Therefore, even if it is appropriately corrected, variations in light emission may occur for each pixel due to these causes.

[0005] On the other hand, circuits for not degrading the image quality have been studied, but they require complex constant design, and there are problems such as not being able to freely set the capacitance coupling ratio for input signal writing due to the constraints of this constant design. As a result, it is impossible to cope with the high - efficiency improvement of the light - emitting element, and it is difficult to maintain gradation accuracy.

[0006] Japanese Patent Application Laid - Open No. 2002 - 514320

[0007] Therefore, one of the non-limiting problems that the embodiments of this disclosure aim to solve is to improve image quality. The problems that the embodiments of this disclosure aim to solve may, in some more limited examples, be problems corresponding to the effects described in the embodiments. That is, any problem corresponding to at least one of the effects described in the description of the embodiments of this disclosure may be a problem that the embodiments of this disclosure aim to solve.

[0008] According to one embodiment, the display device includes a pixel circuit. The pixel circuit is a circuit for driving a light-emitting element and includes a first transistor, a second transistor, a third transistor, a control transistor, a drive transistor, a first capacitor, and a second capacitor. The first end of the drive transistor is connected to a power line. The first end of the control transistor is connected to the second end of the drive transistor, and the second end is connected to the light-emitting element. The first end of the first transistor is connected to a signal line. The first end of the first capacitor is connected to the second end of the first transistor, and the second end is connected to the drive terminal of the drive transistor. The first end of the second transistor is connected to the second end of the first capacitor. The first end of the second capacitor is connected to the power line, and the second end is connected to the drive terminal of the drive transistor. The first end of the third transistor is connected to the second end of the drive transistor, and the second end is connected to the drive terminal of the drive transistor.

[0009] The second transistor may have its second terminal connected to the second terminal of the first transistor.

[0010] In the pixel circuit, the first transistor, the second transistor, and the third transistor may be turned on and the control transistor may be turned off at the initialization timing.

[0011] In the above, the potential of the signal line may be set to an initialization potential, in which case current flows through a path including the power line, from the first terminal to the second terminal of the drive transistor, from the first terminal to the second terminal of the third transistor, from the first terminal to the second terminal of the second transistor, and from the second terminal to the first terminal of the first transistor.

[0012] In the pixel circuit, the first transistor and the third transistor may be turned on, and the second transistor and the control transistor may be turned off, at the timing of correcting the voltage of the node to which the drive terminal of the drive transistor is connected.

[0013] In the above, the potential of the signal line may be set to the initialization potential.

[0014] The second transistor may have its second terminal connected to the drive terminal of the first transistor or the drive terminal of the third transistor.

[0015] The pixel circuit may have the first transistor, the second transistor, and the third transistor turned on and the control transistor turned off at the initialization timing. The display device as described in (5).

[0016] In the above, the potential of the signal line and the potential of the control line connected to the second terminal of the second transistor may be set to an initialization potential. In this state, current flows through a path including the power line, from the first terminal to the second terminal of the drive transistor, from the first terminal to the second terminal of the third transistor, and from the first terminal to the second terminal of the second transistor.

[0017] The pixel circuit may have the first transistor and the third transistor turned on, and the second transistor and the control transistor turned off, at the voltage correction timing of the node to which the drive terminal of the drive transistor is connected.

[0018] In the above, the potential of the signal line may be set to the initialization potential.

[0019] The control transistor and the drive transistor may be p-type transistors.

[0020] The first transistor, the second transistor, and the third transistor may be n-type transistors.

[0021] The first transistor, the second transistor, and the third transistor may be formed using an oxide semiconductor.

[0022] The first transistor, the second transistor, and the third transistor may be p-type transistors.

[0023] According to one embodiment, the electronic device includes a display unit. The display unit has a pixel circuit. The pixel circuit is a circuit for driving a light-emitting element and includes a first transistor, a second transistor, a third transistor, a control transistor, a drive transistor, a first capacitor, and a second capacitor. The first end of the drive transistor is connected to a power line. The first end of the control transistor is connected to the second end of the drive transistor, and the second end is connected to the light-emitting element. The first end of the first transistor is connected to a signal line. The first end of the first capacitor is connected to the second end of the first transistor, and the second end is connected to the drive terminal of the drive transistor. The first end of the second transistor is connected to the second end of the first capacitor. The first end of the second capacitor is connected to the power line, and the second end is connected to the drive terminal of the drive transistor. The third transistor has its first end connected to the second end of the drive transistor, and its second end connected to the drive terminal of the drive transistor.

[0024] According to one embodiment, the display device includes a pixel circuit. The pixel circuit is a circuit for driving a light-emitting element and includes a first transistor, a second transistor, a control transistor, a drive transistor, a first capacitor, a second capacitor, and a third capacitor. The first end of the drive transistor is connected to a power line. The first end of the control transistor is connected to the second end of the drive transistor, and the second end is connected to the light-emitting element. The first end of the first transistor is connected to a signal line. The first end of the first capacitor is connected to the second end of the first transistor, and the second end is connected to the drive terminal of the drive transistor. The first end of the second transistor is connected to the second end of the first capacitor. The first end of the second capacitor is connected to a power line, and the second end is connected to the drive terminal of the drive transistor. The first end of the third capacitor is connected to the second end of the second transistor, and the second end is connected to the second end of the drive transistor.

[0025] In the pixel circuit, the first transistor and the second transistor may be turned on, and the control transistor and the control transistor may be turned off at the initialization timing.

[0026] In the above configuration, the signal line may be set to an initialization potential, and the potential of the second terminal of the third capacitor may be set to a potential that is in motion with the power line. In this configuration, current flows through a path including the power line, the first terminal to the second terminal of the drive transistor, and the third capacitor.

[0027] In the pixel circuit, the first transistor and the second transistor may be turned on and the control transistor may be turned off at the voltage correction timing of the node to which the drive terminal of the drive transistor is connected.

[0028] In the above, the potential of the signal line may be set to the initialization potential, and the potential of the second terminal of the third capacitor may be set to the reference potential.

[0029] A block diagram schematically showing an example of a part of a display device according to one embodiment. A circuit diagram showing an example of a pixel circuit according to one embodiment. A diagram showing an example of a timing chart for a pixel circuit according to one embodiment. A diagram showing an example of transistor switching according to one embodiment. A diagram showing an example of transistor switching according to one embodiment. A diagram showing an example of transistor switching according to one embodiment. A diagram showing an example of transistor switching according to one embodiment. A diagram showing an example of transistor switching according to one embodiment. A diagram showing an example of the layout of a pixel circuit according to one embodiment. A diagram showing an example of a cross-section of a part of a pixel circuit according to one embodiment. A diagram showing an example of a cross-section of a part of a pixel circuit according to one embodiment. A circuit diagram showing an example of a pixel circuit according to one embodiment. A diagram schematically showing an example of the configuration of a semiconductor substrate of a light-emitting device according to one embodiment. A circuit diagram showing an example of a pixel circuit according to one embodiment. A diagram showing an example of a timing chart for a pixel circuit according to one embodiment. A circuit diagram showing an example of a pixel circuit according to one embodiment. A circuit diagram showing an example of a pixel circuit according to one embodiment. A diagram showing an example of a timing chart for a pixel circuit according to one embodiment. An external view of a head-mounted display, which is an electronic device as an example of an application. An external view of smart glasses, which is an electronic device as an example of an application. A front view of a digital camera, which is an electronic device as an example of an application. A rear view of a digital camera, which is an electronic device as an example of an application. An external view of a television device, which is an electronic device as an example of an application. An external view of a smartphone, an electronic device as an example of its application. A diagram showing the interior of a vehicle containing an electronic device, from the rear to the front, as an example of its application. A diagram showing the interior of a vehicle containing an electronic device, from the diagonal rear to the diagonal front, as an example of its application.

[0030] The embodiments of this disclosure will now be described with reference to the drawings. The drawings are for illustrative purposes only, and the shape, size, or size ratio of each component in the actual device does not need to be exactly as shown in the drawings. Furthermore, the drawings are simplified, so any other components necessary for implementation should be appropriately provided in addition to those shown in the drawings.

[0031] In this disclosure, the expressions "turning on" and "turning off" a transistor or switch may be used. However, it should be noted that these expressions are not limited to changing from an off state to an on state and from an on state to an off state, respectively, but can be interpreted, depending on the context, as "maintaining an on state" and "maintaining an off state," respectively.

[0032] This disclosure will be described in the following order: 1. Outline of the display device 2. Example of pixel circuit configuration 3. Example of pixel circuit layout 4. Other example of pixel circuit configuration 5. Example of application to electronic equipment

[0033] <1. Display device>

[0034] Figure 1 is a schematic block diagram showing an example of a part of a display device according to one embodiment. The display device 1 comprises a pixel array 10, a control circuit 12, a first drive circuit 14, and a second drive circuit 16. The display device 1 is a device that displays images, videos, etc. (hereinafter referred to as "images, etc.") in at least a part of the area of ​​the pixel array 10. The display device 1 may be incorporated into a part of an electronic device.

[0035] The pixel array 10 is a region in which pixels 100 are arranged in a two-dimensional array along a first direction and a second direction intersecting the first direction. The first direction may be, for example, a line direction. The second direction may be, for example, a column direction.

[0036] Each pixel 100 comprises a light-emitting element and a pixel circuit. By emitting light from the light-emitting element in response to a signal supplied to the pixel circuit, it operates as a unit for displaying images and the like in the pixel array 10. Each pixel 100 emits light with a brightness based on the input image information, thereby enabling the display of images and the like in the pixel array 10.

[0037] The light-emitting element may be an organic light-emitting element (including OLED), an inorganic light-emitting element, another LED element, an LD (laser diode) element, or any other element that emits light spontaneously.

[0038] The first and second directions are provided for illustrative purposes only, and the forms of this disclosure are not limited to these directions.

[0039] Each individual pixel 100 can also emit light of the appropriate color. By combining the emission intensity of each color in each pixel 100 with the emission of the same or different colors from surrounding pixels 100, various colors of light can be emitted. As a result, the display device 1 can display a color image or the like in the pixel array 10.

[0040] Pixel 100 may be formed to emit light of one of the following colors, for example: blue, green, or red. Pixels 100 that emit light of each color may be arranged to emit light of various colors, for example, in a Bayer array. The selection of colors to emit light, the number of colors, and the arrangement of each color are not limited to those described above; other color combinations and arrangements are also possible.

[0041] Alternatively, each of the 100 pixels may be provided with a segmented pixel, and each pixel 100 itself may emit light of various colors and brightness levels. In this case, the color combinations and color arrangements in each individual pixel 100 are not limited, and any configuration that can appropriately emit various colors is acceptable.

[0042] The pixel array 10 may form a display area using all of the pixels 100 it has arranged, or it may form a display area using pixels 100 that belong to a predetermined area among the pixels 100 it has arranged. Pixels 100 located near the outer edge of the pixel array 10 may be, for example, dummy pixels. In this case, the display area where an image or the like is displayed in the pixel 100 can be formed using the pixels 100 excluding these dummy pixels.

[0043] The control circuit 12 is a circuit that appropriately processes the input image information, appropriately distributes it to the pixels 100 belonging to the pixel array 10, and controls the light emission and extinction of the light-emitting elements in these pixels 100. The control circuit 12 can control the light emission and extinction, for example, by outputting appropriate drive signals to the first drive circuit 14 and the second drive circuit 16. Further, the control circuit 12 can also perform control for initializing the pixels 100.

[0044] The first drive circuit 14 selects lines in the pixel array 10 and outputs signals for driving the light-emitting elements for each line. The first drive circuit 14 outputs control signals to the pixels 100 belonging to each line of the pixel array 10 via the signal lines 140.

[0045] The first drive circuit 14 outputs, for example, a control signal via the signal lines 140 so that the pixels 100 belonging to one or more selected lines are in a drivable state. Further, the first drive circuit 14 can also output, for example, a control signal for initializing the pixels 100 belonging to one or more selected lines via the signal lines 140.

[0046] The second drive circuit 16 selects columns in the pixel array 10 and outputs a signal including information such as the light emission intensity of the light-emitting elements for each pixel 100 in the lines selected by the first drive circuit 14 for each column. The second drive circuit 16 outputs control signals to the pixels 100 belonging to each column of the pixel array 10 via the signal lines 160.

[0047] The second drive circuit 16 can output, for example, a signal indicating the luminance value for the pixels belonging to the lines selected by the first drive circuit 14 via the signal lines 160.

[0048] That is, based on data such as an image input to the control circuit 12 via an appropriate interface, the control circuit 12 controls the pixel 100 to emit light and extinguish at an appropriate luminance and at an appropriate timing via the first driving circuit 14 and the second driving circuit 16, thereby displaying the input image or the like. Further, the control circuit 12 can perform control for initializing each pixel 100 at an appropriate timing.

[0049] In FIG. 1, the first driving circuit 14 is provided on the left side facing the drawing and the control circuit 12 is provided on the upper side facing the drawing, but it is not limited thereto. For example, the first driving circuit 14 may be provided on both the left and right sides of the drawing, or may be provided on the right side. For example, the control circuit 12 may be provided on both the upper and lower sides of the drawing, or may be provided on the lower side.

[0050] <2. Configuration Example of Pixel Circuit>

[0051] (First Embodiment)

[0052] FIG. 2 is a circuit diagram schematically showing an example of a circuit of a pixel 100 according to an embodiment. The pixel 100 includes, for example, a first transistor T1, a second transistor T2, a third transistor T3, a first capacitor C1, a second capacitor C2, a driving transistor Tdr, a control transistor Tds, and a light emitting element L. The control lines VWS, VDS, AZSL1, and AZSL2 are each, for example, one of the signal lines 140, and a control signal is applied from the first driving circuit 14. The signal line VSL is, for example, one of the signal lines 160, and a luminance signal is applied from the second driving circuit 16.

[0053] In Figure 1, only one first drive circuit 14 is shown, but it may also include scanning circuits that output control signals to each of the control lines VWS, VDS, AZSL1, and AZSL2. In other words, these scanning circuits can be collectively referred to as the first drive circuit 14. Each scanning circuit outputs a signal to the corresponding control line for each line, for example.

[0054] The first transistor T1 is a transistor that transfers the brightness signal (intensity signal) output from the second drive circuit 16 into the inside of the pixel 100. For example, the first terminal of the first transistor T1 is connected to the signal line VSL, the second terminal is connected to the first terminal of the first capacitor C1 and the second terminal of the second transistor T2, and the gate is connected to the control line VWS. The first transistor T1 is turned on / off by a control signal applied to the control line VWS, and when it is on, it transfers the signal applied to the signal line VSL from the first terminal to the second terminal.

[0055] As an example that is not limited, the first transistor T1 may be a p-type transistor (including a Metal-Oxide Semiconductor Field-Effect Transistor: MOSFET), in which case the first terminal may be the source and the second terminal may be the drain.

[0056] The first capacitor C1 has its first terminal connected to the second terminal of the first transistor T1 and the second terminal of the second transistor T2, and its second terminal connected to the second terminal of the second capacitor C2, the first terminal of the second transistor T2, the second terminal of the third transistor T3 and the drive terminal (gate) of the drive transistor Tdr. The first capacitor C1 acts as a capacitor to define the gate potential of the drive transistor Tdr.

[0057] The second transistor T2 has its first terminal connected to the second terminal of the third transistor T3, the second terminal of the first capacitor C1, the second terminal of the second capacitor C2, and the gate of the drive transistor Tdr, its second terminal connected to the second terminal of the first transistor T1 and the first terminal of the first capacitor C1, and its gate connected to the control line AZSL2. The second transistor T2 is turned on / off by a control signal applied to the control line AZSL2, and when it is on, it short-circuits the first and second terminals of the first capacitor C1.

[0058] As an example that is not limited, the second transistor T2 may be a p-type transistor (including a MOSFET), in which case the first terminal may be the source and the second terminal may be the drain.

[0059] The second capacitor C2 has its first end connected to the power line VCC, and its second end connected to the second end of the first capacitor C1, the first end of the second transistor T2, the second end of the third transistor T3, and the gate of the drive transistor Tdr. Together with the first capacitor C1, the second capacitor C2 acts as a capacitor to define the potential of the gate of the drive transistor Tdr. The power supply voltage Vcc is applied to the power line VCC.

[0060] The third transistor T3 has its first terminal connected to the second terminal of the drive transistor Tdr and the first terminal of the control transistor Tds, its second terminal connected to the second terminal of the first capacitor C1, the second terminal of the second capacitor C2, the first terminal of the second transistor T2 and the gate of the drive transistor Tdr, and its gate connected to the control line AZSL1. The third transistor T3 is turned on / off by a control signal applied to the control line AZSL1, and when it is on, it short-circuits the second terminal of the drive transistor Tdr and the gate of the drive transistor Tdr.

[0061] As an example that is not limited, the third transistor T3 may be a p-type transistor (including a MOSFET), in which case the first terminal may be the source and the second terminal may be the drain.

[0062] The drive transistor Tdr has its first end connected to the power line VCC, its second end connected to the first end of the control transistor Tds and the first end of the third transistor T3, and its gate connected to the second end of the first capacitor C1, the second end of the second capacitor C2, the first end of the second transistor T2, and the second end of the third transistor T3. The drive transistor Tdr flows current from the first end to the second end based on the signal applied to its gate.

[0063] As an example that is not limited, the driving transistor Tdr may be a p-type transistor (including a MOSFET), in which case the first terminal may be the source and the second terminal may be the drain.

[0064] The control transistor Tds has its first end connected to the second end of the drive transistor Tdr and the first end of the third transistor T3, its second end connected to the light-emitting element L (for example, the anode of the light-emitting element L), and its gate connected to the control line VDS. The control transistor Tds is turned on / off by a control signal applied to the control line VDS, and in the on state (and when the first transistor T1, the second transistor T2, and the third transistor T3 are off), it directs the current output by the drive transistor Tdr (including the current based on this current) to the anode of the light-emitting element L.

[0065] As an example that is not limited, the control transistor Tds may be a p-type transistor (including a MOSFET), in which case the first terminal may be the source and the second terminal may be the drain.

[0066] As described above, the light-emitting element L is, for example, an LED. The anode of the light-emitting element L is connected to the second terminal of the control transistor Tds, and the cathode is connected to the power line VCATH. The power line VCATH applies a cathode voltage Vcath so that the light-emitting element L can emit light properly. The light-emitting element L emits light at the appropriate intensity when the control transistor Tds is turned on while the drive transistor Tdr is supplying current based on the brightness signal.

[0067] Figure 3 shows an example of a timing chart for the pixel circuit shown in Figure 2 according to one embodiment. From top to bottom, the chart shows the control signals applied to control line VWS, control line AZSL1, control line AZSL2, and control line VDS, the signal applied to signal line VSL, and the potentials of nodes S and G (source and gate of drive transistor Tdr) shown in Figure 2. In the circuit diagram used for explanation, dashed lines indicate paths that are not electrically connected due to the switch being in the off state.

[0068] The leftmost figure shows the light emission period of the previous frame. Figure 4 is a diagram showing the state of the transistors during the light emission period according to one embodiment. During the light emission period, the control transistor Tds is turned on, and the first transistor T1, the second transistor T2, and the third transistor T3 are turned off, causing a current according to the gate potential of the drive transistor Tdr to flow from the power line VCC to the light-emitting element L, and the light-emitting element L emits light based on the gate potential of the drive transistor Tdr.

[0069] When the light emission period ends, pixel 100 is quenched. Figure 5 shows the state of the transistors during the quenching period according to one embodiment. During the quenching period, the first transistor T1, the second transistor T2, the third transistor T3, and the control transistor Tds are turned off. When the control transistor Tds is turned off, the drain current of the drive transistor Tdr does not flow to the light-emitting element L, and the light-emitting element L transitions to the quenched state.

[0070] Next, the control circuit 12 initializes the pixel 100. Figure 6 shows the state of the transistors during the initialization period according to one embodiment. During the initialization period, the first transistor T1, the second transistor T2, and the third transistor T3 are turned on, and the control transistor Tds is turned off. With the control transistor Tds turned off, the extinguishing state of the light-emitting element L continues, and during this time the gate and drain potentials of the drive transistor Tdr are initialized.

[0071] During this period, current flows from the power line VCC to the signal line VSL through the paths from the first to the second terminal of the drive transistor Tdr, from the first to the second terminal of the third transistor T3, from the first to the second terminal of the second transistor T2, and from the first to the second terminal of the first transistor T1. Since the gate of the drive transistor Tdr is between the second terminal of the third transistor T3 and the first terminal of the second transistor T2, the carriers accumulated at this node are also initialized by the same current path. In this state, an initialization voltage Vini is applied to the signal line VSL, and this initialization voltage Vini initializes each of the connected nodes.

[0072] As shown in Figure 3, during this initialization period, the gate potential of the drive transistor Tdr is initialized to the initial overvoltage Vini.

[0073] After initialization is complete, the control circuit 12 transitions to the Vth correction period of the drive transistor Tdr. Figure 7 shows the state of the transistors during the Vth correction period according to one embodiment. During the Vth correction period, the first transistor T1 and the third transistor T3 are turned on, and the second transistor T2 and the control transistor Tds are turned off. When the third transistor T3 is turned on, a path is formed from the power line VCC to the gate of the drive transistor Tdr.

[0074] In other words, the drain current flows through the drive transistor Tdr until the gate-source voltage of the drive transistor Tdr reaches the threshold voltage Vth, at which point the drive transistor Tdr turns off. This gate potential is maintained by the second capacitor C2. Meanwhile, carriers corresponding to this threshold voltage Vth are accumulated at the first end of the first capacitor C1 from the signal line VSL via the first transistor T1.

[0075] In this state, the control circuit 12 writes a brightness signal to the pixels 100. Figure 8 shows the state of the transistors during the writing period according to one embodiment. During the writing period, the first transistor T1 is turned on, and the second transistor T2, the third transistor T3, and the control transistor Tds are turned off. When no carriers move to the gate node of the drive transistor Tdr, a brightness signal for each pixel 100 is applied to the signal line VSL from the second drive circuit 16.

[0076] The luminance signal applied to the signal line VSL is applied to the first terminal of the first capacitor C1 via the first transistor T1. As a result, the potential difference between the voltage Vcc (indicated by the arrow in Figure 3) minus the threshold voltage Vth and the gate of the drive transistor Tdr is expressed as follows, depending on the coupling capacitance of the first capacitor C1 and the second capacitor C2. Here, the voltage Vcc is the voltage applied from the power supply line VCC.

[0077] As a result, during the writing period, the gate-source voltage Vgs of the drive transistor Tdr can be expressed as follows:

[0078] Then, as shown in Figure 4, pixel 100, which has transitioned to the light-emitting period, emits light by allowing the drain current of the drive transistor Tdr to flow to the light-emitting element L via the control transistor Tds. The drain current of a transistor is generally expressed by the following equation. Here, μ is the carrier mobility, W is the channel width, L is the channel length, and Cox is the gate oxide capacitance per unit area. Substituting equation (2) into Vgs in equation (3), the drain current of the drive transistor Tdr, i.e., the light-emitting current of the light-emitting element L, can be expressed as follows.

[0079] In this way, the influence of the threshold voltage Vth on the light-emitting current of the light-emitting element L can be eliminated. As a result, the circuit configuration shown in Figure 2 makes it possible to achieve light emission that compensates for variations in Vth.

[0080] Furthermore, the potential of the signal line VSL is transitioned to the initialization potential during the light emission period. Alternatively, the potential of the signal line VSL may transition to the initialization potential during the quenching period. This is also the case in the following embodiments.

[0081] As described above, according to this embodiment, the display device 1 can display high-quality images with suppressed effects of light-emitting bootstrap and substrate bias. Furthermore, by sharing the initialization power supply with another potential within the pixel, high resolution and high yield can be achieved in the layout. In addition, the amplitude of the luminance signal Vsig can be sufficiently increased by capacitive voltage division, thereby improving the accuracy of gradation.

[0082] <3. Pixel Circuit Layout Examples>

[0083] Next, we will describe an example of a pixel circuit layout. Figure 9 is an example of a layout that is not limited to the configuration shown in Figure 2. For example, it shows the transistor configuration of 100 pixels for the three primary colors, RGB.

[0084] The final r, g, and b in the component symbols indicate the components of a pixel that emits red light, a pixel that emits green light, and a pixel that emits blue light, respectively. G represents node G in Figure 2, and V represents the node between the first transistor T1 and the first capacitor C1. As shown in this figure, a simplified layout configuration can be achieved by initializing each pixel 100 using its own power supply.

[0085] Figure 10 is a cross-sectional view showing an example of the positions of capacitors and various wirings in a pixel circuit according to one embodiment. As shown in this figure, the pixel 100 may be formed with control lines, signal lines, and other wirings arranged on a transistor, and various capacitors provided on top thereof. The transistor, wiring, and capacitors are electrically connected via contacts as needed.

[0086] The arrangement examples are not limited to those shown here; other arrangements such as Figure 11 are also possible. By sharing the initialization power supply with other power supplies within pixel 100, it is possible to reduce wiring and transistors, resulting in a simpler layout as shown in these figures. This allows for higher resolution and a simpler configuration, thus increasing yield.

[0087] <4. Other examples of pixel circuit configurations>

[0088] (Second Embodiment)

[0089] Figure 12 is a circuit diagram showing an example of a pixel 100 according to one embodiment, which is not limited to this example. The pixel 100 is similar in that it comprises a first transistor T1, a second transistor T2, a third transistor T3, a control transistor Tds, a drive transistor Tdr, a first capacitor C1, and a second capacitor C2. Unlike the first embodiment described above, the pixel 100 can be configured such that the first transistor T1, the second transistor T2, and the third transistor T3 are n-type transistors (including MOSFETs), as an example, which is not limited to this example.

[0090] In this case, the first terminal of the first transistor T1, the second transistor T2, and the third transistor T3 can be interpreted as the drain and the second terminal as the source. Furthermore, in Figure 3, the same operation as in the first embodiment can be achieved by inverting the voltages applied to the control lines VWS, AZSL1, and AZSL2.

[0091] Thus, some transistors can be made n-type. The transistor configuration may be appropriately selected and determined depending on the layout and other configurations.

[0092] This configuration is particularly effective, for example, when using oxide semiconductors. Figure 13 is a schematic diagram showing an example of a display device 1 having an oxide semiconductor layer, which is not limited to this configuration. The display device 1 may be configured, for example, with a first substrate 30, a second substrate 32, and a third substrate 34.

[0093] The first substrate 30 may be, for example, a layer on which a light-emitting element such as an LED and an optical system associated with the light-emitting element are formed.

[0094] The second substrate 32 may be, for example, an oxide semiconductor layer on which an oxide semiconductor is formed. n-type transistors, such as a first transistor T1, a second transistor T2, and a third transistor T3, can be formed on this second substrate 32. That is, the first transistor T1, the second transistor T2, and the third transistor T3 can be formed as transistors having an oxide semiconductor such as IGZO. Of course, the oxide semiconductor is not limited to IGZO; each transistor may be formed using a different oxide semiconductor.

[0095] The third substrate 34 may be, for example, a layer on which components other than the transistors described above and other logic circuits are formed.

[0096] Each substrate may be connected by any method. For example, an electrical connection may be formed by creating a metal joint in each layer and then applying heat while the layers are bonded together. Alternatively, each layer may be joined by via holes, microbumps, or the like.

[0097] Any joining method can be used for the joining units. For example, each layer may be stacked using any unit such as Chip on Chip (CoC), Chip on Wafer (CoW), or Wafer on Wafer (WoW).

[0098] As described above, some transistors can be formed as n-type transistors. In particular, by forming some transistors as oxide semiconductor transistors, it is possible to create a display device 1 that takes advantage of the manufacturing, structural, and operational benefits of using oxide semiconductors.

[0099] (Third embodiment)

[0100] Figure 14 is a circuit diagram showing an unspecified example of a pixel 100 according to one embodiment. The basic configuration is the same as that of the pixel 100 according to the first embodiment, however, the second terminal of the second transistor T2 may be connected to the control line AZSL1 that drives the third transistor T3 (in other words, the gate of the third transistor T3). In this configuration as well, the same operation as in the first embodiment can be achieved using the power supply within the pixel 100.

[0101] Figure 15 shows an example of a timing chart for the pixel circuit shown in Figure 14. From top to bottom, it shows the control signals applied to control line VWS, control line AZSL1, control line AZSL2, and control line VDS, the signal applied to signal line VSL, and the potentials of nodes S and G shown in Figure 14.

[0102] A voltage AZ1_L is applied as the ON voltage to the control line AZSL1 to initialize node G. By performing initialization using this voltage AZ1_L, the same operation as in the first embodiment can be achieved in the configuration shown in Figure 14. In this case, the reference value of the luminance signal may be the offset voltage Vofs.

[0103] At the initialization timing, the signal line VSL is set to Vofs, which is the reference value (initialization potential) for the brightness value, and the potential of the control line AZSL1 is set to the initialization potential AZ1_L. In this state, the first transistor T1, the second transistor T2, and the third transistor T3 are turned on, and the control transistor Tds is turned off, forming a path that allows current to flow from the power line VCC to the control line AZSL1, including the path from the first to the second end of the drive transistor Tdr, the first to the second end of the third transistor T3, and the first to the second end of the second transistor T2.

[0104] Furthermore, during the Vth correction period, the signal line VSL is set to Vofs, which is the reference value for luminance. In this state, the first transistor T1 and the third transistor T3 are turned on, and the second transistor T2 and the control transistor Tds are turned off, thereby correcting the threshold voltage Vth of the drive transistor Tdr.

[0105] At the time of completion of writing, the gate-source voltage Vgs of the drive transistor Tdr and the drain current Ids of the drive transistor Tdr during the light emission period can be expressed as follows:

[0106] As described above, this embodiment also enables the appropriate execution of Vth correction, as shown in equations (5) and (6), similar to the previously described embodiment. The voltage AZ1_L is simply a voltage at which the gate-source voltage of the drive transistor Tdr becomes greater than the threshold voltage Vth of the drive transistor Tdr during initialization, and can be a voltage equivalent to that of general auto-zero processing.

[0107] In this embodiment, the destination to which the second terminal of the second transistor T2 is connected is not limited to the control line AZSL1. Figure 16 is a circuit diagram showing a modified configuration of this embodiment. As shown in this figure, the second terminal of the second transistor T2 may be connected to the control line VWS, that is, the control line for driving the first transistor T1. In other words, the second terminal of the second transistor T2 should be connected to a power line where the gate-source voltage of the driving transistor Tdr is greater than the threshold voltage Vth at the timing of the initialization of the pixel 100.

[0108] (Fourth Embodiment)

[0109] In each of the embodiments described above, the configuration had five transistors, but the forms in this disclosure are not limited thereto. Figure 17 is a circuit diagram showing an unlimited example of a pixel 100 according to one embodiment. As shown in Figure 17, the pixel 100 may include a first transistor T1, a second transistor T2, a control transistor Tds, a drive transistor Tdr, a first capacitor C1, a second capacitor C2, and a third capacitor C3.

[0110] The first transistor T1 has its first terminal connected to the signal line VSL, its second terminal connected to the first terminal of the first capacitor C1, and its gate connected to the control line VWS.

[0111] The first capacitor C1 has its first terminal connected to the second terminal of the first transistor T1, and its second terminal connected to the gate of the drive transistor Tdr, the second terminal of the second capacitor C2, and the first terminal of the second transistor T2.

[0112] The second capacitor C2 has its first end connected to the power line VCC, and its second end connected to the gate of the drive transistor Tdr, the second end of the first capacitor C1, and the first end of the second transistor T2.

[0113] The second transistor T2 has its first terminal connected to the gate of the drive transistor Tdr, the second terminal of the first capacitor C1, and the second terminal of the second capacitor C2, and its gate connected to the control line AZSL1.

[0114] The third capacitor C3 has its first end connected to the second end of the drive transistor Tdr, the second end of the second transistor T2, and the first end of the control transistor Tds, and its second end connected to the control line AZSL2.

[0115] The control transistor Tds has its first end connected to the second end of the drive transistor Tdr, the second end of the second transistor T2, and the first end of the third capacitor C3, its second end connected to the light-emitting element L, and its gate connected to the control line VDS.

[0116] The drive transistor Tdr has its first end connected to the power line VCC, its second end connected to the first end of the control transistor Tds, the second end of the second transistor T2, and the first end of the third capacitor C3, and its gate connected to the second end of the first capacitor C1, the second end of the second capacitor C2, and the first end of the second transistor T2.

[0117] Figure 18 shows an example of a timing chart for the pixel circuit shown in Figure 17.

[0118] During the light emission period, control lines VWS and AZSL1 are set to the off voltage, and control lines AZSL2 and VDS are set to the on voltage. This control turns off the first transistor T1 and the second transistor T2, turns on the control transistor Tds, and sets the potential of the second terminal of the third capacitor C3 to the low of control line AZSL2. As a non-exclusive example, the low potential of control line AZSL2 may be the same as the cathode voltage Vcath, which is the potential of the power supply line VCATH, but other power supply voltages may also be used.

[0119] During this period, the gate-source voltage of the drive transistor Tdr is written through the above connection, and the drain current of the drive transistor Tdr, based on the gate voltage held by the first capacitor C1 and the second capacitor C2 and the drain voltage held by the third capacitor C3, flows to the light-emitting element L, causing the light-emitting element L to emit light at an appropriate intensity based on the written brightness signal.

[0120] During the extinction period, the control line VDS is set to the off potential from the above state, and the control transistor Tds is turned off. Until the write period, the signal line VSL is subjected to the initialization potential Vofs.

[0121] During the initialization period, the control line AZSL2 first transitions to high. This transition sets the potential of the second terminal of the third capacitor C3 to the high potential of the control line AZSL2. The high potential of the control line AZSL2 may be the same as the power supply voltage Vcc, which is the potential of the power supply line VCC.

[0122] Next, the control lines VWS and AZSL1 transition to the ON potential. This transition turns on the first transistor T1 and the second transistor T2, and turns off the third transistor T3 and the control transistor Tds. In this state, current flows from the power line VCC to the signal line VSL through the paths from the first terminal to the second terminal of the drive transistor Tdr, from the second terminal to the first terminal of the second transistor T2, and from the second terminal to the first terminal of the first transistor T1 via the first capacitor C1. When the second transistor T2 turns on, the second terminal of the third capacitor C3 is at the power supply voltage Vcc, so the gate potential of the drive transistor Tdr is raised to the same potential as the source potential.

[0123] During the Vth correction period, the potential of the control line AZSL2 transitions to low. This transition lowers the potential of the second terminal of the third capacitor C3 to the low potential of the control line AZSL2 (initialization potential), for example, the same potential as the cathode voltage Vcath. At this timing, the transient current lowers the potential of the gate node of the drive transistor Tdr. By setting the constants of each element so that this lowered potential is lower than Vcc - Vth, the gate node potential becomes a transient potential sufficiently small from the power supply voltage Vcc to the threshold voltage Vth, and then transitions from there to the Vcc - Vth potential.

[0124] The subsequent operations are the same as those of each of the embodiments described above.

[0125] As described above, according to this embodiment, a circuit that performs the same operation even when the number of transistors is reduced can be realized.

[0126] <5. Examples of applications for electronic equipment>

[0127] Next, we will describe some application examples of the display device / display system described in the above embodiments.

[0128] (First application example)

[0129] The display device 1 described herein is also applicable to head-mounted displays (HMDs). HMDs can be used for virtual reality (VR), augmented reality (AR), mixed reality (MR), substitutional reality (SR), etc.

[0130] Figure 19 is an external view of HMD 320, which is a first application example of the display device / system. The HMD 320 in Figure 19 has a mounting member 322 for wearing over a person's eyes. This mounting member 322 is secured, for example, by hooking onto a person's ears.

[0131] A display device 321 is located inside the HMD 320, allowing the wearer to view stereoscopic images and other content on this display device 321. The HMD 320 is equipped with features such as wireless communication and an accelerometer, and can switch the stereoscopic images and other content displayed on the display device 321 according to the wearer's posture and gestures.

[0132] Alternatively, the HMD 320 may be equipped with a camera to capture images of the wearer's surroundings, and the display device 321 may display a composite image of the camera's captured images and a computer-generated image.

[0133] For example, by placing a camera on the back side of the display device 321 that the wearer of the HMD 320 sees, and using this camera to capture images of the area around the wearer's eyes, and displaying these images on a separate display on the outer surface of the HMD 320, people around the wearer can understand the wearer's facial expressions and eye movements in real time.

[0134] (Second application example)

[0135] Various types of HMD 320 are possible. For example, as shown in Figure 20, the display device / display system according to this disclosure can also be applied to smart glasses 340 that project various information onto eyeglasses 344.

[0136] The smart glasses 340 in Figure 20 have a main body 341, an arm 342, and a lens barrel 343.

[0137] The main unit 341 is connected to the arm unit 342. The main unit 341 is detachable from the glasses 344. The main unit 341 contains a control board and display unit for controlling the operation of the smart glasses 340.

[0138] The main body 341 and the lens barrel are connected to each other via the arm 342. The lens barrel 343 emits the image light emitted from the main body 341 through the arm 342 towards the lens 345 of the glasses 344. This image light enters the human eye through the lens 345.

[0139] As shown in Figure 20, the wearer of the smart glasses 340 can see not only the surrounding environment but also various information emitted from the lens barrel 343, just like with regular glasses.

[0140] (Third application example)

[0141] The display device / display system described herein is applicable not only to various displays used in vehicles, but also to displays mounted on various electronic devices.

[0142] Figure 21A is a front view of a digital camera 310, which is a third application example of the display device / display system, and Figure 21B is a rear view of the digital camera 310. The digital camera 310 in Figures 21A and 21B shows an example of a single-lens reflex camera with an interchangeable lens 312, but it is also applicable to cameras in which the lens 312 cannot be changed.

[0143] In the cameras shown in Figures 21A and 21B, when the photographer holds the grip 313 of the camera body 311, looks through the electronic viewfinder 315 to compose the shot, adjusts the focus, and presses the shutter button, the shooting data is saved to the camera's memory.

[0144] As shown in Figure 21B, the rear of the camera is equipped with a monitor screen 314 that displays shooting data and live images, and an electronic viewfinder 315. Additionally, the top of the camera may have a sub-screen that displays setting information such as shutter speed and exposure value.

[0145] By placing the sensor on top of the back side of the monitor screen 314, electronic viewfinder 315, sub-screen, etc. used in the camera, it can be used as a display device / display system according to this disclosure.

[0146] (Fourth application example)

[0147] Figure 22 shows an example of the appearance of the television device 330. The television device 330 has a video display screen section 331 which includes a front panel 332 and a filter glass 333.

[0148] The technology described in the above embodiment can be applied to this video display screen unit 331.

[0149] (Fifth Application Example) Figure 23 shows an example of the appearance of a smartphone 350. The smartphone 350 has a display unit 351 that displays various information and an operation unit 352 that includes buttons and the like that accept user input.

[0150] The technology described in the above embodiment can be applied to this display unit 351.

[0151] (Sixth application example)

[0152] The display device / display system according to this disclosure can be used for various applications. Figures 24A and 24B show the internal configuration of a vehicle 360, which is a sixth application example of the display device / display system according to this disclosure. Figure 24A shows the interior of the vehicle 360 ​​from the rear to the front, and Figure 24B shows the interior of the vehicle 360 ​​from the diagonal rear to the diagonal front.

[0153] The vehicle 360 ​​in Figures 24A and 24B includes a center display 361, a console display 362, a head-up display 363, a digital rear mirror 364, a steering wheel display 365, and a rear entertainment display 366.

[0154] The center display 361 is located on the dashboard 367, facing the driver's seat 368 and the passenger seat 369. Figures 24A and 24B show an example of a horizontally elongated center display 361 extending from the driver's seat 368 to the passenger seat 369, but the screen size and placement of the center display 361 are arbitrary.

[0155] The center display 361 can display information detected by various sensors. Specifically, the center display 361 can display images captured by an image sensor, distance images to obstacles in front of and to the sides of the vehicle measured by a Time of Flight (ToF) sensor, and passenger body temperature detected by an infrared sensor. The center display 361 can be used to display, for example, at least one of safety-related information, operation-related information, life logs, health-related information, authentication / identification-related information, and entertainment-related information.

[0156] Safety-related information includes data such as drowsiness detection, distraction detection, detection of mischief by a passenger, seatbelt usage status, and detection of an unattended occupant. This information is detected, for example, by sensors positioned on the back of the center display 361.

[0157] Operation-related information is obtained by detecting occupant gestures using sensors. The detected gestures may include the operation of various equipment within the vehicle's 360-degree space. For example, the operation of air conditioning, navigation systems, AV equipment, lighting systems, etc., may be detected.

[0158] The life log includes the life logs of all occupants. For example, the life log includes a record of each occupant's actions while on board. By acquiring and saving life logs, it is possible to determine the state of the occupants at the time of an accident.

[0159] Health-related information is obtained by detecting the occupant's body temperature using a temperature sensor and inferring their health status based on the detected temperature. Alternatively, the occupant's face may be captured using an image sensor, and their health status may be inferred from the captured facial expression. Furthermore, the occupant may be spoken to using an automated voice system, and their health status may be inferred based on their responses.

[0160] Authentication / identification-related information includes features such as a keyless entry function that uses sensors for facial recognition, and an automatic seat height and position adjustment function based on facial recognition.

[0161] Entertainment-related information includes functions that use sensors to detect information on how occupants operate AV equipment, and functions that use sensors to recognize occupants' faces and provide content tailored to them through the AV equipment.

[0162] The console display 362 can be used, for example, to display life log information. The console display 362 is located near the shift lever 371 on the center console 370 between the driver's seat 368 and the passenger seat 369. The console display 362 can also display information detected by various sensors. In addition, the console display 362 may display images of the area around the vehicle captured by an image sensor, or distance images to obstacles around the vehicle.

[0163] The head-up display 363 is virtually displayed behind the windshield 372 in front of the driver's seat 368. The head-up display 363 can be used to display, for example, at least one of safety-related information, operation-related information, life logs, health-related information, authentication / identification-related information, and entertainment-related information. Because the head-up display 363 is often virtually positioned in front of the driver's seat 368, it is suitable for displaying information directly related to the operation of the vehicle 360, such as the vehicle's speed and fuel (battery) level.

[0164] The digital rearview mirror 364 can not only display the area behind the vehicle 360, but also show the condition of the rear-seat occupants. By placing a sensor on top of the back of the digital rearview mirror 364, it can be used, for example, to display life log information.

[0165] The steering wheel display 365 is positioned near the center of the steering wheel 373 of the vehicle 360. The steering wheel display 365 can be used to display at least one of the following: safety-related information, operation-related information, life log, health-related information, authentication / identification-related information, and entertainment-related information. In particular, because the steering wheel display 365 is located near the driver's hands, it is suitable for displaying life log information such as the driver's body temperature, or information related to the operation of AV equipment, air conditioning equipment, etc.

[0166] The rear entertainment display 366 is mounted on the back of the driver's seat 368 or passenger seat 369 and is intended for viewing by rear-seat passengers. The rear entertainment display 366 can be used to display at least one of the following: safety-related information, operation-related information, life logs, health-related information, authentication / identification-related information, and entertainment-related information. In particular, because the rear entertainment display 366 is in front of the rear-seat passengers, it displays information relevant to them. For example, it may display information related to the operation of AV equipment or air conditioning equipment, or it may display the results of temperature sensor measurements of rear-seat passengers' body temperature, etc.

[0167] As mentioned above, by placing sensors on the back side of a display device / display system, it is possible to measure the distance to surrounding objects. Optical distance measurement methods can be broadly divided into passive and active types.

[0168] Passive distance measurement methods do not project light onto an object from the sensor, but rather measure distance by receiving light from the object. Examples of passive methods include the lens focusing method, the stereo method, and the monocular method.

[0169] Active radar systems measure distance by projecting light onto an object and receiving the reflected light with a sensor. Examples of active radar systems include optical radar, active stereo, illuminance difference stereo, moiré topography, and interferometry.

[0170] The display device 1 according to this disclosure is applicable to any of these distance measurement methods. By using a sensor placed on top of the back side of the display device 1 according to this disclosure, the passive or active distance measurement described above can be performed.

[0171] The embodiments described above may also take the following forms.

[0172] (1) A display device comprising a pixel circuit for driving a light-emitting element, the pixel circuit comprising: a first transistor, a second transistor, a third transistor, a control transistor, a drive transistor, a first capacitor, and a second capacitor, wherein the first end of the drive transistor is connected to a power line, the first end of the control transistor is connected to the second end of the drive transistor and the second end is connected to the light-emitting element, the first end of the first transistor is connected to a signal line, the first end of the first capacitor is connected to the second end of the first transistor and the second end is connected to the drive terminal of the drive transistor, the first end of the second transistor is connected to the second end of the first capacitor, the first end of the second capacitor is connected to the power line and the second end is connected to the drive terminal of the drive transistor, and the third transistor is connected to the second end of the drive transistor and the second end is connected to the drive terminal of the drive transistor.

[0173] (2) The display device according to (1), wherein the second transistor has a second terminal connected to the second terminal of the first transistor.

[0174] (3) The display device according to (2), wherein at the initialization timing, the first transistor, the second transistor and the third transistor are turned on and the control transistor is turned off in the pixel circuit.

[0175] In the above, the potential of the signal line is set to the initialization potential. In this state, current is passed through a path including the power line, from the first terminal to the second terminal of the drive transistor, from the first terminal to the second terminal of the third transistor, from the first terminal to the second terminal of the second transistor, and from the second terminal to the first terminal of the first transistor.

[0176] (4) The display device according to (2) or (3), wherein the pixel circuit is such that, at the timing of voltage correction of the node to which the drive terminal of the drive transistor is connected, the first transistor and the third transistor are turned on and the second transistor and the control transistor are turned off.

[0177] In the above, the potential of the signal line is set to the initialization potential.

[0178] (5) The display device according to (1), wherein the second transistor has a second terminal connected to the drive terminal of the first transistor or the drive terminal of the third transistor.

[0179] (6) The display device according to (5), wherein, at the initialization timing, the first transistor, the second transistor and the third transistor are turned on and the control transistor is turned off in the pixel circuit.

[0180] In the above configuration, the potential of the signal line and the potential of the control line connected to the second terminal of the second transistor are set to the initialization potential. In this state, current is passed through a path including the power line, the first terminal to the second terminal of the drive transistor, the first terminal to the second terminal of the third transistor, and the first terminal to the second terminal of the second transistor.

[0181] (7) The display device according to (5) or (6), wherein the pixel circuit is turned on and the second transistor and the control transistor are turned off at the voltage correction timing of the node to which the drive terminal of the drive transistor is connected.

[0182] In the above, the potential of the signal line is set to the initialization potential.

[0183] (8) The display device according to any one of (1) to (7), wherein the control transistor and the drive transistor are p-type transistors.

[0184] (9) The display device according to (8), wherein the first transistor, the second transistor and the third transistor are n-type transistors.

[0185] (10) The display device according to (9), wherein the first transistor, the second transistor and the third transistor are formed using an oxide semiconductor.

[0186] (11) The display device according to (8), wherein the first transistor, the second transistor and the third transistor are p-type transistors.

[0187] (12) Electronic device comprising a display unit having a pixel circuit for driving a light-emitting element, the display unit having a first transistor, a second transistor, a third transistor, a control transistor, a drive transistor, a first capacitor, and a second capacitor, wherein the first end of the drive transistor is connected to a power line, the first end of the control transistor is connected to the second end of the drive transistor and the second end is connected to the light-emitting element, the first end of the first transistor is connected to a signal line, the first end of the first capacitor is connected to the second end of the first transistor and the second end is connected to the drive terminal of the drive transistor, the first end of the second transistor is connected to the second end of the first capacitor, the first end of the second capacitor is connected to the power line and the second end is connected to the drive terminal of the drive transistor, and the third transistor is connected to the second end of the drive transistor and the second end is connected to the drive terminal of the drive transistor.

[0188] (13) A display device comprising a pixel circuit for driving a light-emitting element, the pixel circuit comprising: a first transistor, a second transistor, a control transistor, a drive transistor, a first capacitor, a second capacitor, and a third capacitor, wherein the first end of the drive transistor is connected to a power line, the first end of the control transistor is connected to the second end of the drive transistor Tdr and the second end is connected to the light-emitting element, the first end of the first transistor is connected to a signal line, the first end of the first capacitor is connected to the second end of the first transistor and the second end is connected to the drive terminal of the drive transistor, the first end of the second transistor is connected to the second end of the first capacitor, the first end of the second capacitor is connected to a power line and the second end is connected to the drive terminal of the drive transistor, and the third capacitor is connected to the second end of the second transistor and the second end is connected to the second end of the drive transistor.

[0189] (14) The display device according to (13), wherein at the initialization timing, the first transistor and the second transistor are turned on and the control transistor and the control transistor are turned off.

[0190] In the above configuration, the signal line is set to an initialization potential, and the potential of the second terminal of the third capacitor is set to a potential that is in motion with the power line. In this state, current flows through the path including the power line, the first terminal to the second terminal of the drive transistor, and the third capacitor.

[0191] (15) The display device according to (13) or (14), wherein the pixel circuit is such that the first transistor and the second transistor are turned on and the control transistor is turned off at the voltage correction timing of the node to which the drive terminal of the drive transistor is connected.

[0192] In the above configuration, the potential of the signal line is set to the initialization potential, and the potential of the second terminal of the third capacitor is set to the reference potential.

[0193] The aspects of this disclosure are not limited to the embodiments described above, but include various conceivable variations, and the effects of this disclosure are not limited to those described above. The components in each embodiment may be appropriately combined and applied. That is, various additions, modifications, and partial deletions are possible, as long as they do not deviate from the conceptual idea and spirit of this disclosure derived from the claims and their equivalents.

[0194] 1: Display device, 10: Pixel array, 100: Pixel, T1: First transistor, T2: Second transistor, T3: Third transistor, Tds: Control transistor, Tdr: Drive transistor, C1: First capacitor, C2: Second capacitor, C3: Third capacitor, L: Light-emitting element, VSL: Signal line, VWS: Control line, VDS: Control line, AZSL1: Control line, AZSL2: Control line, VCC: Power line, VCATH: Power line, 12: Control circuit, 14: First drive circuit, 140: Signal line, 16: Second drive circuit, 160: Signal line, 30: First board, 32: Second board, 34: Third board, 310: Digital camera, 311: Camera body, 312: Lens, 313: Grip, 314: Monitor screen, 315: Electronic viewfinder, 320: HMD, 321: Display device, 322: Mounting component, 330: Television device, 331: Image display screen, 332: Front panel, 333: Filter glass, 340: Smart glasses, 341: Main unit, 342: Arm unit, 343: Lens barrel, 344: Glasses, 345: Lens, 350: Smartphone, 351: Display unit, 352: Control unit, 360: Vehicle, 361: Center display, 362: Console display, 363: Head-up display, 364: Digital rear mirror, 365: Steering wheel display, 366: Rear entertainment display, 367: Dashboard, 368: Driver's seat, 369: 370: Passenger seat, 371: Center console, 372: Shift lever, 373: Windshield, 373: Steering wheel

Claims

1. A display device comprising a pixel circuit for driving a light-emitting element, the pixel circuit comprising: a first transistor, a second transistor, a third transistor, a control transistor, a drive transistor, a first capacitor, and a second capacitor, wherein the first end of the drive transistor is connected to a power line, the first end of the control transistor is connected to the second end of the drive transistor and the second end is connected to the light-emitting element, the first end of the first transistor is connected to a signal line, the first end of the first capacitor is connected to the second end of the first transistor and the second end is connected to the drive terminal of the drive transistor, the first end of the second transistor is connected to the second end of the first capacitor, the first end of the second capacitor is connected to the power line and the second end is connected to the drive terminal of the drive transistor, and the third transistor is connected to the second end of the drive transistor and the second end is connected to the drive terminal of the drive transistor.

2. The display device according to claim 1, wherein the second transistor's second terminal is connected to the second terminal of the first transistor.

3. The display device according to claim 2, wherein, at the initialization timing, the first transistor, the second transistor, and the third transistor are turned on, and the control transistor is turned off, in the pixel circuit.

4. The display device according to claim 3, wherein the pixel circuit is configured such that, at the timing of voltage correction of the node to which the drive terminal of the drive transistor is connected, the first transistor and the third transistor are turned on, and the second transistor and the control transistor are turned off.

5. The display device according to claim 1, wherein the second transistor's second terminal is connected to the drive terminal of the first transistor or the drive terminal of the third transistor.

6. The display device according to claim 5, wherein, at the initialization timing, the first transistor, the second transistor, and the third transistor are turned on, and the control transistor is turned off.

7. The display device according to claim 6, wherein the pixel circuit has the first transistor and the third transistor turned on and the second transistor and the control transistor turned off at the voltage correction timing of the node to which the drive terminal of the drive transistor is connected.

8. The display device according to claim 1, wherein the control transistor and the drive transistor are p-type transistors.

9. The display device according to claim 8, wherein the first transistor, the second transistor, and the third transistor are n-type transistors.

10. The display device according to claim 9, wherein the first transistor, the second transistor, and the third transistor are formed using an oxide semiconductor.

11. The display device according to claim 8, wherein the first transistor, the second transistor and the third transistor are p-type transistors.

12. Electronic device comprising a display unit having a pixel circuit for driving a light-emitting element, the display unit comprising: a first transistor, a second transistor, a third transistor, a control transistor, a drive transistor, a first capacitor, and a second capacitor, wherein the first end of the drive transistor is connected to a power line, the first end of the control transistor is connected to the second end of the drive transistor and the second end is connected to the light-emitting element, the first end of the first transistor is connected to a signal line, the first end of the first capacitor is connected to the second end of the first transistor and the second end is connected to the drive terminal of the drive transistor, the first end of the second transistor is connected to the second end of the first capacitor, the first end of the second capacitor is connected to the power line and the second end is connected to the drive terminal of the drive transistor, and the third transistor is connected to the second end of the drive transistor and the second end is connected to the drive terminal of the drive transistor.

13. A display device comprising a pixel circuit for driving a light-emitting element, the pixel circuit comprising: a first transistor, a second transistor, a control transistor, a drive transistor, a first capacitor, a second capacitor, and a third capacitor, wherein the first end of the drive transistor is connected to a power line, the first end of the control transistor is connected to the second end of the drive transistor and the second end is connected to the light-emitting element, the first end of the first transistor is connected to a signal line, the first end of the first capacitor is connected to the second end of the first transistor and the second end is connected to the drive terminal of the drive transistor, the first end of the second transistor is connected to the second end of the first capacitor, the first end of the second capacitor is connected to a power line and the second end is connected to the drive terminal of the drive transistor, and the third capacitor is connected to the second end of the second transistor and the second end is connected to the second end of the drive transistor.

14. The display device according to claim 13, wherein, at the initialization timing, the first transistor and the second transistor are turned on, and the control transistor and the control transistor are turned off.

15. The display device according to claim 14, wherein the pixel circuit is configured such that, at the voltage correction timing of the node to which the drive terminal of the drive transistor is connected, the first transistor and the second transistor are turned on and the control transistor is turned off.

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