Modulation Transference TRIZ Cases

A shared degeneration inductor lets paired Gilbert cells shrink IQ mixer area while reducing mismatch, noise, and manufacturing cost.

A feedback circuit measures differential DC offset and generates calibration signals to cut carrier leakage without larger, higher-power mixer devices.

Using ternary-controlled parallel chopper paths, this frequency converter rejects 3K odd-order harmonics to reduce spurious mixing in direct conversion receivers.

Passive quadrature mixers plus a differential feedback amplifier improve linearity, noise figure, image rejection, and power use.

A duplicated-current and capacitor timing scheme compensates transistor mismatch to minimize carrier leakage in direct conversion transmitters.

A hardware-DSP path removes DC offset from IF signals without FIR HPF latency, preserving signal quality for multi-slot receivers.

Resonance circuits steer leakage signals to controlled voltages in a sub-harmonic mixer, improving isolation and reducing DC offset and even-order distortion.

By converting D/A output from voltage to current before mixing, this I/Q modulator improves EVM and linearity while cutting power use.

When one capacitor bank reaches its limit, calibrated switching to a second bank preserves monotonic oscillator tuning and avoids frequency gaps.

Current-domain mixing with a passive mixer and complex load cuts CMOS flicker noise and power draw while preserving RF downconverter linearity.

Multiple dividers, mixers, and multiplexers generate high-frequency outputs while cutting power and area and supporting fast channel hopping.

A segmented NMOS mixer topology uses isolated gain and switching stages to keep conversion gain and linearity stable at 0.9 V.

An inductor-less LO buffer uses common-mode feedback and replica bias to cut mixer power demand while shrinking receiver die area.

A current-mode polyphase filter with a transconductance mixer cuts resistor thermal noise while preserving image rejection in RF receivers.