Dual encoder states and acknowledgement lists keep packet compression synchronized on unreliable links, cutting bandwidth use and decode errors.
Clock edge timing is encoded with stream data so multiplexed I2S links can reconstruct isochronous or bursty signals with low latency and jitter.
Clock phase codewords let multiplexed serial links carry isochronous or bursty streams with low latency and jitter, without buffers or re-timers.