counter
By introducing a delay unit and a data alignment module into the counter, the problem of carry signal propagation delay in high-digit counters is solved, improving the counter's operating speed and accuracy, and enabling the design of counters with higher digits.
CN115189691BActive Publication Date: 2026-05-29RIGOL TECHNOLOGIES CO LTD
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- RIGOL TECHNOLOGIES CO LTD
- Filing Date
- 2022-07-28
- Publication Date
- 2026-05-29
Smart Images
Figure CN115189691B_ABST
Abstract
The embodiment of the present application provides a kind of counter, comprising: counting module, including multiple cascaded sub-counters and the delay unit being connected between at least two adjacent sub-counters in multiple sub-counters;Wherein, sub-counter is used to count the number of clock pulses to output count output signal and carry output signal;Delay unit is used to receive the carry output signal of the previous stage sub-counter in at least two sub-counters, and the received carry output signal is output to the next stage sub-counter after being delayed;Data alignment module is used to receive the count output signal of multiple sub-counters, and the received multiple count output signals belonging to the same counting period are data-aligned according to the relationship corresponding to the delay time caused by delay unit, to output count result.
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Citation Information
Patent Citations
US5706322A