Semiconductor element and manufacturing method thereof

By introducing insulating structures, electric fuse elements and gap walls into semiconductor components, and using manufacturing process variations to form epitaxial structures, the problems of semiconductor components being susceptible to defects and insufficient security of IoT hardware are solved, and random encoding and physical incommendable functions are realized, which improves information security.

CN120149294APending Publication Date: 2025-06-13UNITED MICROELECTRONICS CORP
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Patent Information

Application Number
CN202311694278.9
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2023-12-11
Publication Date
2025-06-13

AI Technical Summary

Technical Problem

Existing semiconductor components are susceptible to defects during production, and in the field of IoT, hardware security is difficult to ensure, especially in preventing counterfeit chips and data security.

Method used

By introducing an insulating structure, an electric fuse element and a gap wall into the semiconductor element, the gap wall is partially covered with the semiconductor layer of the electric fuse element by utilizing the manufacturing process variation, and an epitaxial structure is formed to electrically connect adjacent electric fuse elements, realizing the functions of random coding and physical incommensurable.

Benefits of technology

The purpose of random encoding in semiconductor components is achieved, hardware security is enhanced, counterfeit chips are prevented, and the security of IoT information is improved.

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Abstract

The invention discloses a semiconductor element and a manufacturing method thereof. The semiconductor element comprises an insulating structure, a first electric fuse element, a second electric fuse element, a first gap wall, a second gap wall and an epitaxial structure. The insulating structure is disposed in the substrate. The first electric fuse element and the second electric fuse element are respectively arranged on two sides of the insulating structure, wherein the first electric fuse element and the second electric fuse element respectively comprise a semiconductor layer arranged on the substrate and a mask layer arranged on the semiconductor layer. The first spacer partially covers a sidewall of the semiconductor layer of the first electric fuse element adjacent to the insulating structure, and the second spacer partially covers a sidewall of the semiconductor layer of the second electric fuse element adjacent to the insulating structure. The epitaxial structure is disposed over the insulating structure and electrically connects the semiconductor layer of the first electric fuse element and the semiconductor layer of the second electric fuse element.
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