An address allocation method and device, a storage medium and an electronic device

By optimizing the address allocation method in QLC solid-state storage, adjacent logical block addresses are allocated to physical block addresses in different regions, which solves the problem of data concentration in high pages, improves read performance and device lifespan, and optimizes storage space utilization.

CN120179573BActive Publication Date: 2025-12-30SHANDONG YUNHAI GUOCHUANG CLOUD COMPUTING EQUIP IND INNOVATION CENT CO LTD
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Patent Information

Application Number
CN202510660055.3
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2025-05-22
Publication Date
2025-12-30
Estimated Expiration
2045-05-22

AI Technical Summary

Technical Problem

In existing technologies, QLC solid-state storage does not consider the error characteristics of each page when allocating addresses, resulting in some data being concentrated in high pages (such as MSB and TSB), which affects read performance and user experience.

Method used

By acquiring snapshot information and using mapping rules, adjacent logical block addresses are allocated to different physical regions, generating offset snapshots and index sets. This avoids data concentration in high pages and optimizes the address allocation order using multi-matrix calculations.

Benefits of technology

It improves read performance and user experience, reduces read latency, extends device lifespan, and optimizes storage space utilization.

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Abstract

Embodiments of the present disclosure provide an address allocation method and device, a storage medium and an electronic device, and relate to the technical field of computers. The method comprises: in response to a write request, obtaining snapshot information; and according to a mapping rule, allocating a physical block address corresponding to a logical block address of at least one data by using the snapshot information; wherein the snapshot information is used to allocate adjacent logical block addresses to physical block addresses in different areas. In this way, by allocating adjacent logical block addresses to different physical areas, the situation of some data being concentrated in high pages is avoided, thereby improving reading performance and user experience.
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