Probe card and test system

Through the periodic array arrangement of coaxial probe cards and drive modules, efficient multi-device testing of MEMS probe cards is achieved, which solves the problems of mechanical strength, signal integrity and production cost, and improves the wafer testing speed and efficiency.

CN120741901APending Publication Date: 2025-10-03BEIHANG UNIV
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Patent Information

Application Number
CN202510702475.3
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-05-28
Publication Date
2025-10-03

AI Technical Summary

Technical Problem

Existing MEMS probe cards have deficiencies in mechanical strength, signal integrity and production costs, and the wafer testing speed is slow and the testing time is long, which affects production efficiency.

Method used

The coaxial probe card is arranged in a periodic array and includes multiple unit groups. Each unit group contains at least two coaxial probes, which are connected to the test instrument through an electrical interconnection structure. Combined with the drive module and the test needle tip monitoring module, it can realize simultaneous testing of multiple devices.

Benefits of technology

It increases wafer test speed, reduces test time and cost, improves the mechanical reliability and signal integrity of the probe card, and adapts to the needs of smaller pad spacing and higher test frequency.

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Abstract

The invention relates to the technical field of wafer testing, and discloses a probe card and a testing system. The probe card comprises a plurality of unit groups which are periodically arranged; the unit group comprises at least two coaxial probes; wherein at least one coaxial probe is used for abutting against the input end of a to-be-tested device, and at least one coaxial probe is used for abutting against the output end of the to-be-tested device. According to the invention, through the plurality of unit groups arranged in the periodic array, a plurality of devices can be tested at a time when wafer testing is carried out, so that the wafer testing speed is improved, the wafer testing time is shortened, and the problems of low testing speed and long testing time existing in wafer testing in the prior art are solved.
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