Formation method of semiconductor structure
By employing a two-step reduction process, the problem of increased resistance caused by stress migration in metal interconnect processes was solved, thereby improving the quality and reliability of the conductive layer and reducing defects such as voids.
Patent Information
- Application Number
- CN202511107937.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-08-07
- Publication Date
- 2025-11-07
AI Technical Summary
In existing technologies, stress migration failure in metal interconnect processes is related to the mismatch of thermal expansion coefficients of metal/dielectric materials, metal grain size, and defect density, leading to problems such as increased resistance or open circuits.
A two-step reduction process is adopted, with different process parameters for the first and second reduction processes. The first reduction process partially reduces the initial oxide layer, while the second reduction process completely reduces the remaining oxide layer. This avoids the introduction of reaction byproducts, improves the quality of the conductive layer, and reduces defects such as voids caused by stress migration.
It effectively reduces defects on the surface of the conductive layer, lowers the resistance caused by stress migration, and improves the quality and reliability of the conductive layer.