Method and device for managing register

By acquiring processor-recognizable instruction information, the register resource management of both short-lived and long-lived instructions is optimized, solving the problem of register resource waste, improving processor resource utilization efficiency, and reducing power consumption.

CN121614243APending Publication Date: 2026-03-06HUAWEI TECH CO LTD
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Patent Information

Application Number
CN202411189791.7
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-08-27
Publication Date
2026-03-06

AI Technical Summary

Technical Problem

In existing technologies, processors have limited register resources. Increasing the number of registers will lead to increased cost and power consumption. Furthermore, due to differences in the understanding of register lifecycle between software and hardware, register resources are wasted. Existing methods are only applicable to instructions with short lifecycles, limiting their application scenarios.

Method used

By acquiring the first indication information that the processor can recognize, the lifetime of the registers associated with instruction sets with shorter lifetimes is indicated, and the register resource management of instructions with longer lifetimes is optimized. This includes releasing registers when the instruction at the end of the instruction set is completed, and flexibly inserting information into the instruction set through end or start instruction identifiers and metadata to finely manage registers.

Benefits of technology

It improves the efficiency of register resource utilization, optimizes register resource management for both short-lived and long-lived instructions, and reduces the number of register releases and power consumption.

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Abstract

The invention relates to the field of computers, in particular to a register management method and device. In the prior art, an assembly line register is reused for temporarily storing data, then a data transmission mechanism of a processor is used for transmitting the temporarily stored data to subsequent instructions on an assembly line for use, and due to the fact that the number of the instructions entering the assembly line is limited, the method is only suitable for the instructions with the short life cycle, and the application scene is limited. The first indication information indicates the first life cycle of the register associated with the first instruction set, the first life cycle is shorter than the second life cycle determined by hardware, the processor can be prompted to release the register in advance, and therefore the use efficiency of register resources is improved. The first indication information indicates the life cycle of the non-pipeline register, so that the technology provided by the invention not only can optimize the register resource used by the instruction with the shorter life cycle, but also can optimize the register resource used by the instruction with the longer life cycle.
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