An inverter narrow pulse compensation method, system, device and storage medium

Abstract

The application discloses an inverter narrow pulse compensation method, system, device and storage medium, relates to the technical field of power electronics and inverter control, and comprises the following steps: collecting narrow pulse multi-source data through an acquisition unit, inputting the narrow pulse multi-source data into a fitting unit to output a lock pulse characteristic set, inputting the lock pulse characteristic set into a calculation unit to output the number and distribution mode of compensation pulses and save them to a compensation unit, obtaining the lock pulse characteristic set through adaptive polynomial fitting of a lock narrow pulse envelope, obtaining the number of compensation pulses through pulse width and a preset threshold, obtaining the output distribution mode through an envelope and least squares, and superimposing and executing the number and distribution mode of compensation pulses saved in the compensation unit at the same position in the next period. The method has better effects in the integrity of lock pulse representation, the calculability of compensation number and distribution mode, and the cycle consistency of compensation execution.

Description

Technical Field

[0001] This invention relates to the field of power electronics and inverter control technology, specifically to a method, system, device, and storage medium for narrow pulse compensation in inverters. Background Technology

[0002] In existing technologies, when there is no compensation for narrow pulses, the method of cutting off or widening the pulse to the minimum pulse width is usually used to address excessively narrow pulses.

[0003] There are currently few reports on research regarding narrow pulse problems. Narrow pulse processing generally requires combining specific PWM methods to solve the problem.

[0004] Existing technologies have studied SVPWM for three-level inverters. To address the narrow pulse problem in GTO three-level inverters, non-nearest three-vector N2TV and non-nearest four-vector N2TV methods, which are different from traditional three-level inverter SVPWM control methods, have been proposed. Although these methods solve the narrow pulse problem, they also introduce the problem of large harmonics.

[0005] To address the narrow pulse problem and reduce the switching frequency, a new SVPWM implementation scheme is proposed. This method further subdivides the 60° large triangular region into 14 smaller regions of different shapes and studies the vector action sequence of each region. The disadvantages of this method are that the region division is highly subjective and the relationship between region division and pulse width is unclear; the number of regions is too large, and the microcomputer has a large amount of computation when performing space voltage vector control and determining the vector position, which is both time-consuming and laborious, and impractical.

[0006] In addition, other existing methods use the reverse order of voltage vector output, combined with the three-level SVPWM method, to address the narrow pulse problem and the midpoint potential fluctuation problem. For four different triangular regions within the 60-degree range, each vector action scheme is proposed. This method cannot eliminate narrow pulses, but can only reduce them by half.

[0007] The three-level SVPWM control method adopts the NTV rule, considers the narrow pulse problem, and there is a contradiction between controlling the midpoint potential fluctuation and reducing the switching frequency. The research results are not satisfactory. Summary of the Invention

[0008] In view of the above-mentioned problems, the present invention is proposed.

[0009] Therefore, the technical problem solved by this invention is that the traditional processing method adopts a direct blocking method, which leads to distortion of the output duty cycle at zero crossing, thereby increasing the distortion rate of the output voltage and current. By calculating the total blocking amount of the narrow pulse, the duty cycle is released proportionally based on the blocking threshold. By utilizing the PWM equivalence principle, the duty cycle is guaranteed to be equivalently compensated at zero crossing, thereby ensuring the power quality of the output voltage and current.

[0010] To solve the above-mentioned technical problems, the present invention provides the following technical solution: a narrow pulse compensation method for inverters, comprising acquiring narrow pulse multi-source data through an acquisition unit, and inputting the narrow pulse multi-source data into a fitting unit to output a blocking pulse feature set.

[0011] The blockade pulse feature set is input into the calculation unit, and the number and distribution method of the compensation pulses are output and saved to the compensation unit.

[0012] The blockade pulse feature set is obtained by adaptive polynomial fitting of the blockade narrow pulse envelope.

[0013] The number of compensation pulses is obtained by pulse width and preset threshold.

[0014] The output allocation method is obtained through envelope and least squares.

[0015] The number and allocation method of the compensation pulses stored in the compensation unit are superimposed and executed at the same position in the next cycle.

[0016] As a preferred embodiment of the inverter narrow pulse compensation method described in this invention, the step of acquiring narrow pulse multi-source data through the acquisition unit includes calculating the number of switching pulses within one power frequency cycle by calculating the grid frequency and the set switching frequency through phase-locked loop.

[0017] Real-time statistics are collected on the starting position and number of narrow pulses that need to be blocked within the current power frequency cycle, as well as the width of each narrow pulse that needs to be blocked.

[0018] As a preferred embodiment of the inverter narrow pulse compensation method of the present invention, the blockade pulse feature set is obtained by adaptive polynomial fitting of the blockade narrow pulse envelope, including the fitted envelope curve of the blockade narrow pulse.

[0019] An adaptive polynomial fitting method is adopted, and the polynomial order is the number of blocking pulses minus 1.

[0020] Calculate the envelope trend using the location and amplitude at different times.

[0021] The envelope trend is used as a characteristic of the overall distribution of the blocking pulse.

[0022] The blockade pulse feature set includes the overall distribution characteristics of the blockade pulses and the cumulative width of the blockade pulses.

[0023] As a preferred embodiment of the inverter narrow pulse compensation method described in this invention, the calculation of the cumulative width of the blocking pulse includes the narrow pulse occurring at a zero-crossing duty cycle, and each blocking pulse being continuous.

[0024] The widths of the blocking pulses stored each time are accumulated to calculate the total lost pulse width.

[0025] The total lost pulse width is used as the cumulative width of the blocking pulse.

[0026] As a preferred embodiment of the inverter narrow pulse compensation method of the present invention, the number of compensation pulses is obtained by pulse width and preset threshold, wherein the preset threshold is set to 2μs.

[0027] Based on the obtained cumulative width of the blocking pulse, the ratio of the cumulative width of the blocking pulse to the preset threshold is rounded down.

[0028] The maximum value of the total compensation pulse decomposition count is obtained.

[0029] As a preferred embodiment of the inverter narrow pulse compensation method described in this invention, the output distribution method is obtained by envelope and least squares, and the number of compensation pulses is determined.

[0030] The ratio of the cumulative width of the blocking pulse to the number of compensation pulses is rounded up to obtain the minimum width of each pulse compensation.

[0031] The minimum pulse compensation width is greater than the preset threshold.

[0032] As a preferred embodiment of the inverter narrow pulse compensation method of the present invention, the step of superimposing the compensation at the same position in the next cycle includes delaying the calculated compensation duty cycle by one power frequency cycle and superimposing the compensation at the same position in the next cycle.

[0033] Another objective of this invention is to provide an inverter narrow pulse compensation system that can adaptively fit the envelope of the blocked narrow pulse and generate the number and distribution of compensation pulses accordingly, and perform compensation by superimposing them at the same position in the next cycle. This solves the problem that current narrow pulse compensation techniques based on fixed rules have difficulty in matching the number and distribution of compensation pulses when the number and distribution of blocked narrow pulses change under different operating conditions, and the compensation is not accurate enough.

[0034] As a preferred embodiment of the inverter narrow pulse compensation system of the present invention, it includes an acquisition module, a fitting module, a calculation module, and a compensation module.

[0035] The acquisition module is used to acquire narrow pulse multi-source data through the acquisition unit.

[0036] The fitting module includes a fitting unit connected to the acquisition unit, which is used to identify blocked narrow pulses in narrow pulse multi-source data, store the information corresponding to the blocked narrow pulses, perform adaptive polynomial fitting on the envelope of the blocked narrow pulses, and output the blocked pulse feature set.

[0037] The calculation module includes a calculation unit connected to a fitting unit. The calculation unit determines the number of compensation pulses based on the width of the blockade pulse feature set and a preset threshold, and determines the distribution method of the compensation pulses based on the envelope and least squares.

[0038] The compensation module includes a compensation unit connected to a calculation unit, which is used to store the number and distribution method of compensation pulses and perform superposition execution at the same position in the next cycle.

[0039] Another object of the present invention is to provide an inverter narrow pulse compensation device, including a memory and a processor, wherein the memory stores a computer program, and the processor executes the computer program to implement the inverter narrow pulse compensation method.

[0040] Another object of the present invention is to provide an inverter narrow pulse compensation storage medium having a computer program stored thereon, wherein the computer program, when executed by a processor, implements the steps of an inverter narrow pulse compensation method.

[0041] The beneficial effects of this invention are as follows: The inverter narrow pulse compensation method provided by this invention obtains the blockade pulse feature set through adaptive polynomial fitting of the blockade narrow pulse envelope, realizing a holistic characterization of the blockade narrow pulse variation trend, facilitating the use of overall distribution information as input for subsequent calculations; by calculating the cumulative width of the blockade pulse and combining it with a preset threshold to determine the number of compensation pulses, the compensation scale can be calculated and determined; by obtaining the allocation method of the compensation pulses through envelope-based least squares processing, a reasonable redistribution of compensation pulses within the power frequency cycle is achieved; and the number of compensation pulses and the allocation method are superimposed and executed at the same position in the next cycle, achieving periodic consistency between the compensation result and the execution position. This invention achieves better results in terms of the completeness of the blockade pulse characterization, the calculability of the number of compensation pulses and the allocation method, and the periodic consistency of the compensation execution. Attached Figure Description

[0042] To more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings used in the following description of the embodiments will be briefly introduced. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0043] Figure 1This is an overall flowchart of a narrow pulse compensation method for an inverter provided in Embodiment 1 of the present invention.

[0044] Figure 2 The equivalent mathematical model diagram of a narrow pulse compensation method for an inverter provided in Embodiment 1 of the present invention is shown.

[0045] Figure 3 This is a schematic diagram before narrow pulse compensation for an inverter narrow pulse compensation method provided in Embodiment 1 of the present invention.

[0046] Figure 4 The diagram shows the narrow pulse compensation effect of an inverter narrow pulse compensation method provided in Embodiment 1 of the present invention. Detailed Implementation

[0047] To make the above-mentioned objects, features, and advantages of the present invention more apparent and understandable, specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of the present invention, and not all of them. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the protection scope of the present invention.

[0048] Example 1, referring to Figure 1-4 As one embodiment of the present invention, a method for narrow pulse compensation of an inverter is provided for deployment in the controller of a grid-connected inverter product, comprising:

[0049] S1: The narrow pulse multi-source data is acquired by the acquisition unit 100, and the narrow pulse multi-source data is input into the fitting unit 200 to output the blockade pulse feature set.

[0050] The blockade pulse feature set is obtained by adaptive polynomial fitting of the blockade narrow pulse envelope.

[0051] Furthermore, by using phase-locked loop (PLL) to calculate the grid frequency and the set switching frequency, the number of switching pulses within one power frequency cycle is calculated.

[0052] Real-time statistics are collected on the starting position and number of narrow pulses that need to be blocked within the current power frequency cycle, as well as the width of each narrow pulse that needs to be blocked.

[0053] Specifically, the controller calculates the grid frequency through phase-locked loop (PLL). And read the set inverter switching frequency. Calculate the number of switching pulses within one power frequency cycle.

[0054] ,

[0055] in, This indicates the number of switching pulses within one power frequency cycle. Indicates the inverter switching frequency; This indicates the frequency of the grid voltage obtained by phase-locked loop.

[0056] Within this power frequency cycle, the controller continuously calculates the starting position of the narrow pulses that need to be blocked. The number of pulses, PulseNum, and the narrow pulse width for each block. .

[0057] in For discrete real-time counting, it is used to represent the specific position of each narrow pulse within the power frequency cycle, and lie in The index range.

[0058] The above PulseNum Narrow-pulse multi-source data is written into the storage area for subsequent fitting and calculation.

[0059] To avoid ambiguity, the data stored here is... It is the original width record of the blocked narrow pulse, and the original record is used to accumulate the total width.

[0060] The envelope trend is used for subsequent compensation allocation and does not participate in the total width accumulation.

[0061] Fit the envelope curve of the blocked narrow pulse.

[0062] An adaptive polynomial fitting method is adopted, and the polynomial order is the number of blocking pulses minus 1.

[0063] Calculate the envelope trend using the location and amplitude at different times.

[0064] The envelope trend is used as a characteristic of the overall distribution of the blocking pulse.

[0065] The blockade pulse feature set includes the overall distribution characteristics of the blockade pulses and the cumulative width of the blockade pulses.

[0066] Specifically, to reduce the real-time computation load of the embedded system and adapt to the inconsistent number of blocking pulses under different operating conditions, the controller handles the blocked narrow pulses. An adaptive polynomial fitting method is used to obtain the envelope curve.

[0067] The polynomial order is taken as the number of blocking pulses. The fitted expression is:

[0068] ,

[0069] in, This represents the output value of the envelope curve for blocking narrow pulses. The coefficients of the constant term in the polynomial fit are represented. The coefficients of the first-order terms in the polynomial fit are represented. Represents the coefficients of the highest-order term in the polynomial fit. This represents the power of the independent variable corresponding to the highest-degree term in a polynomial. The independent variable represents the polynomial fit.

[0070] And by using the position and amplitude at different times, the envelope trend is calculated:

[0071] ,

[0072] in, Indicates the envelope curve in the discrete index The output value at that location, Indicates discrete index as The pulse width of the blocked narrow pulse, This represents the mapping function from narrow pulse width to envelope output.

[0073] This envelope trend serves as a representation of the overall change pattern of the blocked narrow pulse within the period, and as a reference for the subsequent allocation of the compensation duty cycle.

[0074] S2: Input the blockade pulse feature set into the calculation unit 300, output the number and distribution method of the compensation pulses and save them to the compensation unit 400.

[0075] like Figure 2 As shown, Figure 2 This is an equivalent mathematical model diagram for a specific implementation method.

[0076] Specifically: defining the calculation process from the total duty cycle of the narrow pulse to the duty cycle after compensation is the core algorithm implementation of the entire compensation method.

[0077] The number of compensation pulses is obtained through pulse width and preset threshold, and the output distribution method is obtained through envelope and least squares.

[0078] The number and distribution method of the compensation pulses stored in the compensation unit 400 are superimposed and executed at the same position in the next cycle.

[0079] Narrow pulses occur at zero-crossing duty cycles, and each blocking pulse is continuous.

[0080] The widths of the blocking pulses stored each time are accumulated to calculate the total lost pulse width.

[0081] The total lost pulse width is used as the cumulative width of the blocking pulse.

[0082] Single-cycle narrow pulse sequences such as Figure 3As shown, this example specifically and intuitively demonstrates the phenomenon that some narrow pulses are suppressed due to zero-crossing blocking within a power frequency cycle, explaining the physical reason for the compensation requirement.

[0083] Furthermore, since the narrow pulse occurs at the zero-crossing duty cycle, each blocking pulse is continuous, and the controller accumulates the width of each stored blocking pulse.

[0084] Calculate the total lost pulse width .

[0085] ,

[0086] in, This indicates the total pulse width that was lost.

[0087] Should The unified quantization result of the cumulative width of the corresponding blocking pulse / the total width of the blocking pulse is used as the input for calculating the number of compensations and the compensation width.

[0088] The preset threshold is set to 2μs. Based on the obtained cumulative width of the blocking pulse, the ratio of the cumulative width of the blocking pulse to the preset threshold is rounded down.

[0089] The maximum value of the total compensation pulse decomposition count is obtained.

[0090] Specifically, set a minimum threshold for narrow pulses. To ensure that the constant remains unchanged, the maximum number of compensation pulses is:

[0091] ,

[0092] in, Indicates the maximum number of compensation pulses. This indicates the minimum threshold for narrow pulses.

[0093] Determine the number of compensation pulses, and round up the ratio of the cumulative width of the blocking pulses to the number of compensation pulses to obtain the minimum width of each pulse compensation.

[0094] The minimum pulse compensation width is greater than the preset threshold.

[0095] The principle of cross-cycle compensation is as follows Figure 4 As shown in the figure, this diagram illustrates how to precisely control the average duty cycle by delaying and compensating for the duty cycle of the blocked narrow pulse in the Mth power frequency cycle to the (M+1)th power frequency cycle. Figure 2 The algorithm's specific manifestation in the time domain.

[0096] Specifically, after determining the maximum number of compensation pulses, the minimum average width of each pulse compensation is:

[0097] ,

[0098] in, This represents the minimum compensation width for each compensation pulse.

[0099] And satisfy:

[0100] ,

[0101] The calculated compensation duty cycle is delayed by one power frequency cycle, and superimposed compensation is performed at the same position in the next cycle.

[0102] Specifically, the polynomial order of the narrow pulse envelope curve before blocking is: The compensated quantity is PulseComNum, and the corresponding envelope curve polynomial order is .

[0103] The controller employs least-squares approximation to ensure that the compensated envelope maintains an overall trend consistent with the pre-blocking envelope, and accordingly reallocates the compensation duty cycle. .

[0104] The controller completes After calculation, it is delayed by one power frequency cycle, and superimposed compensation is performed at the same position in the next power frequency cycle, that is, compensation at the same position is performed in the sense of index. .

[0105] from From a domain perspective, this process is equivalent to undergoing a delay. A walk away Transitive relationships.

[0106] Example 2, an embodiment of the present invention, provides an inverter narrow pulse compensation system, including an acquisition module, a fitting module, a calculation module, and a compensation module.

[0107] The acquisition module is used to acquire narrow pulse multi-source data through the acquisition unit 100.

[0108] The fitting module includes a fitting unit 200, which is connected to the acquisition unit 100. It is used to identify blocked narrow pulses in the narrow pulse multi-source data, store the information corresponding to the blocked narrow pulses, perform adaptive polynomial fitting on the envelope of the blocked narrow pulses, and output the blocked pulse feature set.

[0109] The calculation module includes a calculation unit 300, which is connected to a fitting unit 200. The calculation unit 300 determines the number of compensation pulses based on the width of the blockade pulse feature set and a preset threshold, and determines the distribution method of the compensation pulses based on the envelope and least squares.

[0110] The compensation module includes a compensation unit 400, which is connected to a calculation unit 300. It is used to store the number and distribution method of compensation pulses and to perform superposition execution at the same position in the next cycle.

[0111] This embodiment also provides a computer device, including a memory and a processor. The memory stores a computer program, and when the processor executes the computer program, it implements the inverter narrow pulse compensation method proposed in the above embodiment.

[0112] This embodiment also provides a computer-readable storage medium storing a computer program thereon, which, when executed by a processor, implements the inverter narrow pulse compensation method as proposed in the above embodiment.

[0113] If the aforementioned functions are implemented as software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this invention, essentially, or the part that contributes to the prior art, or a portion of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this invention. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0114] The logic and / or steps represented in the flowchart or otherwise described herein, for example, can be considered as a sequenced list of executable instructions for implementing logical functions, and can be embodied in any computer-readable medium for use by, or in conjunction with, an instruction execution system, apparatus, or device (such as a computer-based system, a processor-including system, or other system that can fetch and execute instructions from, an instruction execution system, apparatus, or device). For the purposes of this specification, "computer-readable medium" can be any means that can contain, store, communicate, propagate, or transmit programs for use by, or in conjunction with, an instruction execution system, apparatus, or device.

[0115] More specific examples of computer-readable media (a non-exhaustive list) include: electrical connections (electronic devices) having one or more wires, portable computer disk drives (magnetic devices), random access memory (RAM), read-only memory (ROM), erasable and editable read-only memory (EPROM or flash memory), fiber optic devices, and portable optical disc read-only memory (CDROM). Furthermore, computer-readable media can even be paper or other suitable media on which the program can be printed, because the program can be obtained electronically, for example, by optically scanning the paper or other medium, followed by editing, interpreting, or otherwise processing as necessary, and then stored in computer memory.

[0116] It should be understood that various parts of the present invention can be implemented in hardware, software, firmware, or a combination thereof. In the above embodiments, multiple steps or methods can be implemented in software or firmware stored in memory and executed by a suitable instruction execution system. For example, if implemented in hardware, as in another embodiment, it can be implemented using any one or a combination of the following techniques known in the art: discrete logic circuits having logic gates for implementing logical functions on data signals, application-specific integrated circuits (ASICs) having suitable combinational logic gates, programmable gate arrays (PGAs), field-programmable gate arrays (FPGAs), etc.

[0117] It should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and not to limit it. Although the present invention has been described in detail with reference to preferred embodiments, those skilled in the art should understand that modifications or equivalent substitutions can be made to the technical solutions of the present invention without departing from the spirit and scope of the technical solutions of the present invention, and all such modifications or substitutions should be covered within the scope of the claims of the present invention.

Claims

1. A method for narrow pulse compensation in an inverter, characterized in that, include: The narrow pulse multi-source data is acquired by the acquisition unit (100), and the narrow pulse multi-source data is input into the fitting unit (200) to output the blockade pulse feature set; The blockade pulse feature set is input into the calculation unit (300), and the number and distribution method of the compensation pulses are output and saved to the compensation unit (400); wherein, The blockade pulse feature set is obtained by adaptive polynomial fitting of the blockade narrow pulse envelope; The number of compensation pulses is obtained by the pulse width and a preset threshold. The number of compensation pulses is obtained by the pulse width and a preset threshold, with the preset threshold set to 2μs; Based on the obtained cumulative width of the blocking pulse, the ratio of the cumulative width of the blocking pulse to the preset threshold is rounded down to obtain the maximum value of the decomposed count of the total compensation pulse. The output allocation method is obtained through envelope and least squares. Least squares approximation is used to ensure that the compensated envelope and the envelope before blocking are consistent in overall trend, and the compensation duty cycle is redistributed accordingly. The number and distribution method of the compensation pulses stored in the compensation unit (400) are superimposed and executed at the same position in the next cycle.

2. The inverter narrow pulse compensation method as described in claim 1, characterized in that: The acquisition of narrow pulse multi-source data through the acquisition unit (100) includes, By using phase-locked loop (PLL) to calculate the grid frequency and the set switching frequency, the number of switching pulses within one power frequency cycle is calculated. Real-time statistics are collected on the starting position, number, and width of the narrow pulses that need to be blocked within the current power frequency cycle.

3. The inverter narrow pulse compensation method as described in claim 1 or 2, characterized in that: The blockade pulse feature set is obtained by adaptive polynomial fitting of the blockade narrow pulse envelope, including: Fit the envelope curve of the blocked narrow pulse; An adaptive polynomial fitting method is adopted, and the polynomial order is the number of blocking pulses minus 1. Calculate the envelope trend using the location and amplitude at different times; The envelope trend is used as a characteristic of the overall distribution of the blocking pulse; The blockade pulse feature set includes the overall distribution characteristics of the blockade pulses and the cumulative width of the blockade pulses.

4. The inverter narrow pulse compensation method as described in claim 3, characterized in that: The calculation of the cumulative width of the blocking pulse includes, Narrow pulses occur at zero-crossing duty cycles, and each blocking pulse is continuous; The width of each stored blocking pulse is accumulated to calculate the total lost pulse width; The total lost pulse width is used as the cumulative width of the blocking pulse.

5. The inverter narrow pulse compensation method as described in claim 1, 2, or 4, characterized in that: The output allocation method is obtained through envelope and least squares, including... Determine the number of compensation pulses; The ratio of the cumulative width of the blocking pulse to the number of compensation pulses is rounded up to obtain the minimum width of each pulse compensation. And ensure that the minimum width of the pulse compensation is greater than the preset threshold.

6. The inverter narrow pulse compensation method as described in claim 5, characterized in that: The superposition execution at the same position in the next cycle includes, The calculated compensation duty cycle is delayed by one power frequency cycle, and superimposed compensation is performed at the same position in the next cycle.

7. An inverter narrow pulse compensation system, employing the inverter narrow pulse compensation method as described in any one of claims 1 to 6, characterized in that: It includes an acquisition module, a fitting module, a calculation module, and a compensation module; The acquisition module acquires narrow pulse multi-source data through the acquisition unit (100); The fitting module includes a fitting unit (200), which is connected to the acquisition unit (100). It is used to identify blocked narrow pulses in narrow pulse multi-source data, store the information corresponding to the blocked narrow pulses, perform adaptive polynomial fitting on the envelope of the blocked narrow pulses, and output the blocked pulse feature set. The calculation module includes a calculation unit (300), which is connected to a fitting unit (200). The calculation unit (300) determines the number of compensation pulses based on the pulse width in the blockade pulse feature set and a preset threshold, and determines the distribution method of the compensation pulses based on the envelope and least squares. The compensation module includes a compensation unit (400), which is connected to a calculation unit (300) to store the number and distribution method of compensation pulses and perform superposition execution at the same position in the next cycle.

8. A computer device comprising a memory and a processor, wherein the memory stores a computer program, characterized in that, When the processor executes the computer program, it implements the steps of the inverter narrow pulse compensation method according to any one of claims 1 to 6.

9. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by the processor, it implements the steps of the inverter narrow pulse compensation method according to any one of claims 1 to 6.

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