A semiconductor device and a manufacturing method
By introducing charged defect structures into carbon nanotube layers for electrical doping and using high work function metals as source and drain electrodes, the electrical performance matching problem of carbon nanotube devices in the prior art has been solved, achieving non-destructive doping and simplified integrated circuit design, thus promoting large-scale application.
Patent Information
- Application Number
- CN202411914223.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-24
- Publication Date
- 2026-06-26
AI Technical Summary
In existing technologies, the method of controlling the matching energy level of the metal work function to inject charge carriers has gradually failed, resulting in the inability to match the electrical performance of carbon nanotube field-effect transistor devices, which limits the further development of the devices.
By introducing charged defect structures into carbon nanotube layers, the electrical properties of carbon nanotubes can be controlled by electrically doping the carbon nanotubes using the defect structures. High work function metals are used as source and drain electrodes to achieve non-destructive electrical doping.
This technology enables non-destructive electrical doping of carbon nanotube devices, simplifies integrated circuit design rules, facilitates the matching of N-type and P-type devices, and supports large-scale integrated circuit applications.
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Figure CN122294813A_ABST
Abstract
Description
Technical Field
[0001] This invention belongs to the field of semiconductor devices and relates to a semiconductor device and its manufacturing method. Background Technology
[0002] Semiconductor-type single-walled carbon nanotubes have advantages such as small intrinsic size and high stability. Combined with their excellent electrical properties, such as high carrier mobility, high carrier saturation velocity, and high on / off ratio, they are a strong successor to the next generation of semiconductor devices.
[0003] In traditional carbon nanotube field-effect transistor devices, in order to achieve polarity control, it is necessary to adjust the metal work function of the source / drain electrodes to match the band structure of the carbon nanotube. While ensuring that the metal-semiconductor contact of the device is an ohmic contact, the type of majority carriers injected into the carbon nanotube channel by the source metal is changed, thereby achieving polarity control of the device.
[0004] For N-type carbon nanotube field-effect transistors (FETs), a low work function metal is needed to match the conduction band level to achieve an ohmic contact with electrons as the majority carrier. For P-type FETs, a high work function metal is needed to match the conduction band level to achieve an ohmic contact with holes as the majority carrier. However, as device sizes shrink, the stability of low work function metal electrodes gradually deteriorates. The electrical performance of short-channel N-type devices cannot match that of P-type devices, and the method of controlling the metal work function to match the conduction band level for majority carrier injection of holes / electrons gradually becomes ineffective, limiting the further development of FETs.
[0005] Therefore, how to provide a semiconductor device and fabrication method to achieve non-destructive electrical doping of carbon nanotubes has become a technical problem that urgently needs to be solved by those skilled in the art. Summary of the Invention
[0006] In view of the shortcomings of the prior art described above, the purpose of this invention is to provide a semiconductor device and manufacturing method to solve the problem of carrier injection failure caused by controlling the matching energy level of the metal work function in the prior art.
[0007] To achieve the above and other related objectives, the present invention provides a method for fabricating a semiconductor device, comprising the following steps:
[0008] Provide a base;
[0009] A carbon nanotube layer is formed on the substrate, wherein the carbon nanotube layer has at least one carbon nanotube.
[0010] A defect structure is formed in contact with the carbon nanotube layer, the defect structure containing charged defects, the charged defects acting on the carbon nanotube layer to electrically dope the carbon nanotube layer, the defect structure being formed before the formation of the carbon nanotube layer, and / or the defect structure being formed after the formation of the carbon nanotube layer;
[0011] Specifically, the electrical doping concentration of the carbon nanotubes is controlled by adjusting the density of the charged defects.
[0012] Optionally, the defect structure is a layered structure located on the upper and / or lower surface of the carbon nanotube layer; or the defect structure is a cylindrical structure covering the outside of the carbon nanotube.
[0013] Optionally, the charged defects are positively charged to perform N-type doping on the carbon nanotube layer.
[0014] Optionally, the defect structure adopts AlO X Layer, where 0 < X < 3 / 2.
[0015] Optionally, the step of forming the defect structure includes: first forming an Al metal layer, and then oxidizing the Al metal layer.
[0016] Optionally, the defect structure includes a stacked Al2O3 layer and an AlN layer, wherein the Al2O3 layer and the carbon nanotube layer are in contact.
[0017] Optionally, the method further includes the step of forming a source metal layer and a drain metal layer, wherein the source metal layer and the drain metal layer are separately disposed at both ends of the carbon nanotube layer, and the source metal layer and the drain metal layer are made of a high work function metal.
[0018] The present invention also provides a semiconductor device, comprising:
[0019] Base;
[0020] A carbon nanotube layer is located above the substrate, and the carbon nanotube layer has at least one carbon nanotube.
[0021] A defect structure is in contact with the carbon nanotube layer. The defect structure contains charged defects that act on the carbon nanotube layer to electrically dope the carbon nanotube layer.
[0022] Optionally, the defect structure is a layered structure located on the upper and / or lower surface of the carbon nanotube layer; or the defect structure is a cylindrical structure covering the outside of the carbon nanotube.
[0023] Optionally, the charged defects are positively charged to perform N-type doping on the carbon nanotube layer.
[0024] Optionally, the defect structure adopts AlO X Layer, where 0 < X < 3 / 2.
[0025] Optionally, the defect structure includes a stacked Al2O3 layer and an AlN layer, wherein the Al2O3 layer and the carbon nanotube layer are in contact.
[0026] Optionally, it also includes a source metal layer and a drain metal layer, wherein the source metal layer and the drain metal layer are separately disposed at both ends of the carbon nanotube layer, and wherein the source metal layer and the drain metal layer are made of high work function metals.
[0027] As described above, in the semiconductor device and fabrication method of the present invention, electrical doping of the carbon nanotube layer through defect structures only alters the electrical properties of the carbon nanotube layer without damaging its physical structure, thus ensuring that the intrinsic electrical properties of the carbon nanotube are not compromised, achieving lossless electrical doping. Furthermore, using a high work function metal layer as the source and drain electrodes of the N-type carbon nanotube device simplifies the design rules for carbon nanotube integrated circuits, facilitates the large-scale integrated circuit application of carbon nanotube devices, and enables the matching of N-type and P-type devices. Attached Figure Description
[0028] Figure 1 The diagram shows a flowchart of the semiconductor device fabrication method in Embodiment 1 of the present invention.
[0029] Figure 2 The diagram shown is a schematic diagram of the substrate provided in Embodiment 1 of the present invention.
[0030] Figure 3 The diagram shown is a schematic diagram of a carbon nanotube layer formed on a substrate in Embodiment 1 of the present invention.
[0031] Figure 4 This is a schematic diagram of the formation of an Al metal layer in Embodiment 1 of the present invention.
[0032] Figure 5 The diagram shown is a schematic representation of the patterned Al metal layer and carbon nanotube layer in Embodiment 1 of the present invention.
[0033] Figure 6 This is shown as the formation of AlO in Embodiment 1 of the present invention. X A schematic diagram of the layers.
[0034] Figure 7 The image shown is AlO in Embodiment 1 of the present invention. X A schematic diagram showing the layer formed beneath the carbon nanotube layer.
[0035] Figure 8 The image shown is AlO in Embodiment 1 of the present invention. X Schematic diagram of layers formed above and below the carbon nanotube layer.
[0036] Figure 9 The diagram shown is a schematic diagram of the formation of the source metal layer and the drain metal layer in Embodiment 1 of the present invention.
[0037] Figure 10 The diagram shown is a schematic diagram of the formation of the gate dielectric layer and the gate metal layer in Embodiment 1 of the present invention.
[0038] Component designation explanation
[0039] 1. Base
[0040] 2. Carbon nanotube layer
[0041] 3 Al metal layer
[0042] 4 AlO X layer
[0043] 5. Source metal layer
[0044] 6 Drain metal layer
[0045] 7 Gate Dielectric Layer
[0046] 8 Gate metal layer
[0047] Steps S1 to S3 Detailed Implementation
[0048] The following specific examples illustrate the implementation of the present invention. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention.
[0049] Please see Figures 1 to 10 It should be noted that the illustrations provided in this embodiment are only schematic representations of the basic concept of the present invention. Therefore, the drawings only show the components related to the present invention and are not drawn according to the actual number, shape and size of the components in the actual implementation. In the actual implementation, the form, quantity and proportion of each component can be arbitrarily changed, and the layout of the components may also be more complex.
[0050] Example 1
[0051] This embodiment provides a method for fabricating a semiconductor device. Please refer to [link / reference]. Figure 1 This includes the following steps:
[0052] S1: Provides the substrate;
[0053] S2: A carbon nanotube layer is formed on the substrate, wherein the carbon nanotube layer has at least one carbon nanotube;
[0054] S3: Forming a defect structure in contact with the carbon nanotube layer, the defect structure containing charged defects, the charged defects acting on the carbon nanotube layer to electrically dope the carbon nanotube layer.
[0055] The fabrication method of the semiconductor device in this embodiment will be described in detail below with reference to the specific accompanying drawings.
[0056] First, please refer to Figure 2 Step S1: Provide substrate 1.
[0057] As an example, the substrate 1 is an insulating substrate, including intrinsic silicon wafers, doped silicon wafers with an oxide layer on the surface, sapphire substrates, flexible polymer substrates, or other suitable substrates. The substrate 1 is thoroughly cleaned to ensure that its surface is flat, smooth, and free of particulate contamination. Specifically, in this embodiment, the substrate 1 is a quartz substrate.
[0058] Next, please refer to Figure 3 Step S2: A carbon nanotube layer 2 is formed on the substrate 1, wherein the carbon nanotube layer 2 has at least one carbon nanotube.
[0059] As an example, the carbon nanotube layer 2 includes a horizontally arranged array of carbon nanotubes, and the method for forming the carbon nanotube array includes the Czochralski method, dimensional confinement self-assembly method, dielectrophoretic deposition method or other suitable methods to ensure the density and uniformity of the carbon nanotube array.
[0060] Next, please refer to Figures 4 to 6 Step S3 is executed: a defect structure is formed in contact with the carbon nanotube layer 2, the defect structure contains charged defects, and the charged defects act on the carbon nanotube layer 2 to electrically dope the carbon nanotube layer 2.
[0061] As an example, in this embodiment, the charged defect is positively charged to perform N-type doping on the carbon nanotube layer 2, wherein the defect structure adopts AlO. X Layer 4, 0 < X < 3 / 2, forms the AlO X The steps in layer 4 include:
[0062] (a) such as Figure 4As shown, an Al metal layer 3 covering the carbon nanotube layer 2 is formed on the substrate 1. The method for forming the Al metal layer 3 includes electron beam evaporation, thermal evaporation, atomic layer deposition, or other suitable methods. Specifically, in this embodiment, atomic layer deposition is used to form the Al metal layer 3, and the thickness of the Al metal layer 3 is 4 nm.
[0063] (ii) Figure 5 As shown, the Al metal layer 3 and the carbon nanotube layer 2 are patterned, retaining only the carbon nanotube layer 2 and the Al metal layer 3 in the device channel region; specifically, a photoresist layer is formed and patterned on the Al metal layer 3, and the patterned photoresist layer is used as a mask to remove the Al metal layer 3 and the carbon nanotube layer 2 in the non-channel region using a dry etching process.
[0064] (III) Figure 6 As shown, the Al metal layer 3 is oxidized to form a non-stoichiometric AlO. X Layer 4, the AlO X There are a large number of positively charged oxygen vacancy defects in layer 4. The electric dipoles generated by the trap state charges enriched by the defects will directly act on the surface of the carbon nanotube layer 2, forming N-type electrical doping on the carbon nanotube layer 2. Specifically, in this embodiment, the Al metal layer 3 is oxidized by storing it in a clean room at ambient temperature for 12 hours.
[0065] As an example, the oxidation temperature, oxidation time, and oxygen content of the oxidation environment of the Al metal layer 3 can be changed to regulate the AlO content. X The density of oxygen vacancies in layer 4 is used to control the electrical doping concentration of the carbon nanotube layer 2, wherein the AlO X The higher the oxygen vacancy content in layer 4, the higher the electrical doping concentration of the carbon nanotube layer 2, and the higher the AlO content. X The smaller the oxygen vacancy content in layer 4, the smaller the electrical doping concentration of the carbon nanotube layer 2.
[0066] As an example, in this embodiment, AlO is formed after the carbon nanotube layer 2 is formed. X Layer 4; in another example, such as Figure 7 As shown, the AlO is first formed. X Layer 4, followed by the formation of the carbon nanotube layer 2; or as... Figure 8 As shown, AlO is formed both before and after the formation of the carbon nanotube layer 2. X Layer 4. Wherein, the AlO X Layer 4 is a high-k dielectric layer, located above the carbon nanotube layer 2, where the AlO₂ is... X Layer 4 can be considered as part of the gate dielectric layer, when the AlO XWhen layer 4 is located below the carbon nanotube layer 2, the AlO X Layer 4 can be considered as part of the substrate.
[0067] As an example, in this embodiment, the defect structure is formed by oxidation of an Al metal layer. In other examples, the defect structure can also be formed by oxidation of other metals, provided that the following conditions are met: (1) the defect structure formed after metal oxidation is a high-K medium; (2) the metal and carbon nanotubes have good wettability, that is, whether the metal can form good contact with the carbon nanotubes. If large-diameter metal particles are attached to the surface of carbon nanotubes, the doping effect will be weakened.
[0068] As an example, in this embodiment, the carbon nanotube layer 2 is electrically doped through defect structures, which only changes the electrical properties of the carbon nanotube layer 2 without damaging its physical structure, thus ensuring that the intrinsic electrical properties of the carbon nanotubes are not damaged, and achieving non-destructive electrical doping.
[0069] For example, please refer to Figure 9 To form the AlO X Following layer 4, the process further includes forming a source metal layer 5 and a drain metal layer 6. Specifically, the steps for forming the source metal layer 5 and the drain metal layer 6 include:
[0070] (a) In the formation of the AlO X A photoresist layer is formed on the structure after layer 4, and the photoresist layer is patterned using ultraviolet lithography. The patterned photoresist layer exposes the source metal layer 5 region and the drain metal layer 6 region. During the patterning of the photoresist layer, the developer removes the AlO4 located above the ends of the carbon nanotube layer 2. X Layer 4;
[0071] (ii) A high work function metal layer is formed on the photoresist layer, and the high work function metal layer is filled into the source metal layer 5 region and the drain metal layer 6 region;
[0072] (iii) The photoresist layer is removed by a stripping process, wherein the high work function metal layer located above the photoresist layer is removed during the removal process, and the remaining high work function metal layer constitutes the source metal layer 5 and the drain metal layer 6. The source metal layer 5 and the drain metal layer 6 are mounted on the ends of the carbon nanotube layer 2 to form a good metal-semiconductor contact.
[0073] As an example, the material of the high work function metal layer includes Pd and / or Pt, and the method for forming the high work function metal layer includes electron beam evaporation, thermal evaporation, magnetron sputtering or other suitable methods.
[0074] As an example, this application uses a high work function metal layer as the source and drain electrodes of an N-type carbon nanotube device, which can simplify the design rules of carbon nanotube integrated circuits, facilitate the large-scale integrated circuit application of carbon nanotube devices, and achieve mutual matching between N-type and P-type devices.
[0075] As an example, in this embodiment, the defect structure is a single-layer structure. In other examples, the defect structure can also be a multi-layer composite structure. For example, the defect structure uses stacked Al2O3 and AlN layers, with the Al2O3 layer in contact with the carbon nanotube layer 2. Oxygen atoms in the Al2O3 layer diffuse into the AlN layer, forming oxygen vacancies in the Al2O3 layer to electrically dope the carbon nanotube layer 2. In another example, the defect structure can also be a cylindrical structure, using liquid-phase synthesis, vapor-phase growth, or other suitable methods to directly coat the surface of each carbon nanotube, forming a coaxial heterogeneous coating structure. The defect structure includes, but is not limited to, non-stoichiometric alumina and hafnium oxide, and can also be a multi-layer high-k material composite structure, selected according to requirements.
[0076] As an example, in this embodiment, the charged defects in the defect structure are positively charged to perform N-type doping on the carbon nanotube layer 2; in another example, the charged defects in the defect structure can also be negatively charged to perform P-type doping on the carbon nanotube layer 2, for example, by oxidizing the Al metal layer in an oxygen-rich environment to form an aluminum oxide layer containing Al vacancies.
[0077] For example, please refer to Figure 10 After forming the source metal layer 5 and the drain metal layer 6, the process further includes forming a gate dielectric layer 7 and a gate metal layer 8. Specifically, the steps of forming the gate dielectric layer 7 and the gate metal layer 8 include:
[0078] (i) The gate dielectric layer 7 is formed by electron beam evaporation, atomic layer deposition or other suitable methods, and the gate dielectric layer 7 covers the structure after the source metal layer 5 and the drain metal layer 6 are formed;
[0079] (ii) A photoresist layer is formed and patterned on the structure after the formation of the gate dielectric layer 7, and the patterned photoresist layer exposes the region of the gate metal layer 8.
[0080] (iii) A metal material layer is formed on the photoresist layer and the metal material layer is filled into the region of the gate metal layer 8. The method of forming the metal material layer includes electron beam evaporation, thermal evaporation or magnetron sputtering or other suitable methods.
[0081] (iv) The photoresist layer is removed by a stripping process, wherein the metal material layer above the photoresist layer is removed during the removal process, and the remaining metal material layer constitutes the gate metal layer 8.
[0082] As described above, in the semiconductor device fabrication method of this embodiment, electrical doping of the carbon nanotube layer through defect structures only alters the electrical properties of the carbon nanotube layer without damaging its physical structure, thus ensuring that the intrinsic electrical properties of the carbon nanotube are not compromised, achieving lossless electrical doping. Furthermore, using a high work function metal layer as the source and drain electrodes of the N-type carbon nanotube device simplifies the design rules for carbon nanotube integrated circuits, facilitates the large-scale integrated circuit application of carbon nanotube devices, and enables the matching of N-type and P-type devices.
[0083] Example 2
[0084] This embodiment provides a semiconductor device; please refer to [link / reference]. Figure 10 The semiconductor device includes a substrate 1, a carbon nanotube layer 2, and a defect structure. The carbon nanotube layer 2 is located above the substrate 1 and has at least one carbon nanotube. The defect structure is in contact with the carbon nanotube layer 2 and contains charged defects. The charged defects act on the carbon nanotube layer 2 to electrically dope the carbon nanotube layer 2.
[0085] As an example, the substrate 1 is an insulating substrate, including an intrinsic silicon wafer, a doped silicon wafer with an oxide layer on the surface, a sapphire substrate, a flexible polymer substrate or other suitable substrate. The substrate 1 is thoroughly cleaned to ensure that the surface of the substrate 1 is flat and smooth and free of particulate contamination.
[0086] As an example, the carbon nanotube layer 2 comprises a horizontally arranged array of carbon nanotubes.
[0087] As an example, in this embodiment, the charged defects are positively charged to perform N-type doping on the carbon nanotube layer 2, wherein the defect structure adopts AlO₂. X Layer 4, 0 < X < 3 / 2.
[0088] As an example, the AlO in this embodiment X Layer 4 is located above the carbon nanotube layer 2. In another example, please refer to [link to example]. Figure 7 and Figure 8 Alternatively, the AlO can be set. X Layer 4 is located below the carbon nanotube layer 2, or AlO is disposed both above and below the carbon nanotube layer 2. X Layer 4.
[0089] As an example, by regulating the AlO XThe density of oxygen vacancies in layer 4 is used to control the electrical doping concentration of the carbon nanotube layer 2, wherein the AlO X The higher the oxygen vacancy content in layer 4, the higher the electrical doping concentration of the carbon nanotube layer 2, and the higher the AlO content. X The smaller the oxygen vacancy content in layer 4, the smaller the electrical doping concentration of the carbon nanotube layer 2.
[0090] As an example, in this embodiment, the carbon nanotube layer 2 is electrically doped through defect structures, which only changes the electrical properties of the carbon nanotube layer 2 without damaging its physical structure, thus ensuring that the intrinsic electrical properties of the carbon nanotubes are not damaged, and achieving non-destructive electrical doping.
[0091] As an example, the device also includes a source metal layer 5 and a drain metal layer 6, which are separately disposed at both ends of the carbon nanotube layer 2. The source metal layer 5 and the drain metal layer 6 are made of high work function metals, including Pd and / or Pt. Using high work function metal layers as the source and drain electrodes of N-type carbon nanotube devices simplifies the design rules of carbon nanotube integrated circuits, facilitates the large-scale integrated circuit application of carbon nanotube devices, and enables the matching of N-type and P-type devices.
[0092] As an example, in this embodiment, the defect structure is a single-layer structure. In other examples, the defect structure can also be a multi-layer composite structure. For example, the defect structure can be a stacked Al2O3 layer and an AlN layer, with the Al2O3 layer in contact with the carbon nanotube layer 2. Oxygen atoms in the Al2O3 layer diffuse into the AlN layer, forming oxygen vacancies in the Al2O3 layer to electrically dope the carbon nanotube layer 2. In another example, the defect structure can also be a cylindrical structure, directly coating the surface of each carbon nanotube to form a coaxial heterogeneous coating structure.
[0093] As an example, in this embodiment, the charged defects in the defect structure are positively charged to perform N-type doping on the carbon nanotube layer 2; in another example, the charged defects in the defect structure can also be negatively charged to perform P-type doping on the carbon nanotube layer 2.
[0094] As an example, it also includes a gate dielectric layer 7 and a gate metal layer 8, wherein the gate dielectric layer 7 is located on the AlO X Above layer 4, the gate metal layer 8 is located above the gate dielectric layer 7.
[0095] In summary, the semiconductor device and fabrication method of this invention electrically dopes the carbon nanotube layer through defect structures, altering only the electrical properties of the carbon nanotube layer without damaging its physical structure. This ensures that the intrinsic electrical properties of the carbon nanotubes are not compromised, achieving lossless electrical doping. Furthermore, using a high work function metal layer as the source and drain electrodes of the N-type carbon nanotube device simplifies the design rules for carbon nanotube integrated circuits, facilitating the large-scale integrated circuit application of carbon nanotube devices and enabling the matching of N-type and P-type devices. Therefore, this invention effectively overcomes the various shortcomings of the prior art and possesses high industrial applicability.
[0096] The above embodiments are merely illustrative of the principles and effects of the present invention and are not intended to limit the invention. Any person skilled in the art can modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by those skilled in the art without departing from the spirit and technical concept disclosed in the present invention should still be covered by the claims of the present invention.
Claims
1. A method for fabricating a semiconductor device, characterized in that, Includes the following steps: Provide a base; A carbon nanotube layer is formed on the substrate, wherein the carbon nanotube layer has at least one carbon nanotube. A defect structure is formed in contact with the carbon nanotube layer, the defect structure containing charged defects, the charged defects acting on the carbon nanotube layer to electrically dope the carbon nanotube layer, the defect structure being formed before the formation of the carbon nanotube layer, and / or the defect structure being formed after the formation of the carbon nanotube layer; Specifically, the electrical doping concentration of the carbon nanotube layer is controlled by adjusting the density of the charged defects.
2. The method for fabricating a semiconductor device according to claim 1, characterized in that: The defect structure is a layered structure, located on the upper and / or lower surface of the carbon nanotube layer; or the defect structure is a cylindrical structure, covering the outside of the carbon nanotube.
3. The method for fabricating a semiconductor device according to claim 1, characterized in that: The charged defects are positively charged to perform N-type doping on the carbon nanotube layer.
4. The method for fabricating a semiconductor device according to claim 3, characterized in that: The defect structure uses AlO. X Layer, where 0 < X < 3 / 2.
5. The method for fabricating a semiconductor device according to claim 4, characterized in that, The steps for forming the defect structure include: first forming an Al metal layer, and then oxidizing the Al metal layer.
6. The method for fabricating a semiconductor device according to claim 3, characterized in that: The defect structure comprises stacked Al2O3 and AlN layers, wherein the Al2O3 layer and the carbon nanotube layer are in contact.
7. The method for manufacturing a semiconductor device according to any one of claims 1-6, characterized in that: It also includes the step of forming a source metal layer and a drain metal layer, wherein the source metal layer and the drain metal layer are separately disposed at both ends of the carbon nanotube layer, and the source metal layer and the drain metal layer are made of a high work function metal.
8. A semiconductor device, characterized in that, include: Base; A carbon nanotube layer is located above the substrate, and the carbon nanotube layer has at least one carbon nanotube. A defect structure is in contact with the carbon nanotube layer. The defect structure contains charged defects that act on the carbon nanotube layer to electrically dope the carbon nanotube layer.
9. The semiconductor device according to claim 8, characterized in that: The defect structure is a layered structure, located on the upper and / or lower surface of the carbon nanotube layer; or the defect structure is a cylindrical structure, covering the outside of the carbon nanotube.
10. The semiconductor device according to claim 8, characterized in that: The charged defects are positively charged to perform N-type doping on the carbon nanotube layer.
11. The semiconductor device according to claim 10, characterized in that: The defect structure uses AlO. X Layer, where 0 < X < 3 / 2.
12. The semiconductor device according to claim 10, characterized in that: The defect structure comprises stacked Al2O3 and AlN layers, wherein the Al2O3 layer and the carbon nanotube layer are in contact.
13. The semiconductor device according to any one of claims 8-12, characterized in that: It also includes a source metal layer and a drain metal layer, which are separately disposed at both ends of the carbon nanotube layer, wherein the source metal layer and the drain metal layer are made of high work function metals.