A learning-based lossless lightweight compression, decompression, random access and query processing method and system for GPU

Abstract

This invention relates to a learning-based lossless lightweight compression, decompression, random access, and query processing method and system for GPUs. The method includes: processing input data using the GPU's native learning compression pipeline and directly generating learning-based lossless lightweight compressed SLAP layout data in GPU memory; decompressing and reading the target SLAP layout data using a warp collaborative learning decompression module to obtain decompressed data; selectively accessing the target SLAP layout data on the GPU side based on target point or range requests, and calling the warp collaborative learning decompression module to decompress a portion of the target SLAP layout data to obtain decompressed data; and outputting the decompressed data to a query operator for further processing or directly returning the query result, depending on actual needs. This invention can be widely applied in the fields of data compression, columnar storage, GPU parallel computing, and database acceleration.

Description

Technical Field

[0001] This invention relates to the fields of data compression, columnar storage, GPU parallel computing and database acceleration, and in particular to a GPU-oriented method and system for learned lossless lightweight compression (L3 compression), decompression, random access and query processing. Background Technology

[0002] With the development of interactive analytics, GPU-accelerated OLAP, streaming processing, and heterogeneous computing platforms, modern data analytics systems increasingly rely on the massive parallel capabilities of GPUs to achieve high throughput and low latency. For analytical workloads, columnar storage and compression are almost indispensable fundamental capabilities, as columnar organization improves scan efficiency and facilitates predicate filtering, while compression reduces I / O and memory bandwidth consumption and improves cache hits. However, existing open columnar storage formats and their compression layouts have long been designed with CPU architecture in mind, typically treating compression as an offline or semi-offline process on the CPU side, and primarily focusing on "decompression followed by computation" on the GPU side. This means that when data enters the GPU for execution, it still needs to undergo compression and decompression, format conversion, and PCIe round-trip transfers on the CPU side, making the loading, conversion, and disk persistence stages the end-to-end performance bottleneck.

[0003] Furthermore, the SIMT execution model of GPUs requires that thread bundles be as consistent as possible in control flow and that memory accesses satisfy rules such as merged access, locality of reference, and cache reuse. Traditional compression layouts are often better suited to the serial decoding and cache hierarchy of CPUs. Their bit-level decoding process on GPUs is prone to thread bundle divergence and a large number of unmerged accesses, making bit unpacking a throughput bottleneck. Meanwhile, in recent years, learning-based compression has widely adopted the lossless paradigm of "model plus residual," which achieves higher compression ratios by fitting a predictive model to local intervals of data and storing the residuals. This paradigm naturally requires adaptive partitioning, model selection, and residual bit width estimation. However, traditional adaptive partitioning often has sequential dependency chains, making it difficult to implement a highly parallel, low-divergence encoding pipeline on GPUs. If variable models and variable bit widths appear within a partition, they will also cause inconsistencies within thread bundles during GPU decoding, further reducing decoding efficiency.

[0004] Furthermore, compression formats for analytical queries must not only support high-throughput sequential scanning but also random access capabilities such as point queries and range queries, and, where possible, support selective execution strategies such as predicate pushdown and partition pruning. Without fine-grained, locationable metadata and a layout structure adapted to GPUs, it's easy to encounter situations where "entire columns or large ranges of data must be decompressed to obtain a small number of results," thus wasting GPU bandwidth and computing power.

[0005] Therefore, there is an urgent need for a GPU-native compressed data format that is redesigned at the format level for GPUs and deeply coupled with learning-based compression, along with an end-to-end GPU encoding and decoding pipeline. This would enable it to achieve high compression efficiency, high-throughput decompression, fast random access, and metadata-driven optimization that supports selective queries while ensuring lossless performance. Summary of the Invention

[0006] To address the aforementioned issues, the present invention aims to provide a learning-based lossless lightweight compression, decompression, and random access method, system, device, and medium for GPUs. This method proposes a learning-based lossless lightweight compressed data format and implements compressed writing, decompression reading, random access, and selective query processing on the GPU based on this data format. This enables compression, decompression, and query execution to be completed end-to-end on the GPU side, reducing CPU involvement and data round-trip overhead. Furthermore, it achieves high throughput and low latency through a GPU-friendly physical layout and thread-beam collaborative kernel, while providing locationable and usable fine-grained metadata support for random access and predicate pruning.

[0007] To achieve the above objectives, the present invention adopts the following technical solution:

[0008] In a first aspect, the present invention provides a learning-based lossless lightweight compression, decompression, random access, and query processing method for GPUs, comprising: The input data is processed using the GPU’s native learning compression pipeline, and SLAP layout data in a learning lossless lightweight compressed format is generated directly in GPU memory. The target SLAP layout data is decompressed and read using the warp collaborative learning decompression module to obtain decompressed data; Based on the target point or range request, selective access is performed on the target SLAP layout data on the GPU side, and the warp collaborative learning decompression module is called to decompress a portion of the target SLAP layout data to obtain decompressed data; Depending on the actual needs, the decompressed data can be output to the query operator for further processing or the query results can be returned directly.

[0009] Furthermore, the step of processing the input data using the GPU's native learning-based compression pipeline and directly generating SLAP layout data in a learning-based lossless lightweight compressed format in GPU memory includes: The input data is analyzed in parallel and partitioned so that the input data has relatively consistent statistical characteristics or residual bit width characteristics within each partition; Based on a pre-defined set of candidate models, model selection and model fitting are performed in parallel for each partition, and metadata description information for each partition is generated. Based on the metadata description information of each partition, the residuals of each partition are written into the SLAP layout in a bit-packed manner on the GPU.

[0010] Furthermore, the parallel analysis of the input data and the formation of partitions, so that the input data have relatively consistent statistical characteristics or residual bit width characteristics within each partition, includes: The input data is divided into blocks for analysis, and the residual bit width or encoding cost signal is estimated in parallel for each analysis block. Perform differential detection on the residual bit width or encoding cost signal of adjacent analysis blocks, and regard the differential result as a breakpoint when it exceeds a preset threshold; By using parallel scanning and compression primitives, a list of breakpoints is generated, and the set of breakpoints is materialized into a compact array. Based on a defined list of breakpoints, an initial list of partitions is generated on the GPU, such that each partition covers a continuous range and satisfies a preset minimum granularity constraint.

[0011] Furthermore, the step of performing model selection and model fitting in parallel for each partition based on a preset candidate model set, and generating metadata description information for each partition, includes: Based on a pre-set set of candidate models, the optimal model and parameters are selected with end-to-end storage cost as the standard, and the model type, model parameters and residual bit width of each partition are determined. Based on the model type, model parameters, residual bit width and corresponding end-to-end storage cost of each partition, cost-driven parallel adjacency join optimization is performed to determine the final partition list. Based on the final partition list, the layout metadata is finalized, and metadata description information for each partition is output.

[0012] Furthermore, based on the final partition list, the layout metadata is finalized, and metadata description information for each partition is output, including: Based on the final partition list, the number of 32-bit words required for the residual load of each partition, word_cnt, and the number of complete tiles, ntile, processed by the parallel path of each partition are calculated in parallel. An exclusive prefix is ​​performed on word_cnt, the number of 32-bit words required for the residual payload of each partition, and the starting offset off for each partition in the global bitstream array is obtained. Perform an exclusive prefix on each partition's ntile and construct the global tile-to-partition mapping information tile_pref; Based on the starting offset off of each partition in the global bitstream array, the mapping information tile_pref from global tiles to partitions, and combined with the existing start and end positions, model type, model parameters, residual bit width and number of complete tiles ntile for each partition, the partition metadata (meta) is organized and generated. Based on actual needs, the boundary information (bounds) of each partition is calculated and written in parallel. Allocate the total length deltas of the global bitstream buffer to 32-bit words and initialize it to zero, while reserving a padding area of ​​a preset length at the end to facilitate reading by the decoding window; Output the metadata description information for each partition, including partition metadata (meta), total buffer length (deltas), and boundary information (bounds) for each partition.

[0013] Furthermore, the step of writing the residuals of each partition into the SLAP layout on the GPU in a bit-packed manner based on the metadata description information of each partition includes: Based on the input data and the metadata description information of each partition, bit packing and writing are performed in parallel with global warp tile as the granularity. Based on the global warp tile to partition mapping information tile_pref, the partition index pid and the tile number within the partition are located; Read the partition parameters, including the model type, model parameters, residual bit width, and the starting offset of the partition in the global bitstream array. Calculate the layout parameter VTW and determine the residual bitstream organization method of the current warp tile in the SLAP layout; Initialize the model predictor and calculate the write start bit_base for each lane in the current warp tile; Check if the residual bit width is 0. If the residual bit width is 0, skip writing parameters and end or process the next warptile. If the residual bit width is not 0, then enter the K loop: generate residuals for the V elements of each lane in the current warp tile in sequence and write them bit by bit until all V residuals corresponding to that lane in the current warp tile have been written.

[0014] Furthermore, the decompression and reading of the target SLAP layout data using the warp collaborative learning decompression module to obtain decompressed data includes: Each partition is mapped to a thread block and decoded in units of warp tiles within the partition. The thread block obtains the partition range, model type, model parameters, residual bit width and bit stream offset based on the partition's metadata description information. Then, a warp collaborates to decode a warp tile. Within the warp, each lane sequentially consumes its continuous residual word sequence through a per-lane bit reader and obtains the residual value using a branchless or low-divergence bit extraction method. The residual value is then combined with the model prediction value for lossless reconstruction and output in a merged write-back manner.

[0015] Furthermore, based on the target point or range request, selective access is performed on the target SLAP layout data on the GPU side, and the warp collaborative learning decompression module is invoked to decompress a portion of the target SLAP layout data to obtain decompressed data, including: For random access, the execution layer quickly locates the set of partitions covering the target point or target range based on the partition boundary information. After the location is completed, the relevant partitions are decoded. When decoding the relevant partitions, only the warp tile and tail fragment covering the requested range are decoded to avoid decoding the entire partition. For a point lookup request, only the single tile containing the point is decoded, and the corresponding lane and lane offset are calculated based on the relative position of the point in the tile, thereby obtaining low-latency point access.

[0016] Furthermore, for random access, the execution layer quickly locates the set of partitions covering the target point or target range based on the partition boundary information. After the location is completed, before decoding the relevant partitions, it also includes predicate pushdown and partition pruning steps: for range predicates or comparison predicates, the predicate conditions are compared with the minimum and maximum values ​​of the partitions. If the partition boundary does not intersect with the predicate, the partition cannot generate data that satisfies the predicate, and the partition is directly skipped for decoding. For reserved partitions, the "decoding and filtering" or "decoding and aggregation" kernels are fused and executed on the GPU to reduce intermediate result materialization and reduce memory traffic.

[0017] Secondly, this invention provides a learning-based lossless lightweight compression, decompression, random access, and query processing system for GPUs, comprising: The write module is used to process the input data using the GPU's native learning compression pipeline and directly generate SLAP layout data in a learning lossless lightweight compressed format in GPU memory. The warp collaborative learning decompression module is used to decompress and read the target SLAP layout data to obtain decompressed data; The random access and query processing module is used to selectively access the target SLAP layout data on the GPU side according to the target point or range request, and call the warp collaborative learning decompression module to decompress part of the data in the target SLAP layout data to obtain decompressed data. The output module is used to output the decompressed data to the query operator for further processing or directly return the query results, depending on the actual needs.

[0018] The present invention has the following advantages due to the adoption of the above technical solutions: 1. This invention enables compression, decompression, and query execution to be completed on the GPU side as much as possible, thereby reducing CPU serial bottlenecks and data round-trip overhead, improving end-to-end throughput and reducing latency.

[0019] 2. This invention uses a SLAP Vertical lane-major bitstream layout to enable each lane to sequentially consume consecutive word sequences during the decoding stage, and utilizes the GPU L1 sector cache to achieve implicit prefetching and high multiplexing, thereby improving bit unpacking efficiency and throughput.

[0020] 3. This invention employs a mapping and collaborative decoding of "partition to thread block, warp tile to thread bundle" to ensure that the model type and bit width are consistent within the partition, thereby reducing thread bundle divergence and restoring merge write-back.

[0021] 4. This invention balances compression ratio and decoding speed through partition-level model selection and cost-driven partition optimization, enabling learning-based compression to be implemented on GPUs in a lightweight manner.

[0022] 5. This invention exposes partition boundaries, bitstream offsets, and optional partition limits as format metadata to the execution layer, enabling point lookup, range lookup, and predicate pushdown pruning to take effect efficiently before decompression, thereby achieving selective decoding and reducing invalid memory traffic.

[0023] 6. The format and decoding primitives of this invention can serve as a general compression base for GPU query engines, and are compatible with some decompression, late materialization and operator fusion execution strategies.

[0024] Based on the above effects, this invention can be widely applied to GPU databases, GPU OLAP, GPU accelerated ETL, GPU in-memory analysis, and any scenario that requires efficient processing of compressed data on a GPU. Attached Figure Description

[0025] Various other advantages and benefits will become apparent to those skilled in the art upon reading the following detailed description of preferred embodiments. The accompanying drawings are for illustrative purposes only and are not intended to limit the invention. Throughout the drawings, the same reference numerals denote the same parts. In the drawings: Figure 1 This is a schematic diagram of the GPU native learning-type lossless lightweight compressed data format and system architecture provided in an embodiment of the present invention; Figure 2 This is a flowchart of a learning-based decompression process based on thread bundle collaboration provided in an embodiment of the present invention; Figure 3 This is a flowchart of the delta-bits parallel cost optimal partitioning and parity merging loop provided in the embodiments of the present invention; Figure 4 This is a schematic diagram of the SLAP Vertical (lane-major) residual bitstream layout provided in an embodiment of the present invention; Figure 5 This is a schematic diagram of the SLAP mechanism and GPU L1 sector cache reuse provided in an embodiment of the present invention; Figure 6 This is a schematic diagram of layout metadata finalization and prefix scan allocation bitstream offset provided in an embodiment of the present invention; Figure 7 This is a schematic diagram of the parallel bit packing and writing process of SLAP vertical layout based on warp tile provided in the embodiment of the present invention. Detailed Implementation

[0026] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of the present invention. All other embodiments obtained by those skilled in the art based on the described embodiments of the present invention are within the scope of protection of the present invention.

[0027] It should be noted that the terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the scope of exemplary embodiments according to the invention. As used herein, the singular form is intended to include the plural form as well, unless the context clearly indicates otherwise. Furthermore, it should be understood that when the terms "comprising" and / or "including" are used in this specification, they indicate the presence of features, steps, operations, devices, components, and / or combinations thereof.

[0028] Terminology and Basic Definitions In this specification, a GPU warp refers to a set of threads on a GPU that execute in a lockstep manner, typically 32 threads; a lane refers to a single thread within a warp, and the lane ID can be used to distinguish the position of a thread within a warp; lane-major refers to a memory layout method that ensures that the sequence of data words accessed sequentially by each lane during execution is stored contiguously in memory; partitioning refers to dividing the input column data into several contiguous segments based on their positions, with each segment independently selecting a model and storing the residual payload; a warp tile refers to a set of output elements mapped to a warp for processing, which in some implementations can be defined as V elements output by each lane within a warp, so that a tile covers a total of 32 multiplied by V elements; residual refers to the difference between the input value and the model's predicted value, stored in a lossless manner; residual bit width refers to the minimum number of bits required to represent the residual, used for bit packing and bit unpacking.

[0029] For ease of understanding, this specification typically uses a group of 32 threads as an example for warp execution, but does not limit the specific number of threads. When the GPU's execution granularity or thread bundle size differs, as long as "the same group of cooperating threads shares a consistent model and bit width, and organizes the bit stream in a lane-major manner," an equivalent effect can be achieved. In this invention, column data can be integers (e.g., signed or unsigned integers), floating-point numbers, or encoded values ​​that can be mapped to integer fields. When the data types differ, the sign representation of the residuals, rounding rules, or model parameter representation can be adjusted accordingly, but the principle of "lossless reconstruction of model prediction and residual bit packing" still applies.

[0030] In some embodiments of this invention, a learning-oriented lossless lightweight compression, decompression, random access, and query processing method for GPUs is provided. First, the proposed L3 compression format is used to adaptively partition column data. A prediction model is selected for each partition, and the bit-packed residuals are stored. The residual bitstream adopts a SLAP Vertical lane-major layout, ensuring that the residual word sequences consumed sequentially in decoding within each lane of the same warp are continuous in memory, thereby utilizing the GPU L1 sector cache to achieve implicit prefetching and high reuse. Encoding employs GPU-side parallel bit-width analysis, breakpoint detection, cost-driven partition merging, prefix sum allocation, and parallel packing writing to achieve end-to-end GPU native writing. Decoding uses a warp-cooperative approach, mapping partitions to thread blocks and decoding by warp tile. A per-lane bit reader, branchless bit extraction, and finite difference predictor are used to achieve high-throughput reconstruction. This format supports random access and selective decompression, and can optionally store partition boundaries for predicate pushdown pruning, making it suitable for GPU databases and GPU analytics systems.

[0031] Correspondingly, in other embodiments of the present invention, a learning-oriented lossless lightweight compression, decompression, random access, and query processing system for GPUs is provided.

[0032] Exemplary embodiments of the invention will now be described in more detail with reference to the accompanying drawings. While exemplary embodiments of the invention are shown in the drawings, it should be understood that the invention can be implemented in various forms and should not be limited to the embodiments set forth herein. Rather, these embodiments are provided to enable a more thorough understanding of the invention and to fully convey the scope of the invention to those skilled in the art.

[0033] Example 1 like Figure 1 As shown, this embodiment provides a learning-oriented lossless lightweight compression, decompression, random access, and query processing method for GPUs, which includes the following steps: 1) L3 write: The input data (i.e., the original uncompressed data) is processed using the GPU’s native learning compression pipeline, and SLAP layout data in a learning lossless lightweight compressed format is generated directly in the GPU memory; 2) L3 format decompression and reading: The target SLAP layout data is decompressed and read using the warp collaborative learning decompression module to obtain the decompressed data; 3) Random access and query processing: Based on the target point or range request, selectively access the target SLAP layout data on the GPU side, and call the warp collaborative learning decompression module to decompress the required partitions or warp tiles in the target SLAP layout data to obtain decompressed data; 4) Output: Depending on the actual needs, output the decompressed data to the query operator for further processing or directly return the query results.

[0034] Furthermore, in step 1) above, such as Figures 2-6 As shown, this embodiment proposes a GPU-native learning-oriented lossless lightweight compressed data format, namely the L3 format, for block-based compressed storage of column data. This data format organizes data using partitions as the basic unit, with each partition corresponding to a metadata record and a residual payload. The metadata describes the logical range of the partition and all parameter information required for decoding, including at least the start and end positions of the partition, model type, model parameters, residual bit width, residual bitstream offset, and the number of thread bundle tiles contained in the partition. In some implementations, it may further include global tile-to-partition mapping prefix information and partition boundary information used for predicate pushdown. The residual payload is stored using a bit-packing method and adopts a GPU-oriented vertical lane-major organization, ensuring that the residual word sequences consumed sequentially by each lane thread within the same thread bundle during decoding are stored continuously in memory, thus forming cross-iteration cache reuse for GPU L1 sector cache. This vertical lane-major layout is referred to as the SLAP Vertical layout in this specification.

[0035] Based on the aforementioned GPU native learning-based lossless lightweight compressed data format, this embodiment proposes a method for generating L3 format compressed writing on the GPU. An encoding pipeline is built around GPU parallel primitives, enabling partition generation, model selection, partition optimization, metadata shaping, and bit packing writing to all be completed in parallel on the GPU.

[0036] Specifically, the L3 write process is organized into multiple stages that can be adapted to parallel execution by the GPU, including: 1.1) Parallel cost-optimal partitioning stage: Parallel analysis of the input data is performed to form partitions, so that the input data have relatively consistent statistical characteristics or residual bit width characteristics in each partition, thereby providing stable partition boundaries for subsequent model fitting and bit packing.

[0037] Specifically, such as Figure 2 As shown, it includes the following steps: 1.1.1) Perform block analysis on the input data, and estimate the residual bit width bw or the coding cost signal in parallel for each analysis block; where the coding cost can be understood as the quantification of the difficulty of local data compression; 1.1.2) Perform differential detection on the residual bit width or encoding cost signal of adjacent analysis blocks. When the differential result exceeds the preset threshold tau, it is regarded as a breakpoint. 1.1.3) By using primitives such as parallel scanning and compaction, a list of breakpoints is generated, and the set of breakpoints is materialized into a compact array; 1.1.4) Based on the defined list of breakpoints, an initial list of partitions is generated on the GPU, so that each partition covers a continuous range and meets the preset minimum granularity constraint, thereby ensuring that the subsequent decoding mapping of "one partition corresponds to one thread block" has a reasonable workload.

[0038] 1.2) Model selection and metadata finalization stage: Based on the preset candidate model set, the encoder performs model selection and model fitting in parallel for each partition and generates metadata descriptions that can be directly used by the decoder, so that the decoding path of each partition remains consistent at the warp level.

[0039] Specifically, it includes the following steps: 1.2.1) Based on the preset candidate model set, select the optimal model and parameters with end-to-end storage cost as the standard, and determine the model type mt, model parameter theta, and residual bit width bw for each partition.

[0040] In this embodiment, the candidate model may include FOR, linear model, quadratic or cubic polynomial model, and constant or run-length friendly model, etc. The model type can be adjusted according to actual needs, and the present invention does not limit it.

[0041] When selecting candidate models, this embodiment uses end-to-end storage cost as the criterion to select the optimal model and model parameters. Preferably, the end-to-end storage cost includes both partition metadata overhead and residual load overhead, so that the metadata bloat caused by overly fine partitioning and the bit width bloat caused by overly coarse partitioning can be balanced under the same cost function.

[0042] 1.2.2) Based on the model type, model parameters, residual bit width and corresponding end-to-end storage cost of each partition, perform cost-driven parallel adjacency join optimization and determine the final partition list.

[0043] To further reduce unnecessary over-splitting and improve compression ratio, this embodiment also performs cost-driven parallel adjacency merging and optimization after model selection. Specifically, in this embodiment, an odd-even round adjacency merging method is preferred to merge adjacent partitions. That is, in even rounds, adjacent even-indexed partition pairs are attempted to be merged, and in odd rounds, adjacent odd-indexed partition pairs are attempted to be merged to avoid merging conflicts in the same round. In each round of merging, the GPU evaluates the change in total encoding cost delta_cost after merging adjacent partition pairs in parallel. Only when merging can reduce the total encoding cost and the size of the merged partition does not exceed the preset maximum granularity constraint ρ_max is the pair marked as mergeable. Subsequently, the partition list is updated through parallel compression and the next round is entered until no more merging occurs or the stopping condition is met, resulting in the final partition list partitions_star.

[0044] The adjacency-to-adjacency merging optimization method in this embodiment can avoid serial splitting and merging links on the GPU while obtaining a partition structure that is close to the cost-optimal.

[0045] 1.2.3) Based on the final partition list, the encoding end performs layout metadata shaping and outputs metadata description information.

[0046] like Figure 3 As shown, it includes the following steps: ① Based on the final partition list, calculate in parallel the number of 32-bit words required for the residual load of each partition (word_cnt) and the number of complete tiles (ntile) processed by the parallel path of each partition.

[0047] Specifically, let n = end[p] - start[p] be the number of elements contained in the p-th partition. V is a pre-defined layout parameter used to represent the number of output elements that each lane in a warp tile is responsible for processing. Therefore, the total number of output elements covered by a single warp tile is defined as T = 32 × V, where 32 represents the number of lanes in a warp. V is pre-selected and kept consistent by the encoding and decoding ends. In a preferred implementation, V can be chosen to be a multiple of 32 to reduce cross-word splicing and extra padding overhead, and where possible, to make V × bw[p] divisible by 32, so that the bitstream of each lane is naturally aligned to 32-bit words. In this embodiment, V = 64 is preferred. Based on this, ntile[p] represents the number of complete tiles in the p-th partition that can be processed by the regular warp-tile parallel path; for ordinary model partitions, ntile[p] = floor(n / T); for MODEL_CONSTANT partitions, since they use constant or run-specific processing paths and do not enter the ordinary residual tile packaging process, ntile[p] = 0. Meanwhile, word_cnt[p] represents the number of 32-bit words required by the residual payload of the p-th partition in the final global bitstream array; for ordinary model partitions, word_cnt[p] = ceil((n × bw[p]) / 32); for MODEL_CONSTANT partitions, word_cnt[p] is determined by its run-length payload size, and can be expressed as word_cnt[p] = RLEWords(runs, θ[p]). When runs = 1, this partition does not generate a residual payload, so word_cnt[p] = 0. Furthermore, performing an exclusive prefix sum on all word_cnt[p] yields the starting word offset off[p] of each partition in the global bitstream array, and performing an exclusive prefix sum on all ntile[p] yields tile_pref[p], thereby establishing a mapping relationship between the global warp tile and its respective partition, and forming partition metadata for subsequent packaging and decoding.

[0048] ② Perform an exclusive prefix on the number of 32-bit words required for the residual payload of each partition, and obtain the starting offset off for each partition in the global bitstream array; ③ Perform an exclusive prefix on the number of ntiles for each partition, and construct the global tile-to-partition mapping information tile_pref; ④ Based on the starting offset off of each partition in the global bitstream array, the mapping information tile_pref from global tile to partition, and combined with the existing start and end positions, model type, model parameters, residual bit width and number of complete tiles of each partition, organize and generate partition metadata (meta) that can be directly used for subsequent bit packing, writing and decoding. ⑤ Based on actual needs, calculate and write the boundary information of each partition in parallel, that is, the minimum and maximum values ​​of each partition; the calculation of the minimum and maximum values ​​of the partition is for predicate pushdown and partition pruning in subsequent query execution. If this operation is not involved, this step can be ignored. ⑥ Allocate the total length deltas of the global bitstream buffer to 32-bit words and initialize it to zero, while reserving a certain length of padding area at the end to facilitate reading by the decoding window; ⑦ Output the metadata description information of each partition, including partition metadata (meta), total buffer length (deltas), and boundary information (bounds) of each partition.

[0049] The above process enables the final format layout to be generated directly on the GPU, reducing intermediate format conversions and CPU involvement, thereby achieving end-to-end GPU native compression writing.

[0050] 1.3) Parallel data packaging stage: Based on the metadata description information of each partition, the residuals of each partition are written into the SLAP Vertical layout in bit packing mode on the GPU to form a compressed payload that can be directly decoded at high throughput on the GPU.

[0051] After obtaining the metadata description information, the encoding end performs bit-packing and writing at the warp tile parallel granularity. That is, each tile is processed by a warp or a thread block. Each lane within the warp generates its own residual sequence and packs it into the lane-major layout of the SLAP Vertical according to the bw bits.

[0052] The SLAP layout data embodies the three core components of the compressed data in GPU memory: model parameters, bit packing increments, and partition boundaries. Model parameters represent the necessary information for selecting the model for each partition, enabling the decoder to reconstruct predicted values ​​without relying on external context. Bit packing increments store the bitstream payload of the partition residuals and provide a continuously addressable storage basis for bit-by-bit extraction and unpacking on the GPU. Partition boundaries identify the coverage area of ​​the partition in the original column, allowing the query side to locate and selectively access data based on the boundaries. It should be noted that... Figure 1The emphasis is on the logical composition relationship of these three types of information at the layout level. The specific representation of model parameters, the specific packaging method of bit streams, and the field encoding of partition boundaries in metadata can be further explained in subsequent embodiments with reference to the corresponding figures.

[0053] like Figure 4 The diagram shows a residual layout optimized for GPU bit unpacking and cache reuse. Assume a warp tile covers a total of 32 multiplied by V, where V represents the number of elements output per lane; and assume the residual bit width of the partition to which this tile belongs is bw. During decoding, each lane needs to sequentially read the residual bit sequence corresponding to its own output elements. To improve read continuity, this embodiment uses a lane-major vertical organization method, storing the residual word sequences corresponding to the same lane contiguously in memory.

[0054] In a preferred implementation, the V residuals of each lane are first bit-packed according to bw bits, and then organized into several 32-bit word sequences aligned to 32-bit words. The number of 32-bit words required per lane is related to V and bw, and can be expressed as the floor function of V multiplied by bw and then divided by 32. To reduce cross-word concatenation and padding overhead, V is preferably chosen to be a multiple of 32, and where possible, V multiplied by bw is divisible by 32, thus naturally aligning the bitstream of each lane to the word boundaries and avoiding additional padding.

[0055] In the SLAP Vertical layout, the payload of the same tile can be viewed as a two-dimensional structure of 32 rows, each containing W words. The row index corresponds to the lane ID, and the column index corresponds to the word sequence number of that lane. Its linearization in memory is achieved through row-by-row contiguous access, ensuring that the W words of each lane are consecutive in memory. This allows each lane to complete bitstream reading by sequentially accessing consecutive addresses during the decoding phase. While this layout results in regular, spanning accesses when reading the same word sequence number, the subsequent contiguous accesses of each lane to its subsequent words exhibit strong locality, making it highly suitable for integration with GPU L1 sector caching mechanisms to achieve cross-iteration cache reuse.

[0056] like Figure 5As shown, this embodiment illustrates how the SLAP mechanism works in conjunction with the GPU's sector-based L1 cache to improve bit unpacking efficiency. Modern GPUs' L1 caches can be loaded in sectors, meaning a cache line is divided into multiple fixed-size sectors. When a thread beam accesses certain addresses, the sectors covering those addresses are loaded into the L1 cache. Based on the SLAP Vertical layout, when a thread beam processes a tile, it first reads the first word of each lane. This step involves a regular span access and triggers multiple sector loadings. Subsequently, each lane sequentially reads its subsequent word sequence. Since these words are contiguous in memory and fall within loaded or adjacent sectors, a large number of subsequent reads can hit the L1 cache, thus transforming the main cost of bit unpacking from high-latency global memory access to low-latency cache hit access.

[0057] In some implementations, the bit reader reads a continuous 64-bit or 128-bit window from global memory using a fixed window approach, and extracts the bit residual (bw) through shifting and masking. To eliminate the need for complex branching judgments at the boundaries during window reading, a padding word of a certain length can be set at the end of the bit stream to ensure that the window reading does not exceed the boundaries. This also facilitates a branchless, low-branching bit extraction process.

[0058] Specifically, such as Figure 6 As shown, the bit-packaging method includes the following steps: 1.3.1) Based on the input data and metadata information, bit-packing and writing are performed at the parallel granularity of global warp tiles; 1.3.2) Based on the mapping information from the global warp tile to the partition, tile_prf locates the partition index pid (used to identify the target partition to which the current global warp tile belongs) and the tile number within the partition; 1.3.3) Read the partition parameters, including the model type mt corresponding to the partition, the model parameter theta, the residual bit width bw, and the starting offset off of the partition in the global bit stream; 1.3.4) Calculate the layout parameter VTW and determine the residual bitstream organization method of the current warp tile in the SLAP Vertical (lane-major) layout; 1.3.5) Initialize the predictor and calculate the bit_base, the starting point for writing each lane in the current warp tile; 1.3.6) Check if bw is 0. If bw is 0, skip writing parameters and end or process the next warp tile; if bw is not 0, proceed to step 1.3.7). 1.3.7) Enter the K loop: Generate residuals for the V elements of each lane in the current warp tile and write them bit by bit until all V residuals corresponding to that lane in the current warp tile have been written.

[0059] The K-loop process is as follows: First, generate the predicted value pred based on the current original input element index idx and the model type and model parameters selected for that partition; second, calculate the residual value delta of the current original input element based on the original input element and the predicted value; then, write the residual value delta into the bit stream according to the residual bit width bw; finally, update the predictor and proceed to the next loop.

[0060] In some implementations, atomic bitwise or equivalent safe write mechanisms can be used to simplify cross-word boundary writes; in other implementations, non-atomic writes can be used to further improve coding throughput if the starting position of each lane is word-aligned and each lane only writes its own word region.

[0061] Furthermore, in step 2) above, the L3 format decompression and reading are mainly achieved through the warp collaborative learning decompression module. This module reads model parameters and bit packing increments from the L3 format SLAP layout data and determines the decoding range based on partition boundaries. The warp collaborative learning decompression module contains key sub-processes such as SLAP-driven unpacking, branchless bit extraction, and finite difference calculation. This allows the same warp to collaboratively complete bit stream reading, residual extraction, and prediction reconstruction with consistent control flow during decoding, thereby achieving high-throughput, low-divergence decompression output on the GPU. The decompression output can be directly used by query operators or fused with operators such as filtering, projection, and aggregation to reduce the additional bandwidth consumption caused by intermediate result materialization.

[0062] like Figure 7 The diagram illustrates the warp collaborative decompression method for SLAP Vertical layouts provided in this embodiment. This method preferably employs a strategy of "one partition mapped to one thread block, one warp tile processed collaboratively by one warp," enabling collaborative threads within a thread block to share the same model type and residual bit width at the partition level, thereby naturally reducing thread bundle divergence. After each thread block starts, it first loads partition metadata and determines information such as partition range, model type, model parameters, residual bit width, and bitstream offset. Then, based on the model type, it cyclically processes the data within the partition, using warp tiles as units. Each warp tile is collaboratively decoded by one warp, and each lane within the warp is responsible for outputting V elements.

[0063] When the partition model is a constant or run-friendly type, if the partition contains only a single constant or a single run, the thread block can directly fill the corresponding range of the output array in parallel without reading the residual bit stream; if the partition contains multiple constants or runs, the thread block can read the run header and run payload and parse the run value and run length in parallel. By prefix summing the run length, the write start point of each run in the output is obtained, and then the cooperating thread unfolds the write in parallel, thereby completing the output recovery with lower divergence.

[0064] When the partitioned model is of the FOR or polynomial prediction type, the thread block processes warp tiles cyclically. First, it checks if bw is 0. If it is 0, it means that the warp tile does not need to be written to the residual bit stream under the current model. In this case, only the predictor generates the result and ends the residual writing of the current warp tile or moves to the next warp tile. Otherwise, each lane initializes a per-lane bit reader. Its bit starting point can be determined by the partition bit stream offset, the tile number in the partition, the lane id, and the number of words W per lane, so that each lane bit reader advances sequentially within its dedicated continuous word sequence. Subsequently, each lane reads the residual sequentially and performs bit extraction. Preferably, a branchless or low-divergence shift and masking method is used to extract the bw bit residual, and sign extension or equivalent recovery is performed to obtain the residual value. For partitions using model prediction, the decoder will initialize a finite difference predictor based on the model parameters and update it element by element. The predictor can generate predicted values ​​through an iterative chain of addition, thereby avoiding value-by-value floating-point multiplication and improving throughput. Each output value is synthesized from the predicted value and the residual, and is written back to the output by a cooperative thread using a lane interleaving method, so that the write-back addresses of the same warp are continuous and merged writing is achieved.

[0065] To ensure lossless consistency, some implementations use FP64 for prediction calculations and avoid FMA fusion operations, thereby ensuring that the calculation order at the encoding and decoding ends is consistent and reducing the risk of rounding discrepancies.

[0066] Furthermore, in step 3) above, this embodiment provides a random access and selective decompression method based on the L3 format for point lookup, range lookup, and selective filtering scenarios. During random access, the execution layer can quickly locate the set of partitions covering the target point or range based on partition boundary metadata. The location method can be binary search or a pre-built index structure. After location, only the relevant partitions need to be decoded, and within the partition, only the warp tile and tail fragment covering the requested range can be decoded, thus avoiding full decoding of the partition. For point lookup requests, only the single tile containing the point can be decoded, and the corresponding lane and lane offset can be calculated based on the relative position of the point within the tile, thereby obtaining low-latency point access.

[0067] When the format carries partition boundary information, the execution layer can perform predicate pushdown and partition pruning before decoding. Specifically, for range predicates or comparison predicates, the predicate conditions can be compared with the minimum and maximum values ​​of the partitions. If the partition boundary does not intersect with the predicate, the partition cannot produce data that satisfies the predicate, and therefore the partition can be skipped for decoding. For reserved partitions, "decoding and filtering" or "decoding and aggregation" kernels can be further integrated and executed on the GPU to reduce intermediate result materialization and lower memory traffic. Through the above mechanisms, invalid decompression and bandwidth consumption can be significantly reduced, and selective query throughput can be improved.

[0068] Example 2 The above-described embodiment 1 provides a learning-oriented lossless lightweight compression, decompression, random access, and query processing method for GPUs. Correspondingly, this embodiment provides a learning-oriented lossless lightweight compression, decompression, random access, and query processing system for GPUs. The system provided in this embodiment can implement the learning-oriented lossless lightweight compression, decompression, random access, and query processing method for GPUs in embodiment 1. This system can be implemented through software, hardware, or a combination of both. For example, the system may include integrated or separate functional modules or units to execute the corresponding steps in the methods of embodiment 1. Since the system in this embodiment is basically similar to the method embodiment, the description process in this embodiment is relatively simple. Relevant details can be found in the description of embodiment 1. The system embodiment provided in this embodiment is merely illustrative.

[0069] This embodiment provides a learning-based lossless lightweight compression, decompression, random access, and query processing system for GPUs. This system can be deployed on a computing platform that includes a GPU in software, hardware, or a combination of both.

[0070] Specifically, the system includes: The write module is used to process the input data using the GPU's native learning compression pipeline and directly generate SLAP layout data in a learning lossless lightweight compressed format in GPU memory. The warp collaborative learning decompression module is used to decompress and read the target SLAP layout data to obtain decompressed data; The random access and query processing module is used to selectively access the target SLAP layout data on the GPU side according to the target point or range request, and call the warp collaborative learning decompression module to decompress the required partitions or warp tiles in the target SLAP layout data to obtain decompressed data. The output module is used to output the decompressed data to the query operator for further processing or directly return the query results, depending on the actual needs.

[0071] Furthermore, the writing module includes: The parallel cost-optimal partitioning module is used to perform parallel analysis on the input data and form partitions, so that the input data has relatively consistent statistical characteristics or residual bit width characteristics in each partition, thereby providing stable partition boundaries for subsequent model fitting and bit packing. The model selection and metadata finalization stage is used to perform model selection and model fitting in parallel on each partition based on a preset set of candidate models, and generate metadata descriptions that can be directly used by the decoding end, so that the decoding path of each partition remains consistent at the warp level. The parallel data packing module is used to write the residuals of each partition into the SLAP Vertical layout in a bit packing manner on the GPU based on the metadata information of each partition, forming a compressed payload that can be directly decoded at high throughput on the GPU.

[0072] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and not to limit it. Although the present invention has been described in detail with reference to the above embodiments, those skilled in the art should understand that modifications or equivalent substitutions can still be made to the specific implementation of the present invention. Any modifications or equivalent substitutions that do not depart from the spirit and scope of the present invention should be covered within the scope of protection of the claims of the present invention.

Claims

1. A learning-based lossless lightweight compression, decompression, random access, and query processing method for GPUs, characterized in that, include: The input data is processed using the GPU’s native learning compression pipeline, and SLAP layout data in a learning lossless lightweight compressed format is generated directly in GPU memory. The target SLAP layout data is decompressed and read using the warp collaborative learning decompression module to obtain decompressed data; Based on the target point or range request, selective access is performed on the target SLAP layout data on the GPU side, and the warp collaborative learning decompression module is called to decompress a portion of the target SLAP layout data to obtain decompressed data; Depending on the actual needs, the decompressed data can be output to the query operator for further processing or the query results can be returned directly.

2. The GPU-oriented learning-based lossless lightweight compression, decompression, random access, and query processing method as described in claim 1, characterized in that, The process of using the GPU's native learning-based compression pipeline to process the input data and directly generate SLAP layout data in a learning-based lossless lightweight compressed format in GPU memory includes: The input data is analyzed in parallel and partitioned so that the input data has relatively consistent statistical characteristics or residual bit width characteristics within each partition; Based on a pre-defined set of candidate models, model selection and model fitting are performed in parallel for each partition, and metadata description information for each partition is generated. Based on the metadata description information of each partition, the residuals of each partition are written into the SLAP layout in a bit-packed manner on the GPU.

3. The GPU-oriented learning-based lossless lightweight compression, decompression, random access, and query processing method as described in claim 2, characterized in that... The parallel analysis of the input data and the partitioning of the data to ensure that the input data has relatively consistent statistical characteristics or residual bit width characteristics within each partition includes: The input data is divided into blocks for analysis, and the residual bit width or encoding cost signal is estimated in parallel for each analysis block. Perform differential detection on the residual bit width or encoding cost signal of adjacent analysis blocks, and regard the differential result as a breakpoint when it exceeds a preset threshold; By using parallel scanning and compression primitives, a list of breakpoints is generated, and the set of breakpoints is organized into a compact array. Based on a defined list of breakpoints, an initial list of partitions is generated on the GPU, such that each partition covers a continuous range and satisfies a preset minimum granularity constraint.

4. The GPU-oriented learning-based lossless lightweight compression, decompression, random access, and query processing method as described in claim 2, characterized in that, The process of selecting and fitting models in parallel for each partition based on a preset set of candidate models, and generating metadata description information for each partition, includes: Based on a pre-set set of candidate models, the optimal model and parameters are selected with end-to-end storage cost as the standard, and the model type, model parameters and residual bit width of each partition are determined. Based on the model type, model parameters, residual bit width and corresponding end-to-end storage cost of each partition, cost-driven parallel adjacency join optimization is performed to determine the final partition list. Based on the final partition list, the layout metadata is finalized, and metadata description information for each partition is output.

5. The GPU-oriented learning-based lossless lightweight compression, decompression, random access, and query processing method as described in claim 4, characterized in that... Based on the final partition list, the layout metadata is finalized, and metadata description information for each partition is output, including: Based on the final partition list, the number of 32-bit words required for the residual load of each partition, word_cnt, and the number of complete tiles, ntile, processed by the parallel path of each partition are calculated in parallel. An exclusive prefix is ​​performed on word_cnt, the number of 32-bit words required for the residual payload of each partition, and the starting offset off for each partition in the global bitstream array is obtained. Perform an exclusive prefix on each partition's ntile and construct the global tile-to-partition mapping information tile_pref; Based on the starting offset off of each partition in the global bitstream array, the mapping information tile_pref from global tiles to partitions, and combined with the existing start and end positions, model type, model parameters, residual bit width and number of complete tiles ntile for each partition, the partition metadata (meta) is organized and generated. Based on actual needs, the boundary information (bounds) of each partition is calculated and written in parallel. Allocate the total length deltas of the global bitstream buffer to 32-bit words and initialize it to zero, while reserving a padding area of ​​a preset length at the end to facilitate reading by the decoding window; Output the metadata description information for each partition, including partition metadata (meta), total buffer length (deltas), and boundary information (bounds) for each partition.

6. The GPU-oriented learning-based lossless lightweight compression, decompression, random access, and query processing method as described in claim 5, characterized in that... The process of writing the residuals of each partition into the SLAP layout on the GPU in a bit-packed manner, based on the metadata description information of each partition, includes: Based on the input data and the metadata description information of each partition, bit packing and writing are performed in parallel with global warp tile as the granularity. Based on the global warp tile to partition mapping information tile_pref, the partition index pid and the tile number within the partition are located; Read the partition parameters, including the model type, model parameters, residual bit width, and the starting offset of the partition in the global bitstream array. Calculate the layout parameter VTW and determine the residual bitstream organization method of the current warp tile in the SLAP layout; Initialize the model predictor and calculate the write start bit_base for each lane in the current warp tile; Check if the residual bit width is 0. If the residual bit width is 0, skip writing parameters and end or process the next warp tile. If the residual bit width is not 0, then enter the K loop: generate residuals for the V elements of each lane in the current warp tile in sequence and write them bit by bit until all V residuals corresponding to that lane in the current warp tile have been written.

7. The GPU-oriented learning-based lossless lightweight compression, decompression, random access, and query processing method as described in claim 2, characterized in that, The method of using the warp collaborative learning decompression module to decompress and read the target SLAP layout data to obtain decompressed data includes: Each partition is mapped to a thread block and decoded in units of warp tiles within the partition. The thread block obtains the partition range, model type, model parameters, residual bit width and bit stream offset based on the partition's metadata description information. Then, a warp collaborates to decode a warp tile. Within the warp, each lane sequentially consumes its continuous residual word sequence through a per-lane bit reader and obtains the residual value using a branchless or low-divergence bit extraction method. The residual value is then combined with the model prediction value for lossless reconstruction and output in a merged write-back manner.

8. The GPU-oriented learning-based lossless lightweight compression, decompression, random access, and query processing method as described in claim 4, characterized in that... The process involves selectively accessing the target SLAP layout data on the GPU side based on the target point or range request, and then calling the warp collaborative learning decompression module to decompress a portion of the target SLAP layout data to obtain decompressed data, including: For random access, the execution layer quickly locates the set of partitions covering the target point or target range based on the partition boundary information. After the location is completed, the relevant partitions are decoded. When decoding the relevant partitions, only the warp tile and tail fragment covering the requested range are decoded to avoid decoding the entire partition. For a point lookup request, only the single tile containing the point is decoded, and the corresponding lane and lane offset are calculated based on the relative position of the point in the tile, thereby obtaining low-latency point access.

9. The GPU-oriented learning-based lossless lightweight compression, decompression, random access, and query processing method as described in claim 8, characterized in that, For random access, the execution layer quickly locates the set of partitions covering the target point or target range based on the partition boundary information. After the location is completed, before decoding the relevant partitions, it also includes predicate pushdown and partition pruning steps: For range predicates or comparison predicates, the predicate conditions are compared with the minimum and maximum values ​​of the partitions. If the partition boundary does not intersect with the predicate, the partition cannot generate data that satisfies the predicate, and the partition is directly skipped for decoding. For reserved partitions, the "decoding and filtering" or "decoding and aggregation" kernels are fused and executed on the GPU to reduce intermediate result materialization and reduce memory traffic.

10. A learning-based lossless lightweight compression, decompression, random access, and query processing system for GPUs, characterized in that, include: The write module is used to process the input data using the GPU's native learning compression pipeline and directly generate SLAP layout data in a learning lossless lightweight compressed format in GPU memory. The warp collaborative learning decompression module is used to decompress and read the target SLAP layout data to obtain decompressed data; The random access and query processing module is used to selectively access the target SLAP layout data on the GPU side according to the target point or range request, and call the warp collaborative learning decompression module to decompress part of the data in the target SLAP layout data to obtain decompressed data. The output module is used to output the decompressed data to the query operator for further processing or directly return the query results, depending on the actual needs.

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