An emulation test system for integrated circuits

Abstract

This invention discloses a simulation testing system for integrated circuits, belonging to the field of integrated circuit testing technology. It includes a simulation execution module, a data acquisition module, a fault diagnosis module, a parameter correction module, a control module, a visualization module, and an alarm module. The simulation execution module runs a digital twin model of the integrated circuit and outputs simulation parameters, such as temperature, voltage, and timing margin, providing simulation benchmark data for subsequent deviation quantification. This invention overcomes the limitations of traditional single-parameter monitoring by combining multi-parameter comprehensive deviation quantification and dynamic weight allocation with a conditional probability model to accurately diagnose faults and generate a priority list. The hierarchical digital twin model interacts with real-time data streams to achieve accurate simulation of physical behavior, providing a high-precision benchmark for deviation quantification. The model adaptively optimizes, and with iterative control closed-loop, it improves fault identification accuracy and enhances system robustness and practicality.

Description

Technical Field

[0001] This invention relates to the field of integrated circuit testing technology, and in particular to a simulation testing system for integrated circuits. Background Technology

[0002] As integrated circuit technology continues to evolve towards higher density, higher speed, and lower power consumption, its design complexity and manufacturing process difficulty have increased significantly, placing higher demands on the accuracy, efficiency, and reliability of simulation and testing technologies. Traditional integrated circuit simulation and testing methods mainly rely on single parameter monitoring or static model simulation. For example, hardware tools such as temperature sensors and voltage monitoring circuits are used to collect real-time operating parameters of the physical chip and combine them with empirical thresholds to judge the risk of failure. Alternatively, static digital twin models are built based on tools such as finite element analysis and SPICE circuit simulation to simulate the electrothermal characteristics or signal transmission behavior of the chip. Although these methods are relatively mature in the field of circuit simulation and testing, they still have many limitations.

[0003] First, traditional single-parameter monitoring methods only focus on individual indicators such as temperature and voltage, making it difficult to comprehensively and accurately assess the operating status of integrated circuits. They lack a multi-parameter comprehensive deviation quantification mechanism, resulting in insufficient accuracy and foresight in fault identification, difficulty in providing clear parameter correction directions, and inability to meet the testing needs of complex integrated circuits. Second, static digital twin models cannot dynamically track the real-time changes of physical chips. Model parameter correction relies on manual experience or fixed iterative strategies, which can easily get trapped in local optima. Some models lack hierarchical design, making it difficult to balance simulation details with cross-level parameter calls, and making it difficult to effectively reproduce the behavior of complex circuits. This results in a lack of high-precision benchmark data for subsequent deviation quantification, which in turn affects the reliability of fault diagnosis and parameter correction. Summary of the Invention

[0004] To address the challenges mentioned in the background section regarding the difficulty in comprehensively and accurately assessing the operational status of integrated circuits and effectively reproducing the behavior of complex circuits, we propose a simulation and testing system for integrated circuits.

[0005] The main technical solution is: an integrated circuit simulation and testing system, including a simulation execution module, a data acquisition module, a fault diagnosis module, a parameter correction module, a control module, a visualization module, and an alarm module;

[0006] The simulation execution module is configured to run a digital twin model of the integrated circuit and output simulation parameters;

[0007] The data acquisition module is configured to acquire real-time operating parameters of the integrated circuit physical chip and extract simulation parameters output by the simulation execution module;

[0008] The fault diagnosis module is configured to calculate the deviation based on the real-time operating parameters and simulation parameters collected by the data acquisition module, and to quantify the probability of occurrence of each fault mode by combining the conditional probability model trained by historical fault data with the prior probability of the fault mode.

[0009] The parameter correction module is configured to dynamically adjust the parameters of the digital twin model based on the probability of the fault mode output by the fault diagnosis module through a transfer learning loss function.

[0010] The control module is configured to coordinate the operation of the simulation execution module, data acquisition module, fault diagnosis module, and parameter correction module to achieve closed-loop control of the simulation test.

[0011] The visualization module is configured to visualize simulation parameters, real-time running parameters, a list of fault modes priority, and model parameter adjustment status.

[0012] The alarm module is configured to issue an alarm signal when the deviation exceeds a preset threshold.

[0013] Preferably, the data acquisition module includes a temperature acquisition unit, a voltage acquisition unit, a timing acquisition unit, and a simulation parameter extraction unit;

[0014] The temperature acquisition unit is configured to acquire the real-time temperature of the physical chip;

[0015] The voltage acquisition unit is configured to acquire real-time voltage fluctuations of the physical chip;

[0016] The timing acquisition unit is configured to acquire the real-time timing margin of the physical chip;

[0017] The simulation parameter extraction unit is configured to extract simulation parameters corresponding to the real-time running parameters from the simulation execution module.

[0018] Preferably, the fault diagnosis module includes a deviation quantization unit, a fault probability calculation unit, and a fault sorting unit;

[0019] The deviation quantization unit is configured to calculate the relative deviation between the real-time operating parameters and the simulation parameters, obtain the deviation degree, and output it to the fault probability calculation unit.

[0020] The fault probability calculation unit is configured to calculate the posterior probability of each fault mode through a conditional probability model when the deviation exceeds a preset threshold. The larger the deviation, the higher the weight of the posterior probability of the corresponding fault mode. The deviation is calculated by dividing the absolute difference between the real-time running parameters and the simulation parameters by the simulation parameters.

[0021] The fault sorting unit is configured to sort the posterior probabilities from high to low and output a fault mode priority list.

[0022] Preferably, the parameter correction module includes a loss function calculation unit, a parameter adjustment unit, and a correction coefficient calculation unit;

[0023] The loss function calculation unit is configured to calculate the error between the simulation parameters output by the digital twin model and the real-time running parameters, and combine the regularization term of the model parameters to obtain the transfer learning loss function.

[0024] The parameter adjustment unit is configured to dynamically adjust the parameters of the digital twin model based on the gradient of the loss function.

[0025] The correction coefficient calculation unit is configured to calculate the correction coefficient based on the deviation degree, combined with the base learning rate and the deviation amplification factor. The correction coefficient increases with the increase of the deviation degree, so that the magnitude of parameter adjustment is positively correlated with the deviation degree, thereby controlling the magnitude of parameter adjustment.

[0026] Wherein, the base learning rate is a preset initial rate for parameter adjustment, and the deviation amplification coefficient is a preset coefficient used to enhance the influence of the deviation on the correction coefficient.

[0027] Preferably, the control module includes an iterative control unit and a log recording unit;

[0028] The iterative control unit is configured to control the iterative operation of the simulation execution module, data acquisition module, fault diagnosis module and parameter correction module. When the deviation exceeds a preset threshold, the iterative control unit sends an adjustment command to the parameter correction module. The adjustment command is triggered only when the deviation exceeds the preset threshold, and after each iteration, the deviation is re-evaluated to see if it meets the stopping condition until the deviation is less than the preset threshold.

[0029] The logging unit is configured to record simulation parameters, real-time running parameters, fault mode priority list, and model parameter adjustment information for each iteration, and store the data in a local database.

[0030] Preferably, the stopping iteration condition of the iterative control unit includes:

[0031] Condition 1: The deviation is less than the preset threshold;

[0032] Condition 2: The parameter adjustment range of the digital twin model is less than the preset range threshold;

[0033] Condition 3: The number of iterations reaches a preset threshold;

[0034] The iteration can be stopped if any one of the above conditions is met. Priority is given to ensuring that the deviation is less than a preset threshold. If the number of iterations or the parameter adjustment range reaches the target first, it is necessary to verify whether the deviation is within an acceptable range. The acceptable range is a certain proportion of the deviation that is less than or equal to the preset threshold. This proportion is set according to the safety operation requirements of the integrated circuit. The verification standard for the acceptable range is consistent with the preset threshold.

[0035] Preferably, the digital twin model includes a circuit-level simulation model, a device-level simulation model, and a system-level simulation model;

[0036] The circuit-level simulation model is configured to simulate the circuit behavior of the physical chip. It simulates signal transmission based on device-level parameters, including the resistance, capacitance, and inductance values ​​of the device. These parameters change the transmission speed and amplitude of the signal by affecting the impedance characteristics of the circuit.

[0037] Device-level simulation models are configured to simulate the device characteristics of physical chips;

[0038] The system-level simulation model is configured to simulate the system-level functions of the physical chip.

[0039] The system-level model calls the physical characteristic parameters of the device-level model through a preset standardized communication protocol interface. The calling process is that the system-level model sends a parameter request, and the device-level model returns parameter data through the interface. The parameter transmission method is real-time data stream transmission.

[0040] Preferably, the conditional probability model is trained in the following manner:

[0041] Based on historical fault data, a correlation is established between fault modes and temperature, voltage fluctuations, and timing margin. The weights of the correlation are dynamically adjusted in conjunction with real-time deviation, so that the conditional probability model can adapt to different operating scenarios. The dynamic adjustment is to update the weights once for each iteration. The iteration is triggered when the deviation exceeds a preset threshold. After each iteration, the deviation is recalculated. The weight change logic is that the greater the deviation, the higher the correlation weight of the corresponding fault mode.

[0042] Compared with the prior art, the beneficial effects of the present invention are:

[0043] This invention employs a multi-parameter comprehensive deviation quantification and dynamic weight allocation mechanism. By calculating the relative deviations of temperature, voltage, and timing margin and dynamically adjusting the weights, a comprehensive assessment of the integrated circuit's operating status is achieved. Based on the posterior probability calculation method of the conditional probability model, combined with historical fault data and real-time deviation, the probability of each fault mode occurring can be accurately quantified, and a priority list can be generated. This data-driven fault diagnosis method breaks through the limitations of traditional single-parameter monitoring. Through multi-dimensional parameter correlation analysis, it significantly improves the accuracy and foresight of fault identification, providing clear directional guidance for parameter correction.

[0044] In this invention, by constructing a digital twin model that includes circuit-level, device-level, and system-level models, and combining it with a real-time data stream transmission mechanism, accurate simulation of the physical behavior of integrated circuits is achieved. Through real-time data interaction between the multi-level simulation model and the physical chip, the system can dynamically capture signal transmission characteristics, device parameter changes, and system-level functional performance, providing high-precision benchmark data for subsequent deviation quantification. This hierarchical modeling approach not only ensures the richness of simulation details but also enables cross-level parameter calls through standardized interfaces, significantly improving the model's ability to reproduce complex circuit behavior and laying a reliable foundation for fault diagnosis and parameter correction.

[0045] In this invention, intelligent optimization of digital twin model parameters is achieved through a transfer learning loss function and a dynamic correction coefficient mechanism. The loss function balances model fit and parameter stability, ensuring that the correction process closely reflects the actual state of the physical chip while avoiding parameter oscillations. The correction coefficient is dynamically adjusted according to the deviation, making the parameter correction magnitude positively correlated with the degree of deviation, thus improving correction efficiency. Combined with the triple stopping conditions of the iterative control unit, the correction accuracy is guaranteed while effectively reducing the consumption of ineffective computing resources, realizing closed-loop control of simulation testing. This adaptive optimization mechanism enables the digital twin model to continuously track the dynamic changes of the physical chip, significantly enhancing the robustness and practicality of the system. Attached Figure Description

[0046] Figure 1 This is a flowchart of the fault diagnosis and probability calculation process in this invention;

[0047] Figure 2 This is a flowchart of parameter correction and iterative control in this invention;

[0048] Figure 3 This is a flowchart of the dynamic training of the conditional probability model in this invention;

[0049] Figure 4 This is a flowchart of the system operation in this invention. Detailed Implementation

[0050] The present invention will now be described in further detail with reference to the accompanying drawings and preferred embodiments.

[0051] Example 1, refer to Figure 1-4 As shown, an integrated circuit simulation and testing system includes a simulation execution module, a data acquisition module, a fault diagnosis module, a parameter correction module, a control module, a visualization module, and an alarm module.

[0052] The simulation execution module is used to run the digital twin model of the integrated circuit and output simulation parameters, such as temperature, voltage, timing margin, etc., to provide simulation reference data for subsequent deviation quantization.

[0053] The digital twin model includes a circuit-level simulation model that simulates the behavior of a physical chip circuit, a device-level simulation model that simulates the characteristics of a physical chip device, and a system-level simulation model that simulates the system-level functions of a physical chip. The circuit-level simulation model simulates signal transmission based on device-level parameters (resistance, capacitance, and inductance values), and changes the signal transmission speed and amplitude by influencing the impedance characteristics of the circuit.

[0054] The system-level model calls the physical characteristic parameters of the device-level model through a pre-defined standardized communication protocol interface. The calling process is that the system-level model sends a parameter request, and the device-level model returns the parameter data through the interface. The parameter transmission method is real-time data stream transmission.

[0055] The data acquisition module collects real-time operating parameters (temperature, voltage, timing margin) of the integrated circuit physical chip through temperature sensors, voltage monitoring circuits, and timing analysis tools, and extracts the simulation parameters output by the simulation execution module and sends them to the fault diagnosis module.

[0056] The fault diagnosis module receives real-time operating parameters and simulation parameters collected by the data acquisition module, calculates the deviation between the real-time operating parameters and simulation parameters (temperature deviation, voltage fluctuation deviation, timing margin deviation), and quantifies the probability of occurrence of each fault mode (such as hot carrier injection, voltage drop, etc.) by using a conditional probability model trained with historical fault data and combining the prior probability of fault modes (based on historical fault statistics). The module then outputs a fault mode priority list to the parameter correction module.

[0057] The parameter correction module dynamically adjusts the parameters of the digital twin model based on the probability of the fault mode output by the fault diagnosis module through the transfer learning loss function (balancing simulation-physical deviation and model parameter stability). At the same time, the correction coefficient increases with the deviation, ensuring that the parameter adjustment magnitude is positively correlated with the deviation.

[0058] Furthermore, the control module coordinates the iterative operation of the simulation execution module, data acquisition module, fault diagnosis module, and parameter correction module;

[0059] When the deviation exceeds the preset threshold, the parameter correction module is triggered to adjust the parameters of the digital twin model. The process iterates until the deviation is less than the preset threshold (or other stopping conditions are met), and records the simulation parameters, real-time running parameters, fault mode priority list and model parameter adjustment status for each iteration, and stores them in the local database.

[0060] In this implementation scheme, the simulation parameters, real-time operating parameters, fault mode priority list and model parameter adjustment status are visualized through the visualization module, which makes it convenient for users to intuitively monitor the system status;

[0061] When the deviation exceeds the preset threshold, a warning signal is issued simultaneously while the parameters are corrected, reminding the user to handle the anomaly in a timely manner.

[0062] Example 2, refer to Figure 1-4 As shown, the data acquisition module includes a temperature acquisition unit, a voltage acquisition unit, a timing acquisition unit, and a simulation parameter extraction unit. The temperature acquisition unit, voltage acquisition unit, and timing acquisition unit are used to acquire the real-time temperature T of the physical chip. ph Real-time voltage fluctuation V ph and real-time timing margin Δt ph The simulation parameter extraction unit is used to extract simulation parameters corresponding to real-time running parameters from the simulation execution module and output them to the fault diagnosis module.

[0063] The fault diagnosis module includes a deviation quantization unit, a fault probability calculation unit, and a fault sequencing unit;

[0064] After each parameter is output to the fault diagnosis module, the deviation degree D is first calculated by the deviation quantization unit in the fault diagnosis module.

[0065] The formula for calculating the deviation D is as follows:

[0066] ;

[0067] In the formula, W T W V W Δt These are the weights for temperature, voltage, and timing, respectively. The weights are allocated according to a certain proportion based on the percentage of temperature, voltage, and timing-related faults in historical fault data. T si V is the simulation parameter for temperature. si For the voltage simulation parameters, Δt si The simulation parameters for timing margins are all derived from the simulation parameter extraction unit;

[0068] Specifically, T represents the relative deviation between the simulated temperature and the real-time temperature. max and T minThis refers to the chip's operating temperature range.

[0069] V represents the relative deviation between the simulated voltage and the real-time voltage. max and V min This refers to the chip's operating voltage range.

[0070] This represents the relative deviation between the simulation timing margin and the real-time timing margin, where Δt max and Δt min This refers to the chip's timing margin range. It is a dynamic small value to avoid calculation errors when the real-time timing margin is close to 0, and to smooth the quantization results of timing deviation. Its value is determined according to the chip's nominal timing margin.

[0071] Among them, the maximum value T max V max Δt max and minimum value T min V min Δt min It needs to be reasonably determined based on historical fault data or the nominal parameter range of the chip.

[0072] The relative deviations of temperature, voltage, and timing are multiplied by their respective weighting coefficients and summed to obtain the total deviation D, which reflects the degree of deviation of the multi-parameter combination.

[0073] Meanwhile, when the deviation of one of the factors—temperature, voltage, and timing—becomes dominant, the weighting coefficient corresponding to that factor is automatically increased while the weighting coefficients of the other two factors are decreased, and the system is dynamically updated according to the fault mode.

[0074] When the deviation D exceeds the preset threshold, the fault diagnosis module starts the conditional probability model, combines historical fault data and prior probability of fault modes to quantify the probability of occurrence of each fault mode (such as hot carrier injection, voltage drop, etc.), outputs a fault mode priority list, triggers parameter correction iteration, and recalculates D after each iteration until D is less than the threshold (or meets other stopping conditions, such as parameter adjustment amplitude is less than the threshold or iteration count reaches the threshold), thus realizing closed-loop control of simulation test.

[0075] The conditional probability model is trained in the following way:

[0076] Based on historical fault data, a correlation is established between fault modes and temperature, voltage fluctuations, and timing margin. The weights of the correlation are dynamically adjusted in conjunction with real-time deviation, so that the conditional probability model can adapt to different operating scenarios. The dynamic adjustment is to update the weights once for each iteration. The iteration is triggered when the deviation exceeds a preset threshold. After each iteration, the deviation is recalculated. The weight change logic is that the greater the deviation, the higher the correlation weight of the corresponding fault mode.

[0077] At the same time, the correction coefficient calculation unit dynamically adjusts the correction coefficient according to D (the larger the deviation, the larger the correction coefficient).

[0078] The calculation of deviation D reflects the comprehensive deviation of multiple parameters and provides a basis for decision-making in fault diagnosis, parameter correction, and system control. It is a key link in realizing closed-loop control of integrated circuit simulation testing.

[0079] Example 3, refer to Figure 1-4 As shown, the fault probability calculation unit is used to calculate the posterior probability of each fault mode using conditional probability when the deviation exceeds a preset threshold. The formula for the posterior probability is:

[0080] ;

[0081] ;

[0082] In the formula, P(F) i |T, V, Δt) represents the fault mode F i The posterior probability (reflecting the likelihood of a failure occurring), P(T, V, Δt|F) i Fault mode F) i When an event occurs, the conditional probability of deviations in temperature T, voltage V, and timing margin Δt is given by P(F). i ) represents the prior probability of failure mode Fi (the inherent probability of occurrence based on historical failure statistics), which is obtained through statistics of historical failure data and reflects the inherent risk of failure mode. m is the total number of failure modes.

[0083] P ht Here, β represents the historical conditional probability, β is the deviation amplification factor, and D is the real-time deviation.

[0084] In the formula, ∑mj=1P(T,V,Δt|F j )×P(F j ) is the joint probability sum of all failure modes, used to normalize the posterior probability (ensuring the result is in the range [0, 1]);

[0085] The specific calculation process of the formula is as follows:

[0086] First, input the prior probability P(F) based on historical failure statistics. i (e.g., the historical occurrence frequency of "hot carrier injection" faults), then input the conditional probability P(T, V, Δt|F) i The input consists of two parts: historical fault data and real-time deviation (D). The historical fault data is the fault mode F. iWhen it occurs, the typical deviation patterns of temperature T, voltage V, and timing margin Δt (e.g., "hot carrier injection" is often accompanied by large temperature deviations).

[0087] The real-time deviation (D) is the deviation calculated in Example 2. The higher the deviation, the greater the conditional probability weight of the failure mode.

[0088] Real-time parameter deviations include temperature deviations |T si -T ph | Voltage deviation| V si -V ph |and timing deviation|Δt si -Δt ph | is used to dynamically adjust conditional probabilities;

[0089] During molecular calculations, the failure mode F is first defined. i The conditional probability P(T, V, Δt|F) i Multiply by its prior probability P(F) i ), to obtain the joint probability of the failure mode (reflecting the combination of historical patterns and real-time deviations).

[0090] When calculating the denominator, the numerator calculation is repeated for all failure modes, and the sum is obtained to obtain the joint probability, which is used to normalize the posterior probability.

[0091] Dividing the numerator by the denominator yields the posterior probability P(F) of the failure mode Fi. i |T, V, Δt) reflects the probability of the fault occurring under the current parameter deviation. When sorting, P(F) is used as the criterion. i Based on |T, V, Δt), the higher the posterior probability, the higher the priority of the fault mode. At the same time, fault sorting will only be triggered when the total deviation D exceeds the preset threshold.

[0092] Calculate the posterior probability P(F) for each type of fault separately. i After |T, V, Δt), the fault sorting unit sorts all fault modes from high to low posterior probability and generates a fault mode priority list (e.g., 1st position: hot carrier injection, 2nd position: voltage drop, 3rd position: timing path delay, etc.). The model parameters corresponding to the fault modes with high priority will be adjusted first, and the fault mode with the highest priority will trigger a targeted warning to remind the user to deal with the anomaly in a timely manner.

[0093] Example 4, refer to Figure 1-4 As shown, the parameter correction module includes a loss function calculation unit, a parameter adjustment unit, and a correction coefficient calculation unit. The loss function calculation unit calculates the error between the simulation parameters output by the digital twin model and the real-time running parameters. Combined with the regularization term of the model parameters, the transfer learning loss function L(θ) is obtained, calculated as follows:

[0094] ;

[0095] In the formula, L(θ) is the transfer learning loss function, reflecting the degree of correction bias of the digital twin model parameters; θ is the current parameter of the digital twin model; λ is the regularization term weight coefficient, used to balance model fit and parameter stability; D is adjusted by the fault mode probability output by the fault diagnosis module, which changes dynamically with the fault risk (λ decreases when the fault probability is high). si (θ) represents the simulation deviation of the digital twin model under parameter θ, D represents the real-time deviation of the physical chip calculated in Example 2, and θ0 represents the initial parameters of the digital twin model (or the parameters after the previous round of correction).

[0096] Among them, ||D si (θ) - D||2 2 is the squared difference between the simulation deviation and the real-time deviation, reflecting the fitting error between the model parameter θ and the physical chip. The purpose is to minimize the deviation between the model and the physical chip and ensure that the corrected model is closer to the real operating state.

[0097] ||θ-θ0||2 2 is the squared difference between the current parameter and the initial parameter, reflecting the magnitude of parameter correction. The purpose is to avoid the model being unstable due to excessive parameter correction, and it serves as a regularization term to constrain the range of parameter changes.

[0098] Specifically, the loss function will reduce the simulation bias D of the digital twin model. si The loss value L(θ) is combined with the real-time deviation D of the physical chip to output a single loss value L(θ). The loss value L(θ) directly reflects the degree of mismatch between the model parameter θ and the actual state of the physical chip. The smaller the loss value L(θ), the higher the matching degree between the model and the physical chip.

[0099] The essence of the parameter correction module is to minimize the loss value L(θ). The loss function transforms the deviation between the model simulation results and the actual state of the physical chip into a calculable mathematical objective, allowing parameter correction to change from empirical adjustment to quantitative optimization. The model parameters θ are continuously adjusted until the loss value is minimized.

[0100] The operating state of the physical chip is dynamic (e.g., temperature fluctuates with load, voltage adjusts with power consumption, and parameters drift due to chip aging). However, if the digital twin model has a fixed parameter θ, it will gradually become disconnected from the physical chip. Therefore, the calculation of the transfer learning loss function is a continuous process: the simulation execution module continuously outputs simulation parameters, the data acquisition module continuously acquires the real-time parameters of the physical chip, the transfer learning loss function continuously calculates the loss value, and the parameter adjustment unit continuously adjusts θ.

[0101] If the loss value L(θ) is large, it indicates that the deviation between the model and the physical chip is large. The parameter correction module will adjust θ significantly. If the loss value L(θ) is small, it indicates that the matching degree is high. The parameter correction module will fine-tune θ. By minimizing the loss value, the parameter θ of the digital twin model will continuously approach the actual operating state of the physical chip, and finally achieve dynamic alignment between the model and the physical system.

[0102] This cycle of calculation, correction, and recalculation ensures that the digital twin model can track the dynamic changes of the physical chip in real time and always maintain a precise match with the physical chip.

[0103] Example 5, refer to Figure 1-4 As shown, the correction coefficient calculation unit calculates the correction coefficient based on the deviation degree, combined with the base learning rate and the deviation amplification factor. The correction coefficient increases with the deviation degree, making the parameter adjustment range positively correlated with the deviation degree, thus controlling the range of parameter adjustment. The specific calculation formula is as follows:

[0104] θ new =θ old -K×▽ θ L(θ);

[0105] Where K = α + β × tanh (D si (θ));

[0106] In the formula, θ new For the corrected digital twin model parameters, θ old The parameters of the digital twin model before correction (i.e., θ in the formula in Example 4) are K, which is the correction coefficient used to control the step size of parameter adjustment.

[0107] By calculating the gradient of the loss function with respect to the parameter θ (▽) θ L(θ) reflects the direction of parameter correction (if the gradient is positive, the parameter needs to be decreased; if the gradient is negative, the parameter needs to be increased), guiding the direction of parameter correction and ensuring that the model is adjusted in the direction of fitting the physical chip;

[0108] The gradient step size is adjusted by the correction coefficient K, which dynamically controls the magnitude of parameter correction. When the deviation is large, it is corrected quickly, and when the deviation is small, it is adjusted finely.

[0109] By using the current parameter θ old Subtract gradient step size K×▽ θ L(θ) yields the corrected parameter θ new The final correction parameters are output, the digital twin model is updated, and dynamic matching between the model and the physical chip is achieved.

[0110] In the formula for calculating the correction coefficient K, α is the base learning rate, which is the initial step size coefficient for model parameter correction. It is used to control the basic magnitude of parameter adjustment, ensuring that even if the deviation between the model and the physical chip is extremely small, the parameter correction can still proceed with a stable initial magnitude, avoiding correction stagnation. β is the deviation amplification factor, used to amplify the simulation deviation D. si The degree of influence of (θ) on the correction coefficient K is such that the larger the deviation, the more significant the improvement in correction magnitude. The range of values ​​for α and β needs to be determined based on actual experimental data to avoid extreme values ​​leading to uncontrolled correction. tanh(D) si (θ) is the hyperbolic tangent function, used to measure the simulation deviation D. si (θ) is subjected to a nonlinear transformation, and D is transformed. si (θ) maps to [-1, 1];

[0111] When D si When (θ) is greater than the maximum deviation threshold, K takes the maximum value, which is the sum of the upper limits of α and β;

[0112] Specifically, by introducing a combination of the basic learning rate α, the bias amplification factor β, and the hyperbolic tangent function tanh, the correction factor K is calculated, thus realizing the relationship between the correction factor K and the simulation bias D. si The dynamic correlation of (θ) ensures the basic stability of parameter correction and avoids correction stagnation when the deviation is too small. β amplifies the influence of deviation on the correction amplitude. The larger the deviation, the more active the correction. The deviation is mapped to the interval [-1, 1] by the tanh function to avoid extreme deviations causing the correction amplitude to run out of control. This allows the correction coefficient to respond quickly to the significant deviation between the model and the physical chip, and to maintain fine-tuning stability when the deviation is small, thereby improving the convergence efficiency and robustness of the digital twin model.

[0113] Example 6, refer to Figure 1-4 As shown, the control module includes an iterative control unit and a log recording unit. The iterative control unit controls the iterative operation of the simulation execution module, data acquisition module, fault diagnosis module, and parameter correction module. When the deviation exceeds a preset threshold, the iterative control unit sends an adjustment command to the parameter correction module. The adjustment command is triggered only when the deviation exceeds the preset threshold, and the deviation is re-evaluated after each iteration to determine whether it meets the stopping condition, until the deviation is less than the preset threshold. The stopping iteration conditions of the iterative control unit include:

[0114] Condition 1: The deviation is less than the preset threshold;

[0115] Condition 2: The parameter adjustment range of the digital twin model is less than the preset range threshold;

[0116] Condition 3: The number of iterations reaches a preset threshold;

[0117] The iteration can be stopped if any one of the above conditions is met. Priority is given to ensuring that the deviation is less than the preset threshold. If the number of iterations or the parameter adjustment range reaches the target first, it is necessary to verify whether the deviation is within the acceptable range. The acceptable range is a certain percentage of the deviation that is less than or equal to the preset threshold. This percentage is set according to the safety operation requirements of integrated circuits. The verification standard for the acceptable range is consistent with the preset threshold.

[0118] The log recording unit records the simulation parameters, real-time running parameters, fault mode priority list, and model parameter adjustment status for each iteration, and stores the data in a local database;

[0119] In the above implementation scheme, by setting a step to trigger the parameter correction instruction only when the deviation exceeds a preset threshold, an on-demand triggering mechanism for parameter correction is realized, which avoids invalid iteration of the digital twin model when the deviation is small, reduces unnecessary consumption of computing resources, improves the operating efficiency of the digital twin system, and avoids model parameter oscillation caused by frequent corrections.

[0120] By setting three stopping conditions—deviation less than a threshold, parameter adjustment range less than a threshold, and iteration count reaching a threshold—triple safety assurance is achieved for the iteration process.

[0121] Among them, condition one ensures the core matching requirements between the model and the physical chip, condition two avoids continuous fine-tuning after the model converges, and condition three prevents infinite iteration due to extreme cases. By setting three stopping conditions, the accuracy and efficiency of iteration are balanced, ensuring the effectiveness of model correction while avoiding resource waste or system lag.

[0122] By setting a priority to meet the deviation threshold, and then verifying whether the deviation is within an acceptable range when other conditions are met, the core objective of stopping the iteration is achieved. That is, the matching degree between the model and the physical chip is always the first priority, preventing premature stopping of iteration due to small parameter adjustment or reaching the threshold (if the parameter adjustment is small but the deviation still exceeds the standard, iteration needs to continue). This ensures that the correction results of the digital twin model meet the safe operation requirements of the physical chip and avoids insufficient model accuracy due to formal compliance.

[0123] The log recording unit records the simulation parameters, real-time running parameters, fault mode priority list, and model parameter adjustments for each iteration, providing data support for subsequent analysis of the effectiveness of model correction, and also providing historical data for the optimization of the fault diagnosis module.

[0124] It should be noted that any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this invention should also be within the scope of protection of this invention.

Claims

1. A simulation and testing system for integrated circuits, characterized in that: It includes a simulation execution module, a data acquisition module, a fault diagnosis module, a parameter correction module, a control module, a visualization module, and an alarm module; The simulation execution module is configured to run a digital twin model of the integrated circuit and output simulation parameters; The data acquisition module is configured to acquire real-time operating parameters of the integrated circuit physical chip and extract simulation parameters output by the simulation execution module; The fault diagnosis module is configured to calculate the deviation based on the real-time operating parameters and simulation parameters collected by the data acquisition module, and to quantify the probability of occurrence of each fault mode by combining the conditional probability model trained by historical fault data with the prior probability of the fault mode. The parameter correction module is configured to dynamically adjust the parameters of the digital twin model based on the probability of the fault mode output by the fault diagnosis module through the transfer learning loss function. The control module is configured to coordinate the operation of the simulation execution module, data acquisition module, fault diagnosis module, and parameter correction module to achieve closed-loop control of the simulation test. The visualization module is configured to visualize simulation parameters, real-time running parameters, a list of fault modes priority, and model parameter adjustment status. The alarm module is configured to issue an alarm signal when the deviation exceeds a preset threshold.

2. The simulation and testing system for an integrated circuit according to claim 1, characterized in that: The data acquisition module includes a temperature acquisition unit, a voltage acquisition unit, a timing acquisition unit, and a simulation parameter extraction unit; The temperature acquisition unit is configured to acquire the real-time temperature of the physical chip; The voltage acquisition unit is configured to acquire real-time voltage fluctuations of the physical chip; The timing acquisition unit is configured to acquire the real-time timing margin of the physical chip; The simulation parameter extraction unit is configured to extract simulation parameters corresponding to the real-time running parameters from the simulation execution module.

3. The simulation and testing system for an integrated circuit according to claim 2, characterized in that: The fault diagnosis module includes a deviation quantization unit, a fault probability calculation unit, and a fault sorting unit. The deviation quantization unit is configured to calculate the relative deviation between the real-time operating parameters and the simulation parameters, obtain the deviation degree, and output it to the fault probability calculation unit. The fault probability calculation unit is configured to calculate the posterior probability of each fault mode through a conditional probability model when the deviation exceeds a preset threshold. The larger the deviation, the higher the weight of the posterior probability of the corresponding fault mode. The deviation is calculated by dividing the absolute difference between the real-time running parameters and the simulation parameters by the simulation parameters. The fault sorting unit is configured to sort the posterior probabilities from high to low and output a fault mode priority list.

4. The simulation and testing system for an integrated circuit according to claim 3, characterized in that: The parameter correction module includes a loss function calculation unit, a parameter adjustment unit, and a correction coefficient calculation unit; The loss function calculation unit is configured to calculate the error between the simulation parameters output by the digital twin model and the real-time running parameters, and combine the regularization term of the model parameters to obtain the transfer learning loss function. The parameter adjustment unit is configured to dynamically adjust the parameters of the digital twin model based on the gradient of the loss function. The correction coefficient calculation unit is configured to calculate the correction coefficient based on the deviation degree, combined with the base learning rate and the deviation amplification factor. The correction coefficient increases with the increase of the deviation degree, so that the magnitude of parameter adjustment is positively correlated with the deviation degree, thereby controlling the magnitude of parameter adjustment. Wherein, the base learning rate is a preset initial rate for parameter adjustment, and the deviation amplification coefficient is a preset coefficient used to enhance the influence of the deviation on the correction coefficient.

5. The simulation and testing system for an integrated circuit according to claim 4, characterized in that: The control module includes an iterative control unit and a log recording unit; The iterative control unit is configured to control the iterative operation of the simulation execution module, data acquisition module, fault diagnosis module and parameter correction module. When the deviation exceeds a preset threshold, the iterative control unit sends an adjustment command to the parameter correction module. The adjustment command is triggered only when the deviation exceeds the preset threshold, and after each iteration, the deviation is re-evaluated to see if it meets the stopping condition until the deviation is less than the preset threshold. The logging unit is configured to record simulation parameters, real-time running parameters, fault mode priority list, and model parameter adjustment information for each iteration, and store the data in a local database.

6. The simulation and testing system for an integrated circuit according to claim 5, characterized in that: The stopping iteration conditions of the iterative control unit include: Condition 1: The deviation is less than the preset threshold; Condition 2: The parameter adjustment range of the digital twin model is less than the preset range threshold; Condition 3: The number of iterations reaches a preset threshold; The iteration can be stopped if any one of the above conditions is met. Priority is given to ensuring that the deviation is less than a preset threshold. If the number of iterations or the parameter adjustment range reaches the target first, it is necessary to verify whether the deviation is within an acceptable range. The acceptable range is a certain proportion of the deviation that is less than or equal to the preset threshold. This proportion is set according to the safety operation requirements of the integrated circuit. The verification standard for the acceptable range is consistent with the preset threshold.

7. The simulation and testing system for an integrated circuit according to claim 6, characterized in that: The digital twin model includes a circuit-level simulation model, a device-level simulation model, and a system-level simulation model; The circuit-level simulation model is configured to simulate the circuit behavior of the physical chip. It simulates signal transmission based on device-level parameters, including the resistance, capacitance, and inductance values ​​of the device. These parameters affect the impedance characteristics of the circuit and change the transmission speed and amplitude of the signal. Device-level simulation models are configured to simulate the device characteristics of physical chips; The system-level simulation model is configured to simulate the system-level functions of the physical chip. The system-level model calls the physical characteristic parameters of the device-level model through a preset standardized communication protocol interface. The calling process is that the system-level model sends a parameter request, and the device-level model returns parameter data through the interface. The parameter transmission method is real-time data stream transmission.

8. The simulation and testing system for an integrated circuit according to claim 3, characterized in that: The conditional probability model is trained in the following way: Based on historical fault data, a correlation is established between fault modes and temperature, voltage fluctuations, and timing margin. The weights of the correlation are dynamically adjusted in conjunction with real-time deviation, so that the conditional probability model can adapt to different operating scenarios. The dynamic adjustment is to update the weights once for each iteration. The iteration is triggered when the deviation exceeds a preset threshold. After each iteration, the deviation is recalculated. The weight change logic is that the greater the deviation, the higher the correlation weight of the corresponding fault mode.

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