Hardware Trojan horse detection method based on low activity and low observation node conjoint analysis
The hardware Trojan detection method, which combines low-activity and low-observation-node analysis, solves the problems of insufficient detection coverage and high computational overhead in existing technologies. It achieves efficient and accurate detection and localization of highly concealed hardware Trojans and is suitable for large-scale integrated circuit design.
Patent Information
- Application Number
- CN202610736686.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2026-05-26
- Publication Date
- 2026-07-14
AI Technical Summary
Existing technologies struggle to efficiently and accurately identify and locate hardware Trojans that employ low-activity triggering and low-observation-output strategies for double concealment, resulting in insufficient detection coverage, low signal-to-noise ratio, high computational overhead, or poor scalability.
A hardware Trojan detection method based on joint analysis of low-activity and low-observation nodes is adopted, including dynamic functional simulation, testability analysis and signal propagation path search. A set of low-activity candidate trigger nodes and a set of low-observation candidate payload nodes are constructed. Path mining is carried out in combination with the directed graph of signal propagation to identify potential links of high-risk hardware Trojans.
It significantly improves the detection accuracy and coverage of highly stealthy hardware Trojans, reduces computational overhead, and realizes the automation and scalability of the detection process, making it suitable for large-scale integrated circuit design.