Magnetic storage cell read circuit and magnetic storage device

Abstract

The magnetic storage unit reading circuit provided by the application comprises a pre-charge module, a reading module and a judgment module, the reading module comprises at least one reading unit electrically connected with the storage unit; the reading unit comprises a reading capacitor, a first signal output module and a second signal output module, one end of the reading capacitor is electrically connected with the storage unit, and the other end is electrically connected with the first signal output module and the second signal output module; the pre-charge module pre-charges the reading capacitor, the first signal output module outputs a low-level output signal in response to the voltage of the pre-charged reading capacitor; the reading capacitor discharges to the storage unit during data reading, when the discharge reaches a predetermined voltage, the second signal output module outputs a high-level output signal in response to the predetermined voltage to the reading capacitor for supplementary charging; and the judgment module determines the storage data in the storage unit based on the level of the output signal. The storage reading circuit can consider equivalent capacitor amplification, timing coordination control and high-density integration.

Description

Technical Field

[0001] This application relates to the field of integrated circuits, specifically to a magnetic storage cell read circuit and a magnetic storage device. Background Technology

[0002] With the development of semiconductor storage technology, new non-volatile storage devices such as resistive random-access memory (RRAM) have gradually become one of the core solutions to replace traditional flash memory due to their advantages such as high density, fast read and write speeds, and low power consumption. RRAM magnetic storage cells realize data storage through their resistance differences, and the resistance read performance of the magnetic storage cells directly determines the overall operating efficiency of the storage system.

[0003] Voltage to time conversion (Voltage) to The Time Converter (VTC) circuit is used for resistive state reading of magnetic storage cells. Its principle is to convert the resistance state difference of the storage cell into a discharge time difference, and realize data reading through time decision. It can reduce the dependence on high-precision analog reading circuit. However, the capacitor in the existing VTC reading circuit is limited by the miniaturization trend of magnetic storage devices and cannot improve the reading margin and accuracy of the resistance state of the magnetic storage cell by increasing the capacitance. Summary of the Invention

[0004] To address at least one of the problems existing in the prior art, this application provides a magnetic storage cell reading circuit and a magnetic storage device, which supplements the reading capacitor during the data reading process, increases the equivalent capacitance of the reading capacitor, and thereby improves the read margin and accuracy of the magnetic storage cell.

[0005] The first aspect of this application provides a magnetic storage cell reading circuit, including a pre-charge module, a reading module, and a decision module, wherein the reading module includes at least one reading unit electrically connected to the magnetic storage cell; The reading unit includes a reading capacitor, a first signal output module, and a second signal output module. The first end of the reading capacitor is electrically connected to the magnetic storage unit, and the reading capacitor is also electrically connected to the first signal output module and the second signal output module, respectively. The pre-charge module is used to pre-charge the read capacitor, and the first signal output module outputs a low-level output signal in response to the pre-charged read capacitor voltage. During data reading, the read capacitor discharges to the magnetic storage unit. When the discharge reaches a predetermined voltage, the second signal output module responds to the predetermined voltage by outputting a high-level output signal to the read capacitor C for recharging. The decision module is used to determine the stored data in the magnetic storage unit based on the level of the output signal.

[0006] Optionally, the first signal output module includes a first switching element, the control terminal of the first switching element is electrically connected to the first terminal of the reading capacitor, the first terminal of the first switching element is electrically connected to the second terminal of the reading capacitor and the decision module respectively, and the second terminal of the first switching element is grounded; The control terminal of the first switching element is turned on in response to the pre-charged reading capacitor voltage, and the first signal output module outputs a low-level output signal formed by grounding to the decision module; The second signal output module includes a second switching element. The control terminal of the second switching element is electrically connected to the first terminal of the reading capacitor. The first terminal of the second switching element is connected to the first power supply terminal. The second terminal of the second switching element is electrically connected to the second terminal of the reading capacitor and the decision module, respectively. When the control terminal of the second switching element is turned on in response to the predetermined voltage of the reading capacitor, the first signal output module outputs a high-level output signal formed by connecting the first power supply terminal to the decision module.

[0007] Optionally, the precharge module includes a third switching element, the control terminal of which is electrically connected to the control signal line, the first terminal of which is electrically connected to the second power supply terminal, and the second terminal of which is electrically connected to the first terminal of the reading capacitor; The control terminal of the third switching element is turned on in response to the precharge control signal of the control signal line, and the second power supply terminal precharges the read capacitor.

[0008] Optionally, the decision module is used to determine the stored data in the magnetic storage unit based on the time it takes for the output signal level to transition from low to high.

[0009] Optionally, the reading module includes multiple reading units, the first end of the reading capacitor of each of the multiple reading units is electrically connected to the magnetic storage unit, and the second end of the reading capacitor and the output terminal of the first signal output module and the second signal output module that output the output signal are electrically connected to the decision module.

[0010] Optionally, the capacitance of the reading capacitor in the plurality of reading units is obtained based on a predetermined capacitance, wherein the predetermined capacitance is the capacitance of the reading capacitor when the reading module includes one reading unit; The device volumes of the first switching element and the second switching element are obtained based on a predetermined volume, which is the volume of the first switching element and the second switching element when the reading module includes a reading unit.

[0011] Optionally, the capacitance of the read capacitor in each read unit is a predetermined capacitance divided by the number of read units.

[0012] Optionally, the aspect ratios of the first switching element and the second switching element in at least two of the reading units are different.

[0013] Optionally, the aspect ratio of the first switching element and the second switching element in the plurality of reading units includes at least the aspect ratio of the first switching element being greater than that of the second switching element and the aspect ratio of the first switching element being smaller than that of the second switching element.

[0014] This application also discloses a magnetic storage device, including a magnetic storage unit and the magnetic storage unit read circuit described above.

[0015] As can be seen from the above technical solution, the magnetic storage unit reading circuit provided in this application electrically connects the reading capacitor to the first signal output module and the second signal output module respectively. Thus, when the reading capacitor discharges to a predetermined voltage during data reading, the second signal output module can output a high-level output signal under the control of the predetermined voltage. This high-level output signal can supplement the charging of the second end of the reading capacitor, thereby increasing the charge on both ends of the reading capacitor, slowing down the discharge rate of the reading capacitor, increasing the equivalent capacitance of data reading without increasing the volume of the reading capacitor, and improving the read margin and accuracy of data reading in the magnetic storage unit. Attached Figure Description

[0016] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0017] Figure 1 This is a schematic diagram of the structure of the VTC circuit of the magnetic storage unit in the prior art.

[0018] Figure 2 This is a schematic diagram of the structure of a magnetic storage unit read circuit in an embodiment of this application.

[0019] Figure 3(a) is a schematic diagram of the single-ended grounding read circuit in an embodiment of this application.

[0020] Figure 3(b) is a schematic diagram of the read capacitor C structure in the read circuit of a conventional magnetic storage cell in an embodiment of this application.

[0021] Figure 3(c) is a schematic diagram of the structure of a magnetic storage cell reading circuit in an embodiment of this application.

[0022] Figure 3(d) is a schematic diagram of the structure of a magnetic storage unit read circuit in an embodiment of this application when it is a distributed read circuit.

[0023] Figure 3(e) is a schematic diagram of the structure of another magnetic storage unit read circuit in the embodiment of this application when it is a distributed read circuit.

[0024] Figure 4 This is an experimental result diagram of a magnetic storage unit read circuit according to an embodiment of this application.

[0025] Figure 5 This is a schematic diagram of the structure of a computer device suitable for implementing embodiments of the present invention.

[0026] Figure label: Q1: First switching element; Q2: Second switching element; Q3: Third switching element; C: Reading capacitor; C1: First reading module; C2: Second reading module; C3: Third reading module; C4: Fourth reading module; C5: Fifth reading module. Detailed Implementation

[0027] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0028] It should be understood that, when used in this application specification and the appended claims, the term "comprising" indicates the presence of the described features, integrals, steps, operations, elements and / or components, but does not exclude the presence or addition of one or more other features, integrals, steps, operations, elements, components and / or a collection thereof.

[0029] It should also be understood that the term “and / or” as used in this application specification and the appended claims means any combination of one or more of the associated listed items and all possible combinations, and includes such combinations.

[0030] Furthermore, in the description of this application and the appended claims, the terms "first," "second," "third," etc., are used only to distinguish descriptions and should not be construed as indicating or implying relative importance.

[0031] References to "one embodiment" or "some embodiments" as described in this specification mean that one or more embodiments of this application include a specific feature, structure, or characteristic described in connection with that embodiment. Therefore, the phrases "in one embodiment," "in some embodiments," "in other embodiments," "in still other embodiments," etc., appearing in different parts of this specification do not necessarily refer to the same embodiment, but rather mean "one or more, but not all, embodiments," unless otherwise specifically emphasized. The terms "comprising," "including," "having," and variations thereof mean "including but not limited to," unless otherwise specifically emphasized.

[0032] like Figure 1 As shown, in existing technologies, the read capacitor in the read circuit of a traditional magnetic storage cell typically has its first end electrically connected to the pre-charge module, the input terminal of the output module, and the magnetic storage cell, while its second end is grounded. When the read capacitor is grounded at only one end, it can only be pre-charged through the power supply of the pre-charge module, resulting in limited charge storage. During the data read phase, the pre-stored charge on the read capacitor is discharged through the magnetic storage cell. The discharge phase relies on a single loop from the read capacitor to the magnetic storage cell and finally to ground. The discharge signal amplitude is determined solely by the RC characteristics of the read capacitor and the storage cell. Increasing the capacitor size helps improve the circuit's robustness against process variations and expands the time margin. However, the miniaturization trend of existing magnetic storage devices cannot meet the demand for increased capacitor size.

[0033] Therefore, in order to solve the above problems, this application provides a magnetic storage cell read circuit, such as... Figure 2 As shown, the magnetic storage cell read circuit includes a precharge module, a read module, and a decision module. The read module includes at least one read unit electrically connected to the magnetic storage cell. The reading unit includes a reading capacitor C, a first signal output module, and a second signal output module. The first end of the reading capacitor C is electrically connected to the magnetic storage unit, and the reading capacitor C is also electrically connected to the first signal output module and the second signal output module, respectively. The pre-charge module is used to pre-charge the read capacitor C, and the first signal output module outputs a low-level output signal in response to the voltage of the read capacitor C after pre-charging. During data reading, the reading capacitor C discharges to the magnetic storage unit. When the discharge reaches a predetermined voltage, the second signal output module responds to the predetermined voltage by outputting a high-level output signal to the reading capacitor C for recharging. The decision module is used to determine the stored data in the magnetic storage unit based on the level of the output signal.

[0034] It should be noted that the storage unit includes at least one magnetic tunnel junction (MTJ), which is a magnetic storage device capable of storing 1 bit of data. Its resistance state changes based on the change in the direction of the magnetic moment in the magnetic tunnel junction. Thus, the magnetic tunnel junction can store different data, and the value of the stored data depends on the magnitude of the resistance state in the magnetic tunnel junction.

[0035] In a preferred embodiment, the magnetic tunnel junction may include a fixed layer, a barrier layer, and a free layer arranged sequentially from top to bottom. The bottom surface of the free layer is fixedly connected to the spin-orbit coupling layer. The resistance of the magnetic tunnel junction depends on the magnetization directions of the fixed layer and the free layer, which are determined by the magnetic moment directions. Specifically, when the magnetic moment directions of the fixed layer and the free layer are the same, the magnetic tunnel junction is in a low-resistance state; when the magnetic moment directions of the fixed layer and the free layer are opposite, the magnetic tunnel junction is in a high-resistance state. The high-resistance and low-resistance states of the magnetic tunnel junction can be pre-assigned to different data. For example, the high-resistance state can be pre-set to correspond to the data "1", and the low-resistance state to the data "0". Then, by inputting current or voltage to the magnetic tunnel junction through a reading circuit, the resistance state of the magnetic tunnel junction can be determined as either a high-resistance state or a low-resistance state based on the change in current or voltage. Based on the resistance state of the magnetic tunnel junction, the data stored in the magnetic tunnel junction can be determined as either "1" or "0". Determining the range of high resistance and low resistance states is a common technique in this field. Those skilled in the art can determine the resistance range of the high resistance and low resistance states of the magnetic tunnel junction based on common knowledge, and this invention will not elaborate further here.

[0036] Optionally, the magnetic tunnel junction can be either an STT (Spin-Transfer Torque) magnetic tunnel junction or a SOT (Spin-Orbit Torque) magnetic tunnel junction. An STT magnetic tunnel junction utilizes spin-polarized current, allowing the current to pass perpendicularly through each layer of the magnetic tunnel junction. When the polarized current enters the free layer, it generates a spin-transfer torque through angular momentum transfer, thereby driving the free layer magnetic moment to flip. No additional magnetic field is required, and the read / write paths are consistent. An SOT magnetic tunnel junction, on the other hand, utilizes the spin-orbit coupling effect of the heavy metal layer, allowing the current to flow in-plane through the heavy metal layer rather than the tunneling barrier of the magnetic tunnel junction. This converts the in-plane charge flow into a spin current, generating a spin-orbit torque to drive the free layer magnetic moment flip. Under normal circumstances, an additional magnetic field or special structural design is required to achieve stable bidirectional flipping, and its read / write paths are separate.

[0037] It should be noted that, in order to avoid timing conflicts between the pre-charge module and the discharge of the read capacitor C, this application adopts a coordinated control timing. For example, at time t0, the pre-charge control signal becomes low, the pre-charge transistor is turned on, and the pre-charge module begins to charge the read capacitor C; at time t1, the read capacitor C is fully charged, the pre-charge control signal becomes high, and the pre-charge transistor is turned off; at time t2, the row address signal and column address signal of the storage cell become valid, the row select transistor and column select transistor are turned on, the target storage resistor is connected to the discharge circuit, and the read capacitor C begins to discharge; at time t3, the read capacitor C discharges to a predetermined voltage, and the second signal output module responds to the predetermined voltage by outputting a high-level output signal to the read capacitor C for supplementary charging. At the same time, the read capacitor C continues to discharge to the magnetic storage cell, the capacitance decrease rate slows down, and the equivalent capacitance increases.

[0038] Compared with traditional magnetic storage cell read circuits, the magnetic storage cell read circuit provided in this application electrically connects the read capacitor C to the first signal output module and the second signal output module respectively. Thus, during data reading, the read capacitor C discharges to a predetermined voltage, and the second signal output module can output a high-level output signal under the control of the predetermined voltage. This high-level output signal can supplement the charging of the second terminal of the read capacitor C, thereby increasing the charge on both ends of the read capacitor C, slowing down the discharge rate of the read capacitor C, and improving the equivalent capacitance of data reading without increasing the volume of the read capacitor C, thereby improving the read margin and accuracy of data reading in the magnetic storage cell.

[0039] In one embodiment of this application, the first signal output module includes a first switching element Q1, the control terminal of the first switching element Q1 is electrically connected to one end of the reading capacitor C, the first end of the first switching element Q1 is electrically connected to the second end of the reading capacitor C and the decision module respectively, and the second end of the first switching element Q1 is grounded.

[0040] When the control terminal of the first switching element Q1 is turned on in response to the voltage of the pre-charged read capacitor C, the first signal output module outputs a low-level output signal formed by grounding to the decision module.

[0041] The second signal output module includes a second switching element Q2. The control terminal of the second switching element Q2 is electrically connected to the first terminal of the reading capacitor C. The first terminal of the second switching element Q2 is connected to the first power supply terminal. The second terminal of the second switching element Q2 is electrically connected to the second terminal of the reading capacitor C and the decision module, respectively.

[0042] When the control terminal of the second switching element Q2 is turned on in response to the predetermined voltage of the reading capacitor C, the first signal output module outputs a high-level output signal formed by connecting the first power supply terminal to the decision module.

[0043] In this configuration, the control terminals of the first switching element Q1 and the second switching element Q2 are electrically connected to the first terminal of the reading capacitor C. Therefore, the conduction of the first and second terminals of the first switching element Q1 and the second switching element Q2 can be controlled by the voltage across the reading capacitor C, enabling the first and second signal output modules to output different level output signals based on voltage changes across the reading capacitor C. When the first and second terminals of the second switching element Q2 are turned on, it not only boosts the voltage signal at the output terminal of the output module but also provides a supplementary charging voltage source for the reading capacitor C.

[0044] It should be noted that the first switching element Q1 includes, but is not limited to, an N-type transistor, and the second switching element Q2 includes, but is not limited to, a P-type transistor. For example, the control terminal of the N-type transistor is electrically connected to one end of the read capacitor C, the first terminal is electrically connected to the other end of the read capacitor C, and the second terminal is grounded. When the pre-charge module charges the read capacitor C, the first and second terminals of the N-type transistor are turned on, and the first terminal of the N-type transistor forms a low-level output signal. The control terminal of the P-type transistor is electrically connected to one end of the read capacitor C, the first terminal is connected to the first power supply terminal, and the second terminal is electrically connected to the other end of the read capacitor C. When the read capacitor C discharges to a predetermined voltage value, the first and second terminals of the P-type transistor are turned on, and the second terminal forms a high-level output signal transmitted to the decision module.

[0045] For example, at time t0, the precharge control signal goes low, the precharge transistor is turned on, and the precharge module starts charging the read capacitor C; at time t1, the read capacitor C is fully charged, the precharge control signal goes high, and the precharge transistor is turned off; at time t2, the row address signal and column address signal of the storage cell become active, the row select transistor and column select transistor are turned on, the target storage resistor is connected to the discharge circuit, and the read capacitor C starts discharging; at time t3, the read capacitor C discharges to a predetermined voltage, and the second signal output module responds to the predetermined voltage by outputting a high-level output signal to the read capacitor C for supplementary charging. At the same time, the read capacitor C continues to discharge to the magnetic storage cell, the capacitance decrease rate slows down, and the equivalent capacitance increases.

[0046] In one embodiment that can be implemented in this application, the precharge module includes a third switching element Q3, the control terminal of the third switching element Q3 is electrically connected to the control signal line, the first terminal is electrically connected to the second power supply terminal, and the second terminal is electrically connected to the first terminal of the reading capacitor C; The control terminal of the third switching element Q3 is turned on in response to the precharge control signal of the control signal line, and the second power supply terminal precharges the reading capacitor C.

[0047] It should be noted that the third switching element Q3 includes, but is not limited to, a P-type transistor. The control terminal of the P-type transistor is coupled to the control signal line to receive the precharge control signal. The first terminal is coupled to the system power supply VDD, and the second terminal is coupled to one end of the read capacitor C. During the precharge phase, the P-type transistor turns on in response to the precharge control signal, and the second power supply terminal precharges the read capacitor C.

[0048] In one embodiment of this application, the decision module is used to determine the stored data in the magnetic storage unit based on the time it takes for the output signal level to transition from a low level to a high level.

[0049] It should be noted that the output voltage of the output module changes with the discharge process of the read capacitor C. The discharge rate of the read capacitor C depends on the resistance state of the magnetic tunnel junction in the magnetic storage cell. After the read capacitor C is pre-charged, the first signal output module outputs a low level, the second signal output module is not turned on, and outputs a low level to the decision module. When the read capacitor C discharges to a predetermined voltage, the first signal output module is turned off and no longer outputs a low-level signal. The second signal output module is turned on and outputs a high level at the first power supply terminal. The output to the decision module jumps to a high level. The decision module needs to identify the time it takes for the output signal level to jump from low to high to determine the resistance state of the magnetic storage cell based on the time. Because the supplementary charging of the read capacitor C by the second signal output module slows down the discharge process of the read capacitor C, the decision module can accurately determine the jump of the output signal level, thereby improving the accuracy of the resistance state determination. Therefore, the read margin of the magnetic storage cell read circuit of this application is higher, which can significantly improve the stability and reliability of the device.

[0050] In a specific example, the decision module may include a hysteresis comparator. When the high-level voltage at the output terminal reaches the threshold of the hysteresis comparator, the comparator outputs a high level to trigger timestamp recording. The decision module compares the timestamp with the reference time and outputs 1 or 0. An output result of 1 represents a low-resistance state of the storage cell, which discharges quickly, while an output result of 0 represents a high-resistance state of the storage cell, which discharges slowly.

[0051] In one embodiment of this application, the reading module includes multiple reading units, one end of the reading capacitor C of each of the multiple reading units is electrically connected to the magnetic storage unit, and the output terminal of the output signal is electrically connected to the decision module.

[0052] In this embodiment, the one read capacitor C in the read module is replaced with multiple read capacitors C. The capacitance of each read capacitor C is less than that of the single read capacitor C. Thus, multiple read units are set in the read module. Each read unit is connected to the magnetic storage unit in parallel to test the resistance state of the magnetic storage unit. This improves the reliability and stability of the device without increasing the overall size of the read circuit.

[0053] In one embodiment that can be implemented in this application, the capacitance of the read capacitor C in each read unit is a predetermined capacitance divided by the number of read units.

[0054] In this embodiment, the capacitance of the read capacitor C in each read unit is kept consistent. That is, the capacitance of the original single read capacitor C is evenly distributed among the read capacitors C of the read unit, so that the sum of the volumes of all the read capacitors C in the read unit is similar to the volume of the original single read capacitor C. This improves the reliability and accuracy of the device without increasing the overall volume of the read circuit, thus meeting the requirements for device miniaturization.

[0055] For example, assuming the predetermined capacitance required for the magnetic storage unit is 100μF, the read module includes a first read unit to a fifth read unit. In this case, the capacitance of the read capacitor C in each read unit is one-fifth of the predetermined capacitance, which is 20μF. Of course, in other embodiments, the original or designed read capacitor C can be unevenly distributed among multiple read capacitors C in multiple read units. Those skilled in the art can configure this according to actual needs, and this application does not limit this.

[0056] In one embodiment of this application, the capacitance of the reading capacitor C in the plurality of reading units is obtained based on a predetermined capacitance, which is the capacitance of the reading capacitor C when the reading module includes one reading unit.

[0057] The device volumes of the first switching element Q1 and the second switching element Q2 are obtained based on a predetermined volume, which is the volume of the first switching element Q1 and the second switching element Q2 when the reading module includes a reading unit.

[0058] For example, suppose the predetermined capacitance of the read module is 100μF and the predetermined volume of the read module is 0.02μm. 3 The reading module includes three reading units. Each reading unit contains a reading capacitor C, a first switching element, and a second switching element, denoted as reading capacitor C1, reading capacitor C2, reading capacitor C3, first switching element 1, first switching element 2, first switching element 3, second switching element 1, second switching element 2, and second switching element 3, respectively. The sum of the capacitances of reading capacitors C1, C2, and C3 must reach 100μF, and the sum of the volumes of first switching element 1, first switching element 2, first switching element 3, second switching element 1, second switching element 2, and second switching element 3 must reach 0.02μm. 3 .

[0059] For example, C1 in Figure 3(a) is a 100fF physical capacitor with one end grounded. The upper end of the capacitor is the input node, and the lower end is directly grounded, so there is no amplification effect. C2 in Figure 3(b) is the read capacitor C in the read circuit of a conventional magnetic storage cell. The read capacitor C can only be pre-charged by the power supply of the pre-charge module to the read capacitor C, and the charge storage capacity is limited. In addition, Figures 3(d) to 3(e) are the magnetic storage cell read circuit structures of this application. Specifically, the capacitance of all read capacitors C in the read unit C4 in Figure 3(d) is the same as the capacitance of the read capacitor C in the read unit C3 in Figure 3(c), and the capacitance of all read capacitors C in the read unit C5 in Figure 3(e) is also the same as the capacitance of the read capacitor C in the read unit C3. The volume of all P-type and N-type transistors in read unit C4 is the same as that of P-type and N-type transistors in read unit C3, and the volume of all P-type and N-type transistors in read unit C5 is the same as that of P-type and N-type transistors in read unit C3, so as to improve the stability and reliability of resistive reading of memory cell without increasing the device volume.

[0060] In one embodiment that can be implemented in this application, the aspect ratios of the first switching element Q1 and the second switching element Q2 in at least two of the reading units are not the same.

[0061] Specifically, it is understood that the first switching element Q1 and the second switching element Q2 in the reading unit have different device shapes, resulting in different amplification effects of the reading capacitor C. Based on experiments, it has been determined that the amplification effect curve of a single reading unit follows a normal distribution. Therefore, preferably, multiple reading units are set up, such that the aspect ratios of the first switching element Q1 and the second switching element Q2 in the multiple reading units are different. This results in different amplification effect curves for different reading units. The combined curve of the multiple reading units can exhibit an approximately linear amplification effect within a certain range, thereby ensuring the stability of the capacitance amplification effect and improving the reading reliability of the circuit. For example, the aspect ratio of the first switching element Q1 is the same as that of an N-type transistor, and the aspect ratio of the second switching element Q2 is the same as that of a P-type transistor, as shown in Figure 3(d). Taking C4 as an example, the reading module C4 includes a first reading unit, a second reading unit, a third reading unit, a fourth reading unit, and a fifth reading unit. In the first reading unit, the aspect ratio of the P-type transistor is 4, and the aspect ratio of the N-type transistor is 1, with a ratio of 4:1. In the second reading unit, the aspect ratio of the P-type transistor is 2, and the aspect ratio of the N-type transistor is 1, with a ratio of 4:1. The aspect ratio of the P-type transistor to the N-type transistor in the first reading unit is 2:1; the aspect ratio of the P-type transistor in the second reading unit is 1, and the aspect ratio of the N-type transistor is 1, so the aspect ratio of the P-type transistor to the N-type transistor in the third reading unit is 1:1; the aspect ratio of the P-type transistor in the third reading unit is 1, and the aspect ratio of the N-type transistor is 2, so the aspect ratio of the P-type transistor to the N-type transistor in the fourth reading unit is 1:2; the aspect ratio of the P-type transistor in the fifth reading unit is 1, and the aspect ratio of the N-type transistor is 4, so the aspect ratio of the P-type transistor to the N-type transistor in the fourth reading unit is 1:4. The aspect ratios of each reading unit from the first to the fifth reading unit are different.

[0062] In one embodiment of this application, the ratio of the aspect ratios of the first switching element Q1 and the second switching element Q2 in the plurality of reading units includes at least the aspect ratios where the first switching element Q1 is greater than that of the second switching element Q2 and the aspect ratios where the first switching element Q1 is less than that of the second switching element Q2.

[0063] For example, taking C4 as an example, the aspect ratio of the P-type transistor in the first read unit of C4 is greater than that of the N-type transistor, the aspect ratio of the P-type transistor in the second read unit is greater than that of the N-type transistor, the aspect ratio of the P-type transistor in the third read unit is equal to that of the N-type transistor, the aspect ratio of the P-type transistor in the fourth read unit is less than that of the N-type transistor, and the aspect ratio of the P-type transistor in the fifth read unit is less than that of the N-type transistor.

[0064] For example, Figure 4 The equivalent apparent capacitance diagram reflects the trend between the read capacitor C and the voltage for read modules C1 to C5 in Figure 3. The read module structure shown in C3 amplifies the capacitance characteristics of the read capacitor C. However, this amplification effect is not linear but bell-shaped, specifically manifested as follows: Figure 4 The light green line in the waveform diagram on the right indicates that the circuit structure in this application is decomposed into a read module structure with inconsistent aspect ratios for C4 and C5. Figure 4 The C5 structure shown has aspect ratios of 16:1, 8:1, 4:1, 2:1, 1:1, 1:2, 1:4, 1:8, and 1:16. It can achieve near-linear amplification within the input voltage range of 0.25V-0.65V. Within this linear amplification range, the amplification factor of the reading capacitor C is fixed. At this time, the correlation between voltage change and resistance state is more stable, ensuring that the relationship between voltage and time corresponding to different resistance states is uniform. This avoids time difference fluctuations caused by nonlinear amplification and improves the consistency of resistance state differentiation. Therefore, the equivalent amplification effect of the C5 reading capacitor C is the most balanced.

[0065] In an optional embodiment, the spin-orbit coupling layer of the magnetic storage cell can be rectangular, such that the top surface area of ​​the spin-orbit coupling layer is larger than the area occupied by the magnetic tunnel junction disposed on the spin-orbit coupling layer, so that the magnetic tunnel junction can be disposed on the spin-orbit coupling layer, and the outer edge of the magnetic tunnel junction is located inside the outer edge of the spin-orbit coupling layer. Preferably, the spin-orbit coupling layer can be a heavy metal strip film or an antiferromagnetic strip film.

[0066] In a preferred embodiment, a top electrode can be provided at the top of the magnetic tunnel junction, and current input electrodes and output electrodes can be provided on opposite sides of the spin-orbit coupling layer, respectively, for detecting the input current and spin-orbit torque current. Preferably, the electrode material can be any one of tantalum (Ta), aluminum (Al), gold (Au), or copper (Cu).

[0067] Preferably, the materials of the free layer and the fixed layer can be ferromagnetic metals, and the material of the barrier layer can be an oxide. The ferromagnetic metal can be a mixed metal material formed from at least one of cobalt-iron (CoFe), cobalt-iron-boron (CoFeB), or nickel-iron (NiFe), and the proportions of the mixed metal materials can be the same or different. The oxide can be one of magnesium oxide (MgO) or aluminum oxide (Al2O3), used to generate the tunneling magnetoresistance effect. In practical applications, other feasible materials can also be used for the ferromagnetic metal and the oxide, and this invention is not limited thereto.

[0068] The free layer and spin-orbit coupling layer of a magnetic tunnel junction are fixed in contact. The layers of the magnetic tunnel junction and the spin-orbit coupling layer can be deposited on the substrate in a bottom-up order by traditional methods such as ion beam epitaxy, atomic layer deposition or magnetron sputtering. Then, two or more magnetic tunnel junctions can be formed by traditional nano-device processing technology such as photolithography and etching.

[0069] In a preferred embodiment, the spin-orbit coupling layer is a spin-orbit coupling layer made of a heavy metal thin film, an antiferromagnetic thin film, or other materials. The heavy metal thin film or antiferromagnetic thin film can be made into a rectangle, and its top area is preferably larger than the bottom area of ​​the contour formed by all magnetic tunnel junctions, so that two or more magnetic tunnel junctions can be set, and the bottom shape of the magnetic tunnel junction is completely embedded in the top shape of the heavy metal thin film or antiferromagnetic thin film. Preferably, the material of the spin-orbit coupling layer can be one of platinum (Pt), tantalum (Ta), or tungsten (W). In practical applications, the spin-orbit coupling layer can also be formed using other feasible materials, and the present invention is not limited thereto.

[0070] In this embodiment, the magnetic tunnel junction includes a top fixed layer, a free layer in contact with the spin-orbit coupling layer, and a barrier layer disposed between the fixed layer and the free layer. The magnetic tunnel junction is a three-layer structure, including only one free layer. In other embodiments, there may be multiple free layers, i.e., two or more free layers. The magnetic tunnel junction then includes a top fixed layer, multiple free layers, and a barrier layer disposed between each pair of adjacent layers, with the bottom free layer in contact with the spin-orbit coupling layer. For example, in a specific example, when two free layers are included, the magnetic storage cell structure may include a spin-orbit coupling layer, a second free layer sequentially disposed on the spin-orbit coupling layer, a barrier layer, a first free layer, a barrier layer, and a fixed layer.

[0071] A second aspect of this application provides a magnetic storage device, including a magnetic storage cell and a magnetic storage cell read circuit as described in any of the preceding claims.

[0072] Based on the same principle, this embodiment also discloses a magnetic random access memory. The magnetic random access memory includes a plurality of magnetic storage cells arranged in an array as described in this embodiment.

[0073] Magnetic random access memory (RAM) encompasses both permanent and non-permanent, removable and non-removable media, and information storage can be achieved by any method or technology. Information can be computer-readable instructions, data structures, program modules, or other data. Examples of applications of magnetic RAM include, but are not limited to, random access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory or other memory technologies, CD-ROM, digital versatile optical disc (DVD) or other optical storage, magnetic tape, magnetic magnetic disk storage or other magnetic storage devices, or any other non-transfer medium that can be used to store information accessible by computing devices.

[0074] Since the principle of this magnetic random access memory in solving the problem is similar to that of the magnetic storage unit described above, the implementation of this magnetic random access memory can be referred to the implementation of the magnetic storage unit described above, and will not be repeated here.

[0075] Based on the same principle, this embodiment also discloses a computer device, including a memory, a processor, and a computer program stored in the memory and executable on the processor. The processor and / or the memory include magnetic storage units as described in this embodiment.

[0076] The magnetic storage unit described in the above embodiments can be specifically installed in a product device with a certain function. A typical implementation device is a computer device, specifically, such as a personal computer, laptop computer, cellular phone, camera phone, smartphone, personal digital assistant, media player, navigation device, email device, game console, tablet computer, wearable device, or any combination of these devices.

[0077] In a typical example, a computer device specifically includes a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor and / or the memory includes magnetic storage units as described in this embodiment.

[0078] The following is for reference. Figure 5 It shows a schematic diagram of the structure of a computer device 600 suitable for implementing the embodiments of this application.

[0079] like Figure 5As shown, the computer device 600 includes a central processing unit (CPU) 601, which can perform various appropriate tasks and processes based on programs stored in read-only memory (ROM) 602 or programs loaded from storage section 608 into random access memory (RAM) 603. The RAM 603 also stores various programs and data required for the operation of the system 600. The CPU 601, ROM 602, and RAM 603 are interconnected via a bus 604. An input / output (I / O) interface 605 is also connected to the bus 604.

[0080] The following components are connected to I / O interface 605: an input section 606 including a keyboard, mouse, etc.; an output section 607 including a cathode ray tube (CRT), liquid crystal feedback (LCD), etc., and speakers, etc.; a storage section 608 including a hard disk, etc.; and a communication section 609 including a network interface card such as a LAN card, modem, etc. The communication section 609 performs communication processing via a network such as the Internet. A drive 610 is also connected to I / O interface 605 as needed. A removable medium 611, such as a disk, optical disk, magneto-optical disk, semiconductor memory, etc., is installed on drive 610 as needed so that computer programs read from it can be installed in storage section 608 as needed.

[0081] This invention is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the invention. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, generate instructions for implementing the flowchart illustrations and / or block diagrams. Figure 1 One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.

[0082] These computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing device to function in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means, which are implemented in a process Figure 1 One or more processes and / or boxes Figure 1 The function specified in one or more boxes.

[0083] These computer program instructions may also be loaded onto a computer or other programmable data processing equipment to cause a series of operational steps to be performed on the computer or other programmable equipment to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable equipment for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The steps of the function specified in one or more boxes.

[0084] It should also be noted that the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0085] Those skilled in the art will understand that embodiments of this application can be provided as methods, systems, or computer program products. Therefore, this application can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, this application can be applied to one or more computer program products implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0086] This application can be described in the general context of computer-executable instructions, such as program modules, that are executed by a computer. Generally, program modules include routines, programs, objects, components, data structures, etc., that perform a specific task or implement a specific abstract data type. This application can also be practiced in distributed computing environments where tasks are performed by remote processing devices connected via a communication network. In distributed computing environments, program modules can reside in local and remote computer storage media, including storage devices.

[0087] The various embodiments in this specification are described in a progressive manner. Similar or identical parts between embodiments can be referred to interchangeably. Each embodiment focuses on describing the differences from other embodiments. In particular, the system embodiments are basically similar to the method embodiments, so the description is relatively simple; relevant parts can be referred to the descriptions in the method embodiments.

[0088] The above description is merely an embodiment of this application and is not intended to limit the scope of this application. Various modifications and variations can be made to this application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the scope of the claims of this application.

Claims

1. A magnetic storage cell read circuit, characterized in that, It includes a pre-charge module, a read module, and a decision module, wherein the read module includes at least one read unit electrically connected to the magnetic storage unit; The reading unit includes a reading capacitor, a first signal output module, and a second signal output module. The first end of the reading capacitor is electrically connected to the magnetic storage unit, and the reading capacitor is also electrically connected to the first signal output module and the second signal output module, respectively. The pre-charge module is used to pre-charge the read capacitor, and the first signal output module outputs a low-level output signal in response to the pre-charged read capacitor voltage. During data reading, the read capacitor discharges to the magnetic storage unit. When the discharge reaches a predetermined voltage, the second signal output module responds to the predetermined voltage by outputting a high-level output signal to the read capacitor for recharging. The decision module is used to determine the stored data in the magnetic storage unit based on the level of the output signal.

2. The magnetic storage unit read circuit according to claim 1, characterized in that, The first signal output module includes a first switching element. The control terminal of the first switching element is electrically connected to the first terminal of the reading capacitor. The first terminal of the first switching element is electrically connected to the second terminal of the reading capacitor and the decision module, respectively. The second terminal of the first switching element is grounded. The control terminal of the first switching element is turned on in response to the pre-charged reading capacitor voltage, and the first signal output module outputs a low-level output signal formed by grounding to the decision module; The second signal output module includes a second switching element. The control terminal of the second switching element is electrically connected to the first terminal of the reading capacitor. The first terminal of the second switching element is connected to the first power supply terminal. The second terminal of the second switching element is electrically connected to the second terminal of the reading capacitor and the decision module, respectively. When the control terminal of the second switching element is turned on in response to the predetermined voltage of the reading capacitor, the first signal output module outputs a high-level output signal formed by connecting the first power supply terminal to the decision module.

3. The magnetic storage unit read circuit according to claim 1, characterized in that, The precharge module includes a third switching element, the control terminal of which is electrically connected to the control signal line, the first terminal of which is electrically connected to the second power supply terminal, and the second terminal of which is electrically connected to the first terminal of the reading capacitor. The control terminal of the third switching element is turned on in response to the precharge control signal of the control signal line, and the second power supply terminal precharges the read capacitor.

4. The magnetic storage unit read circuit according to claim 1, characterized in that, The decision module is used to determine the stored data in the magnetic storage unit based on the time it takes for the output signal level to change from low to high.

5. The magnetic storage unit read circuit according to claim 2, characterized in that, The reading module includes multiple reading units. The first end of the reading capacitor of each of the multiple reading units is electrically connected to the magnetic storage unit. The second end of the reading capacitor and the output terminal of the first signal output module and the second signal output module that output the output signal are respectively electrically connected to the decision module.

6. The magnetic storage unit read circuit according to claim 5, characterized in that, The capacitance of the reading capacitor in the plurality of reading units is obtained based on a predetermined capacitance, which is the capacitance of the reading capacitor when the reading module includes one reading unit; The device volumes of the first switching element and the second switching element are obtained based on a predetermined volume, which is the volume of the first switching element and the second switching element when the reading module includes a reading unit.

7. The magnetic storage unit read circuit according to claim 6, characterized in that, The capacitance of the read capacitor in each read unit is a predetermined capacitance divided by the number of read units.

8. The magnetic storage unit read circuit according to claim 6, characterized in that, The aspect ratios of the first and second switching elements in at least two of the reading units are not the same.

9. The magnetic storage unit read circuit according to claim 8, characterized in that, The aspect ratio of the first switching element and the second switching element in the plurality of reading units includes at least the aspect ratio of the first switching element being greater than that of the second switching element and the aspect ratio of the first switching element being smaller than that of the second switching element.

10. A magnetic storage device, characterized in that, It includes a magnetic storage unit and a magnetic storage unit read circuit as claimed in any one of claims 1-9.

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