A printed circuit board and optical module

Abstract

The application relates to the technical field of optical communication, and discloses a printed circuit board and an optical module, wherein the printed circuit board has opposite first and second surfaces, and comprises a plurality of stacked dielectric layers, a plurality of inner-layer conductive circuits and surface-layer conductive circuits, the surface-layer conductive circuits are located on the first and second surfaces, and the inner-layer conductive circuits are arranged between adjacent two dielectric layers; the surface-layer conductive circuit comprises an electric connection part and a main circuit area, the electric connection part is used for electrically connecting with an external device; a solder mask protective layer is arranged on the main circuit area, the electric connection part comprises a plurality of conductive pads, and a conductive protective layer is arranged on the conductive pads; a plurality of first conductive vias are arranged in the dielectric layer; wherein all the conductive pads electrically connected with the main circuit area or the inner-layer conductive circuits are electrically connected to corresponding inner-layer conductive circuits through corresponding first conductive vias, and the main circuit area does not need to be connected with the surface-layer conductive circuit, thereby solving the problem that the optical module is invalid due to salt spray corrosion.

Description

Technical Field

[0001] This application relates to the field of optical communication technology, specifically to a printed circuit board and an optical module. Background Technology

[0002] An optical module is one of the core components in optical communication, used for the conversion of photoelectric signals. An optical module typically consists of a housing, optical components, and a circuit board assembly, with the optical components and circuit board assembly encapsulated within the housing. The circuit board assembly includes a printed circuit board (PCB) and components and chips mounted on it. One end of the PCB is usually an electrical connection portion, such as the gold finger tip, exposed at the electrical port of the housing for electrical connection to external devices. The main circuitry of the PCB is encapsulated within the housing.

[0003] Optical modules have a wide range of applications. When used in outdoor environments, especially by the sea, the electrical connections of the printed circuit board exposed outside the casing are easily corroded by water vapor and salt spray, which can lead to the failure of the optical module.

[0004] To address this, electrical connections on printed circuit boards are typically covered with a conductive protective layer to prevent salt spray corrosion. However, in practical applications, the problem of optical modules failing due to salt spray corrosion still exists. Utility Model Content

[0005] This application provides a printed circuit board and an optical module, which aims to solve the problem of optical module failure caused by salt spray corrosion in the prior art.

[0006] According to a first aspect of this application, this application provides a printed circuit board having opposing first and second surfaces. The printed circuit board includes multiple layers of dielectric layers, multiple inner conductive lines, and surface conductive lines. The surface conductive lines are located on the first and second surfaces, and the inner conductive lines are provided between two adjacent dielectric layers.

[0007] The surface conductive circuit includes an electrical connection portion and a main circuit area. The electrical connection portion is used for electrical connection with external devices. The main circuit area is provided with a solder resist protective layer. The electrical connection portion includes multiple conductive pads, and the conductive pads are provided with conductive protective layers.

[0008] The dielectric layer is provided with a plurality of first conductive vias;

[0009] Among them, all conductive pads that are electrically connected to the main circuit area or the inner conductive circuit are electrically connected to their respective first conductive vias, and are electrically connected to the corresponding inner conductive circuits through the corresponding first conductive vias, or are electrically connected to the circuits in the corresponding main circuit area through the corresponding first conductive vias and the inner conductive circuits.

[0010] The first conductive via, which is electrically connected between the conductive pad and the inner conductive line, is located within the area covered by the electrical connection portion.

[0011] Furthermore, the conductive pad is configured as a functional gold finger and a suspended gold finger, the first conductive via is located in the dielectric layer within the area covered by the functional gold finger, and the functional gold finger is electrically connected to the inner layer conductive line through the corresponding first conductive via, or to the line within the corresponding main line area through the corresponding first conductive via and the inner layer conductive line.

[0012] Furthermore, the functional gold fingers include a first row of gold fingers and a second row of gold fingers arranged along the width direction of the printed circuit board. The first row of gold fingers is adjacent to the main circuit area. The first row of gold fingers is spaced apart from the side of the main circuit area adjacent to the electrical connection portion and has a gap. The electrical connection portion and the main circuit area are respectively disposed on both sides of the gap.

[0013] Furthermore, the suspended gold fingers include a third row of gold fingers arranged along the width direction of the printed circuit board, the third row of gold fingers being located on the side of the first row of gold fingers away from the main circuit area.

[0014] Furthermore, all of the conductive pads are configured as functional gold fingers, and the first conductive via is located in the dielectric layer within the area covered by the functional gold finger. The functional gold finger is electrically connected to the inner layer conductive line through the corresponding first conductive via, or to the line within the corresponding main line area through the corresponding first conductive via and the inner layer conductive line.

[0015] Furthermore, each of the functional gold fingers is electrically connected to the corresponding inner layer conductive line through one or more of the first conductive vias.

[0016] Furthermore, the functional gold finger includes a power gold finger, and the inner conductive circuit corresponding to the power gold finger includes an inner power plane; the power gold finger and the inner power plane are electrically connected through dense first conductive vias or through conductive grooves, the cross-sectional dimension of the conductive groove parallel to the first surface of the printed circuit board is larger than the dimension of the first conductive vias, and conductive metal is provided in the conductive groove, the two ends of the conductive metal being connected to the power gold finger and the inner power plane respectively.

[0017] Furthermore, the electrical connection is located at one end of the printed circuit board, and the conductive pad is a gold finger; and / or,

[0018] Both the first and second surfaces are provided with electrical connection portions.

[0019] Furthermore, each of the conductive pads has multiple sides and a top surface, the top surface being the surface of the conductive pad facing away from the dielectric layer, and all sides and the top surface of the conductive pad are completely covered by the conductive protective layer.

[0020] Furthermore, the conductive protective layer is a nickel-palladium-gold plating layer.

[0021] According to a second aspect of this application, this application provides an optical module including a housing and a printed circuit board, wherein the printed circuit board is as described above, the main circuit area of ​​the printed circuit board is located inside the housing, and the electrical connection portion of the printed circuit board is located outside the housing.

[0022] Furthermore, the housing has an internal cavity with an electrical port connecting to the outside of the housing. The main circuit area of ​​the printed circuit board is located inside the cavity, and the printed circuit board passes through the electrical port so that the electrical connection is exposed outside the electrical port. A sealing layer is provided at the electrical port of the housing to seal the gap between the printed circuit board and the housing, so as to encapsulate the main circuit area of ​​the printed circuit board inside the housing.

[0023] Through one or more embodiments of the above embodiments in this application, at least the following technical effects can be achieved:

[0024] All conductive pads within the electrical connection area that require electrical connection to the main circuit area or inner conductive lines are electrically connected to the inner conductive lines through a first conductive via. This first conductive via is located within the printed circuit board area covered by the electrical connection section. This ensures that the traces of the conductive pads requiring electrical connection to the main circuit area or inner conductive lines are located inside the printed circuit board, bypassing surface conductive lines. Since there are no surface conductive lines at the interface between the solder mask and the conductive protective layer of the electrical connection section, the problem of salt spray corrosion and diffusion to other areas at this interface is avoided. This prevents the conductive pads in the electrical connection section from failing, thus helping to extend the lifespan of the printed circuit board and improve the reliability of the optical module in outdoor environments. Attached Figure Description

[0025] The technical solution and other beneficial effects of this application will become apparent from the following detailed description of specific embodiments in conjunction with the accompanying drawings.

[0026] Figure 1 This is a schematic diagram of the structure of a printed circuit board in the prior art;

[0027] Figure 2 yes Figure 1 A partial cross-sectional structural diagram of a printed circuit board;

[0028] Figure 3 yes Figure 2 Schematic diagram of the structure at point A in the diagram;

[0029] Figure 4 This is a schematic diagram of the structure of the printed circuit board provided in the embodiment of this application;

[0030] Figure 5 yes Figure 4 A schematic diagram of the cross-sectional structure of the printed circuit board shown.

[0031] Figure 6 yes Figure 5 Schematic diagram of the structure at point B in the diagram;

[0032] Figure 7 yes Figure 4 A schematic diagram of the electrical connection part in the diagram;

[0033] Figure 8 yes Figure 7 A schematic diagram showing the structure in which the electrical connection part does not have a suspended gold finger;

[0034] Figure 9 This is a schematic diagram of the connection structure between the power supply gold finger and the inner conductive circuit and the surface conductive circuit according to an embodiment of this application;

[0035] Figure 10 This is a schematic diagram of the structure of the optical module provided in the embodiment of this application;

[0036] Figure 11 This is a partial cross-sectional structural diagram of the electrical port of an optical module provided in an embodiment of this application.

[0037] Explanation of reference numerals in the attached figures:

[0038] 10. First surface; 11. Second surface; 20. Dielectric layer; 21. First conductive via; 22. Second conductive via; 23. Conductive groove; 231. Conductive metal; 30. Inner layer conductive circuit; 31. Inner layer power plane; 40. Surface layer conductive circuit; 41. Surface layer power plane; 50. Electrical connection; 51. Conductive pad; 510. Conductive protective layer; 52. Functional gold finger; 520. First row of gold fingers; 5201. Grounding gold finger; 5202. First signal gold finger; 5203. Second signal gold finger; 5204. Power gold finger; 521. Second row Gold fingers; 53, suspended gold fingers; 530, third row of gold fingers; 60, main circuit area; 61, solder mask layer; 62, signal processing chip; 610, recessed area; 70, gap; 80, housing; 81, optical port; 82, electrical port; 83, receiving cavity; 90, sealing layer; 123, third conductive via; 130, inner layer conductive circuit; 140, surface layer conductive circuit; 141, surface layer trace; 150, electrical connection; 151, conductive pad; 1510, conductive protective layer; 160, main circuit area; 161, solder mask layer; 1610, recessed area. Detailed Implementation

[0039] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of them. All other embodiments obtained by those skilled in the art based on the embodiments of this application without creative effort are within the scope of protection of this application.

[0040] In the description of this application, it should be noted that, unless otherwise expressly specified and limited, the term "and / or" in this document is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, or B existing alone. Furthermore, the character " / " in this document, unless otherwise specified, generally indicates that the preceding and following related objects have an "or" relationship.

[0041] Please refer to Figures 1 to 3 In a pluggable optical module, the surface conductive lines 140 on the printed circuit board can generally be divided into an electrical connection portion 150 and a main circuit area 160. The electrical connection portion 150 is generally a conductive pad 151 disposed on the end of the printed circuit board, and the conductive pad 151 adjacent to the main circuit area 160 is usually directly electrically connected to the circuit of the main circuit area 160 through the surface trace portion 141. Figure 2The diagram shows the conductive pad 151 being routed through the surface trace 141 to the main circuit area 160, and then electrically connected to the inner layer conductive circuit 130 via the third conductive via 123. A solder resist layer 161, typically made of solder resist ink, is applied to the main circuit area 160 of the printed circuit board to protect the circuitry within that area. A conductive protective layer 1510 is also applied to the conductive pad 151 and the surface trace 141 used for routing from the conductive pad 151 to the main circuit area 160 to protect the conductive pad 151 and the surface trace 141. However, at the interface between the conductive protective layer and the solder resist ink, due to the characteristics of the solder resist ink, it is difficult for the edge of the solder resist ink to completely adhere to the surface of the printed circuit board, causing the solder resist ink to form a layer at the edge... Figure 3 The recessed area 1610 is shown. The surface traces 141 near this recessed area 1610 are difficult to be covered with a sufficiently thick conductive protective layer 1510; in some cases, the surface traces 141 near the inner side of the recessed area 1610 may be directly exposed without being covered by the conductive protective layer 1510. When printed circuit boards with this type of defect are used in optical modules, it will limit the application scenarios of the optical modules to a certain extent. When the optical module is in an outdoor environment, especially at the seaside, seawater moisture can easily corrode the solder resist ink on the surface traces 141 in the recessed area 1610, and gradually spread to other surrounding areas, eventually causing the optical module to malfunction.

[0042] Please refer to Figure 4 and Figure 5 To address the aforementioned problems, this application provides a printed circuit board (PCB) having opposing first surfaces 10 and second surfaces 11, and including multiple layers of dielectric layers 20, multiple inner conductive lines 30, and surface conductive lines 40. The surface conductive lines 40 refer to the lines located on the first surfaces 10 and 11, and inner conductive lines 30 are provided between adjacent dielectric layers 20. The first surfaces 10 and 11 are the two surfaces of the PCB, and the distance between the first surfaces 10 and 11 roughly defines the thickness of the PCB. This application defines the vertical direction based on the thickness direction of the PCB. The dielectric layers 20 can be a single layer of insulating material, and the inner conductive lines 30 are separated by the dielectric layers 20. The surface conductive lines 40 and inner conductive lines 30 can be conductive layers formed based on copper. The upper and lower surfaces of the PCB are both surfaces of the dielectric layer, and the surface conductive lines 40 are located on the dielectric layers 20 on the upper and lower surfaces, respectively. Thus, the thickness of the PCB is defined by the stacked dielectric layers 20, inner conductive lines 30, and surface conductive lines 40.

[0043] The surface conductive line 40 includes an electrical connection portion 50 and a main line area 60. The electrical connection portion 50 is used for electrical connection with external devices. A solder resist layer 61 is provided on the main line area 60. The electrical connection portion 50 includes multiple conductive pads 51, and a conductive protective layer 510 is provided on the conductive pads 51. The surface conductive line 40 can be a conductive structure formed by etching a copper layer on a dielectric substrate covering the upper and lower surfaces of the printed circuit board. The solder resist layer 61 can protect the lines within the main line area 60, and the conductive protective layer 510 can protect the electrical connection portion 50, so as to prevent external air or moisture from corroding the surface conductive line 40 on the printed circuit board.

[0044] The dielectric layer 20 contains multiple first conductive vias 21. All conductive pads 51 electrically connected to the main circuit area 60 or the inner conductive line 30 are electrically connected to their respective first conductive vias 21, and are electrically connected to the corresponding inner conductive line 30 through the corresponding first conductive vias 21, or electrically connected to the lines in the corresponding main circuit area 60 through the corresponding first conductive vias 21 and the inner conductive line 30. The first conductive vias 21 electrically connected between the conductive pads 51 and the inner conductive lines 30 are located within the area covered by the electrical connection portion 50. That is, the conductive pads 51 on the electrical connection portion 50 that need to be electrically connected to the main circuit area 60 or the inner conductive line 30 are all electrically connected to the corresponding main circuit area 60 or the inner conductive line 30 through their respective first conductive vias 21, and the positions of the first conductive vias 21 are set on the printed circuit board within the area covered by the electrical connection portion 50. In this way, none of the conductive pads 51 need to be connected to the main circuit area 60 through the surface conductive lines 40 of the first surface 10 and the second surface 11 of the printed circuit board. There are no surface conductive lines 40 at the junction of the solder mask layer 61 and the conductive protective layer 510, thus avoiding the surface conductive lines 40 from being corroded by salt spray.

[0045] Please Figure 4 and Figure 5 Further reference Figure 6The conductive pads 51 adjacent to the main circuit area 60 are electrically connected to the inner layer conductive lines 30 through the first conductive via 21. There are no surface conductive lines 40 in the gap 70 between the electrical connection portion 50 and the main circuit area 60. Therefore, there are no surface conductive lines 40 in the recessed area 610 of the solder mask layer, and this does not affect the surface conductive lines 40 of the main circuit area 60 or the conductive pads 51 of the electrical connection portion 50. All conductive pads 51 within the electrical connection portion 50 that need to be electrically connected to the main circuit area 60 or the inner layer conductive lines 30 are electrically connected to the inner layer conductive lines 30 through the first conductive via 21, ensuring that the traces of the conductive pads 51 that need to be electrically connected to the main circuit area 60 or the inner layer conductive lines 30 are located inside the printed circuit board and do not pass through the surface conductive lines 40. There is no surface conductive line 40 at the junction of the solder mask layer 61 and the conductive protective layer 510 of the electrical connection portion 50. This avoids the problem of salt spray corrosion and diffusion to other areas of the surface conductive line 40 at the junction of the solder mask layer 61 and the conductive protective layer 510, thereby preventing the conductive pad 51 of the electrical connection portion 50 from failing. Therefore, it helps to extend the life of the printed circuit board and improve the reliability of the optical module in outdoor environments.

[0046] In one embodiment, please continue to refer to Figure 4 and Figure 5 In this embodiment, the conductive pad 51 is configured as a functional gold finger 52 and a suspended gold finger 53. A first conductive via 21 is located in the dielectric layer 20 within the area covered by the functional gold finger 52. The functional gold finger 52 is electrically connected to the inner layer conductive line 30 through the corresponding first conductive via 21, or to the line within the corresponding main line area 60 through the corresponding first conductive via 21 and the inner layer conductive line 30. Specifically, the functional gold finger 52 is the activated conductive pad 51, which needs to be electrically connected to the main line area 60 or the inner layer conductive line 30. The suspended gold finger 53 is a spare conductive pad 51, not electrically connected to the main line area 60 or the inner layer conductive line 30. Adding a suspended gold finger 53 to the electrical connection portion 50 is equivalent to reserving more electrical connection terminals for signal channels, making the printed circuit board compatible with future optical modules with higher speeds or more channels. In addition, by placing the first conductive via 21 in the dielectric layer 20 within the coverage area of ​​the functional gold finger 52, one end of the first conductive via 21 can be directly connected to the bottom of the conductive pad 51, and the other end can be connected to the inner conductive line 30. This avoids the first conductive via 21 being placed on one side of the conductive pad 51 and offset from the conductive pad 51, which would require additional wiring via the surface conductive line 40 to electrically connect the conductive pad 51 and the first conductive via 21, thus simplifying the wiring path.

[0047] It should be noted that, in this embodiment, the suspended gold finger 53 can be improved into a functional gold finger 52 as needed.

[0048] In this embodiment, please refer to Figure 5 The main circuit area 60 of the first surface 10 of the printed circuit board can integrate functional units such as a power supply circuit (not shown), a signal processing chip 62, and a controller. The signal processing chip 62 may include a digital signal processing chip 62 and a retimer chip. The functional gold fingers 52 are connected to the inner layer conductive lines 30 through the first conductive via 21. At least a portion of the inner layer conductive lines 30 corresponding to the functional gold fingers 52 are then electrically connected to the functional units such as the power supply circuit, the signal processing chip 62, and the controller through the second conductive via 22 located in the main circuit area 60 and the surface conductive lines 40 located in the main circuit area 60. Thus, the corresponding functional gold fingers can be connected to the functional units such as the power supply circuit, the signal processing chip 62, and the controller, realizing the electrical connection between the functional gold fingers 52 and the lines in the main circuit area 60.

[0049] In one embodiment, please Figures 4 to 6 Further reference Figure 7 The functional gold fingers 52 include a first row of gold fingers 520 and a second row of gold fingers 521 arranged along the width direction of the printed circuit board. The first row of gold fingers 520 is adjacent to the main circuit area 60, while the second row of gold fingers 521 is relatively far from the main circuit area 60. The first row of gold fingers 520 is spaced apart from the side of the main circuit area 60 adjacent to the electrical connection portion 50, and has a gap 70. The electrical connection portion 50 and the main circuit area 60 are respectively disposed on both sides of the gap 70. Specifically, the first row of gold fingers 520 includes a plurality of functional gold fingers 52 arranged along the width direction of the printed circuit board, and the second row of gold fingers 521 also includes a plurality of functional gold fingers 52 arranged along the width direction of the printed circuit board. Although all the conductive pads 51 included in the first row of gold fingers 520 are adjacent to the main circuit area 60, they are spaced apart from the main circuit area 60 and have a gap 70, and there is no surface conductive line 40 within the gap 70. The edge of the solder resist layer 61 covering the main circuit area 60 must extend beyond the surface conductive lines 40 of the main circuit area 60, and the conductive protective layer 510 covering the conductive pad 51 must also extend beyond the first row of gold fingers 520. Therefore, the junction or adjacent edge of the solder resist layer 61 and the conductive protective layer 510 is located within the gap 70 or on both sides of the gap 70. The gap 70 contains the surface conductive lines 40, meaning there are no surface conductive lines 40 at the junction or adjacent edge of the solder resist layer 61 and the conductive protective layer 510. Therefore, no surface conductive lines 40 will be corroded by salt spray at the junction or adjacent edge of the solder resist layer 61 and the conductive protective layer 510, and all surface conductive lines 40 are well protected.

[0050] It should be noted that, in other embodiments, the arrangement of the functional gold fingers 52 on the first surface 10 and the second surface 11 of the electrical connection portion 50 may also be irregular, that is, the conductive pads 51 configured as functional gold fingers 52 may be distributed in different arrangements, and are not necessarily all in the same row of conductive pads 51. Alternatively, not all of the conductive pads 51 in the same row may be configured as functional gold fingers 52.

[0051] In one embodiment, please continue to refer to Figure 4 , Figure 5 and Figure 7 The suspended gold fingers 53 include a third row of gold fingers 530 arranged along the width direction of the printed circuit board. The third row of gold fingers 530 is located on the side of the first row of gold fingers 520 away from the main circuit area 60. In this embodiment, the third row of gold fingers 530 can not only be located as shown in the example. Figure 4 , Figure 5 and Figure 7 The first row of gold fingers 520 and the second row of gold fingers 521 are shown. The third row of gold fingers 530 can also be located on the side of the second row of gold fingers 521 away from the first row of gold fingers 520. Specifically, the suspended gold fingers 53 include a number of conductive pads 51 arranged in a row along the width direction of the printed circuit board. The conductive pads 51 included in the third row of gold fingers 530 are not electrically connected to the main circuit area 60 and the inner layer conductive circuit 30, so that the suspended gold fingers 53 are not functional. If necessary, a first conductive via 21 can also be provided on the dielectric layer 20 covered by the conductive pads 51 included in the suspended gold fingers 53, so that the suspended gold fingers 53 can be improved into functional gold fingers 52.

[0052] It should be noted that in other embodiments, the arrangement of the conductive pads 51 included in the suspended gold finger 53 on the first surface 10 and the second surface 11 of the electrical connection portion 50 may also be irregular, and no unique limitation is made here.

[0053] In one embodiment, please refer to Figure 8 All conductive pads 51 are configured as functional gold fingers 52. A first conductive via 21 is located in the dielectric layer 20 within the area covered by the functional gold finger 52. The functional gold finger 52 is electrically connected to the inner layer conductive line 30 through the corresponding first conductive via 21, or to the line within the corresponding main line area 60 through the corresponding first conductive via 21 and the inner layer conductive line 30. Specifically, relative to... Figure 4 , Figure 5 and Figure 7 All the conductive pads 51 shown are configured as functional gold fingers 52 and suspended gold fingers 53. Figure 8All conductive pads 51 of the electrical connection portion 50 shown are configured as functional gold fingers 52. All conductive pads 51 on the electrical connection portion 50 are electrically connected to the inner conductive line 30 or the main line area 60 and are functional. Therefore, the electrical connection portion 50 with this configuration has fewer conductive pads 51 and a simpler structure, which not only simplifies the production process of the printed circuit board but also reduces production costs.

[0054] As an example:

[0055] In practical applications, please refer to Figure 7 and Figure 8 The first row of gold fingers 520 in the functional gold fingers 52 may include a grounding gold finger 5201, a first signal gold finger 5202, a second signal gold finger 5203, and a power gold finger 5204. The grounding gold finger 5201 is generally located on both sides of the first signal gold finger 5202 and the second signal gold finger 5203 to form electromagnetic shielding for the first signal gold finger 5202 and the second gold finger, avoiding electromagnetic radiation and signal crosstalk between adjacent signal gold fingers. The power gold finger 5204 needs to be electrically connected to the lines in the main circuit area 60 to provide power to the electrical components on the printed circuit board.

[0056] Of course, the second row of gold fingers 521 can also include a grounding gold finger 5201, a first signal gold finger 5202, a second signal gold finger 5203, and a power gold finger 5204, as shown in the first row of gold fingers 520. Furthermore, the power gold finger 5204 in the second row must be aligned with the power gold finger 5204 in the first row, or the power gold fingers 5204 in the first and second rows can be directly connected to form a continuous long power gold finger 5204.

[0057] In one embodiment, please refer to Figure 4 , Figure 5 , Figure 7 as well as Figure 8 Each functional gold finger 52 is electrically connected to a corresponding inner layer conductive line 30 through one or more first conductive vias 21. Specifically, when the conductive pads 51 on the electrical connection portion 50 are configured as follows... Figure 4 , Figure 5 and Figure 7 The functional gold fingers 52 and suspended gold fingers 53 shown, or all conductive pads 51 on the electrical connection portion 50, are configured as follows: Figure 8When the functional gold finger 52 is shown, the conductive pad 51 included in the functional gold finger 52 can achieve functional connection on the printed circuit board through at least one first conductive via 21. Specifically, when the conductive pad 51 is electrically connected to the main circuit area 60 or the inner layer conductive circuit 30 through at least two first conductive vias 21, the number of conductive channels between the conductive pad 51 and the corresponding circuit can be increased, improving the reliability of the electrical connection between the conductive pad 51 and the corresponding circuit.

[0058] Please Figure 5 , Figure 7 and Figure 8 Further reference Figure 9 In this embodiment, the functional gold finger 52 includes a power gold finger 5204, and the inner layer conductive circuit 30 corresponding to the power gold finger 5204 includes an inner layer power plane 31. The power gold finger 5204 and the inner layer power plane 31 are electrically connected through dense first conductive vias 21 or through conductive grooves 23. The dense first conductive vias 21 can meet the large current conduction requirement between the power gold finger 5204 and the inner layer power plane 31. The cross-sectional dimension of the conductive groove 23 parallel to the first surface 10 of the printed circuit board is larger than the dimension of the first conductive vias 21. For example, a large conductive groove 23 can directly conduct the power gold finger 5204 and the inner layer power plane 31 to meet the large current conduction requirement between the power gold finger 5204 and the inner layer power plane 31. The conductive groove 23 is provided with conductive metal 231, and the two ends of the conductive metal 231 are respectively connected to the power gold finger 5204 and the inner layer power plane 31. In occupying the same area, the current conduction of the conductive groove 23 is greater than that of the dense first conductive vias 21. While meeting the same current carrying capacity requirements, the conductive groove 23 occupies a smaller area than the dense first conductive via 21, freeing up more space for other circuits.

[0059] In some embodiments, please continue to refer to Figure 5 and Figure 9 The surface conductive line 40 may include a surface power plane 41, and the inner power plane 31 and the surface power plane 41 may also be connected through conductive grooves 23 or densely packed second conductive vias 22. The conductive grooves 23 or densely packed second conductive vias 22 between them are similar to the aforementioned conductive grooves 23 and densely packed first conductive vias 21, and will not be described again here. In one embodiment, please continue to refer to Figure 4 and Figure 5 The electrical connection part 50 is located at one end of the printed circuit board, and the conductive pad 51 is a gold finger; the printed circuit board can make pluggable electrical connections with external devices through the gold finger.

[0060] Furthermore, conductive pads 51 are provided on both the first surface 10 and the second surface 11. Specifically, when conductive pads 51 are provided on both the first surface 10 and the second surface 11, the printed circuit board can integrate more functionality and provide more connection channels for the optical module.

[0061] In one embodiment, each conductive pad 51 has multiple sides and a top surface, the top surface being the surface of the conductive pad 51 facing away from the dielectric layer 20. All sides and the top surface of the conductive pad 51 are completely covered by a conductive protective layer 510. The conductive pad 51 is typically a cuboid structure. Since the bottom surface of the conductive pad 51 is connected to the surface of the printed circuit board, the remaining top surface and four sides of the conductive pad 51 are exposed. Covering the exposed surfaces of the conductive pad 51 with the conductive protective layer 510 can prevent the conductive pad 51 from being corroded by air or moisture from the external environment, thereby extending the service life of the conductive pad 51.

[0062] In one embodiment, the conductive protective layer 510 is a nickel-palladium-gold plating layer. Because the nickel-palladium-gold plating layer has excellent conductivity and chemical stability, it can prevent oxidation and corrosion of the conductive pad 51 while ensuring its conductivity, thus maintaining stable electrical performance during long-term use.

[0063] Accordingly, please refer to Figure 10 and Figure 11 This application also provides an optical module, including a housing 80 and a printed circuit board (PCB), wherein the PCB is the PCB described in any of the above embodiments. The main circuit area 60 of the PCB is located inside the housing 80, and the electrical connection portion 50 of the PCB is located outside the housing 80. Specifically, the optical module has an optical port 81 and an electrical port 82, which are located at opposite ends of the housing 80. The optical port 81 can be connected to an external device for optical signals, and the electrical port 82 can be connected to an external device for electrical signals. When one end of the optical module's electrical port 82 is plugged into an external device, the electrical connection portion 50 can be connected to the corresponding socket of the external device.

[0064] In one embodiment, please continue to refer to Figure 11 The housing 80 has an internal cavity 83 with an electrical port 82 connecting to the outside of the housing 80. The main circuit area 60 of the printed circuit board is located within the cavity 83, and the printed circuit board passes through the electrical port 82, thus exposing the electrical connection portion 50 outside the electrical port 82. A sealing layer 90 is provided at the electrical port 82 of the housing 80. The sealing layer 90 is used to seal the gap between the printed circuit board and the housing 80, so as to encapsulate the main circuit area 60 of the printed circuit board within the housing 80, thereby providing better protection for the main circuit area 60.

[0065] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the above-described division of functional circuits and modules is merely an example. In practical applications, the above functions can be assigned to different functional circuits and modules as needed, that is, the internal structure of the device can be divided into different functional circuits or modules to complete all or part of the functions described above. The functional circuits and modules in the embodiments can be integrated into one processing circuit, or each circuit can exist physically separately, or two or more circuits can be integrated into one circuit. The integrated circuit can be implemented in hardware or software. Furthermore, the specific names of the functional circuits and modules are only for easy differentiation and are not intended to limit the scope of protection of this application. The specific working process of the circuits and modules in the above system can be referred to the corresponding process in the foregoing method embodiments, and will not be repeated here.

[0066] The above-described embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this application, and should all be included within the protection scope of this application.

Claims

1. A printed circuit board having opposing first surfaces (10) and second surfaces (11), characterized in that, The printed circuit board includes multiple layers of dielectric layers (20), multiple inner conductive lines (30) and surface conductive lines (40). The surface conductive lines (40) are located on the first surface (10) and the second surface (11). The inner conductive lines (30) are provided between two adjacent dielectric layers (20). The surface conductive line (40) includes an electrical connection part (50) and a main line area (60). The electrical connection part (50) is used for electrical connection with external equipment. The main line area (60) is provided with a solder resist protective layer (61). The electrical connection part (50) includes a plurality of conductive pads (51). The conductive pads (51) are provided with a conductive protective layer (510). The dielectric layer (20) is provided with a plurality of first conductive vias (21); All conductive pads (51) electrically connected to the main circuit area (60) or the inner conductive circuit (30) are electrically connected to their respective first conductive vias (21), and electrically connected to the corresponding inner conductive circuit (30) through the corresponding first conductive vias (21), or electrically connected to the circuit in the corresponding main circuit area (60) through the corresponding first conductive vias (21) and the inner conductive circuit (30); The first conductive via (21), which is electrically connected between the conductive pad (51) and the inner conductive line (30), is located in the area covered by the electrical connection portion (50).

2. The printed circuit board according to claim 1, characterized in that, The conductive pad (51) is configured as a functional gold finger (52) and a suspended gold finger (53). The first conductive via (21) is located in the dielectric layer (20) within the coverage area of ​​the functional gold finger (52). The functional gold finger (52) is connected to the inner conductive line (30) through the corresponding first conductive via (21), or to the line in the corresponding main line area (60) through the corresponding first conductive via (21) and the inner conductive line (30).

3. The printed circuit board according to claim 2, characterized in that, The functional gold fingers (52) include a first row of gold fingers (520) and a second row of gold fingers (521) arranged along the width direction of the printed circuit board. The first row of gold fingers (520) is adjacent to the main circuit area (60). The first row of gold fingers (520) and the main circuit area (60) are spaced apart and have a gap (70) on the side adjacent to the electrical connection part (50). The electrical connection part (50) and the main circuit area (60) are respectively disposed on both sides of the gap (70).

4. The printed circuit board according to claim 3, characterized in that, The suspended gold fingers (53) include a third row of gold fingers (530) arranged along the width direction of the printed circuit board, the third row of gold fingers (530) being located on the side of the first row of gold fingers (520) away from the main circuit area (60).

5. The printed circuit board according to claim 1, characterized in that, All of the conductive pads (51) are configured as functional gold fingers (52), with the first conductive via (21) located in the dielectric layer (20) within the coverage area of ​​the functional gold fingers (52). The functional gold fingers (52) are connected to the inner conductive lines (30) through the corresponding first conductive via (21), or to the lines in the corresponding main line area (60) through the corresponding first conductive via (21) and the inner conductive lines (30).

6. The printed circuit board according to any one of claims 2 to 5, characterized in that, Each of the functional gold fingers (52) is electrically connected to the corresponding inner conductive line (30) through one or more of the first conductive vias (21).

7. The printed circuit board according to claim 6, characterized in that, The functional gold finger (52) includes a power gold finger (5204), and the inner conductive circuit (30) corresponding to the power gold finger (5204) includes an inner power plane (31). The power gold finger (5204) and the inner power plane (31) are electrically connected through dense first conductive vias (21) or through conductive grooves (23). The size of the cross-section of the conductive groove (23) parallel to the first surface (10) of the printed circuit board is larger than the size of the first conductive via (21). The conductive groove (23) is provided with conductive metal (231), and the two ends of the conductive metal (231) are respectively connected to the power gold finger (5204) and the inner power plane (31).

8. The printed circuit board according to claim 1, characterized in that, The electrical connection portion (50) is located at one end of the printed circuit board, and the conductive pad (51) is a gold finger; and / or, Both the first surface (10) and the second surface (11) are provided with electrical connection portions (50).

9. The printed circuit board according to claim 1, characterized in that, Each of the conductive pads (51) has multiple sides and a top surface, the top surface being the surface of the conductive pad (51) facing away from the dielectric layer (20), and all sides and the top surface of the conductive pad (51) are completely covered by the conductive protective layer (510).

10. The printed circuit board according to claim 9, characterized in that, The conductive protective layer (510) is a nickel-palladium-gold plating layer.

11. An optical module, comprising a housing (80) and a printed circuit board, characterized in that, The printed circuit board is the printed circuit board as described in any one of claims 1 to 10, wherein the main circuit area (60) of the printed circuit board is located inside the housing (80), and the electrical connection portion (50) of the printed circuit board is located outside the housing (80).

12. The optical module according to claim 11, characterized in that, The housing (80) has a receiving cavity (83) inside, and the receiving cavity (83) has an electrical port (82) communicating with the outside of the housing (80). The main circuit area (60) of the printed circuit board is located in the receiving cavity (83). The printed circuit board passes through the electrical port (82) so that the electrical connection part (50) is exposed outside the electrical port (82). A sealing layer (90) is provided at the electrical port (82) of the housing (80). The sealing layer (90) is used to seal the gap between the printed circuit board and the housing (80) so as to encapsulate the main circuit area (60) of the printed circuit board inside the housing (80).

Images