Low cost output redundancy circuit

Abstract

The application discloses a low-cost output redundancy circuit, comprising a square wave module, a gate driver, a bootstrap module, MOS tube Q1, MOS tube Q2, capacitor C6 and capacitor C7; a voltage is applied to a signal input end of the square wave module; a signal output end of the square wave module is connected with an input end of the gate driver; an output end of the gate driver is connected with an input end of the bootstrap module; control ends of the bootstrap module are connected with a gate of the MOS tube Q1 and a gate of the MOS tube Q2 respectively; a source of the MOS tube Q1 and a source of the MOS tube Q2 are both inputted with a first voltage VOUT1; a drain of the MOS tube Q1 and a drain of the MOS tube Q2 are both outputted with a second voltage VOUT2; and the application solves the problem that a large number of chips in a redundancy circuit causes a high product cost, and realizes the technical effect of reducing product cost on the premise of realizing the redundancy function of the circuit.

Description

Technical Field

[0001] This application relates to the field of redundant circuit technology, and in particular to a low-cost output redundant circuit. Background Technology

[0002] Redundancy (ORING) circuit technology is a backup mechanism created in circuit design by adding extra components or pathways. When the main circuit component or pathway fails, the redundant circuit allows the backup circuit to automatically take over, ensuring the continuous operation of the circuit system. In short, redundant circuits are artificially added duplicate parts used to back up the original circuit and enhance its security.

[0003] Currently, output ORING circuits are generally built using driver chips and MOSFETs. However, due to the high cost of driver chips, a large number of chips are used in multi-output ORING, resulting in high costs. Therefore, there is an urgent need for a low-cost output redundancy circuit. Utility Model Content

[0004] This application provides a low-cost output redundancy circuit, which solves the problem of high product cost caused by a large number of chips in the redundancy circuit in the prior art. Under the premise of realizing the circuit redundancy function, it achieves the technical effect of reducing product cost.

[0005] This utility model embodiment provides a low-cost output redundancy circuit, including a square wave module, a gate driver, a bootstrap module, MOSFETs Q1 and Q2, capacitors C6 and C7. A voltage is applied to the input terminal of the square wave module, and the signal output terminal of the square wave module is connected to the input terminal of the gate driver. The square wave module is configured to output a square wave signal to the gate driver. The output terminal of the gate driver is connected to the input terminal of the bootstrap module. The control terminal of the bootstrap module is connected to the gate of MOSFET Q1 and the gate of MOSFET Q2, respectively. The sources of MOSFETs Q1 and Q2 are both... The input voltage is a first voltage VOUT1; one end of capacitor C6 is connected to the source of MOSFET Q1, and the other end of capacitor C6 is grounded; the drains of MOSFET Q1 and MOSFET Q2 both output a second voltage VOUT2; one end of capacitor C7 is connected to the drain of MOSFET Q1, and the other end of capacitor C7 is grounded; the gate driver enables the bootstrap module to boost the voltage, and the gate driver and the bootstrap module enable MOSFETs Q1 and Q2 to conduct. When the second voltage VOUT2 increases, MOSFETs Q1 and Q2 are in the off state.

[0006] In one possible implementation, the square wave module includes an amplifier U2A, resistors R4, R5, R10, R11, and a capacitor C8; one end of resistor R5 is applied with a voltage, and the other end of resistor R5 is connected to one end of resistor R4, the other end of which is grounded; the non-inverting input of amplifier U2A is connected between resistors R5 and R4, the inverting input of amplifier U2A is connected to one end of capacitor C8, the other end of which is grounded; a voltage is applied to the first power supply terminal of amplifier U2A, the second power supply terminal of amplifier U2A is grounded, and the output terminal of amplifier U2A is connected to the input terminal of the gate driver; one end of resistor R4 is connected to the non-inverting input of amplifier U2A, and the other end of resistor R4 is connected to the output terminal of amplifier U2A; one end of resistor R5 is connected to the inverting input of amplifier U2A, and the other end of resistor R5 is connected to the output terminal of amplifier U2A.

[0007] In one possible implementation, the gate driver includes chip U1, resistors R3 and R8, and capacitor C4; the output terminal of amplifier U2A is connected to the INA terminal of chip U1; one end of resistor R3 is connected to the ENA terminal and the ENB terminal of chip U1, respectively, and the other end of resistor R3 is connected to one end of capacitor C4, the other end of capacitor C4 being grounded; one end of resistor R8 is connected to the OUTA terminal of chip U1, and the other end of resistor R8 is connected to the input terminal of the bootstrap module; the GND terminal and the INB terminal of chip U1 are connected, and the VDD terminal of chip U1 is connected between resistor R3 and capacitor C4.

[0008] In one possible implementation, the bootstrap module includes a capacitor C2, a diode D1, a diode D2, a resistor R1, a resistor R2, a capacitor C1, a resistor R7, and a resistor R12; one end of the capacitor C2 is connected to the resistor R8, the other end of the capacitor C2 is connected to the cathode of the diode D1, the anode of the diode D1 is connected to one end of the resistor R1, the other end of the resistor R1 receives the first voltage VOUT1 and is connected to one end of the capacitor C1, the other end of the capacitor C1 is connected to one end of the resistor R7; the other end of the resistor R7 is connected to one end of the resistor R12, the other end of the resistor R12 is connected to the gate of the MOSFET Q1 and the gate of the MOSFET Q2; the anode of the diode D2 is connected to the capacitor C2, the cathode of the diode D2 is connected to one end of the resistor R2, and the other end of the resistor R2 is connected between the capacitor C1 and the resistor R7.

[0009] In one possible implementation, the bootstrap module further includes a resistor R6, a capacitor C3, a resistor R9, a capacitor C5, a transistor U31, and a transistor U32; one end of the resistor R6 is connected between the resistor R7 and the capacitor C1, and the other end of the resistor R6 is connected to one end of the capacitor C3, the other end of the capacitor C3 is connected between the resistor R7 and the resistor R12; the collector of the transistor U31 is connected between the resistor R6 and the capacitor C3, and the collector of the transistor U31... The emitter is connected to one end of the resistor R9, and the other end of the resistor R9 is subjected to the first voltage VOUT2. The base of the transistor U31 is connected to the base of the transistor U32. The collector of the transistor U32 is subjected to the second voltage VOUT1, and the emitter of the transistor U32 is connected between the resistor R7 and the resistor R12. One end of the capacitor C5 is connected between the resistor R9 and the transistor U31, and the other end of the capacitor C5 is connected to the collector of the transistor U32.

[0010] In one possible implementation, the bootstrap module further includes a transistor Q3; the base of the transistor Q3 is connected between the resistor R7 and the resistor R12, the emitter of the transistor Q3 is supplied with the first voltage VOUT1, the collector of the transistor Q3 is connected between the resistor R12 and the MOSFET Q1, and the transistor Q3 is configured to provide a drive signal to the MOSFET Q1 or the MOSFET Q2.

[0011] One or more technical solutions provided in this application have at least the following technical effects:

[0012] This embodiment of the invention employs a low-cost output redundancy circuit. Amplifier U2A generates a square wave upon applying voltage. This square wave passes through chip U1 and outputs a 1A current, which is converted into voltage by resistor R8. This voltage is then superimposed on capacitor C2. Capacitor C1 is charged by VOUT1 when there is no square wave input. When there is a square wave input, the square wave voltage and the voltage on capacitor C2 are superimposed to charge C1, causing C1 to boost and drive MOSFETs Q1 and Q2 to turn on via resistors R7 and R12. When the second output voltage VOUT2 increases, the drive signal for capacitor C1 is connected to the first voltage VOUT1 via resistor R6, transistors U31 and U32, and resistor R9. At this time, MOSFETs Q1 and Q2 are in the off state. When VOUT2 is greater than VOUT1, MOSFETs Q1 and Q2 are turned off, thus preventing backflow of voltage from other paths. When VOUT2 is less than VOUT1, MOSFETs Q1 and Q2 are turned on, achieving redundancy. This application solves the problem of high product cost caused by a large number of chips in the redundancy circuit in the prior art. While achieving circuit redundancy, it achieves the technical effect of reducing product cost. Attached Figure Description

[0013] To more clearly illustrate the technical solutions in the embodiments of this utility model or the prior art, the drawings used in the description of the embodiments of this utility model or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this utility model. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0014] Figure 1 A circuit diagram of a low-cost output redundancy circuit provided in an embodiment of this application. Detailed Implementation

[0015] The technical solutions of the present utility model will be clearly and completely described below with reference to the accompanying drawings of the embodiments. Obviously, the described embodiments are only some, not all, of the embodiments of the present utility model. Based on the embodiments of the present utility model, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present utility model.

[0016] In the description of the embodiments of this utility model, it should be noted that the terms "center," "upper," "lower," "left," "right," "vertical," "horizontal," "inner," and "outer," etc., indicating the orientation or positional relationship, are based on the orientation or positional relationship shown in the accompanying drawings and are only for the convenience of describing the embodiments of this utility model and simplifying the description. They do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this utility model. The terms "first," "second," and "third" are used for descriptive purposes only and should not be construed as indicating or implying relative importance. In addition, the terms "installed," "connected," and "linked" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal connection of two components. For those skilled in the art, the specific meaning of the above terms in the embodiments of this utility model can be understood according to the specific circumstances.

[0017] This utility model embodiment provides a low-cost output redundancy circuit, such as Figure 1 As shown, the system includes a square wave module, a gate driver, a bootstrap module, MOSFETs Q1 and Q2, capacitors C6 and C7. A voltage is applied to the signal input terminal of the square wave module, and its signal output terminal is connected to the input terminal of the gate driver. The square wave module is configured to output a square wave signal to the gate driver. The output terminal of the gate driver is connected to the input terminal of the bootstrap module. The control terminal of the bootstrap module is connected to the gates of MOSFETs Q1 and Q2, respectively. A first voltage VOUT is input to the sources of both MOSFETs Q1 and Q2. 1. One end of capacitor C6 is connected to the source of MOSFET Q1, and the other end of capacitor C6 is grounded; the drains of MOSFET Q1 and MOSFET Q2 both output a second voltage VOUT2, and one end of capacitor C7 is connected to the drain of MOSFET Q1, and the other end of capacitor C7 is grounded; the bootstrap module can boost the voltage through the gate driver, and MOSFETs Q1 and Q2 can be turned on through the gate driver and the bootstrap module. When the second voltage VOUT2 increases, MOSFETs Q1 and Q2 are in the off state.

[0018] In the embodiments of this application, such as Figure 1As shown, the square wave module includes amplifier U2A, resistors R4, R5, R10, R11, and capacitor C8. A voltage is applied to one end of resistor R5, and the other end of resistor R5 is connected to one end of resistor R4, which is grounded. The non-inverting input of amplifier U2A is connected between resistors R5 and R4. The inverting input of amplifier U2A is connected to one end of capacitor C8, which is grounded. A voltage is applied to the first power supply terminal of amplifier U2A, and the second power supply terminal of amplifier U2A is grounded. The output of amplifier U2A is connected to the input terminal of the gate driver. One end of resistor R4 is connected to the non-inverting input of amplifier U2A, and the other end of resistor R4 is connected to the output of amplifier U2A. One end of resistor R5 is connected to the inverting input of amplifier U2A, and the other end of resistor R5 is connected to the output of amplifier U2A.

[0019] For example, amplifier U2A is an LM158 operational amplifier, which can generate a 0V-12V square wave, and its driving capability is amplified by gate driver U1 for use by the bootstrap module. The gate driver U1 is model CSV50205M.

[0020] In the embodiments of this application, such as Figure 1 As shown, the gate driver includes chip U1, resistors R3 and R8, and capacitor C4; the output terminal of amplifier U2A is connected to the INA terminal of chip U1; one end of resistor R3 is connected to the ENA terminal and the ENB terminal of chip U1 respectively, and the other end of resistor R3 is connected to one end of capacitor C4, the other end of capacitor C4 is grounded; one end of resistor R8 is connected to the OUTA terminal of chip U1, and the other end of resistor R8 is connected to the input terminal of the bootstrap module; the GND terminal and the INB terminal of chip U1 are connected, and the VDD terminal of chip U1 is connected between resistor R3 and capacitor C4.

[0021] For example, the primary function of a gate driver is to amplify the driving capability of a square wave circuit.

[0022] In the embodiments of this application, such as Figure 1As shown, the bootstrap module includes capacitor C2, diodes D1 and D2, resistors R1 and R2, capacitor C1, resistor R7, and resistor R12. One end of capacitor C2 is connected to resistor R8, and the other end of capacitor C2 is connected to the cathode of diode D1. The anode of diode D1 is connected to one end of resistor R1, and the other end of resistor R1 is connected to the first voltage VOUT1. The other end of resistor R1 is also connected to one end of capacitor C1, and the other end of capacitor C1 is connected to one end of resistor R7. The other end of resistor R7 is connected to one end of resistor R12, and the other end of resistor R12 is connected to the gate of MOSFET Q1 and the gate of MOSFET Q2. The anode of diode D2 is connected to capacitor C2, and the cathode of diode D2 is connected to one end of resistor R2. The other end of resistor R2 is connected between capacitor C1 and resistor R7.

[0023] In the embodiments of this application, such as Figure 1 As shown, the bootstrap module further includes resistor R6, capacitor C3, resistor R9, capacitor C5, transistor U31, and transistor U32; one end of resistor R6 is connected between resistor R7 and capacitor C1, the other end of resistor R6 is connected to one end of capacitor C3, and the other end of capacitor C3 is connected between resistor R7 and resistor R12; the collector of transistor U31 is connected between resistor R6 and capacitor C3, and the emitter of transistor U31 is connected to... One end of resistor R9 is connected, and the other end of resistor R9 is connected to the first voltage VOUT2. The base of transistor U31 is connected to the base of transistor U32. The collector of transistor U32 is connected to the second voltage VOUT1. The emitter of transistor U32 is connected between resistor R7 and resistor R12. One end of capacitor C5 is connected between resistor R9 and transistor U31, and the other end of capacitor C5 is connected to the collector of transistor U32.

[0024] For example, the DRV circuit generates a square wave of 0V-12V. When DRV is 0V, VOUT1 charges capacitor C2 through diode D1. When DRV is 12V, the input voltage is the voltage of capacitor C2 plus the DRV voltage, which drives MOSFETs Q1 and Q2 through diode D2, resistor R6, and resistor R7. Transistors U31 and U32 are LMBT5551DW dual NPN transistors. When VOUT2 is less than VOUT1, the NPN transistor inside U3 does not operate, and the driving voltage generates EN voltage through resistors R7 and R12, which drives MOSFETs Q1 and Q2 to conduct. When VOUT2 is greater than VOUT1, the NPN transistor inside U3 conducts, and the driving voltage is directly connected to VOUT1 through resistor R7. The EN voltage equals the VOUT1 voltage, and MOSFETs Q1 and Q2 are turned off, realizing the redundancy function.

[0025] In the embodiments of this application, such as Figure 1 As shown, the bootstrap module also includes a transistor Q3; the base of the transistor Q3 is connected between the resistor R7 and the resistor R12, the emitter of the transistor Q3 is supplied with the first voltage VOUT1, the collector of the transistor Q3 is connected between the resistor R12 and the MOSFET Q1, and the transistor Q3 is configured to provide a drive signal to the MOSFET Q1 or the MOSFET Q2.

[0026] For example, the square wave generated by the square wave module can be superimposed on capacitor C2 after passing through the gate driver. When there is no square wave input, capacitor C2 is charged by VOUT1 to generate voltage. The square wave voltage and the voltage on capacitor C2 are superimposed to charge capacitor C1, so that capacitor C1 is boosted and drives MOSFETs Q1 and Q2 to turn on through resistors R7 and R12. When the output voltage VOUT2 increases, the drive signal of capacitor C1 is connected to VOUT1 through resistor R6, transistor U31, transistor U32 and resistor R9. At this time, MOSFETs Q1 and Q2 are not driven, that is, MOSFETs Q1 and Q2 are in the cutoff state, thus realizing the ORING function.

[0027] The working principle of the redundant circuit is as follows: when VOUT2 is greater than VOUT1, MOSFETs Q1 and Q2 are turned off, thus preventing backflow of voltage from other paths. When VOUT2 is less than VOUT1, MOSFETs Q1 and Q2 are turned on, thus achieving the redundancy function. MOSFETs Q1 and Q2 are connected to the main circuit respectively. The turn-on and turn-off redundancy functions are achieved through the DS terminals of MOSFETs Q1 and Q2. Since MOSFETs Q1 and Q2 are connected in series at their positive terminals in the main circuit, they require charge drive. Therefore, the voltage output by the bootstrap module must be higher than the GS terminal voltage of MOSFETs Q1 and Q2, which is approximately 12V.

[0028] For example, this application can realize one-plus-one redundancy of two or more DC power supplies. When one power supply of the system fails, it will automatically shut down, and the other power supply can replace the failed power supply without interruption, thereby improving the reliability of the system task. Since the price of domestic redundancy chips is relatively expensive, the circuit of this application can be used in some low-cost localization projects to save costs, and it can also realize the redundancy function.

[0029] For example, amplifier U2A generates a square wave after a voltage is applied. The square wave passes through chip U1 and outputs a 1A current, which is converted into a voltage through resistor R8, thereby charging capacitor C2. That is, the voltage is superimposed on capacitor C2. When there is no square wave input, capacitor C1 is charged by VOUT1 to generate voltage. When there is a square wave input, the square wave voltage and the voltage on capacitor C2 are superimposed to charge C1, so that C1 is boosted and drives MOSFETs Q1 and Q2 to turn on through R7 and R12. When the second voltage VOUT2 at the output terminal rises, the capacitor C1 drive signal is connected to the first voltage VOUT1 through resistor R6, transistors U31 and U32 and resistor R9. At this time, MOSFETs Q1 and Q2 are in the off state.

[0030] The various embodiments in this specification are described in a progressive manner. For the same or similar parts between the various embodiments, please refer to each other. Each embodiment focuses on describing the differences from other embodiments.

[0031] The above embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit this application. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features therein. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of this application.

Claims

1. A low-cost output redundancy circuit, characterized in that, It includes a square wave module, a gate driver, a bootstrap module, MOSFET Q1, MOSFET Q2, capacitor C6, and capacitor C7; A voltage is applied to the input terminal of the square wave module, and the signal output terminal of the square wave module is connected to the input terminal of the gate driver. The square wave module is configured to output a square wave signal to the gate driver. The output terminal of the gate driver is connected to the input terminal of the bootstrap module, and the control terminal of the bootstrap module is connected to the gate of the MOS transistor Q1 and the gate of the MOS transistor Q2 respectively. The source of the MOS transistor Q1 and the source of the MOS transistor Q2 are both input with a first voltage VOUT1. One end of the capacitor C6 is connected to the source of the MOS transistor Q1, and the other end of the capacitor C6 is grounded. The drain of both MOSFET Q1 and MOSFET Q2 outputs a second voltage VOUT2; One end of the capacitor C7 is connected to the drain of the MOS transistor Q1, and the other end of the capacitor C7 is grounded. The gate driver enables the bootstrap module to boost voltage, and the gate driver and the bootstrap module enable the MOSFETs Q1 and Q2 to conduct. When the second voltage VOUT2 increases, the MOSFETs Q1 and Q2 are in the off state.

2. The low-cost output redundancy circuit according to claim 1, characterized in that, The square wave module includes amplifier U2A, resistors R4, R5, R10, R11, and capacitor C8. A voltage is applied to one end of resistor R5, and the other end of resistor R5 is connected to one end of resistor R4, while the other end of resistor R4 is grounded. The non-inverting input terminal of the amplifier U2A is connected between the resistor R5 and the resistor R4. The inverting input terminal of the amplifier U2A is connected to one end of the capacitor C8, and the other end of the capacitor C8 is grounded. A voltage is applied to the first power supply terminal of the amplifier U2A, and the second power supply terminal of the amplifier U2A is grounded. The output terminal of the amplifier U2A is connected to the input terminal of the gate driver. One end of the resistor R4 is connected to the non-inverting input terminal of the amplifier U2A, and the other end of the resistor R4 is connected to the output terminal of the amplifier U2A. One end of the resistor R5 is connected to the inverting input terminal of the amplifier U2A, and the other end of the resistor R5 is connected to the output terminal of the amplifier U2A.

3. The low-cost output redundancy circuit according to claim 2, characterized in that, The gate driver includes chip U1, resistor R3, resistor R8 and capacitor C4; The output terminal of the amplifier U2A is connected to the INA terminal of the chip U1; One end of the resistor R3 is connected to the ENA terminal and the ENB terminal of the chip U1 respectively, and the other end of the resistor R3 is connected to one end of the capacitor C4, and the other end of the capacitor C4 is grounded. One end of the resistor R8 is connected to the OUTA terminal of the chip U1, and the other end of the resistor R8 is connected to the input terminal of the bootstrap module. The GND terminal of chip U1 is connected to the INB terminal of chip U1, and the VDD terminal of chip U1 is connected between the resistor R3 and the capacitor C4.

4. The low-cost output redundancy circuit according to claim 3, characterized in that, The bootstrap module includes capacitor C2, diode D1, diode D2, resistor R1, resistor R2, capacitor C1, resistor R7, and resistor R12; One end of the capacitor C2 is connected to the resistor R8, and the other end of the capacitor C2 is connected to the cathode of the diode D1. The anode of the diode D1 is connected to one end of the resistor R1. The other end of the resistor R1 is input with the first voltage VOUT1 and is connected to one end of the capacitor C1. The other end of the capacitor C1 is connected to one end of the resistor R7. The other end of resistor R7 is connected to one end of resistor R12, and the other end of resistor R12 is connected to the gate of MOS transistor Q1 and the gate of MOS transistor Q2 respectively. The anode of diode D2 is connected to capacitor C2, the cathode of diode D2 is connected to one end of resistor R2, and the other end of resistor R2 is connected between capacitor C1 and resistor R7.

5. The low-cost output redundancy circuit according to claim 4, characterized in that, The bootstrap module also includes resistor R6, capacitor C3, resistor R9, capacitor C5, transistor U31, and transistor U32; One end of resistor R6 is connected between resistor R7 and capacitor C1, the other end of resistor R6 is connected to one end of capacitor C3, and the other end of capacitor C3 is connected between resistor R7 and resistor R12. The collector of transistor U31 is connected between resistor R6 and capacitor C3, the emitter of transistor U31 is connected to one end of resistor R9, the other end of resistor R9 is supplied with the first voltage VOUT2, and the base of transistor U31 is connected to the base of transistor U32. A second voltage VOUT1 is applied to the collector of the transistor U32, and the emitter of the transistor U32 is connected between the resistor R7 and the resistor R12; One end of the capacitor C5 is connected between the resistor R9 and the transistor U31, and the other end of the capacitor C5 is connected to the collector of the transistor U32.

6. The low-cost output redundancy circuit according to claim 5, characterized in that, The bootstrap module also includes transistor Q3; The base of transistor Q3 is connected between resistor R7 and resistor R12, the emitter of transistor Q3 is supplied with the first voltage VOUT1, the collector of transistor Q3 is connected between resistor R12 and MOSFET Q1, and transistor Q3 is configured to provide a drive signal to MOSFET Q1 or MOSFET Q2.

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