Method, device, processor and electronic equipment for obtaining power factor of signal
By multiplying the target signal with a reference signal of the same frequency but different phase in a digital signal processor, in-phase and quadrature components are obtained, solving the problem of low power factor efficiency caused by circuit component connection and signal transmission delay, and achieving more efficient power factor acquisition.
Patent Information
- Application Number
- CN201911232479.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2019-12-05
- Publication Date
- 2025-12-30
- Estimated Expiration
- 2039-12-05
AI Technical Summary
In the prior art, the power factor efficiency is low due to signal delay caused by the connection of circuit elements and signal transmission.
By obtaining two digital reference signals with the same frequency but different phases from the digital signal processor, multiplying them with the digital signal to be detected, the in-phase component and the quadrature component are obtained, and then the power factor of the target signal is calculated.
This avoids signal transmission delays between multiple components and improves the efficiency of power factor acquisition.
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Figure CN110879310B_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of signal processing technology, and in particular to a method, apparatus, processor and electronic device for obtaining the power factor of a signal. Background Technology
[0002] Currently, when obtaining the power factor of a signal, the phase difference, or phase angle difference, between the current and voltage signals is obtained through phase detection. Afterwards, the phase difference needs to be sent to another instrument for power factor acquisition, such as an analog multiplication and division circuit or an analog-to-digital conversion circuit.
[0003] Therefore, there may be situations where the connection of components in the circuit and signal transmission cause signal delays, which can lead to a lower power factor efficiency. Summary of the Invention
[0004] In view of this, this application provides a method, apparatus, and electronic device for obtaining the power factor of a signal, to solve the technical problem in the prior art where the power factor efficiency is low due to signal delay caused by the connection of circuit components and signal transmission. As shown below:
[0005] A method for obtaining the power factor of a signal, applied to a processor, the method comprising:
[0006] A first reference signal and a second reference signal are obtained. The first reference signal and the second reference signal are digital signals and have the same signal frequency as the target signal of the digital signal to be detected. The first reference signal and the second reference signal have a phase difference.
[0007] The first reference signal is multiplied by the target signal to obtain a first output signal; and the second reference signal is multiplied by the target signal to obtain a second output signal.
[0008] Obtain the in-phase component of the first output signal and the quadrature component of the second output signal;
[0009] The power factor of the target signal is obtained based on the in-phase component and the quadrature component.
[0010] The above method, preferably, involves obtaining the first reference signal and the second reference signal, including:
[0011] A first reference signal is obtained, wherein the first reference signal and the target signal to be detected have the same frequency.
[0012] The first reference signal is phase-shifted to obtain the second reference signal.
[0013] The above method, preferably, involves obtaining the in-phase component of the first output signal and the quadrature component of the second output signal, including:
[0014] The first output signal and the second output signal are filtered respectively to obtain the in-phase component in the first output signal and the quadrature component in the second output signal.
[0015] The above method, preferably, involves obtaining the power factor of the target signal based on the in-phase component and the quadrature component, including:
[0016] Divide the in-phase component by the quadrature component to obtain the tangent component;
[0017] Take the arctangent value for the tangent component;
[0018] The power factor of the target signal is obtained by taking the cosine value of the arctangent value.
[0019] In the above method, preferably, the amplitude of the first reference signal is 1 and the initial phase is 0 degrees.
[0020] The above method, preferably, involves phase shifting the first reference signal to output a second reference signal, including:
[0021] The first reference signal is phase-shifted by 90 degrees to output the second reference signal.
[0022] Preferably, before multiplying the first reference signal and the target signal to obtain the first output signal, the method further includes:
[0023] The target signal is filtered to remove noise signals from the target signal.
[0024] A power factor acquisition device for a signal, applied to a processor, the device comprising:
[0025] A signal acquisition unit is used to acquire a first reference signal and a second reference signal, wherein the first reference signal and the second reference signal are digital signals and have the same signal frequency as the target signal of the digital signal to be detected, and there is a phase difference between the first reference signal and the second reference signal;
[0026] The signal multiplication unit is used to multiply the first reference signal and the target signal to obtain a first output signal; and to multiply the second reference signal and the target signal to obtain a second output signal;
[0027] A component acquisition unit is used to acquire the in-phase component of the first output signal and the quadrature component of the second output signal;
[0028] The factor acquisition unit is used to obtain the power factor of the target signal based on the in-phase component and the quadrature component.
[0029] A processor for:
[0030] A first reference signal and a second reference signal are obtained. The first reference signal and the second reference signal are digital signals and have the same signal frequency as the target signal of the digital signal to be detected. The first reference signal and the second reference signal have a phase difference.
[0031] The first reference signal is multiplied by the target signal to obtain a first output signal; and the second reference signal is multiplied by the target signal to obtain a second output signal.
[0032] Obtain the in-phase component of the first output signal and the quadrature component of the second output signal;
[0033] The power factor of the target signal is obtained based on the in-phase component and the quadrature component.
[0034] An electronic device, comprising:
[0035] Memory stores applications and the data generated during application execution;
[0036] A processor is configured to execute the application program to perform the following functions: obtaining a first reference signal and a second reference signal, wherein the first reference signal and the second reference signal are digital signals and have the same signal frequency as a target signal of a digital signal to be detected, and the first reference signal and the second reference signal have a phase difference; multiplying the first reference signal by the target signal to obtain a first output signal; multiplying the second reference signal by the target signal to obtain a second output signal; obtaining the in-phase component in the first output signal and the quadrature component in the second output signal; and obtaining the power factor of the target signal based on the in-phase component and the quadrature component.
[0037] As can be seen from the above technical solutions, the power factor acquisition method, apparatus, processor, and electronic device disclosed in this application, after obtaining reference signals of two digital signals with the same frequency but different phases through a digital signal processor, multiplies the reference signals with the target signal of the digital signal to be detected, obtaining two output signals. Then, the in-phase and quadrature components of the two output signals are obtained, and the power factor of the target signal is obtained based on the in-phase and quadrature components. It is evident that this application uses a single electronic device to acquire the power factor of the target signal through digital processing, avoiding signal delays caused by signal transmission between multiple components, thereby saving signal processing time and improving the efficiency of power factor acquisition. Attached Figure Description
[0038] To more clearly illustrate the technical solutions of the embodiments of this application, the drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0039] Figure 1 A flowchart illustrating a method for obtaining the power factor of a signal according to Embodiment 1 of this application;
[0040] Figure 2 Another flowchart of a signal power factor acquisition method provided in Embodiment 1 of this application;
[0041] Figure 3 This is a schematic diagram of the structure of a power factor acquisition device for a signal provided in Embodiment 2 of this application;
[0042] Figure 4 This is a schematic diagram of the structure of a processor provided in Embodiment 3 of this application;
[0043] Figure 5 This is a schematic diagram of the logic implementation of the processor in Embodiment 3 of this application;
[0044] Figure 6 This is a schematic diagram of the structure of an electronic device provided in Embodiment 4 of this application;
[0045] Figure 7 This is a schematic diagram showing the connection between the electronic device and the adopted circuit in Embodiment 4 of this application;
[0046] Figure 8 This is a schematic diagram illustrating the process of acquiring the power factor of a weak signal according to an embodiment of this application. Detailed Implementation
[0047] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.
[0048] refer to Figure 1 This is a flowchart illustrating a method for obtaining the power factor of a signal according to Embodiment 1 of this application. This method is applicable to the processor of an electronic device, which can be a chip or component capable of digital signal processing, such as a microprocessor or a digital signal processing (DSP). The technical solution in this embodiment mainly utilizes the digital demodulation function in a digital signal processor to obtain the signal power factor, thereby improving the efficiency of power factor acquisition.
[0049] Specifically, the method in this embodiment may include the following steps:
[0050] Step 101: Obtain the first reference signal and the second reference signal.
[0051] In this design, both the first and second reference signals are digital signals with the same frequency as the target signal of the digital signal to be detected, and there is a phase difference between them, such as a 90-degree phase difference. The amplitude of both the first and second reference signals is 1, and the initial phase of one of the reference signals is 0 degrees, while the initial phase of the other reference signal is different from 0 degrees.
[0052] Specifically, in this embodiment, the processor can use a digital signal generator to obtain a first reference signal and a second reference signal of the digital signal.
[0053] For example, the target signal can be in This indicates that the digital signal output after signal processing and conditioning by sampling and conditioning circuits, where A is the signal amplitude of the target signal and ω corresponds to the signal frequency of the target signal. The phase of the target signal is given. Correspondingly, a digital sequence is generated using the digital signal generator within the DSP to form a first reference signal and a second reference signal. At this point, the signal frequencies of both the first and second reference signals are the same as the signal frequency corresponding to ω, but the phases of the first and second reference signals are different.
[0054] Specifically, in this embodiment, a first reference signal can be obtained first using a digital signal generator, which can be I x(t) = sin(ωt) means that at this point, the first reference signal and the target signal have the same frequency, i.e., ω corresponds to the signal frequency, and the amplitude is 1, with an initial phase of 0 degrees. Then, the first reference signal is phase-shifted, for example, by 90 degrees, to obtain the second reference signal. For example, for I... x (t) = sin(ωt) phase shifted by 90 degrees to obtain the quadrature reference signal I. y (t) = cos(ωt), at this time the second reference signal and the target signal have the same signal frequency, that is, the signal frequency corresponding to ω.
[0055] Step 102: Multiply the first reference signal and the target signal to obtain the first output signal.
[0056] In this embodiment, the first reference signal and the target signal can be multiplied by the digital circuit multiplier in the processor to obtain the first output signal.
[0057] For example, the digital circuit multiplier within the DSP is used to multiply the first reference signal I. x (t) = sin(ωt) and Multiply to obtain the first output signal, and then... express.
[0058] Step 103: Multiply the second reference signal and the target signal to obtain the second output signal.
[0059] In this embodiment, the second reference signal and the target signal can be multiplied by the multiplier in the processor to obtain the second output signal.
[0060] For example, the digital circuit multiplier within the DSP is used to multiply the second reference signal I. y (t) = cos(ωt) and Multiply to obtain the second output signal, and then... express.
[0061] Step 104: Obtain the in-phase component in the first output signal and the quadrature component in the second output signal.
[0062] Specifically, in this embodiment, the in-phase and quadrature components can be obtained through a digital low-pass filter in the processor. For example, the first output signal can be filtered using a digital low-pass filter in the DSP to obtain the in-phase component in the first output signal, and the second output signal can be filtered using a digital low-pass filter in the DSP to obtain the quadrature component in the second output signal.
[0063] For example, in this embodiment, the first output signal is obtained. In-phase components And obtain the second output signal orthogonal components in
[0064] Step 105: Obtain the power factor of the target signal based on the in-phase and quadrature components.
[0065] For example, in this embodiment, the in-phase and quadrature components can be digitally calculated to obtain the power factor of the target signal.
[0066] As can be seen from the above scheme, the power factor acquisition method for a signal provided in Embodiment 1 of this application involves a digital signal processor obtaining reference signals for two digital signals with the same frequency but different phases. The reference signals are then multiplied by the target signal of the digital signal to be detected, resulting in two output signals. The in-phase and quadrature components of the two output signals are then acquired, and the power factor of the target signal is obtained based on these components. Therefore, this application uses a single electronic device to acquire the power factor of the target signal through digital processing, avoiding signal delays caused by signal transmission between multiple components, thus saving signal processing time and improving the efficiency of power factor acquisition.
[0067] In one implementation, the processor in step 105 can be implemented in the following way:
[0068] First, divide the in-phase component by the quadrature component to obtain the tangent component.
[0069] For example, in-phase components Divided by orthogonal components Obtain the tangent component
[0070] Then, take the arctangent value of the tangent component.
[0071] For example, for the tangent component Take the arctangent, and we get The value of .
[0072] Finally, the cosine of the arctangent value is taken to obtain the power factor of the target signal.
[0073] For example, for The target signal can be obtained by taking the cosine value of the given value. power factor That is
[0074] Furthermore, the target signal is the target signal obtained after sampling and corresponding processing by the sampling circuit and the conditioning circuit. Therefore, noise signals may exist in the target signal. Before steps 102 and 103, the method in this embodiment may also include the following steps, such as... Figure 2 As shown:
[0075] Step 106: Filter the target signal to remove noise signals from the target signal.
[0076] When the target signal contains noise signal n(t), it can be represented by X(t) = u(t) + n(t), where, As the effective voltage signal in the target signal, in this embodiment, the demodulation function in the DSP can be used to filter X(t) = u(t) + n(t) to obtain the target signal with the noise signal n(t) removed.
[0077] refer to Figure 3 This is a schematic diagram of a signal power factor acquisition device provided in Embodiment 2 of this application. The device can be configured in a processor, which can be a chip or component capable of digital signal processing, such as a microprocessor or DSP. The technical solution in this embodiment mainly utilizes the digital demodulation function in a digital signal processor to acquire the signal power factor, thereby improving the power factor acquisition efficiency.
[0078] Specifically, the device in this embodiment may include the following functional units:
[0079] The signal acquisition unit 301 is used to acquire the first reference signal and the second reference signal.
[0080] In this design, both the first and second reference signals are digital signals with the same frequency as the target signal of the digital signal to be detected, and there is a phase difference between them, such as a 90-degree phase difference. The amplitude of both the first and second reference signals is 1, and the initial phase of one of the reference signals is 0 degrees, while the initial phase of the other reference signal is different from 0 degrees.
[0081] Specifically, in this embodiment, the signal acquisition unit 301 can be implemented as a digital signal generator to obtain a first reference signal and a second reference signal of the digital signal.
[0082] For example, the target signal can be in This indicates that the digital signal output after signal processing and conditioning by the sampling and conditioning circuits is A, where A is the amplitude of the target signal and ω corresponds to the frequency of the target signal. The phase of the target signal is given. Correspondingly, a digital sequence is generated using the digital signal generator within the DSP to form a first reference signal and a second reference signal. At this point, the signal frequencies of both the first and second reference signals are the same as the signal frequency corresponding to ω, but the phases of the first and second reference signals are different.
[0083] Specifically, in this embodiment, a first reference signal can be obtained first using a digital signal generator, which can be I x (t) = sin(ωt) means that at this point, the first reference signal and the target signal have the same frequency, i.e., ω corresponds to the signal frequency, and the amplitude is 1, with an initial phase of 0 degrees. Then, the first reference signal is phase-shifted, for example, by 90 degrees, to obtain the second reference signal. For example, for I... x (t) = sin(ωt) phase shifted by 90 degrees to obtain the quadrature reference signal I. y (t) = cos(ωt), at this time the second reference signal and the target signal have the same signal frequency, that is, the signal frequency corresponding to ω.
[0084] The signal multiplication unit 302 is used to multiply the first reference signal and the target signal to obtain the first output signal, and to multiply the second reference signal and the target signal to obtain the second output signal.
[0085] In this embodiment, the signal multiplication unit 302 can be implemented as a digital circuit multiplier to multiply the first reference signal and the target signal to obtain the first output signal, and multiply the second reference signal and the target signal to obtain the second output signal.
[0086] For example, the digital circuit multiplier within the DSP is used to multiply the first reference signal I. x (t) = sin(ωt) and Multiply to obtain the first output signal, and then... express;
[0087] And use the digital circuit multiplier in the DSP to multiply the second reference signal I y (t) = cos(ωt) and Multiply to obtain the second output signal, and then... express.
[0088] The component acquisition unit 303 is used to acquire the in-phase component in the first output signal and the quadrature component in the second output signal.
[0089] Specifically, in this embodiment, the component acquisition unit 303 can be a digital low-pass filter in the processor. Thus, in this embodiment, the in-phase component and quadrature component can be acquired through the digital low-pass filter in the processor. For example, the first output signal can be filtered by the digital low-pass filter in the DSP to obtain the in-phase component in the first output signal, and the second output signal can be filtered by the digital low-pass filter in the DSP to obtain the quadrature component in the second output signal.
[0090] For example, in this embodiment, the first output signal is obtained. In-phase components And obtain the second output signal orthogonal components in
[0091] The factor acquisition unit 304 is used to obtain the power factor of the target signal based on the in-phase component and the quadrature component.
[0092] For example, in this embodiment, the in-phase and quadrature components can be digitally calculated to obtain the power factor of the target signal.
[0093] Specifically, the factor acquisition unit 304 can be implemented in the following ways:
[0094] First, divide the in-phase component by the quadrature component to obtain the tangent component. For example, divide the in-phase component... Divided by orthogonal components Obtain the tangent component
[0095] Next, take the arctangent value of the tangent component. For example, for the tangent component... Take the arctangent, and we get The value of .
[0096] Finally, the cosine of the arctangent value is taken to obtain the power factor of the target signal.
[0097] For example, for The target signal can be obtained by taking the cosine value of the given value. power factor That is
[0098] As can be seen from the above scheme, the power factor acquisition device for a signal provided in Embodiment 2 of this application, after obtaining reference signals of two digital signals with the same frequency but different phases through a digital signal processor, multiplies the reference signals with the target signal of the digital signal to be detected, respectively, to obtain two output signals. Then, it acquires the in-phase component and the quadrature component of the two output signals, and then obtains the power factor of the target signal based on the in-phase component and the quadrature component. It can be seen that this application uses an electronic device to acquire the power factor of the target signal through digital processing, avoiding the signal delay caused by signal transmission between multiple components, thereby saving the time consumed by signal processing and improving the efficiency of power factor acquisition.
[0099] refer to Figure 4 This is a schematic diagram of a processor provided in Embodiment 3 of this application. The processor can be a digital signal processor, such as a microprocessor or DSP, and is connected to a sampling circuit that outputs the target signal to be detected. It is used to obtain the signal power factor by utilizing the digital demodulation function in the digital signal processor, thereby improving the power factor acquisition efficiency.
[0100] Specifically, the processor in this embodiment is mainly used for:
[0101] A first reference signal and a second reference signal are obtained. The first reference signal and the second reference signal are digital signals and have the same signal frequency as the target signal of the digital signal to be detected, and there is a phase difference between the first reference signal and the second reference signal. The first reference signal is multiplied by the target signal to obtain a first output signal. The second reference signal is multiplied by the target signal to obtain a second output signal. The in-phase component in the first output signal and the quadrature component in the second output signal are obtained. The power factor of the target signal is obtained based on the in-phase component and the quadrature component.
[0102] Logically, processors can be divided into, for example: Figure 5 The schematic diagram shows that after the processor generates a first reference signal using a digital signal generator, it shifts the phase of the first reference signal by 90 degrees using a phase shifter to obtain a second reference signal. Then, the first and second reference signals are multiplied by the target signal of the digital signal to be detected using digital circuit multipliers, and after passing through digital low-pass filters, in-phase and quadrature components are obtained. Finally, the power factor is obtained through digital processing.
[0103] As can be seen from the above scheme, the processor provided in Embodiment 3 of this application, after obtaining reference signals of two digital signals with the same frequency but different phases through a digital signal processor, multiplies the reference signals with the target signal of the digital signal to be detected, respectively, to obtain two output signals. Then, it obtains the in-phase component and the quadrature component of the two output signals, and then obtains the power factor of the target signal based on the in-phase component and the quadrature component. It can be seen that this application uses an electronic device to obtain the power factor of the target signal through digital processing, avoiding the signal delay caused by signal transmission between multiple components, thereby saving the time consumed by signal processing and improving the efficiency of power factor acquisition.
[0104] refer to Figure 6 This is a schematic diagram of the structure of an electronic device provided in Embodiment 4 of this application. The electronic device can be a device that includes a digital signal processor capable of performing digital signal processing. The processor is connected to a sampling circuit that outputs a target signal to be detected, and is used to obtain the signal power factor by utilizing the digital demodulation function in the digital signal processor, thereby improving the power factor acquisition efficiency.
[0105] Specifically, the electronic device in this embodiment may include the following structures:
[0106] Memory 601 is used to store applications and data generated during application execution;
[0107] Processor 602, used to execute applications to achieve:
[0108] A first reference signal and a second reference signal are obtained. The first reference signal and the second reference signal are digital signals and have the same signal frequency as the target signal of the digital signal to be detected, and there is a phase difference between the first reference signal and the second reference signal. The first reference signal is multiplied by the target signal to obtain a first output signal. The second reference signal is multiplied by the target signal to obtain a second output signal. The in-phase component in the first output signal and the quadrature component in the second output signal are obtained. The power factor of the target signal is obtained based on the in-phase component and the quadrature component.
[0109] In addition to the processor 602, the electronic device may also include components that output digital signals, such as sampling circuits. Based on this, the analog signal target signal, after being input to the sampling circuit, passes through an amplifier, filter, and analog-to-digital converter circuit, such as... Figure 7As shown in the figure, the input is sent to the processor 602 in this embodiment. After the processor 602 generates a first reference signal using a digital signal generator, it shifts the phase of the first reference signal by 90 degrees using a phase shifter to obtain a second reference signal. Then, the first reference signal, the second reference signal, and the target signal of the digital signal are subjected to phase-sensitive detection using a phase-locked loop amplifier algorithm. Figure 5 As shown, after obtaining the in-phase and quadrature components, the power factor is calculated to obtain the power factor of the target signal.
[0110] As can be seen from the above scheme, the electronic device provided in Embodiment 4 of this application, after obtaining reference signals of two digital signals with the same frequency but different phases through a digital signal processor, multiplies the reference signals with the target signal of the digital signal to be detected, respectively, to obtain two output signals. Then, it obtains the in-phase component and the quadrature component of the two output signals, and then obtains the power factor of the target signal based on the in-phase component and the quadrature component. It can be seen that this application uses an electronic device to obtain the power factor of the target signal through digital processing, avoiding the signal delay caused by signal transmission between multiple components, thereby saving the time consumed by signal processing and improving the efficiency of power factor acquisition.
[0111] The following example uses a DSP processor to illustrate the technical solution of this application:
[0112] First, the technical solution of this application uses a phase-locked loop amplifier algorithm to obtain the power factor of a weak target signal: First, the input digital target signal is decomposed into voltage and noise components; second, based on the frequency of the voltage component of the target signal, a reference current of the same frequency is added, and the reference current obtained through a phase shifter is multiplied to obtain the corresponding output signal; finally, high-frequency signals are filtered out to obtain the power factor. It is evident that the technical solution of this application has simple control logic and is easy to implement digitally, thereby improving the efficiency and accuracy of power factor acquisition.
[0113] like Figure 8 As shown, the specific solution of this application is implemented in the following process:
[0114] Step 1: Formula (1) is the input digital target signal X(t). Specifically, the digital target signal can be obtained through sampling circuits, etc., and then decomposed into voltage signal and noise signal through phase-locked loop amplifier algorithm:
[0115] X(t)=u(t)+n(t) (1)
[0116]
[0117] In formula (2), u(t) is the input voltage signal with an amplitude of A, and n(t) is the noise signal.
[0118] Step 2: Input sinusoidal current reference signal I x (t), and then the phase shifter generates a pre-current reference signal I. y (t):
[0119] I x (t)=sin(ωt) (3)
[0120] I y (t)=cos(ωt) (4)
[0121] Wherein, the first reference signal I in formula (3) x The amplitude of (t) is 1, the initial phase is 0° and the frequency is the same as that of the digital target signal to be measured, and I in formula (4) y (t) is I x (t) The quadrature reference signal (second reference signal) obtained by phase shifting by 90° through a phase shifter.
[0122] Step 3: Multiply the digital target signal to be measured with the sine and cosine reference signals using a digital circuit multiplier to obtain the output signal Z(t):
[0123]
[0124]
[0125] Wherein, Z in formula (5) x (t) and Z in formula (6) y (t) represents the corresponding output signal.
[0126] Step 4: The two output signals are passed through a digital low-pass filter to remove noise and high-frequency components, resulting in the quadrature component Q(t) in formula (7) and the in-phase component D(t) in formula (8):
[0127]
[0128]
[0129] Step 5: Using the digital phase-locked loop amplifier algorithm, calculate the power factor using the following formulas (9) and (10).
[0130]
[0131]
[0132] As can be seen, in the technical solution of this application, based on the digital phase-locked loop amplifier algorithm, digital signal processing is achieved using the digital demodulator in the digital signal processor, and the reference signal is realized through the digital signal generator inside the microprocessor or DSP. Therefore, the hardware circuit design is simplified to a certain extent, thereby improving the efficiency of power factor acquisition. At the same time, the circuit components of the existing phase-locked loop amplifier are replaced by the digital devices in this application, reducing harmonic components and avoiding DC drift. Moreover, the DC output does not require a DC amplification circuit, eliminating the generation of additional errors and making the power factor acquisition more accurate. Furthermore, the core algorithm of the digital phase-locked loop amplifier in the technical solution of this application is implemented through software programming, which has the characteristics of convenient debugging and good flexibility.
[0133] The various embodiments in this specification are described in a progressive manner, with each embodiment focusing on its differences from other embodiments. Similar or identical parts between embodiments can be referred to interchangeably. For the apparatus disclosed in the embodiments, since they correspond to the methods disclosed in the embodiments, the description is relatively simple; relevant parts can be referred to the method section.
[0134] Those skilled in the art will further recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of both. To clearly illustrate the interchangeability of hardware and software, the components and steps of the various examples have been generally described in terms of functionality in the foregoing description. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.
[0135] The steps of the methods or algorithms described in conjunction with the embodiments disclosed herein can be implemented directly by hardware, a software module executed by a processor, or a combination of both. The software module can be located in random access memory (RAM), main memory, read-only memory (ROM), electrically programmable ROM, electrically erasable programmable ROM, registers, hard disk, removable disk, CD-ROM, or any other form of storage medium known in the art.
[0136] The above description of the disclosed embodiments enables those skilled in the art to make or use this application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of this application. Therefore, this application is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
Claims
1. A method of power factor acquisition of a signal, characterized by, The method applied to a processor comprises: The first reference signal and the second reference signal are obtained by a digital signal generator in the processor, the first reference signal and the second reference signal are digital signals, and the first reference signal and the second reference signal are the same as a target signal of a digital signal to be detected in signal frequency, and the first reference signal and the second reference signal have a phase difference; the target signal is a digital signal obtained after sampling and conditioning by a sampling circuit and a conditioning circuit; the target signal is ; wherein A is a signal amplitude of the target signal, ω corresponds to a signal frequency of the target signal, is a phase of the target signal; the first reference signal is ; and the second reference signal is ; multiplying the first reference signal and the target signal through a digital circuit multiplier in the processor to obtain a first output signal, and multiplying the second reference signal and the target signal through the digital circuit multiplier in the processor to obtain a second output signal; obtaining an in-phase component in the first output signal and a quadrature component in the second output signal through a digital low-pass filter in the processor; obtaining a power factor of the target signal according to the in-phase component and the quadrature component; wherein the obtaining of the power factor of the target signal according to the in-phase component and the quadrature component comprises: dividing the quadrature component by the in-phase component to obtain a tangent component; taking an inverse tangent value of the tangent component; taking a cosine value of the inverse tangent value to obtain the power factor of the target signal, so that an electronic device realizes the acquisition of the power factor of the target signal by utilizing the digital demodulation function in the processor, and avoids signal transmission between multiple elements to acquire the power factor through another instrument; wherein before the multiplication of the first reference signal and the target signal to obtain the first output signal, the method further comprises: filtering the target signal through a demodulation function in the processor to remove a noise signal in the target signal.
2. The method of claim 1, wherein, the obtaining of the in-phase component in the first output signal and the quadrature component in the second output signal comprises: filtering the first output signal and the second output signal respectively to obtain the in-phase component in the first output signal and the quadrature component in the second output signal.
3. A power factor acquisition device for a signal, characterized by The device applied to a processor comprises: The signal obtaining unit is configured to obtain a first reference signal and a second reference signal by a digital signal generator in the processor, the first reference signal and the second reference signal are digital signals, and the first reference signal and the second reference signal have the same signal frequency as a target signal of a digital signal to be detected and have a phase difference; the target signal is a digital signal obtained after sampling and conditioning by a sampling circuit and a conditioning circuit; the target signal is ; wherein A is a signal amplitude of the target signal, ω corresponds to a signal frequency of the target signal, is a phase of the target signal; the first reference signal is ; and the second reference signal is ; and the signal processing unit is configured to obtain a first signal and a second signal by the first reference signal and the second reference signal, and obtain a target signal by the first signal and the second signal. a signal multiplication unit configured to multiply the first reference signal and the target signal through a digital circuit multiplier in the processor to obtain a first output signal, and multiply the second reference signal and the target signal through the digital circuit multiplier in the processor to obtain a second output signal; a component obtaining unit configured to obtain an in-phase component in the first output signal and a quadrature component in the second output signal through a digital low-pass filter in the processor; a factor obtaining unit configured to obtain a power factor of the target signal according to the in-phase component and the quadrature component; wherein the factor obtaining unit obtains the power factor of the target signal according to the in-phase component and the quadrature component by dividing the quadrature component by the in-phase component to obtain a tangent component, taking an inverse tangent value of the tangent component, and taking a cosine value of the inverse tangent value to obtain the power factor of the target signal, so that an electronic device realizes the acquisition of the power factor of the target signal by utilizing the digital demodulation function in the processor, and avoids signal transmission between multiple elements to acquire the power factor through another instrument; Wherein, before multiplying the first reference signal with the target signal to obtain a first output signal, the target signal is filtered by a demodulation function in the processor to remove noise signal in the target signal.
4. A processor, comprising: For: The first reference signal and the second reference signal are obtained by a digital signal generator in the processor, the first reference signal and the second reference signal are digital signals, and the first reference signal and the second reference signal are the same as a target signal of a digital signal to be detected in signal frequency, and the first reference signal and the second reference signal have a phase difference; the target signal is a digital signal obtained after sampling and conditioning by a sampling circuit and a conditioning circuit; the target signal is ; wherein A is a signal amplitude of the target signal, ω corresponds to a signal frequency of the target signal, , and φ is a phase of the target signal; the first reference signal is ; and the second reference signal is . Multiplying the first reference signal with the target signal by a digital circuit multiplier in the processor to obtain a first output signal; and multiplying the second reference signal with the target signal by a digital circuit multiplier in the processor to obtain a second output signal; Obtaining in-phase component in the first output signal and quadrature component in the second output signal by a digital low-pass filter in the processor; Obtaining power factor of the target signal according to the in-phase component and the quadrature component; Wherein, obtaining power factor of the target signal according to the in-phase component and the quadrature component comprises: Dividing the quadrature component by the in-phase component to obtain tangent component; Taking inverse tangent value of the tangent component; Taking cosine value of the inverse tangent value to obtain power factor of the target signal, so that an electronic device realizes obtaining power factor of a target signal by using digital demodulation function in a processor, avoiding signal transmission between multiple elements to obtain power factor by another instrument; wherein, before multiplying the first reference signal with the target signal to obtain a first output signal, it also includes: filtering the target signal by a demodulation function in the processor to remove noise signal in the target signal.
5. An electronic device, comprising: Comprise: Memory, store application program and data generated by application program running; The processor is used for executing the application program to realize the function of obtaining a first reference signal and a second reference signal by a digital signal generator in the processor, the first reference signal and the second reference signal are digital signals, and the first reference signal and the second reference signal are the same as a target signal of a digital signal to be detected in signal frequency, and the first reference signal and the second reference signal have a phase difference; the target signal is a digital signal obtained after sampling and conditioning of a sampling circuit and a conditioning circuit; the target signal is ; wherein A is a signal amplitude of the target signal, ω corresponds to a signal frequency of the target signal, is a phase of the target signal; the first reference signal is ; the second reference signal is ; the first reference signal is multiplied with the target signal by a digital circuit multiplier in the processor to obtain a first output signal; and the second reference signal is multiplied with the target signal by the digital circuit multiplier in the processor to obtain a second output signal; an in-phase component in the first output signal and a quadrature component in the second output signal are obtained by a digital low-pass filter in the processor; and the power factor of the target signal is obtained according to the in-phase component and the quadrature component; wherein the power factor of the target signal is obtained according to the in-phase component and the quadrature component, including: dividing the quadrature component by the in-phase component to obtain a tangent component; taking an inverse tangent value of the tangent component; taking a cosine value of the inverse tangent value to obtain the power factor of the target signal, so that an electronic device realizes the acquisition of the power factor of the target signal by using the digital demodulation function in the processor, and avoids signal transmission between multiple elements to acquire the power factor by another instrument; wherein before the first reference signal is multiplied with the target signal to obtain the first output signal, the target signal is further filtered by a demodulation function in the processor to remove a noise signal in the target signal.