Preconfigured shared resources for uplink transmission

Abstract

Embodiments of the present disclosure provide for configuration and use of pre-configured uplink resources.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to U.S. Provisional Patent Application No. 62 / 739,057, filed on September 28, 2018, and entitled “Preconfigured Shared Resources for Uplink Transmission.” The disclosure of this application is hereby incorporated by reference in its entirety. Technical Field

[0003] Embodiments of the present invention generally relate to the field of wireless communication technology. Background Art

[0004] The 3rd Generation Partnership Project (3GPP) has developed various technologies for Internet of Things (IoT) deployments. These standards include enhanced machine type communications (eMTC) and narrowband IoT (NB-IOT). The eMTC technology is an enhancement to the Long Term Evolution (LTE) design for machine type communications (MTC) and includes enhancements such as: support for positioning, multicast, and voice over LTE; mobility for inter-frequency measurements; and higher data rates. NB-IoT is an even lower cost technology than eMTC with enhancements related to extended coverage, longer battery life, and support for a large number of devices (e.g., at least 50,000 per cell). BRIEF DESCRIPTION OF THE DRAWINGS

[0005] The embodiment will be more easily understood by the following specific implementation in conjunction with the accompanying drawings. In order to facilitate this description, similar reference numerals represent similar structural elements. In each figure of the accompanying drawings, the embodiment is shown by way of example and not limitation.

[0006] Figure 1 A network according to some embodiments is shown.

[0007] Figure 2 A periodic time-frequency allocation of resource pools and associated time windows is shown in accordance with some embodiments.

[0008] Figure 3 Resource pools according to some embodiments are shown.

[0009] Figure 4 Schematically illustrates configuration parameters of a resource pool (RP#n) according to some embodiments.

[0010] Figure 5 An operational flow / algorithm structure according to some embodiments is shown.

[0011] Figure 6 An operational flow / algorithm structure according to some embodiments is shown.

[0012] Figure 7 Examples of infrastructure equipment according to various embodiments are shown.

[0013] Figure 8 Depicted are exemplary components of a computer platform or device according to various embodiments.

[0014] Fig. 9 Depicted are exemplary components of baseband circuitry and radio frequency end modules according to various embodiments.

[0015] Fig.10 is a block diagram illustrating components capable of reading instructions from a machine-readable medium or computer-readable medium (e.g., a non-transitory machine-readable storage medium) and performing any one or more of the methodologies discussed herein, according to some exemplary embodiments. DETAILED DESCRIPTION

[0016] The following specific embodiments relate to the accompanying drawings. The same figure numbers may be used to identify the same or similar elements in different drawings. In the following description, for the purpose of illustration and not limitation, specific details, such as specific structures, architectures, interfaces, technologies, etc., are described to provide a thorough understanding of the various aspects of each embodiment. However, it will be apparent to those skilled in the art who benefit from the present disclosure that the various aspects of each embodiment can be practiced in other examples that deviate from these specific details. In some cases, the description of well-known equipment, circuits, and methods is omitted so that the description of the various embodiments will not be obscured by unnecessary details. For the purpose of this document, the phrases "A or B" and "A / B" refer to (A), (B), or (A and B).

[0017] NB-IoT and eMTC devices may need to support transmissions in preconfigured resources in Radio Resource Control (RRC) IDLE and RRC CONNECTED modes. RRC CONNECTED / IDLE mode may also be referred to as RRC CONNECTED / IDLE state. These transmissions may be based on a single carrier-frequency division multiple access (SC-FDMA) waveform for UEs with valid timing advance. Both shared resources and dedicated resources may be considered.

[0018] The embodiments disclosed herein describe preconfigured resources for uplink transmissions supporting both MTC (including eMTC) and NB-IoT. Some embodiments describe utilizing shared resources in IDLE mode for uplink transmissions. However, similar concepts may be used in embodiments that use shared resources in CONNECTED mode or dedicated resources in either CONNECTED or IDLE mode.

[0019] Figure 1 An access network 100 according to some embodiments is shown. In general, the components shown in the access network 100 may be similar to and substantially interchangeable with the components of the same name in other figures described herein. The network 100 may include a UE 104 to communicate with an access node 108 of a radio access network (RAN) 112 using one or more radio access technologies. The UE 104 may be an eMTC device or a NB-IoT device. The RAN 112 may be an evolved universal terrestrial access network (E-UTRAN), a fifth generation (5G) RAN, or some other type of wireless access network. The access node 108 may be referred to as a base station (BS), an evolved node B (eNB), a 5G node B (gNB), a next generation evolved node B (ng-eNB), etc.

[0020] UE 104 may be a low-cost, low-power, or enhanced coverage device. UE 104 may identify pre-configured resources that it subsequently uses for uplink transmissions to access node 108.

[0021] In some embodiments, the access node 108 may provide configuration information with respect to a preconfigured resource pool for UL transmission to the UE 104. The configuration of the resource pool may assume one or several modulation and coding scheme (MCS) or transport block size (TBS) values ​​for UL transmission in the resource pool and one or more repetitions of the UL transmission. The configuration of the preconfigured resource pool may allow a UE (e.g., UE 104) to autonomously select and share resources for UL transmission.

[0022] As will be described in further detail, some embodiments include: signaling initial configuration and reconfiguration or release of resource pools; and conflict handling in the event that UEs use the same resource pool.

[0023] In this disclosure, unless explicitly stated, all embodiments and examples are applicable to both LTE MTC and NB-IoT radio access systems. In addition, the teachings relative to MTC may also be applicable to eMTC.

[0024] Figure 2 A periodic time-frequency allocation of resource pools (RP) and associated time windows (TW) is shown in accordance with some embodiments.

[0025] A resource pool (which may also be referred to as a preconfigured uplink resource (PUR) configuration) may be a logical aggregation of physical resources for UL transmissions. In some embodiments, the physical resources may be physical resource block (PRB) pairs, each of which occupies 12 frequency subcarriers and 2 time slots, or in other words, 1 subframe (using E-UTRAN terminology). However, in some embodiments, the resource pool may include or consist of resource units (RUs) for sub-PRB UL transmissions, thus occupying several PRB subcarriers in the frequency domain. Sub-PRB UL transmissions may be used, for example, in NB-IoT scenarios.

[0026] Figure 2 Three resource pools RP#0, RP#1 and RP#2 are shown, which are associated with three time windows TW#0, TW#1 and TW#2, respectively. As can be seen with respect to RP#0 and RP#1, different resource pools may overlap each other.

[0027] During the time window, UE 104 may monitor downlink control information (DCI). In some embodiments, the DCI may confirm that a successful UL transmission has occurred in the corresponding resource pool (via an explicit UL hybrid automatic repeat request-acknowledgement (HARQ-ACK) indication mechanism) or request a UL retransmission (via a UL grant) by, for example, using a HARQ mechanism.

[0028] In other embodiments, the DCI may include scheduling information to schedule a downlink (DL) shared channel to carry data transmission, which may confirm a successful UL transmission in a corresponding resource pool or request a UL retransmission using a HARQ mechanism.

[0029] Resource pools can be configured to have different periodicities. For example, Figure 2 Three cycles are shown, a first cycle 204, a second cycle 208, and a third cycle 212. RP#0 and associated TW#0 may be allocated in each of these cycles; RP#1 and associated TW#1 may be allocated only in the first cycle 204 and the third cycle 212; and RP#2 and associated TW#2 may be allocated only in the first cycle 204 and the second cycle 208.

[0030] In some embodiments, a physical downlink control channel (PDCCH) search space may be configured for monitoring DCI. The PDCCH may be referred to as an MTC PDCCH (MPDCCH) for an MTC implementation or an NB-IoT PDCCH (NPDCCH) for an NB-IoT implementation. The configuration of the (M / N)PDCCH search space for DCI monitoring may reuse the existing (M / N)PDCCH search space definition. For example, when in IDLE mode, the configuration of the (M / N)PDCCH Type 2-Common Search Space (CSS) for random access may be used. When in CONNECTED mode, the configuration of the (M / N)PDCCH UE-Specific Search Space (UESS) may be used. In addition, for eMTC, when in CONNECTED mode, the UE 104 may be specified to monitor DCI formats 6-0A and 6-0B, depending on the current coverage extension (CE) mode configured (again, when in connected mode) and depending on the most recently configured CE mode before transitioning to IDLE mode (when the UE 104 transmits from IDLE mode on pre-configured UL resources). For NB-IoT systems, the UE 104 may monitor DCI format N0 for any rescheduled UL grants. For NB-IoT systems, an explicit indication of a positive acknowledgment of a PUSCH transmission (without any further scheduling of new or retransmissions of a PUSCH transport block) may be achieved by setting all fields in DCI format N0 to zero, in addition to the following: a flag for N0 / N1 distinction; a number of DCI subframe retransmissions; and a modulation and coding scheme: an ACK may be indicated by, for example, setting the MCS field to "1111".

[0031] In various implementations, one or more resource pools may be set up in the system. Generally speaking, the UE 104 may autonomously select a resource pool for UL transmission. In the case where multiple UEs select the same resource pool, there is a possibility of collision. In order to reduce the probability of collision, some implementations utilize resource patterns within different resource pools.

[0032] Figure 3A resource pool 300 according to some embodiments is shown. The resource pool 300 may include a plurality of resource units 304 that may be allocated. The resource pool 300 may include a first resource pattern 308 including a first set of resource units 304 and a second resource pattern 312 including a second set of resource units 304. In some embodiments, a UE 104 may be configured with the resource patterns of the resource pool 300 and may autonomously select one of the resource patterns for uplink transmissions. A resource pattern may be viewed as a sequence of time or time-frequency resources corresponding to a single physical uplink shared channel (PUSCH) transmission using a specific number (e.g., one or more) of repetitions.

[0033] In some embodiments, UE autonomous resource selection may be defined as following a consistent random selection procedure on a set of resource patterns that constitute a resource pool. If selected, it may define (possibly together with other parameters) which specific physical resources from the pool can be used for UL transmission. In some embodiments, UE 104 may select a specific resource pattern from a set of provided patterns based on one of the UE's unique identifiers, UE_ID (e.g., IMSI). Other candidates for determining pattern selection may include, for example, an estimated UL coverage level or service type (e.g., the type of data sent, such as but not limited to IP voice traffic, sensor traffic, etc.). The access node 108 receiving the UL signal in the resource pool may know all the parameters of the resource pool, including a set of available resource patterns, and may attempt to blindly detect the UL signal in each resource pattern. In some embodiments, the UL signal used by the access node 108 to detect transmissions in preconfigured resources may be a UL demodulation reference signal (DMRS). In other embodiments, a new type of UL signal selected by the UE 104 may be used for this purpose, for example, one of a set of preamble / notification signals that is specifically designed for UL transmissions in preconfigured resources. In other embodiments, the UE_ID may also be transmitted in preconfigured resources as part of the UL payload for contention resolution.

[0034] Figure 4 Configuration parameters of a resource pool (RP#n) according to some embodiments are schematically shown. The parameters may include one or more of the following: the starting subframe of the resource pool; the resource pool duration, which defines the maximum number of repetitions during a particular UL transmission in the resource pool; the periodicity of the resource pool allocation (e.g., availability of UL transmissions); the lowest PRB (or other allocation unit) of the resource pool, which can be used to determine the location of the resource pool in the frequency domain; the resource pool bandwidth (in the case where it may be different from 1 PRB); the gap between the resource pool in the time domain and the associated time window that the UE will monitor for DCI transmissions; and the time window duration.

[0035] As described above, access node 108 may send information to UE 104 using one or more configuration messages to communicate these configuration parameters.

[0036] Although Figure 4 The time gap shown in takes into account the time between the first subframe in the resource pool and the first subframe of the time window for (M / N)PDCCH monitoring, but other timing relationships may be defined. For example, a gap may be defined between the end of a set of repetitions for (N)PUSCH transmissions within a resource pool and the first subframe of the time window for (M / N)PDCCH monitoring.

[0037] The time window duration may be defined similarly to the contention resolution window defined as part of the random access procedure. In another example, the time window duration may be configured separately for when the UE 104 is in IDLE mode or CONNECTED mode. The concept of time window duration may be applied to the starting subframe and the top of the periodicity indicated by the configuration of the corresponding (M / N) PDCCH search space, as described above.

[0038] Each resource pool may be associated with at least one MCS or TBS and at least one value of the number of transmission repetitions that may be used during UL transmissions in the pool. In some embodiments, a hybrid approach may be employed in which the MCS / TBS is fixed for a particular resource pool, but the number of candidate values ​​for the number of repetitions is configured. This may also be configured by setting the maximum number of repetitions and the number of candidates for the starting subframe. In other embodiments, the number of repetitions may be fixed and the number of candidate MCS / TBS values ​​may be configured for the UE 104. If the MCS / TBS and / or the number of repetitions are not fixed, the UE may select one of the candidate values ​​based on its estimate of the UL range. It may depend on the receiving access node 108 to detect which MCS / TBS and / or number of repetitions the UE 104 uses.

[0039] The size of a resource unit (RU), such as RU 304, may also be part of the resource pool configuration. This may be particularly useful in implementations where the resource pool may be intended for sub-PRB UL transmissions (e.g., NB-IoT systems).

[0040] The resource pool configuration may be provided to the UE 104 using high-level radio resource control (RRC) signaling. In some implementations, UE-specific dedicated RRC signaling may be used for this purpose. In this case, the UE 104 may initially receive a resource pool configuration in RRC CONNECTED mode. Thereafter, the UE 104 in CONNECTED mode may use the received resource pool configuration for UL transmission in the corresponding resources.

[0041] In an E-UTRA system, before transitioning to the RRC CONNECTED mode, the UE 104 may perform a random access (RA) procedure and may obtain a valid timing advance (TA) from the access node 108. Herein, it may be assumed that the valid TA obtained during the RA procedure and the resource pool configuration obtained in the RRC CONNECTED mode may be later used by the UE 104 for UL transmission in the preconfigured resources, even if the UE 104 transitions to the RRC IDLE state.

[0042] In some embodiments, cell-common transmission of a system information block (SIB) may be used to deliver the resource pool configuration to the UE. Reception of the SIB may be enabled for the UE in connected or IDLE mode. Therefore, SIB transmissions may also be used for reconfiguration of resource pool parameters or release of resource pools. A resource pool may be used, for example, for non-periodic UL transmissions in pre-configured resources when the resource pool and corresponding time window may be released and its resources may be reused for other UL transmission types after a certain number of instances (which may be part of the configuration information). Of course, UE-specific RRC signaling may be used for resource pool reconfiguration / release. But in those embodiments, the UE may need to be in CONNECTED mode to achieve this.

[0043] Dedicated resources (e.g., those used for contention-free access) may be a special case of shared resources, depending on the resource pool configuration provided by the access node 108. In other words, by setting appropriate resource pool parameters, the access node 108 may allocate resources specifically for a particular UE. As an example, a dedicated allocation may be achieved by configuring the UE 104 with a preconfigured resource pool configuration having a single transmission resource.

[0044] Figure 5 An operational flow / algorithm structure 500 is shown according to some embodiments. The operational flow / algorithm structure 500 may be performed partially or completely by the UE 104 or components thereof. For example, in some embodiments, the operational flow / algorithm structure 500 may be performed by baseband circuitry implemented in the UE 104.

[0045] The operational flow / algorithm structure 500 may include obtaining power configuration information at 504. The configuration information may be obtained in one or more messages received from the access node 108. In various embodiments, the message may be received while the UE 104 is in an RRC connection. For example, in some embodiments, the configuration information may include a timing advance received by the UE 104 during a RA procedure and may also include resource pool configuration information received by the UE 104 while in an RRC CONNECTED mode.

[0046] The operational flow / algorithm structure 500 may also include transitioning to the RRC IDLE state at 508. When in the RRC IDLE state, the UE 104 may generally deactivate its radio components, but still have an IP address assigned and tracked by the network. While in IDLE, the UE 104 may perform a number of procedures, including public land mobile network (PLMN) selection, cell (re)selection, cell reservation and access restriction, tracking area registration, broadcast message reception (including acquisition of management information blocks (MIB) and SIB messages); and paging.

[0047] The operational flow / algorithm structure 500 may also include generating an uplink message to be transmitted in the resource pool at 512. The message may be transmitted while the UE 104 is still in the IDLE state. The UE 104 may use a resource pool determined according to the configuration information for the UL transmission. In some embodiments, the UE 104 may select a resource mode from a plurality of resource modes in the resource pool, as described above, and encode the uplink message on the resource units of the selected resource mode.

[0048] UE 104 may also monitor the time window for DCI transmissions. A DCI transmission may carry HARQ information or schedule a downlink transmission carrying HARQ information, as described above.

[0049] Figure 6 An operational flow / algorithm structure 600 is shown according to some embodiments. The operational flow / algorithm structure 600 may be performed partially or completely by the access node 108 or components thereof. For example, in some embodiments, the operational flow / algorithm structure 600 may be performed by baseband circuitry implemented in the access node 108.

[0050] The operational flow / algorithm structure 600 may include transmitting pre-configured uplink resource (PUR) configuration information to configure the resource pool and time window at 604. In some embodiments, the PUR configuration information may be transmitted to the UE 104 when the UE is in RRC CONNECTED mode.

[0051] In some embodiments, the PUR configuration information may be broadcast to multiple UEs in a cell. For example, the PUR configuration information may be transmitted in one or more system / master information blocks. In other embodiments, the PUR configuration information may be specific to the UE 104 and, for example, sent by a UE-specific radio resource control signal.

[0052] The operational flow / algorithm structure 600 may also include processing uplink transmissions at 608. The uplink transmissions may be transmitted by the UE 1054 on resources of the configured resource pool.

[0053] The operational flow / algorithm structure 600 may also include transmitting DCI at 612 to provide an indication of successful or unsuccessful reception of the uplink transmission. The DCI may provide an indication of whether the uplink transmission was successfully received. The indication may be, for example, HARQ ACK / NACK information.

[0054] In some embodiments, the HARQ ACK / NACK information may be transmitted in a transmission window configured by the PUR configuration information. In other embodiments, the access node may transmit scheduling information in the transmission window, which is used to schedule downlink resources (e.g., PDSCH or PDCCH transmissions) in which the HARQ ACK / NACK information is to be transmitted.

[0055] Figure 7 An example of infrastructure equipment 700 according to various embodiments is shown. Infrastructure equipment 700 (or "system 700") can be implemented as a base station, a radio headquarters, a RAN node (such as the RAN node XQ11 and / or AP XQ06 shown and described previously), an application server XQ30, and / or any other element / device discussed herein. In other examples, system 700 can be implemented in or by a UE.

[0056] System 700 may include: application circuit 705, baseband circuit 710, one or more radio front end modules 715, memory circuit 720, power management integrated circuit (PMIC) 725, power tee circuit 730, network controller circuit 735, network interface connector 740, satellite positioning circuit 745 and user interface 750. In some embodiments, device 700 may include additional elements, such as memory / storage, display, camera, sensor or input / output (I / O) interface. In other embodiments, the components described below may be included in more than one device. For example, the circuit may be included separately in more than one device for CRAN, vBBU or other similar implementations.

[0057] The application circuit 705 may include circuits such as, but not limited to, one or more processors (or processor cores), cache memory, and one or more of the following: a low dropout regulator (LDO), an interrupt controller, a serial interface such as SPI, I2C or a general programmable serial interface module, a real-time clock (RTC), a timer-counter including an interval timer and a watchdog timer, a general input / output (I / O or IO), a memory card controller such as a secure digital (SD) multimedia card (MMC) or similar product, a universal serial bus (USB) interface, a mobile industry processor interface (MIPI) interface, and a joint test access group (JTAG) test access port. The processor (or core) of the application circuit 705 may be coupled to or may include a memory / storage element, and may be configured to execute instructions stored in the memory / storage device to enable various applications or operating systems to run on the system 700. In some implementations, the memory / storage element can be an on-chip memory circuit that can include any suitable volatile and / or non-volatile memory, such as DRAM, SRAM, EPROM, EEPROM, flash memory, solid-state memory, and / or any other type of memory device technology, such as those discussed herein.

[0058] The processor of the application circuit 705 may include, for example, one or more processor cores (CPUs), one or more application processors, one or more graphics processing units (GPUs), one or more reduced instruction set computing (RISC) processors, one or more Acom RISC Machine (ARM) processors, one or more complex instruction set computing (CISC) processors, one or more digital signal processors (DSPs), one or more FPGAs, one or more PLDs, one or more ASICs, one or more microprocessors or controllers, or any suitable combination thereof. In some embodiments, the application circuit 705 may include or may be a dedicated processor / controller for operating according to various embodiments herein. As an example, the processor of the application circuit 705 may include one or more Intel or Processor: Advanced Micro Devices (AMD) Processor, Accelerated Processing Unit (APU) or processors; ARM-based processors licensed from ARM Holdings, Ltd., such as the ARM Cortex-A series processors provided by Cavium(TM), Inc. and MIPS-based designs from MIPS Technologies, Inc., such as the MIPS Warrior P-class processor; etc. In some embodiments, system 700 may not utilize application circuit 705, and instead may include a dedicated processor / controller to process IP data received, for example, from an EPC or 5GC.

[0059] In some implementations, the application circuit 705 may include one or more hardware accelerators, which may be microprocessors, programmable processing devices, and the like. The one or more hardware accelerators may include, for example, computer vision (CV) and / or deep learning (DL) accelerators. For example, the programmable processing device may be one or more of the following: a field programmable device (FPD), such as a field programmable gate array (FPGA), etc.; a programmable logic device (PLD), such as a complex PLD (CPLD), a high capacity PLD (HCPLD), etc.; an ASIC, such as a structured ASIC, etc.; a programmable SoC (PSoC); etc. In such implementations, the circuitry of the application circuit 705 may include logic blocks or logic architectures, as well as other interconnected resources that may be programmed to perform various functions, such as the procedures, methods, functions, etc. of the various embodiments discussed herein. In such an embodiment, the circuitry of the application circuit 705 may include memory cells (e.g., erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), flash memory, static memory (e.g., static random access memory (SRAM), anti-fuse, etc.)) for storing logic blocks, logic architectures, data, etc. in a lookup table (LUT), etc.

[0060] Baseband circuit 710 may be implemented, for example, as a solder-in substrate including one or more integrated circuits, a single packaged integrated circuit soldered to a main circuit board, or a multi-chip module containing two or more integrated circuits. Fig. 9 The various hardware electronic components of baseband circuit 710 are discussed.

[0061] The user interface circuit 750 may include one or more user interfaces designed to enable a user to interact with the system 700 or a peripheral component interface designed to enable a peripheral component to interact with the system 700. The user interface may include, but is not limited to, one or more physical or virtual buttons (e.g., a reset button), one or more indicators (e.g., light emitting diodes (LEDs)), a physical keyboard or keypad, a mouse, a touch pad, a touch screen, a speaker or other audio transmitting device, a microphone, a printer, a scanner, a headset, a display screen or display device, etc. The peripheral component interface may include, but is not limited to, a non-volatile memory port, a universal serial bus (USB) port, an audio jack, a power interface, etc.

[0062] The radio front end module (RFEM) 715 may include a millimeter wave (mmWave) RFEM and one or more sub-millimeter wave radio frequency integrated circuits (RFICs). In some implementations, the one or more sub-millimeter wave RFICs may be physically separated from the mmWave RFEM. The RFIC may include connections to one or more antennas or antenna arrays (see, e.g., below). Fig. 9 Antenna array 9111), and the RFEM can be connected to multiple antennas. In an alternative embodiment, both millimeter wave and sub-millimeter wave radio functions can be implemented in the same physical RFEM 715 that combines both millimeter wave antennas and sub-millimeter waves.

[0063] The memory circuit 720 may include one or more of the following: a volatile memory including a dynamic random access memory (DRAM) and / or a synchronous dynamic random access memory (SDRAM), a non-volatile memory (NVM) including a high-speed electrically erasable memory (commonly referred to as a "flash memory"), a phase change random access memory (PRAM), a magnetoresistive random access memory (MRAM), etc., and may be combined with and The memory circuit 720 may be implemented as one or more of: a solder-in package integrated circuit, a socket memory module, and a plug-in memory card.

[0064] The PMIC 725 may include a voltage regulator, a surge protector, a power alarm detection circuit, and one or more backup power sources, such as a battery or capacitor. The power alarm detection circuit may detect one or more of a brownout (undervoltage) and a surge (overvoltage) condition. The power tee circuit 730 may provide power extracted from a network cable to provide both power and data connections for the infrastructure equipment 700 using a single cable.

[0065] The network controller circuit 735 may provide a connection to the network using a standard network interface protocol such as Ethernet, Ethernet based on a GRE tunnel, Ethernet based on a multi-protocol label switching (MPLS), or some other suitable protocol. A physical connection may be used to provide a network connection to / from the infrastructure equipment 700 via a network interface connector 740, which may be an electrical connection (commonly referred to as a "copper interconnect"), an optical connection, or a wireless connection. The network controller circuit 735 may include one or more dedicated processors and / or FPGAs for communicating using one or more of the aforementioned protocols. In some specific implementations, the network controller circuit 735 may include multiple controllers for providing connections to other networks using the same or different protocols.

[0066] The positioning circuit 745 includes a circuit for receiving and decoding signals transmitted / broadcasted by a positioning network of a global navigation satellite system (GNSS). Examples of navigation satellite constellations (or GNSS) include the United States' Global Positioning System (GPS), Russia's Global Navigation System (GLONASS), the European Union's Galileo system, China's Beidou Navigation Satellite System, regional navigation systems or GNSS augmentation systems (e.g., using the Indian constellation (NAVIC), Japan's Quasi-Zenith Satellite System (QZSS), France's Doppler Orbit Chart and Satellite Integrated Radio Positioning (DORIS), etc. for navigation), etc. The positioning circuit 745 may include various hardware elements (e.g., including hardware devices such as switches, filters, amplifiers, antenna elements, etc. for facilitating OTA communications) to communicate with components of the positioning network such as navigation satellite constellation nodes. In some embodiments, the positioning circuit 745 may include a micro technology (micro PNT) IC for positioning, navigation, and timing that uses a master timing clock to perform position tracking / estimation without GNSS assistance. The positioning circuit 745 may also be part of or interact with the baseband circuit 710 and / or RFEM 715 to communicate with nodes and components of the positioning network. The positioning circuit 745 may also provide location data and / or time data to the application circuit 705, which may use the data to synchronize operations with various infrastructures (e.g., RAN node XQ11, etc.).

[0067] Figure 7 The components shown can communicate with each other using interface circuits that can include any number of bus and / or interconnect (IX) technologies, such as industry standard architecture (ISA), extended ISA (EISA), peripheral component interconnect (PCI), peripheral component interconnect extended (PCIx), PCI express (PCIe), or any number of other technologies. The bus / IX can be a proprietary bus, for example, used in a SoC-based system. Other bus / IX systems can be included, such as an I2C interface, an SPI interface, a point-to-point interface, and a power bus, etc.

[0068] Figure 8 An example of a platform 800 (or "device 800") according to various embodiments is shown. In an embodiment, the computer platform 800 may be suitable for use as a UE XQ01, XQ02, XR101, an application server XQ30, and / or any other element / device discussed herein. The platform 800 may include any combination of components shown in the example. The components of the platform 800 may be implemented as an integrated circuit (IC), part of an IC, a discrete electronic device, or other modules, logic, hardware, software, firmware, or a combination thereof adapted in the computer platform 800, or as components otherwise incorporated within the chassis of a larger system. Figure 8The block diagram is intended to show a high-level view of the components of computer platform 800. However, some of the components shown may be omitted, additional components may be present, and different arrangements of the components shown may occur in other implementations.

[0069] The application circuit 805 includes circuits such as, but not limited to, one or more processors (or processor cores), cache memory, and one or more of an LDO, an interrupt controller, a serial interface (such as SPI), I2C or a general programmable serial interface module, an RTC, a timer (including an interval timer and a watchdog timer), a general I / O, a memory card controller (such as an SD MMC or similar controller), a USB interface, a MIPI interface, and a JTAG test access port. The processor (or core) of the application circuit 805 may be coupled to or may include a memory / storage element and may be configured to execute instructions stored in the memory / storage element to enable various applications or operating systems to run on the system 800. In some specific implementations, the memory / storage element may be an on-chip memory circuit that may include any suitable volatile and / or non-volatile memory, such as DRAM, SRAM, EPROM, EEPROM, flash memory, solid-state memory, and / or any other type of memory device technology, such as those discussed herein.

[0070] The processor 805 of the application circuit may include, for example, one or more processor cores, one or more application processors, one or more GPUs, one or more RISC processors, one or more ARM processors, one or more CISC processors, one or more DSPs, one or more FPGAs, one or more PLDs, one or more ASICs, one or more microprocessors or controllers, multi-threaded processors, ultra-low voltage processors, embedded processors, some other known processing elements, or any suitable combination thereof. In some embodiments, the application circuit 805 may include or may be a dedicated processor / controller for operating according to various embodiments herein.

[0071] As an example, the processor of the application circuit 805 may include a processor based on Architecture Core TM Processors such as Quark TM 、Atom TM , i3, i5, i7 or MCU class processors, or available from Santa Clara, CA The processor of application circuit 805 may also be one or more of the following: Advanced Micro Devices (AMD) Processor or Accelerated Processing Unit (APU); from Inc.'s A5-A9 processors, Snapdragon by Technologies, Inc. TM Processor, Texas Instruments, Open Multimedia Applications Platform(OMAP) TM processors; MIPS-based designs from MIPS Technologies, Inc., such as the MIPS Warrior M-class, Warrior I-class, and Warrior P-class processors; ARM-based designs licensed from ARM Holdings, Ltd., such as the ARM Cortex-A, Cortex-R, and Cortex-M series processors; etc. In some implementations, the application circuit 805 can be part of a system on a chip (SoC), in which the application circuit 805 and other components are formed as a single integrated circuit or a single package, such as available from Edison Corporation TM or Galileo TM SoC board.

[0072] Additionally or alternatively, the application circuit 805 may include circuits such as, but not limited to, one or more field programmable devices (FPDs) such as FPGAs, etc.; programmable logic devices (PLDs) such as complex PLDs (CPLDs), high capacity PLDs (HCPLDs), etc.; ASICs such as structured ASICs, etc.; programmable SoCs (PSoCs); etc. In such embodiments, the circuits of the application circuit 805 may include logic blocks or logic structures, and other interconnected resources that can be programmed to perform various functions such as the processes, methods, functions, etc. of the various embodiments discussed herein. In such embodiments, the circuits of the application circuit 805 may include memory cells (e.g., erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), flash memory, static memory (e.g., static random access memory (SRAM), anti-fuse, etc.)) for storing logic blocks, logic structures, data, etc. in a lookup table (LUT), etc.

[0073] Baseband circuit 810 may be implemented, for example, as a solder-in substrate including one or more integrated circuits, a single packaged integrated circuit soldered to a main circuit board, or a multi-chip module containing two or more integrated circuits. Fig. 9 The various hardware electronic components of baseband circuit 810 are discussed.

[0074] The RFEM 815 may include a millimeter wave (mmWave) RFEM and one or more sub-millimeter wave radio frequency integrated circuits (RFICs). In some implementations, the one or more sub-millimeter wave RFICs may be physically separated from the mmWave RFEM. The RFIC may include connections to one or more antennas or antenna arrays (see, e.g., below). Fig. 9 Antenna array 920), and the RFEM can be connected to multiple antennas. In an alternative implementation, both millimeter wave and sub-millimeter wave radio functions can be implemented in the same physical RFEM 815 that combines both millimeter wave antennas and sub-millimeter waves.

[0075] The memory circuit 820 may include any number and type of memory devices for providing a quantitative system memory. For example, the memory circuit 820 may include one or more of the following: volatile memory, including random access memory (RAM), dynamic RAM (DRAM) and / or synchronous dynamic RAM (SDRAM); and non-volatile memory (NVM), including high-speed electrically erasable memory (commonly referred to as flash memory), phase change random access memory (PRAM), magnetoresistive random access memory (MRAM), etc. The memory circuit 820 may be developed according to the Joint Electron Device Engineering Council (JEDEC) based low power double data rate (LPDDR) design such as LPDDR2, LPDDR3, LPDDR4, etc. The memory circuit 820 may be implemented as one or more of a solder-in package integrated circuit, a single die package (SDP), a dual die package (DDP), or a quad die package (Q17P), a socketed memory module, a dual in-line memory module (DIMM) including a micro DIMM or a mini DIMM, and / or soldered to a motherboard via a ball grid array (BGA). In a low-power implementation, the memory circuit 820 may be an on-chip memory or register associated with the application circuit 805. In order to provide persistent storage of information such as data, applications, operating systems, etc., the memory circuit 820 may include one or more mass storage devices, which may include, among others, a solid state disk drive (SSDD), a hard disk drive (HDD), a micro HDD, a resistive change memory, a phase change memory, a holographic memory, or a chemical memory. For example, the computer platform 800 may be combined with a computer system obtained from and Three-dimensional (3D) cross-point (XPOINT) memory.

[0076] The removable memory circuitry 823 may include devices, circuits, housings / casings, ports or receptacles, etc., for coupling portable data storage devices to the platform 800. These portable data storage devices may be used for mass storage, and may include, for example, flash memory cards (e.g., Secure Digital (SD) cards, micro SD cards, xD picture cards, etc.), as well as USB flash drives, optical disks, external HDDs, etc.

[0077] The platform 800 may further include an interface circuit (not shown) for connecting external devices to the platform 800. External devices connected to the platform 800 via the interface circuit include a sensor circuit 821 and an electromechanical component (EMC) 822, and a removable memory device coupled to a removable memory circuit 823.

[0078] Sensor circuitry 821 comprises a device, module, or subsystem that is intended to detect events or changes in its environment, and to send information about the detected events (sensor data) to some other device, module, subsystem, etc. Examples of such sensors include, among others: an inertial measurement unit (IMU) including an accelerometer, a gyroscope, and / or a magnetometer; a microelectromechanical system (MEMS) or a nanoelectromechanical system (NEMS) including a three-axis accelerometer, a three-axis gyroscope, and / or a magnetometer; a level sensor; a flow sensor; a temperature sensor (e.g., a thermistor); a pressure sensor; a barometric pressure sensor; a gravity meter; an altimeter; an image capture device (e.g., a camera or a lensless aperture); a light detection and ranging (LiDAR) sensor; a proximity sensor (e.g., an infrared radiation detector, etc.), a depth sensor, an ambient light sensor, an ultrasonic transceiver; a microphone or other similar audio capture device; etc.

[0079] EMC 822 includes devices, modules or subsystems that are intended to enable platform 800 to change its state, position and / or orientation or to move or control mechanisms or (sub) systems. In addition, EMC 822 can be configured to generate messages / signaling and send messages / signaling to other components of platform 800 to indicate the current state of EMC 822. EMC 822 includes one or more power switches, relays (including electromechanical relays (EMR) and / or solid-state relays (SSR)), actuators (e.g., valve actuators, etc.), audible sound generators, visual warning devices, motors (e.g., DC motors, stepper motors, etc.), wheels, thrusters, propellers, claws, clamps, hooks and / or other similar electromechanical components. In an embodiment, platform 800 is configured to operate one or more EMC822 based on one or more capture events and / or instructions or control signals received from service providers and / or various clients.

[0080] In some specific implementations, the interface circuit may connect the platform 800 to the positioning circuit 845. The positioning circuit 845 includes a circuit for receiving and decoding signals transmitted / broadcasted by the positioning network of the GNSS. Examples of navigation satellite constellations (or GNSS) may include the GPS of the United States, the GLONASS of Russia, the Galileo system of the European Union, the Beidou navigation satellite system of China, regional navigation systems or GNSS augmentation systems (e.g., NAVIC, QZSS of Japan, DORIS of France, etc.), etc. The positioning circuit 845 may include various hardware elements (e.g., including hardware devices such as switches, filters, amplifiers, antenna elements, etc. for facilitating OTA communication) to communicate with components of the positioning network such as navigation satellite constellation nodes. In some embodiments, the positioning circuit 845 may include a micro PNT IC that uses a master timing clock to perform position tracking / estimation without GNSS assistance. The positioning circuit 845 may also be part of the baseband circuit 710 and / or the RFEM 815 or interact with it to communicate with nodes and components of the positioning network. Positioning circuitry 845 may also provide position data and / or time data to application circuitry 805 , which may use the data to synchronize operations with various infrastructure (eg, radio base stations) for use in turn-by-turn navigation applications, and the like.

[0081] In some implementations, the interface circuit may connect the platform 800 with a near field communication (NFC) circuit 840. The NFC circuit 840 is configured to provide contactless short-range communication based on the radio frequency identification (RFID) standard, where a magnetic field is sensed to enable communication between the NFC circuit 840 and an NFC-enabled device (e.g., an "NFC touch point") external to the platform 800. The NFC circuit 840 includes an NFC controller coupled to an antenna element and a processor coupled to the NFC controller. The NFC controller may be a chip / IC that provides NFC functionality to the NFC circuit 840 by executing an NFC controller firmware and an NFC stack. The NFC stack may be executed by the processor to control the NFC controller, and the NFC controller firmware may be executed by the NFC controller to control the antenna element to transmit a short-range RF signal. The RF signal may power a passive NFC tag (e.g., a microchip embedded in a sticker or wristband) to transfer stored data to the NFC circuit 840, or initiate data transfer between the NFC circuit 840 and another active NFC device (e.g., a smartphone or an NFC-enabled POS terminal) proximate to the platform 800.

[0082] The driver circuit 846 may include software and hardware elements for controlling specific devices embedded in, attached to, or otherwise communicatively coupled to the platform 800. The driver circuit 846 may include various drivers to allow other components of the platform 800 to interact with or control various input / output (I / O) devices that may be present in or connected to the platform 800. For example, the driver circuit 846 may include: a display driver for controlling and allowing access to a display device, a touch screen driver for controlling and allowing access to a touch screen interface of the platform 800, a sensor driver for obtaining sensor readings of the sensor circuit 821 and controlling and allowing access to the sensor circuit 821, an EMC driver for obtaining an actuator position of the EMC 822 and / or controlling and allowing access to the EMC 822, a camera driver for controlling and allowing access to an embedded image capture device, and an audio driver for controlling and allowing access to one or more audio devices.

[0083] A power management integrated circuit (PMIC) 825 (also referred to as "power management circuit 825") may manage power provided to various components of the platform 800. Specifically, the PMIC 825 may control power selection, voltage regulation, battery charging, or DC-DC conversion relative to the baseband circuit 810. When the platform 800 is capable of being powered by a battery 830, for example, when the device is included in a UE XQ01, XQ02, XR101, the PMIC 825 may be generally included.

[0084] In some embodiments, the PMIC 825 may control or otherwise be part of various power saving mechanisms of the platform 800. For example, if the platform 800 is in the RRC_Connected state, in which the platform is still connected to the RAN node because it expects to receive traffic soon, then after a period of inactivity, the platform may enter a state known as discontinuous reception mode (DRX). During this state, the platform 800 may be powered off for short time intervals, thereby saving power. If there is no data traffic activity for an extended period of time, the platform 800 may transition to the RRC_Idle state, in which the platform is disconnected from the network and no operations such as channel quality feedback, handovers, etc. are performed. The platform 800 enters an extremely low power state and performs paging, in which the platform periodically wakes up to listen to the network and then powers off again. The platform 800 may not receive data in this state; in order to receive data, the platform must transition back to the RRC_Connected state. Additional power saving modes may prevent the device from using the network for longer than the paging interval (ranging from a few seconds to several hours). During this time, the device is completely unable to connect to the network and can be completely powered off. Any data sent during this time will be significantly delayed, and it is assumed that the delay is acceptable.

[0085] The battery 830 can power the platform 800, but in some examples, the platform 800 can be mounted in a fixed location and can have a power source coupled to a power grid. The battery 830 can be a lithium-ion battery, a metal-air battery such as a zinc-air battery, an aluminum-air battery, a lithium-air battery, etc. In some implementations, such as in V2X applications, the battery 830 can be a typical lead-acid car battery.

[0086] In some implementations, the battery 830 may be a "smart battery" that includes or is coupled to a battery management system (BMS) or a battery monitoring integrated circuit. The BMS may be included in the platform 800 to track the state of charge (SoCh) of the battery 830. The BMS may be used to monitor other parameters of the battery 830, such as the state of health (SoH) and state of function (SoF) of the battery 830, to provide fault prediction. The BMS may transmit information about the battery 830 to the application circuit 805 or other components of the platform 800. The BMS may also include an analog-to-digital (ADC) converter that allows the application circuit 805 to directly monitor the voltage of the battery 830 or the current from the battery 830. The battery parameters may be used to determine actions that the platform 800 may perform, such as transmission frequency, network operation, sensing frequency, etc.

[0087] A power block or other power source coupled to the grid can be coupled to the BMS to charge the battery 830. In some examples, the power block XS30 can be replaced with a wireless power receiver to obtain power wirelessly, for example, through a loop antenna in the computer platform 800. In these examples, a wireless battery charging circuit can be included in the BMS. The specific charging circuit selected can depend on the size of the battery 830 and therefore the current required. Charging can be performed using the aviation fuel standard published by the Aviation Fuel Alliance, the Qi wireless charging standard published by the Wireless Power Alliance, or the Rezence charging standard published by the Wireless Power Alliance.

[0088] The user interface circuit 850 includes various input / output (I / O) devices present in or connected to the platform 800, and includes one or more user interfaces designed to implement user interaction with the platform 800 and / or a peripheral component interface designed to implement interaction with the peripheral components of the platform 800. The user interface circuit 850 includes input device circuits and output device circuits. The input device circuit includes any physical or virtual means for accepting input, including, in particular, one or more physical or virtual buttons (e.g., a reset button), a physical keyboard, a keypad, a mouse, a touchpad, a touch screen, a microphone, a scanner, a headset, etc. The output device circuit includes any physical or virtual means for displaying information or otherwise conveying information (such as sensor readings, actuator positions, or other similar information). The output device circuitry may include any number and / or combination of audio or visual displays, including, among other things, one or more simple visual outputs / indicators (e.g., binary status indicators (e.g., light emitting diodes (LEDs)) and multi-character visual outputs, or more complex outputs such as display devices or touch screens (e.g., liquid crystal displays (LCDs), LED displays, quantum dot displays, projectors, etc.), where outputs of characters, graphics, multimedia objects, etc. are generated or produced by the operation of the platform 800. The output device circuitry may also include speakers or other audio emitting devices, printers, etc. In some embodiments, the sensor circuitry 821 may be used as an input device circuitry (e.g., an image capture device, a motion capture device, etc.), and one or more EMCs may be used as output device circuitry (e.g., an actuator for providing tactile feedback, etc.). In another example, an NFC circuit may be included to read an electronic tag and / or connect to another NFC-enabled device, the NFC circuitry including an NFC controller and a processing device coupled to an antenna element. The peripheral component interface may include, but is not limited to, a non-volatile memory port, a USB port, an audio jack, a power interface, etc.

[0089] Although not shown, the components of platform 800 can communicate with each other using a suitable bus or interconnect (IX) technology, which can include any number of technologies, including ISA, EISA, PCI, PCIx, PCIe, time-triggered protocol (TTP) systems, FlexRay systems, or any number of other technologies. The bus / IX can be a proprietary bus / IX, for example, used in a SoC-based system. Other bus / IX systems can be included, such as an I2C interface, an SPI interface, a point-to-point interface, and a power bus, etc.

[0090] Fig. 9 9 and 915. Exemplary components of a baseband circuit 910 and a radio front end module (RFEM) 915 are shown according to various embodiments. The baseband circuit 910 corresponds to Figure 7 and Figure 8Baseband circuits 710 and 810. RFEM 915 corresponds accordingly Figure 7 and Figure 8 RFEM 715 and 815. As shown, RFEM 915 may include radio frequency (RF) circuitry 906, front end module (FEM) circuitry 908, and an antenna array 920 coupled together at least as shown.

[0091] The baseband circuit 910 includes circuits and / or control logic components that are configured to execute various radio / network protocols and radio control functions that enable communication with one or more radio networks via the RF circuit 906. The radio control functions may include, but are not limited to, signal modulation / demodulation, encoding / decoding, radio frequency shifting, etc. In some embodiments, the modulation / demodulation circuit of the baseband circuit 910 may include fast Fourier transform (FFT), precoding, or constellation mapping / demapping functions. In some embodiments, the encoding / decoding circuit of the baseband circuit 910 may include convolution, tail-biting convolution, turbo, Viterbi, or low-density parity check (LDPC) encoder / decoder functions. The implementation of the modulation / demodulation and encoder / decoder functions is not limited to these examples, and may include other suitable functions in other embodiments. The baseband circuit 910 is configured to process baseband signals received from the receive signal path of the RF circuit 906 and generate baseband signals for the transmit signal path of the RF circuit 906. The baseband circuit 910 is configured to communicate with the application circuit 705 / 805 (see Figure 7 and Figure 8 ) are connected to generate and process baseband signals and control the operation of RF circuit 906. Baseband circuit 910 can handle various radio control functions.

[0092] The aforementioned circuits and / or control logic components of the baseband circuit 910 may include one or more single-core or multi-core processors. For example, the one or more processors may include a 3G baseband processor 904A, a 4G / LTE baseband processor 904B, a 5G / NR baseband processor 904C, or some other baseband processors 904D for other existing generations, generations under development or generations to be developed in the future (e.g., the sixth generation (6G), etc.). In other embodiments, some or all of the functions of the baseband processors 904A-D may be included in a module stored in the memory 904G and executed via a central processing unit (CPU) 904E. In other embodiments, some or all of the functions of the baseband processors 904A-D may be provided as a hardware accelerator (e.g., FPGA, ASIC, etc.) loaded with an appropriate bitstream or logic block stored in a corresponding memory unit. In various embodiments, the memory 904G may store program code of a real-time OS (RTOS), which, when executed by the CPU 904E (or other baseband processor), will enable the CPU 904E (or other baseband processor) to manage resources of the baseband circuit 910, schedule tasks, etc. Examples of RTOS may include: Operating System Embedded (OSE) provided TM , by Mentor Nucleus RTOS provided TM , by Mentor Versatile Real-Time Executive (VRTX) provided by Express Provided by ThreadX TM ,Depend on FreeRTOS and REX OS provided by OpenKernel (OK) OKL4 provided, or any other suitable RTOS, such as those discussed herein. In addition, the baseband circuit 910 includes one or more audio digital signal processors (DSPs) 904F. The audio DSP 904F includes elements for compression / decompression and echo cancellation, and may include other suitable processing elements in other embodiments.

[0093] In some embodiments, each of processors 904A-904E includes a corresponding memory interface to send data to / receive data from memory 904G. Baseband circuit 910 may also include one or more interfaces for communicatively coupling to other circuits / devices, such as an interface for sending data to / receiving data from a memory external to baseband circuit 910; an interface for sending data to / receiving data from a memory external to the baseband circuit; Figures 7 to 9An application circuit interface for sending data to / receiving data from the application circuit 705 / 805; Fig. 9 RF circuit 906 to send data / receive data from the RF circuit RF circuit interface; for receiving data from one or more wireless hardware elements (e.g., near field communication (NFC) components, Low power consumption components, components, etc.) to send data / receive data from these wireless hardware elements; and a power management interface for sending power or control signals to / receiving power or control signals from the PMIC 825.

[0094] In an alternative embodiment (which can be combined with the above embodiment), the baseband circuit 910 includes one or more digital baseband systems, which are coupled to each other and to the CPU subsystem, the audio subsystem and the interface subsystem via an interconnection subsystem. The digital baseband subsystem can also be coupled to the digital baseband interface and the mixed signal baseband subsystem via another interconnection subsystem. Each of the interconnection subsystems may include a bus system, a point-to-point connector, a network on chip (NOC) structure and / or some other suitable bus or interconnection technology, such as those discussed herein. The audio subsystem may include a DSP circuit, a buffer memory, a program memory, a voice processing accelerator circuit, a data converter circuit such as an analog-to-digital converter circuit and a digital-to-analog converter circuit, an analog circuit including one or more of an amplifier and a filter, and / or other similar components. In one aspect of the present disclosure, the baseband circuit 910 may include a protocol processing circuit with one or more control circuit instances (not shown) to provide control functions for the digital baseband circuit and / or the radio frequency circuit (e.g., the radio front end module 915).

[0095] although Fig. 9Not shown, but in some embodiments, the baseband circuit 910 includes various processing devices (e.g., "multi-protocol baseband processor" or "protocol processing circuit") to operate one or more wireless communication protocols and various processing devices to implement PHY layer functions. In these embodiments, the PHY layer functions include the aforementioned radio control functions. In these embodiments, the protocol processing circuit operates or implements various protocol layers / entities of one or more wireless communication protocols. In a first example, when the baseband circuit 910 and / or the RF circuit 906 are part of a millimeter wave communication circuit or some other suitable cellular communication circuit, the protocol processing circuit may operate LTE protocol entities and / or 5G / NR protocol entities. In a first example, the protocol processing circuit will operate MAC, RLC, PDCP, SDAP, RRC, and NAS functions. In a second example, when the baseband circuit 910 and / or the RF circuit 906 are part of a Wi-Fi communication system, the protocol processing circuit may operate one or more IEEE-based protocols. In a second example, the protocol processing circuit will operate Wi-Fi MAC and logical link control (LLC) functions. The protocol processing circuit may include one or more memory structures (e.g., 904G) for storing program code and data for operating protocol functions, and one or more processing cores for executing program code and performing various operations using data. The baseband circuit 910 may also support radio communications of more than one wireless protocol.

[0096] The various hardware elements of the baseband circuit 910 discussed herein may be implemented as, for example, a solder-in substrate including one or more integrated circuits (ICs), a single packaged integrated circuit soldered to a main circuit board, or a multi-chip module containing two or more ICs. In one example, the components of the baseband circuit 910 may be appropriately combined in a single chip or a single chipset, or disposed on the same circuit board. In another example, some or all of the components of the baseband circuit 910 and the RF circuit 906 may be implemented together, such as, for example, a system on a chip (SOC) or a system-in-package (SiP). In another example, some or all of the components of the baseband circuit 910 may be implemented as a separate SoC communicatively coupled to the RF circuit 906 (or multiple instances of the RF circuit 906). In yet another example, some or all of the components of the baseband circuit 910 and the application circuit 705 / 805 may be implemented together as a separate SoC mounted to the same circuit board (e.g., a "multi-chip package").

[0097] In some embodiments, the baseband circuit 910 may provide communications compatible with one or more radio technologies. For example, in some embodiments, the baseband circuit 910 may support communications with E-UTRAN or other WMANs, WLANs, WPANs. Embodiments in which the baseband circuit 910 is configured to support radio communications of more than one wireless protocol may be referred to as multi-mode baseband circuits.

[0098] RF circuit 906 may enable communication with a wireless network through a non-solid medium using modulated electromagnetic radiation. In various embodiments, RF circuit 906 may include switches, filters, amplifiers, etc. to facilitate communication with a wireless network. RF circuit 906 may include a receive signal path, which may include circuits for down-converting RF signals received from FEM circuit 908 and providing baseband signals to baseband circuit 910. RF circuit 906 may also include a transmit signal path, which may include circuits for up-converting baseband signals provided by baseband circuit 910 and providing RF output signals for transmission to FEM circuit 908.

[0099] In some embodiments, the receive signal path of the RF circuit 906 may include a mixer circuit 906a, an amplifier circuit 906b, and a filter circuit 906c. In some embodiments, the transmit signal path of the RF circuit 906 may include a filter circuit 906c and a mixer circuit 906a. The RF circuit 906 may also include a synthesizer circuit 906d, which is used to synthesize the frequency used by the mixer circuit 906a of the receive signal path and the transmit signal path. In some embodiments, the mixer circuit 906a of the receive signal path may be configured to down-convert the RF signal received from the FEM circuit 908 based on the synthesized frequency provided by the synthesizer circuit 906d. The amplifier circuit 906b may be configured to amplify the down-converted signal, and the filter circuit 906c may be a low pass filter (LPF) or a band pass filter (BPF) configured to remove unwanted signals from the down-converted signal to generate an output baseband signal. The output baseband signal may be provided to the baseband circuit 910 for further processing. In some embodiments, the output baseband signal may be a zero frequency baseband signal, although this is not required.In some embodiments, the mixer circuit 906a of the receive signal path may include a passive mixer, although the scope of the embodiments is not limited in this respect.

[0100] In some embodiments, mixer circuit 906a of the transmit signal path may be configured to up-convert an input baseband signal based on a synthesized frequency provided by synthesizer circuit 906d to generate an RF output signal for FEM circuit 908. The baseband signal may be provided by baseband circuit 910 and may be filtered by filter circuit 906c.

[0101] In some embodiments, the mixer circuit 906a of the receive signal path and the mixer circuit 906a of the transmit signal path may include two or more mixers and may be arranged for quadrature down-conversion and up-conversion, respectively. In some embodiments, the mixer circuit 906a of the receive signal path and the mixer circuit 906a of the transmit signal path may include two or more mixers and may be arranged for image suppression (e.g., Hartley image suppression). In some embodiments, the mixer circuit 906a of the receive signal path and the mixer circuit 906a of the transmit signal path may be arranged for direct down-conversion and direct up-conversion, respectively. In some embodiments, the mixer circuit 906a of the receive signal path and the mixer circuit 906a of the transmit signal path may be configured for superheterodyne operation.

[0102] In some embodiments, the output baseband signal and the input baseband signal may be analog baseband signals, although the scope of the embodiments is not limited in this respect. In some alternative embodiments, the output baseband signal and the input baseband signal may be digital baseband signals. In these alternative embodiments, the RF circuit 906 may include an analog-to-digital converter (ADC) and a digital-to-analog converter (DAC) circuit, and the baseband circuit 910 may include a digital baseband interface to communicate with the RF circuit 906.

[0103] In some dual-mode embodiments, separate radio IC circuits may be provided to process signals for each spectrum, although the scope of the embodiments is not limited in this respect.

[0104] In some embodiments, synthesizer circuit 906d can be a fractional-N synthesizer or a fractional N / N+1 synthesizer, but the scope of the embodiments is not limited in this respect, as other types of frequency synthesizers may also be suitable. For example, synthesizer circuit 906d can be a delta-sigma synthesizer, a frequency multiplier, or a synthesizer including a phase-locked loop with a frequency divider.

[0105] Synthesizer circuit 906d may be configured to synthesize an output frequency based on the frequency input and the divider control input for use by mixer circuit 906a of RF circuit 906. In some embodiments, synthesizer circuit 906d may be a fractional-N / N+1 synthesizer.

[0106] In some embodiments, the frequency input may be provided by a voltage controlled oscillator (VCO), although this is not required. The divider control input may be provided by the baseband circuit 910 or the application circuit 705 / 805 according to the desired output frequency. In some embodiments, the divider control input (e.g., N) may be determined from a lookup table based on the channel indicated by the application circuit 705 / 805.

[0107] The synthesizer circuit 906d of the RF circuit 906 may include a frequency divider, a delay locked loop (DLL), a multiplexer, and a phase accumulator. In some embodiments, the frequency divider may be a dual-mode frequency divider (DMD), and the phase accumulator may be a digital phase accumulator (DPA). In some embodiments, the DMD may be configured to divide the input signal by N or N+1 (e.g., based on a carry) to provide a fractional division ratio. In some example embodiments, the DLL may include a cascaded, tunable, delay element, a phase detector, a charge pump, and a D-type flip-flop set. In these embodiments, the delay element may be configured to divide the VCO cycle into Nd equal phase groups, where Nd is the number of delay elements in the delay line. In this way, the DLL provides negative feedback to help ensure that the total delay through the delay line is one VCO cycle.

[0108] In some embodiments, the synthesizer circuit 906d can be configured to generate a carrier frequency as an output frequency, while in other embodiments, the output frequency can be a multiple of the carrier frequency (e.g., twice the carrier frequency, four times the carrier frequency) and can be used with a quadrature generator and divider circuit to generate multiple signals with multiple different phases relative to each other at the carrier frequency. In some embodiments, the output frequency can be the LO frequency (fLO). In some embodiments, the RF circuit 906 can include an IQ / polarity converter.

[0109] The FEM circuitry 908 may include a receive signal path that may include circuitry configured to operate on RF signals received from the antenna array 920, amplify the received signals, and provide an amplified version of the received signals to the RF circuitry 906 for further processing. The FEM circuitry 908 may also include a transmit signal path that may include circuitry configured to amplify transmit signals provided by the RF circuitry 906 for transmission by one or more antenna elements in the antenna array 920. In various embodiments, amplification by the transmit or receive signal paths may be accomplished only in the RF circuitry 906, only in the FEM circuitry 908, or in both the RF circuitry 906 and the FEM circuitry 908.

[0110] In some embodiments, the FEM circuit 908 may include a TX / RX switch to switch between transmit mode and receive mode operation. The FEM circuit 908 may include a receive signal path and a transmit signal path. The receive signal path of the FEM circuit 908 may include an LNA to amplify the received RF signal and provide the amplified received RF signal as an output (e.g., to the RF circuit 906). The transmit signal path of the FEM circuit 908 may include a power amplifier (PA) for amplifying the input RF signal (e.g., provided by the RF circuit 906), and one or more filters for generating an RF signal for subsequent transmission by one or more antenna elements of the antenna array 920.

[0111] The antenna array 920 includes one or more antenna elements, each of which is configured to convert an electrical signal into a radio wave to travel through the air and convert the received radio wave into an electrical signal. For example, a digital baseband signal provided by the baseband circuit 910 is converted into an analog RF signal (e.g., a modulated waveform), which is amplified and transmitted via the antenna elements of the antenna array 920 including one or more antenna elements (not shown). The antenna elements may be omnidirectional, directional, or a combination thereof. The antenna elements may be formed into a variety of arrangements as known and / or discussed herein. The antenna array 920 may include a microstrip antenna or a printed antenna fabricated on the surface of one or more printed circuit boards. The antenna array 920 may be formed into a patch of metal foil (e.g., a patch antenna) of various shapes and may be coupled to the RF circuit 906 and / or the FEM circuit 908 using a metal transmission line or the like.

[0112] The processor of the application circuit 705 / 805 and the processor of the baseband circuit 910 can be used to execute elements of one or more instances of the protocol stack. For example, the processor of the baseband circuit 910 can be used alone or in combination to perform layer 3, layer 2, or layer 1 functions, while the processor of the application circuit 705 / 805 can utilize data received from these layers (e.g., packet data) and further perform layer 4 functions (e.g., TCP and UDP layers). As mentioned herein, layer 3 may include an RRC layer, which will be described in further detail below. As mentioned herein, layer 2 may include a MAC layer, an RLC layer, and a PDCP layer, which will be described in further detail below. As mentioned herein, layer 1 may include a PHY layer of a UE / RAN node, which will be described in further detail below.

[0113] Fig.10 is a block diagram illustrating components capable of reading instructions from a machine-readable medium or computer-readable medium (e.g., a non-transitory machine-readable storage medium) and performing any one or more of the methods discussed herein, according to some exemplary embodiments. Specifically, Fig.10A schematic diagram of hardware resources 1000 is shown, including one or more processors (or processor cores) 1010, one or more memory / storage devices 1020, and one or more communication resources 1030, each of which may be communicatively coupled via a bus 1040. For embodiments in which node virtualization (e.g., NFV) is utilized, a hypervisor 1002 may be executed to provide an execution environment for one or more network slices / sub-slices to utilize the hardware resources 1000.

[0114] Processor 1010 may include, for example, processor 1012 and processor 1014. Processor 1010 may be, for example, a central processing unit (CPU), a reduced instruction set computing (RISC) processor, a complex instruction set computing (CISC) processor, a graphics processing unit (GPU), a DSP such as a baseband processor, an ASIC, an FPGA, a radio frequency integrated circuit (RFIC), another processor (including those discussed herein), or any suitable combination thereof.

[0115] The memory / storage device 1020 may include main memory, disk storage, or any suitable combination thereof. The memory / storage device 1020 may include, but is not limited to, any type of volatile or non-volatile memory, such as dynamic random access memory (DRAM), static random access memory (SRAM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), flash memory, solid-state storage, etc.

[0116] The communication resources 1030 may include an interconnect or network interface component or other suitable device to communicate with one or more peripheral devices 1004 or one or more databases 1006 via the network 1008. For example, the communication resources 1030 may include a wired communication component (e.g., for coupling via USB), a cellular communication component, an NFC component, (or Low power consumption) components, components and other communication components.

[0117] The instructions 1050 may include software, programs, applications, applet, applications, or other executable code for causing at least any one of the processors 1010 to perform any one or more of the methodologies discussed herein. The instructions 1050 may reside in whole or in part in at least one of the processor 1010 (e.g., in a cache memory of the processor), the memory / storage device 1020, or any suitable combination thereof. In addition, any portion of the instructions 1050 may be transmitted to the hardware resources 1000 from any combination of the peripheral device 1004 or the database 1006. Therefore, the memory of the processor 1010, the memory / storage device 1020, the peripheral device 1004, and the database 1006 are examples of computer-readable media and machine-readable media.

[0118] For one or more embodiments, at least one of the components shown in one or more of the foregoing figures may be configured to perform one or more operations, techniques, processes and / or methods described in the following example section. For example, the baseband circuit described above in conjunction with one or more of the foregoing figures may be configured to operate according to one or more of the following embodiments. For another example, the circuits associated with the UE, base station, network element, etc. described above in conjunction with one or more of the foregoing figures may be configured to operate according to one or more of the embodiments shown in the example section below.

[0119] Embodiment 1 includes a method of operating a user equipment (UE), comprising: while in a radio resource control (RRC) CONNECTED mode, obtaining timing advance and pre-configured uplink resource (PUR) configuration information, the PUR configuration information being used to configure a resource pool and an associated time window; transitioning from the RRC CONNECTED mode to an RRC IDLE state; and generating an uplink message to be transmitted in the resource pool while the UE is in the RRC IDLE state.

[0120] Embodiment 2 includes a method according to embodiment 1 or some other embodiment herein, wherein the resource pool includes one or more physical resource block (PRB) pairs.

[0121] Embodiment 3 includes a method according to embodiment 1 or some other embodiment herein, wherein the resource pool includes one or more resource elements for sub-physical resource block (PRB) uplink transmissions.

[0122] Embodiment 4 includes the method according to embodiment 1 or some other embodiment herein, further comprising: monitoring the time window of downlink control information (DCI) related to the uplink message.

[0123] Embodiment 5 includes a method according to embodiment 1 or some other embodiment herein, wherein the DCI confirms successful reception of the uplink message or requests retransmission of the uplink message by providing an uplink grant for the retransmission.

[0124] Embodiment 6 includes a method according to embodiment 5 or some other embodiment herein, wherein the uplink message is a narrowband Internet of Things (NB-IoT) message and the DCI is used to confirm successful reception of the uplink message.

[0125] Embodiment 7 includes a method according to embodiment 4 or some other embodiment herein, wherein the DCI includes scheduling information of a downlink shared channel, the downlink shared channel carrying a request for retransmission of the uplink message.

[0126] Embodiment 8 includes the method according to embodiment 4 or some other embodiment of the present invention, and also includes: determining the configuration of the machine type / narrowband physical downlink control channel (MPDCCH / NPDCCH) search space; and monitoring the time window based on the configuration.

[0127] Embodiment 9 includes a method according to any one of embodiments 1 to 8, wherein the configuration is a UE-specific search space.

[0128] Embodiment 10 includes a method of operating a UE, comprising: storing preconfigured uplink resource (PUR) configuration information, the PUR configuration information being used to configure a resource pool and an associated time window; generating an uplink transmission when in a radio resource control (RRC) IDLE state; and transmitting the uplink transmission in the resource pool.

[0129] Embodiment 11 includes the method according to embodiment 10 or some other embodiment herein, wherein the PUR configuration information is used to configure multiple resource pools, and the method further includes selecting the resource pool from the multiple resource pools.

[0130] Embodiment 12 includes a method according to embodiment 10 or some other embodiment of the present invention, wherein the PUR configuration information is used to configure multiple resource modes within the resource pool, and the method also includes selecting a resource mode from the multiple resource modes; and transmitting the uplink transmission in the resources of the resource mode.

[0131] Embodiment 13 includes a method according to embodiment 12 or some other embodiment herein, wherein selecting includes selecting the resource mode based on an identifier of the UE, an estimated uplink coverage level, or a service type associated with the uplink transmission.

[0132] Embodiment 14 includes a method according to embodiment 10 or some other embodiment herein, wherein the uplink transmission includes an identifier of the UE.

[0133] Embodiment 15 includes a method according to embodiment 10 or some other embodiment herein, wherein the PUR configuration information includes indications of: the starting subframe of the resource pool; the resource pool duration, which defines the maximum number of repetitions during a particular uplink transmission in the resource pool; the periodicity of the allocation of the resource pool; the lowest physical resource block (PRB) of the resource pool; the resource pool bandwidth; or the gap between the resource pool and the associated time window in the time domain, where the UE will monitor the downlink control information transmission associated with the uplink transmission.

[0134] Embodiment 16 includes the method according to any one of embodiments 10 to 15, further comprising processing a UE-specific RRC signal to obtain the PUR configuration information, and storing the PUR configuration information in a memory.

[0135] Embodiment 17 includes a method according to embodiment 16 or some other embodiment herein, wherein the UE-specific RRC signal is received when the UE is in RRC CONNECTED mode.

[0136] Embodiment 18 includes a method for operating an access node, comprising: transmitting pre-configured uplink resource (PUR) configuration information to a user equipment to configure a resource pool and a time window; processing an uplink transmission received from the UE in the resource pool; and transmitting downlink control information (DCI) in the transmission window to the UE to provide an indication of successful or unsuccessful reception of the uplink transmission.

[0137] Embodiment 19 includes a method according to embodiment 18 or some other embodiment herein, wherein to transmit the PUR configuration information, the access node is configured to generate a UE-specific radio resource control signal and send it to the UE.

[0138] Embodiment 20 includes a method according to embodiment 18 or some other embodiment herein, wherein the DCI is used to provide an indication of successful reception of the uplink transmission.

[0139] Embodiment 21 includes a method according to any one of embodiments 18 to 20, wherein the DCI in the transmission window includes scheduling information, which is used to schedule downlink transmission to carry the indication of successful or unsuccessful reception of the uplink transmission.

[0140] Embodiment 22 includes a method according to embodiment 18 or some other embodiment herein, wherein the DCI is used to indicate unsuccessful reception of the uplink transmission by providing an uplink grant for scheduling a physical uplink shared channel (PSUCH) for a hybrid automatic repeat request (HARQ) retransmission of the uplink transmission.

[0141] Embodiment 23 may include an apparatus comprising means for performing one or more elements of the method described in or related to any of Embodiments 1 to 22, or any other method or process described herein.

[0142] Embodiment 24 may include one or more non-transitory computer-readable media, which include instructions that, when executed by one or more processors of an electronic device, cause the electronic device to perform one or more elements of a method described in or related to any one of Embodiments 1 to 22 or any other method or process described herein.

[0143] Embodiment 25 may include an apparatus comprising logic components, modules, or circuits for performing one or more elements of the method described in or related to any of Embodiments 1 to 22, or any other method or process described herein.

[0144] Embodiment 26 may include methods, techniques or processes described in or related to any one of Embodiments 1 to 22, or parts or components thereof.

[0145] Embodiment 27 may include a device comprising: one or more processors and one or more computer-readable media, wherein the one or more computer-readable media include instructions that, when executed by the one or more processors, cause the one or more processors to perform a method, technique, or process, or a portion thereof, described in or related to any one of Embodiments 1 to 22.

[0146] Embodiment 28 may include a signal as described or associated with any one of Embodiments 1 to 22, or a portion or component thereof.

[0147] Embodiment 29 may include signals in a wireless network as shown and described herein.

[0148] Embodiment 30 may include a method of communicating in a wireless network as shown and described herein.

[0149] Embodiment 31 may include a system for providing wireless communications as shown and described herein.

[0150] Embodiment 32 may include an apparatus for providing wireless communications as shown and described herein.

[0151] Unless explicitly stated otherwise, any of the above embodiments may be combined with any other embodiment (or combination of embodiments). The foregoing description of one or more specific implementations provides illustration and description, but is not intended to be exhaustive or to limit the scope of the embodiments to the precise form disclosed. Modifications and variations are possible in view of the above teachings or may be obtained from the practice of the various embodiments.

Claims

1. One or more non-transitory computer-readable media having instructions that, when executed by one or more processors, cause a user equipment (UE) to perform the following operations: Before the radio resource control RRC CONNECTED mode, obtain the timing advance; Transitioning to the RRC CONNECTED mode; When in the RRC CONNECTED mode, obtaining pre-configured uplink resource PUR configuration information, the PUR configuration information being used to configure a resource pool and a time window associated with the resource pool, wherein the resource pool is one of a plurality of resource pools configured with different periodicities, wherein the UE monitors downlink control information DCI within the time window; Transitioning from the RRC CONNECTED mode to the RRC IDLE state; and An uplink message is generated to be transmitted in the resource pool while the UE is in the RRC IDLE state.

2. The one or more non-transitory computer-readable media of claim 1, wherein the resource pool comprises one or more physical resource blocks (PRB) pairs.

3. The one or more non-transitory computer-readable media of claim 1, wherein the resource pool comprises one or more resource units for sub-physical resource blocks (PRBs) uplink transmissions.

4. The one or more non-transitory computer-readable media of claim 1 , wherein the instructions, when executed, further cause the UE to: The time window of the DCI associated with the uplink message is monitored.

5. The one or more non-transitory computer-readable media of claim 4, wherein the DCI acknowledges successful receipt of the uplink message or requests retransmission of the uplink message by providing an uplink grant for retransmission.

6. The one or more non-transitory computer-readable media of claim 5, wherein the uplink message is a Narrowband Internet of Things (NB-IoT) message, and the DCI is used to confirm successful receipt of the uplink message.

7. The one or more non-transitory computer-readable media of claim 4, wherein the DCI comprises scheduling information for a downlink shared channel that carries the request for retransmission of the uplink message.

8. The one or more non-transitory computer-readable media of claim 4, wherein the instructions, when executed, further cause the UE to: Determine the configuration of the machine type / narrowband physical downlink control channel MPDCCH / NPDCCH search space; The time window is monitored based on the configuration.

9. The one or more non-transitory computer-readable media of any one of claims 1 to 8, wherein the configuration is a UE-specific search space.

10. A device implemented in a user equipment UE, the device comprising: a memory, the memory being used to store preconfigured uplink resource PUR configuration information, the PUR configuration information being used to configure a resource pool and a time window associated with the resource pool, wherein the resource pool is one of a plurality of resource pools configured with different periodicities, wherein the UE monitors downlink control information DCI within the time window; as well as a processing circuit coupled to the memory to: Before the radio resource control RRC CONNECTED mode, obtain the timing advance; Transitioning to the RRC CONNECTED mode; When in the RRC CONNECTED mode, obtaining the PUR configuration information; Transition from the RRC CONNECTED mode to the RRC IDLE state while in the RRC IDLE state, generating an uplink transmission; and The uplink transmission is transmitted in the resource pool.

11. The apparatus according to claim 10, wherein the PUR configuration information is used to configure a plurality of resource pools, and the processing circuit is further used to: select the resource pool from the plurality of resource pools.

12. The apparatus of claim 10, wherein the PUR configuration information is used to configure a plurality of resource patterns within the resource pool, and the processing circuit is further used to: select a resource pattern from the plurality of resource patterns; and transmit the uplink transmission in resources of the resource pattern.

13. The apparatus of claim 12, wherein the processing circuit is configured to select the resource pattern based on an identifier of the UE, an estimated uplink coverage level, or a service type associated with the uplink transmission.

14. The apparatus of claim 10, wherein the uplink transmission comprises an identifier of the UE.

15. An apparatus according to claim 10, wherein the PUR configuration information includes indications of: a starting subframe of the resource pool; a resource pool duration, which defines a maximum number of repetitions during a specific uplink transmission in the resource pool; a periodicity of allocation of the resource pool; a lowest physical resource block (PRB) of the resource pool; a resource pool bandwidth; or a gap between the resource pool and an associated time window in the time domain, wherein the UE will monitor the DCI associated with the uplink transmission.

16. The apparatus according to any one of claims 10 to 15, wherein the processing circuit is configured to process a UE-specific RRC signal to obtain the PUR configuration information and store the PUR configuration information in the memory.

17. The apparatus according to claim 16, wherein the UE-specific RRC signal is received when the UE is in RRC CONNECTED mode.

18. One or more non-transitory computer-readable media having instructions that, when executed by one or more processors, cause an access node to: Before the radio resource control RRC CONNECTED mode, transmitting the timing advance to the user equipment UE; When in the RRC CONNECTED mode, transmitting pre-configured uplink resource PUR configuration information to the UE to configure a resource pool and a time window associated with the resource pool, wherein the resource pool is one of a plurality of resource pools configured with different periodicities, wherein the UE monitors downlink control information DCI within the time window; processing, in the resource pool, uplink transmissions received from the UE; and The DCI in the time window is transmitted to the UE to provide an indication of successful or unsuccessful reception of the uplink transmission.

19. The one or more non-transitory computer-readable media of claim 18, wherein to transmit the PUR configuration information, the access node is configured to generate a UE-specific radio resource control signal and send it to the UE.

20. The one or more non-transitory computer-readable media of claim 18, wherein the DCI is used to provide an indication of successful reception of the uplink transmission.

21. One or more non-transitory computer-readable media according to any one of claims 18 to 20, wherein the DCI in the time window includes scheduling information, which is used to schedule a downlink transmission to carry the indication of successful or unsuccessful reception of the uplink transmission.

22. One or more non-transitory computer-readable media according to claim 18, wherein the DCI is used to indicate unsuccessful reception of the uplink transmission by providing an uplink grant that schedules a physical uplink shared channel (PSUCH) for a hybrid automatic repeat request (HARQ) retransmission of the uplink transmission.

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