Differential to Single-Ended Converters

By using feedback circuits and resistor networks in differential to single-ended converters, reducing the voltage swing at the input of the op amp and eliminating noise, the linearity and noise problems of differential to single-ended converters in the prior art are solved, and the problem of differential to single-ended converters is achieved. Low noise conversion effect.

CN113381746BActive Publication Date: 2024-12-10MEDIATEK INC
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Patent Information

Application Number
CN202010225983.4
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Priority Date
2020-03-09
Filing Date
2020-03-26
Publication Date
2024-12-10
Estimated Expiration
2040-03-26

AI Technical Summary

Technical Problem

In the prior art, differential to single-ended converters are susceptible to common-mode feedback circuit noise, and the input voltage swing of the single-ended op amp is large, resulting in a decrease in linearity of the output signal.

Method used

Design a differential to single-ended converter, receives the output signal of the operational amplifier through a feedback circuit, generates a first feedback signal to reduce the swing of the input signal, and eliminates the noise generated by the feedback circuit through a second feedback signal, and uses feedback resistance The voltage swing of the resistor network control operational amplifier is close to zero, reducing the impact of noise.

Benefits of technology

It realizes the reduction of the voltage swing of the input terminal of the operational amplifier, improves the linearity of the output signal, and prevents the output signal from being affected by the feedback circuit noise, achieving a low-noise differential to single-ended conversion effect.

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Abstract

This invention provides a differential-to-single-ended converter, comprising a first input node, a second input node, an operational amplifier, and a feedback circuit. The operational amplifier has a first terminal and a second terminal, wherein the first terminal receives a first signal from the first input terminal, and the second terminal receives a second signal from the second input terminal. The feedback circuit is configured to receive the output signal of the operational amplifier and generate a first feedback signal to the first terminal of the operational amplifier to reduce the swing of the first signal, and to generate a second feedback signal to the second terminal of the operational amplifier to eliminate noise generated by the feedback circuit and input to both the first and second terminals.
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Description

Technical Field

[0001] The present invention generally relates to a differential to single-ended conversion technique and, more particularly, to a low noise differential to single-ended converter. Background Art

[0002] A differential to single-ended converter is generally used in applications where the input signal is differential but the output load needs to be driven by a single-ended signal. In conventional technology, the differential to single-ended converter can be implemented by a differential operational amplifier, and one of the two output signals of the differential operational amplifier is selected as a single-ended output signal. However, the differential operational amplifier is affected by the common-mode feedback circuit (CMFB) noise. In addition, the differential to single-ended converter can be implemented by a single-ended operational amplifier, but the voltage swing on one input terminal of the single-ended operational amplifier is large, and the large voltage swing on the input terminal of the operational amplifier reduces the linearity of the output signal. Summary of the invention

[0003] Therefore, an object of the present invention is to provide a differential to single-ended converter which can reduce the voltage swing at the input terminal of an operational amplifier and prevent the single-ended output signal from being affected by other circuits.

[0004] According to an embodiment of the present invention, a differential to single-ended converter includes a first input node, a second input node, an operational amplifier, and a feedback circuit. The operational amplifier has a first terminal and a second terminal, wherein the operational amplifier receives a first signal from the first input node through the first terminal, and the operational amplifier receives a second signal from the second input node through the second terminal. The feedback circuit is configured to receive an output signal of the operational amplifier and generate a first feedback signal to the first terminal of the operational amplifier to reduce the swing of the first signal, and generate a second feedback signal to the second terminal of the operational amplifier to eliminate noise generated by the feedback circuit and input to the first terminal and the second terminal.

[0005] In some embodiments, the first feedback signal and the first signal have opposite phases, and the second feedback signal and the second signal have the same phase.

[0006] In some embodiments, the differential-to-single-ended converter further includes: a feedback resistor coupled between the output terminal and the second terminal.

[0007] In some embodiments, the first end is a non-inverting end, the second end is an inverting end, and the feedback circuit includes a buffer configured to receive the output signal and generate a buffered output signal; wherein the first feedback signal and the second feedback signal are generated based on the buffered output signal.

[0008] In some embodiments, the buffer is an inverting buffer.

[0009] In some embodiments, the differential-to-single-ended converter further includes: a first resistor coupled between the first input node of the differential-to-single-ended converter and the first end of the operational amplifier; and, a second resistor coupled between the second input node of the differential-to-single-ended converter and the second end of the operational amplifier; wherein the feedback circuit further includes a third resistor and a fourth resistor, the third resistor coupled between the output end of the buffer and the first end of the operational amplifier, for receiving the buffered output signal to generate the first feedback signal; and, a fourth resistor coupled between the output end of the buffer and the second end of the operational amplifier, for receiving the buffered output signal to generate the second feedback signal.

[0010] In some embodiments, a resistance value of the third resistor is different from a resistance value of the fourth resistor.

[0011] In some embodiments, resistance values ​​of the first resistor and the third resistor are designed such that a voltage swing at the first terminal of the operational amplifier is substantially equal to zero.

[0012] In some embodiments, resistance values ​​of the first resistor, the second resistor, the third resistor, the fourth resistor, and the feedback resistor are designed such that the output signal is not affected by noise generated by the buffer.

[0013] In some embodiments, a resistance value of the fourth resistor is smaller than a resistance value of the third resistor.

[0014] In some embodiments, a resistance value of the feedback resistor is smaller than a resistance value of the third resistor.

[0015] In some embodiments, when the first resistor and the second resistor have the same resistance value, the resistance values ​​of the third resistor, the fourth resistor and the feedback resistor satisfy the following equation:

[0016] Vout*(-R6 / R5)*(1 / (1+n))+Vin*(n / (1+n))=0;

[0017] (1 / (1+n))*(1+k*(1+m) / m)-(k / m)=0; and,

[0018] Vout*(R6 / R5)*(k / m)+Vin*k=Vout;

[0019] Wherein, (R6 / R5) is the resistance ratio provided by the buffer, "n" is the resistance value of the third resistor, "m" is the resistance value of the fourth resistor, "k" is the resistance value of the feedback resistor, "Vout" is the output signal, and "Vin" is the first input signal or the second input signal.

[0020] In some embodiments, when the gain of the differential-to-single-ended converter is equal to 1, a resistance ratio of the first resistor, the second resistor, the third resistor, the fourth resistor, and the feedback resistor is 1:1:2:(2 / 3):(1 / 2).

[0021] In some embodiments, when the gain of the differential-to-single-ended converter is equal to 2, the resistance ratio of the first resistor, the second resistor, the third resistor, the fourth resistor and the feedback resistor is 1:1:4:(12 / 5):(3 / 2).

[0022] In some embodiments, when the gain of the differential-to-single-ended converter is equal to 4, the resistance ratio of the first resistor, the second resistor, the third resistor, the fourth resistor and the feedback resistor is 1:1:8:(56 / 9):(7 / 2).

[0023] These and other objects of the present invention will become apparent to those skilled in the art after reading the following detailed description of the preferred embodiments shown in the various drawings and figures. Other embodiments and advantages are described in the following detailed description. This summary is not intended to limit the present invention. The present invention is defined by the claims. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] The present invention may be more fully understood by reading the following detailed description and by referring to the examples given in the accompanying drawings.

[0025] Figure 1 FIG. 4 is a schematic diagram of a differential-to-single-ended converter according to an embodiment of the present invention.

[0026] Figure 2 FIG. 4 is a schematic diagram of a feedback circuit according to an embodiment of the present invention.

[0027] In the following detailed description, for the purpose of illustration, many specific details are set forth so that those skilled in the art can more thoroughly understand the embodiments of the present invention. However, it is apparent that one or more embodiments may be implemented without these specific details, and different embodiments may be combined as needed, and should not be limited to the embodiments listed in the accompanying drawings. DETAILED DESCRIPTION

[0028] The following description is a preferred embodiment of the present invention, which is only used to illustrate the technical features of the present invention, and is not used to limit the scope of the present invention. Certain words are used throughout the specification and claims to refer to specific components. It should be understood by those skilled in the art that manufacturers may use different names to refer to the same components. Therefore, the present specification and claims do not use the difference in name as a way to distinguish components, but use the difference in function of the components as a basis for distinction. The terms "component", "system" and "device" used in the present invention can be entities related to computers, wherein the computer can be hardware, software, or a combination of hardware and software. The terms "including" and "comprising" mentioned in the following description and claims are open-ended terms, so they should be interpreted as "including, but not limited to...". In addition, the term "coupled" means an indirect or direct electrical connection. Therefore, if a device is described as coupled to another device, it means that the device can be directly electrically connected to the other device, or indirectly electrically connected to the other device through other devices or connection means.

[0029] Corresponding numbers and symbols in the various figures of the drawings generally refer to corresponding parts unless otherwise indicated. The drawings are drawn to clearly illustrate the relevant parts of the embodiments and are not necessarily drawn to scale.

[0030] The term "substantially" or "approximately" as used herein means that within an acceptable range, a person skilled in the art can solve the technical problem to be solved and basically achieve the technical effect to be achieved. For example, "approximately equal to" means that a certain error from "completely equal to" is acceptable to a person skilled in the art without affecting the correctness of the result.

[0031] Figure 1 is a schematic diagram of a differential to single-ended converter 100 according to an embodiment of the present invention. It should be noted that: Figure 1 This is an example structure for the sake of explanation, and the present invention is not limited to the specific components and specific connections shown in this example structure. Figure 1As shown, the differential to single-ended converter 100 is configured to receive differential signals +Vin and -Vin at a first input node Nin1 and a second input node Nin2, respectively, to generate an output signal Vout at an output node Nout. The differential to single-ended converter 100 includes an operational amplifier 110, a feedback circuit 120, a first resistor R1, a second resistor R2, and a feedback resistor R_FB, wherein the first resistor R1 is coupled between the first input node Nin1 and the positive terminal of the operational amplifier 110. The second resistor R2 is coupled between the second input node Nin2 and the inverting terminal of the operational amplifier 110, and the feedback resistor R_FB is coupled between the inverting terminal of the operational amplifier 110 and the output terminal of the operational amplifier 110.

[0032] In an example operation of the differential to single-ended converter 100, the non-inverting terminal of the operational amplifier 110 receives the first signal Vx+ from the first input node Nin1 and via the first resistor R1, and the inverting terminal of the operational amplifier 110 receives the second signal Vx- from the second input node Nin2 and via the second resistor R2. In this embodiment, since the feedback resistor R_FB is connected between the inverting terminal and the output terminal of the operational amplifier 110, the inverting terminal of the operational amplifier 110 can be controlled to be almost a DC potential (i.e., the signal / voltage swing is very small). In order to reduce the signal swing at the non-inverting terminal of the operational amplifier 110 to improve linearity, the feedback circuit 120 generates a first feedback signal V_FB1 to the non-inverting terminal of the operational amplifier 110 with reference to the output signal Vout to reduce the signal swing of the first signal Vx+. In addition, although the linearity of the differential-to-single-ended converter 100 is improved by adding the first feedback signal V_FB1 to the first signal Vx+, the noise of the feedback circuit 120 will also be induced to the first signal Vx+. Therefore, in order to prevent the output signal Vout from being affected by the noise generated by the feedback circuit 120, the feedback circuit 120 also generates a second feedback signal V_FB2 to the inverting terminal of the operational amplifier 110 to cancel (balance) the noise generated by the feedback circuit 120 and input to the non-inverting terminal (and the inverting terminal) of the operational amplifier 110. Therefore, the differential-to-single-ended converter provided by the present invention has the advantage of low noise, for example, the output signal can be unaffected by the noise of the feedback circuit 120. In comparison, if the method proposed by the present invention is not used, Vx- will have a large signal swing, and the method proposed by the present invention can cancel the signal swing at the Vx- terminal to keep it at a DC potential.

[0033] exist Figure 1 In the illustrated embodiment, the first feedback signal V_FB1 and the second feedback signal V_FB2 are in phase, so that the noise induced to the first signal Vx+ and the second signal Vx- are offset / cancelled, and the first feedback signal V_FB1 and the first signal Vx+ are opposite in phase to reduce the signal swing of the in-phase terminal of the operational amplifier 110. Therefore, the second feedback signal V_FB2 and the second signal Vx- are in phase (that is, the second feedback signal V_FB2 is not used to reduce the signal swing of the second signal Vx-, because the feedback resistor R_FB is connected between the inverting terminal and the output terminal of the operational amplifier 110, and this setting can already make the signal swing of the inverting terminal very small).

[0034] In view of the above description, by providing a feedback resistor R_FB and using the feedback circuit 120 to generate the first feedback signal V_FB1 and the second feedback signal V_FB2 to the non-inverting terminal and the inverting terminal of the operational amplifier 110 respectively, the non-inverting terminal and the inverting terminal of the operational amplifier 110 both have a small voltage swing, thereby improving the linearity of the differential to single-ended converter, and the noise caused / brought by the feedback circuit 120 will not affect the accuracy of the output signal Vout.

[0035] Figure 2 FIG. 1 is a schematic diagram of a feedback circuit 120 according to an embodiment of the present invention. Figure 2As shown, the feedback circuit 120 includes a buffer 210, a third resistor R3 and a fourth resistor R4, wherein the buffer 210 includes an operational amplifier 212 and two resistors R5 and R6, and the non-inverting terminal of the operational amplifier 212 receives the bias voltage VB. In this embodiment, the buffer 210 may be an inverting buffer, and the buffer 210 receives the output signal Vout to generate a buffered output signal, which is used to generate a first feedback signal V_FB1 and a second feedback signal V_FB2, that is, the phase of the output signal Vout is different from the phase of each of the first feedback signal V_FB1 and the second feedback signal V_FB2 (for example, the phase difference may be 180°). In addition, the resistance values ​​of the first resistor R1 and the third resistor R3 may be designed so that the signal swing at the non-inverting terminal of the operational amplifier 110 is substantially equal to zero (that is, Vx+ at the non-inverting terminal is controlled to be a direct current (DC) potential, and there is substantially no alternating current (AC) signal). The resistance values ​​of the first resistor R1, the second resistor R2, the third resistor R3, the fourth resistor R4 and the feedback resistor R_FB are designed so that the output signal Vout is not affected by the noise generated by the buffer 210. Specifically, assuming that the resistance value of each of the first resistor R1 and the second resistor R2 is "R", the resistance value of the third resistor R3 is "n*R", the resistance value of the fourth resistor R4 is "m*R", the resistance value of the feedback resistor R_FB is "k*R", and the resistance value of the resistor R5 is equal to the resistance value of the resistor R6, in order to make the non-inverting terminal of the operational amplifier 110 substantially equal to zero, the sum of the feedback signal V_FB1 and the signal provided by the input signal +Vin is equal to zero, that is:

[0036] Vout*(-R6 / R5)*(1 / (1+n))+Vin*(n / (1+n))=0…………(1);

[0037] And, formula (1) can be simplified to:

[0038] n=Vout / Vin………………(2).

[0039] In order to control the noise (from buffer 210 to the output signal Vout) to zero, equation (3) provided below should be satisfied:

[0040] V_noise*(1 / (1+n))*(1+k*(1+m) / m)-V_noise*(k / m)=0......(3).

[0041] Wherein, V_noise is the noise generated by the buffer 210. In addition, the signal transfer function of the differential to single-ended converter 100 is provided as follows:

[0042] Vout*(R6 / R5)*(k / m)+Vin*k=Vout……………………(4);

[0043] And, formula (4) can be simplified to:

[0044]

[0045] Among them, the term is the gain of the differential to single-ended converter 100 .

[0046] By combining the above equations (2), (3) and (5), the values ​​of n, m and k can be determined. For example, if the gain of the differential to single-ended converter 100 is equal to 1, n, m and k can be determined as 2, (2 / 3) and (1 / 2), that is, the ratio of the resistance values ​​of the first resistor R1, the second resistor R2, the third resistor R3, the fourth resistor R4 and the feedback resistor R_FB is 1:1:2:(2 / 3):(1 / 2). If the gain of the differential to single-ended converter 100 is equal to 2, n, m and k can be determined as 4, (12 / 5) and (3 / 2), that is, the ratio of the resistance values ​​of the first resistor R1, the second resistor R2, the third resistor R3, the fourth resistor R4 and the feedback resistor R_FB is 1:1:4:(12 / 5):(3 / 2). If the gain of the differential-to-single-ended converter 100 is equal to 4, n, m and k can be determined as 8, (56 / 9) and (7 / 2), that is, the ratio of the resistance values ​​of the first resistor R1, the second resistor R2, the third resistor R3, the fourth resistor R4 and the feedback resistor R_FB is 1:1:8:(56 / 9):(7 / 2).

[0047] Briefly summarized, in the differential to single-ended converter of the present invention, the feedback circuit is configured to receive the output signal and generate a first feedback signal to the non-inverting terminal of the operational amplifier to reduce the swing of the first signal, and also generate a second feedback signal to the inverting terminal of the operational amplifier to offset / eliminate the noise generated / brought by the feedback circuit and input to the first terminal and the second terminal. Therefore, the differential to single-ended converter has better linearity and is not affected by the noise generated by the feedback circuit.

[0048] Although the embodiments of the present invention and their advantages have been described in detail, it should be understood that various changes, substitutions and modifications may be made to the present invention without departing from the spirit of the present invention and the scope defined by the claims. For example, new embodiments may be derived by combining parts of different embodiments. The described embodiments are for illustrative purposes only and are not intended to limit the present invention in all respects. The scope of protection of the present invention shall be as defined by the attached claims. Those with ordinary knowledge in the art may make some changes and modifications without departing from the spirit and scope of the present invention.

Claims

1. A differential to single-ended converter, comprising: A first input node and a second input node configured to receive a differential signal; an operational amplifier having a non-inverting input terminal and an inverting input terminal; a first resistor coupled between the first input node of the differential-to-single-ended converter and the non-inverting input terminal of the operational amplifier; a second resistor coupled between the second input node of the differential-to-single-ended converter and the inverting input terminal of the operational amplifier; A feedback resistor coupled between the output terminal of the operational amplifier and the inverting input terminal; as well as A feedback circuit, the feedback circuit comprising: a buffer having an input terminal coupled to the output terminal of the operational amplifier; A third resistor is coupled between the output terminal of the buffer and the non-inverting input terminal of the operational amplifier; and a fourth resistor coupled between the output terminal of the buffer and the inverting input terminal of the operational amplifier; When the resistance values ​​of the first resistor and the second resistor are R, the resistance value of the third resistor is n*R, and the resistance value of the fourth resistor is m*R, wherein m is less than (n-1).

2. The differential to single-ended converter according to claim 1, characterized in that: This buffer is an inverting buffer.

3. The differential to single-ended converter according to claim 1, wherein: The resistance values ​​of the first resistor and the third resistor are designed so that the voltage swing at the non-inverting input terminal of the operational amplifier is substantially equal to zero.

4. The differential to single-ended converter according to claim 1, wherein: The resistance values ​​of the first resistor, the second resistor, the third resistor, the fourth resistor and the feedback resistor are designed so that the output signal at the output terminal of the operational amplifier is not affected by the noise generated by the buffer.

5. The differential to single-ended converter according to claim 1, wherein: The resistance value of the feedback resistor is smaller than the resistance value of the third resistor.

6. The differential to single-ended converter according to claim 1, wherein: When the first resistor and the second resistor have the same resistance value R, the resistance values ​​of the third resistor, the fourth resistor and the feedback resistor satisfy the following equation: Vout*(-R6 / R5)*(1 / (1+n))+Vin*(n / (1+n))=0; (1 / (1+n))*(1+k*(1+m) / m)-(k / m)=0; and, Vout*(R6 / R5)*(k / m)+Vin*k=Vout; Wherein, (R6 / R5) is the resistance ratio provided by the buffer, the resistance value of the third resistor is n*R, the resistance value of the fourth resistor is m*R, the resistance value of the feedback resistor is k*R, "Vout" is the output signal provided by the operational amplifier, and "Vin" and "-Vin" are the differential signals.

7. The differential to single-ended converter according to claim 6, characterized in that: When the gain of the differential-to-single-ended converter is equal to 1, the resistance ratio of the first resistor, the second resistor, the third resistor, the fourth resistor and the feedback resistor is 1:1:2:(2 / 3):(1 / 2).

8. The differential to single-ended converter according to claim 6, characterized in that: When the gain of the differential-to-single-ended converter is equal to 2, the resistance ratio of the first resistor, the second resistor, the third resistor, the fourth resistor and the feedback resistor is 1:1:4:(12 / 5):(3 / 2).

9. The differential to single-ended converter according to claim 6, characterized in that: When the gain of the differential-to-single-ended converter is equal to 4, the resistance ratio of the first resistor, the second resistor, the third resistor, the fourth resistor and the feedback resistor is 1:1:8:(56 / 9):(7 / 2).

10. The differential to single-ended converter according to claim 1, wherein: When the resistance values ​​of the first resistor and the second resistor are R, the resistance values ​​of the third resistor, the fourth resistor and the feedback resistor are n*R, m*R and k*R respectively, wherein: (1 / (1+n))*(1+k*(1+m) / m)-(k / m)=0; and, 11. The differential to single-ended converter according to claim 1, wherein: When the resistance values ​​of the first resistor and the second resistor are R, the resistance values ​​of the third resistor, the fourth resistor and the feedback resistor are n*R, m*R and k*R respectively, wherein: n=Vout / Vin; (1 / (1+n))*(1+k*(1+m) / m)-(k / m)=0; Among them, "Vout" is the output signal provided by the operational amplifier, and "Vin" and "-Vin" are the differential signals.

12. The differential to single-ended converter according to claim 1, wherein: