Power semiconductor package and method for manufacturing a power semiconductor package

Abstract

A power semiconductor package includes: a substrate; a power semiconductor chip arranged on the substrate; and an encapsulant encapsulating the power semiconductor chip, wherein the encapsulant includes a voltage stabilizing additive configured to minimize or digest partial discharge in the encapsulant.

Description

Technical Field

[0001] The present disclosure generally relates to power semiconductor packages and methods for manufacturing power semiconductor packages. Background Art

[0002] Power semiconductor packages (e.g., including AC / DC or DC / DC converter circuits) can operate at high voltages and / or high currents. Among other things, due to the small size of power semiconductor packages and the close proximity of their electrical components, stringent insulation requirements must be met. Typical insulator components that can be used in power semiconductor packages are encapsulants, plastic frames, insulating glues, etc. Such components can typically include a polymer matrix. However, defects in such insulators (e.g., gas-filled voids) can be the starting point of electrical faults such as partial discharges, which in turn may cause sufficient damage to the insulator to cause possible electrical short circuits. Further reducing the number or size of defects in the insulator (such as gas-filled voids) may be impractical or even impossible. Therefore, it may be advantageous to use an improved power semiconductor package and an improved method for manufacturing a power semiconductor package including an improved electrical insulator.

[0003] The problem on which the invention is based is solved by the features of the independent claims. Further advantageous examples are described in the dependent claims. Summary of the invention

[0004] Various aspects relate to a power semiconductor package including: a substrate; a power semiconductor chip disposed on the substrate; and an encapsulant encapsulating the power semiconductor chip, wherein the encapsulant includes a voltage stabilizing additive configured to minimize or eliminate partial discharge within the encapsulant.

[0005] Various aspects relate to a method for manufacturing a power semiconductor package, the method comprising: providing a substrate; arranging a power semiconductor chip on the substrate; and encapsulating the power semiconductor chip with an encapsulant, wherein the encapsulant includes a voltage stabilizing additive configured to minimize or eliminate partial discharge within the encapsulant.

[0006] Various aspects relate to use of a voltage stabilizing additive in a power semiconductor package, the voltage stabilizing additive being configured to minimize or eliminate partial discharge within an encapsulant of the power semiconductor package. BRIEF DESCRIPTION OF THE DRAWINGS

[0007] The accompanying drawings illustrate examples and, together with the description, are used to explain the principles of the present disclosure. Other examples and many expected advantages of the present disclosure will be readily understood as they become better understood by reference to the following specific embodiments. The elements in the accompanying drawings are not necessarily to scale with respect to each other. The same reference numerals designate corresponding similar parts.

[0008] Figure 1 A schematic cross-sectional view of a power semiconductor package is shown, wherein an insulator of the power semiconductor package includes a voltage stabilizing additive.

[0009] Figure 2 A schematic illustration of electron avalanche in an electrical insulator caused by partial discharge is shown.

[0010] Figures 3A to 3C Examples of different substances that may be used as voltage stabilizing additives in power semiconductor packages are shown.

[0011] Figure 4 Schematic showing how voltage stabilizing additives can prevent partial discharges from damaging the insulator.

[0012] Figure 5 Schematic cross-sectional view showing a detail of a power semiconductor package.

[0013] Figure 6 A schematic cross-sectional view of another power semiconductor package including various electrically insulating components is shown.

[0014] Figure 7 A flow chart of a method for manufacturing a power semiconductor package is shown. DETAILED DESCRIPTION

[0015] In the following detailed description, directional terms such as "top", "bottom", "left", "right", "upper", "lower", etc. are used with reference to the orientation of the (one or more) Figures being described. Because components of the present disclosure can be positioned in a number of different orientations, the directional terms are used for illustration purposes only.

[0016] In addition, although the specific features or aspects of the examples may be disclosed only about one of several embodiments, unless otherwise specifically noted or unless technically limited, such features or aspects may be combined with one or more other features or aspects of other embodiments that may be desirable and advantageous for any given or specific application. The terms "coupled" and "connected" and their derivatives may be used. It should be understood that these terms may be used to indicate that two elements cooperate or interact with each other, regardless of whether they are in direct physical or electrical contact, or they are not in direct contact with each other; an intermediate element or layer may be provided between the elements of "engagement", "attachment" or "connection". However, it is also possible that the elements of "engagement", "attachment" or "connection" are in direct contact with each other. In addition, the term "exemplary" is used only as an example, not the best or optimal.

[0017] Examples of power semiconductor packages may use various types of semiconductor chips or circuits incorporated in semiconductor chips, including AC / DC or DC / DC converter circuits, power MOSFET transistors, power Schottky diodes, JFETs (junction gate field effect transistors), power bipolar transistors, logic integrated circuits, analog integrated circuits, power integrated circuits, chips with integrated passive devices, etc. In addition, examples of insulating materials may be used, for example, to provide insulating layers in various types of housings and for insulation of circuits and electrical components, and / or to provide insulating layers in various types of semiconductor chips or circuits incorporated in semiconductor chips (including the above-mentioned semiconductor chips and circuits).

[0018] The power semiconductor package described below may include one or more semiconductor chips. As an example, one or more power semiconductor chips may be included. In addition, one or more logic integrated circuits may be included in the power semiconductor package. The logic integrated circuit may be configured to control an integrated circuit of other semiconductor chips, such as an integrated circuit of a power semiconductor chip. The logic integrated circuit may be implemented in a logic chip.

[0019] Figure 1 A power semiconductor package 100 is shown including a substrate 110, a power semiconductor chip 120, and an encapsulant 130. The power semiconductor chip 120 is arranged on the substrate 110, and the encapsulant 130 encapsulates the power semiconductor chip 120. In addition, the encapsulant 130 includes a voltage stabilizing additive 140 configured to minimize or eliminate partial discharge within the encapsulant 130.

[0020] The power semiconductor package 100 may be configured to operate at high voltage (e.g., 6.5 kV or higher) and / or high current. The power semiconductor package 100 may, for example, include a converter circuit, a half-bridge circuit, an inverter circuit, or any other suitable circuit. The power semiconductor package 100 may, for example, be configured to be used in automotive applications.

[0021] The power semiconductor package 100 may be configured to be attached to a substrate, for example, such that the substrate 110 is arranged on the substrate. The power semiconductor package 100 may be configured to be attached to a heat sink. In addition, the power semiconductor package 100 may be configured to be connected to a circuit board. For example, the circuit board may be arranged at an upper main side of the power semiconductor package 100 opposite to the lower main side, wherein the lower main side includes the substrate 110.

[0022] exist Figure 1In the example shown in , the power semiconductor package 100 includes only one substrate 110. However, the power semiconductor package 100 may also include two or more substrates 110. Furthermore, the power semiconductor package 100 may include more than one power semiconductor chip 120, for example, several power semiconductor chips 120 on a single substrate 110 or several substrates 110, wherein each of the substrates 110 carries at least one power semiconductor chip 120.

[0023] The substrate 110 may be a die carrier, and it may include, for example, direct copper bonding (DCB), direct aluminum bonding (DAB), active metal brazing (AMB), or a lead frame.

[0024] The substrate 110 may include an upper main face and an opposite lower main face, wherein the power semiconductor chip 120 is arranged on the upper main face. The upper main face may be partially or completely covered by the encapsulant 130. The lower main face may be partially or completely free of the encapsulant 130.

[0025] The power semiconductor chip 120 may be electrically coupled to the substrate 110. For example, a first power electrode arranged on a lower main face of the power semiconductor chip 120 may be coupled to the substrate 110 via a solder joint, wherein the lower main face faces the substrate 110. A second power electrode and / or a control electrode arranged on an upper main face opposite to the lower main face may be coupled to the substrate 110, for example, via one or more bonding wires.

[0026] The encapsulant 130 may include a polymer and may be electrically insulating. According to an example, the encapsulant 130 is a molded body or a gel arranged on the power semiconductor chip 120 and / or the substrate 110. The encapsulant 130 may be configured to completely encapsulate the power semiconductor chip 120. The encapsulant 130 may serve as a protective cover that protects the power semiconductor chip 120 from environmental influences.

[0027] According to an example, the polymer of the encapsulant 130 is one or more of polyethylene, silicone, polyimide, epoxy, acrylate, and polyurethane.

[0028] According to an example, the encapsulant 130 may include one or more additional additives in addition to the voltage stabilizing additive 140. For example, the encapsulant 130 may include a filler material configured to improve the heat dissipation capability of the encapsulant 130.

[0029] The voltage stabilizing additive 140 may be uniformly distributed within the encapsulant 130. However, the voltage stabilizing additive 140 may also be non-uniformly distributed within the encapsulant 130. For example, the encapsulant 130 may include different portions, such as several layers, wherein one portion includes the voltage stabilizing additive 140 and another portion does not include the voltage stabilizing additive 140.

[0030] According to the example of encapsulant 130, voltage stabilizing additive 140 can be simply mixed into the polymer. According to another example, voltage stabilizing additive 140 can be covalently bonded into the polymer matrix of the polymer. The latter case can, for example, provide the following advantages, namely preventing or at least reducing diffusion or redistribution of voltage stabilizing additive 140 (especially when encapsulant 130 is still fluid during the manufacture of power semiconductor package 100).

[0031] The encapsulant 130 may include any suitable amount of the voltage stabilizing additive 140. For example, about 0.1 wt% to 10 wt%, or about 0.5 wt% to 5 wt%, or about 0.75 wt% to 2 wt% of the content of the encapsulant 130 may consist of the voltage stabilizing additive 140.

[0032] In addition to the encapsulant 130, the power semiconductor package 100 may include further components including a voltage stabilizing additive 140. For example, the power semiconductor package 100 may include a (hard) plastic frame and / or a glue including the voltage stabilizing additive 140. Different components of the power semiconductor package 100 may include different amounts of the voltage stabilizing additive 140 and / or different types of voltage stabilizing additives (examples of different voltage stabilizing additives are further described below).

[0033] Below, a brief description of "partial discharge" is given. A partial discharge may be a localized dielectric breakdown of an electrical insulator (e.g., a polymer) under high voltage stress. In other words, a partial discharge does not completely connect two spaced-apart conductors (e.g., two conductive traces of a DCB).

[0034] Figure 2 Schematically shows a partial discharge occurring in an insulator 200 (the insulator 200 may correspond to the encapsulant 130, for example) arranged in the space between two conductors 210. An initial ionization event 220 occurs in the insulator 200 due to, for example, background radiation. The potential difference between the two conductors 210 creates an electric field with a positive voltage V + The free electrons are accelerated towards the conductor 210. If the free electrons are sufficiently accelerated, ie if their energy is high enough, the free electrons can cause further ionization events 230 (avalanche effect).

[0035] Such partial discharges generally occur in voids (gas-filled voids) within the insulator 200 because the dielectric constant within the voids is smaller than that in the surrounding dielectric material. Therefore, the electric field strength in the voids is higher than that in the surrounding dielectric material.

[0036] To prevent partial discharge, it may therefore be desirable to minimize the amount and size of voids in the insulator 200. However, beyond a certain point, this may no longer be practical or economical. Therefore, it may be beneficial to add the voltage stabilizing additive 140 to the insulator 200 and thereby prevent or at least reduce partial discharge.

[0037] Below, examples of materials that may be used as voltage stabilizing additive 140 are listed. Alternative materials are also contemplated.

[0038] According to an example, the voltage stabilizing additive 140 includes one or more of the following substances:

[0039] Thioxanthone

[0040] Benzil

[0041] ·Benzophenone

[0042] ·Acetophenone

[0043] Nitrated aromatic structures

[0044] Halogenated aromatics

[0045] Fullerene

[0046] ·SiO2 particles

[0047] Polycyclic aromatic

[0048] ·Phenylenediamine

[0049] Methylated phenothiazines

[0050] Malononitrile

[0051] FIG. 3A to FIG. 3C Three different examples of substances that may be used in voltage stabilizing additive 140 are shown.

[0052] Figure 3A Acetophenone (chemical formula: C6H5C(O)CH3) is shown. Figure 3B Benzophenone (chemical formula: (C6H5)2CO) is shown, and Figure 3C Benzil (chemical formula: (C6H5CO)2) is shown. Acetophenone may have a boiling point of 202°C, benzophenone may have a boiling point of 305°C, and benzil may have a boiling point of 346°C.

[0053] Acetophenone is an example of an aromatic carbonyl compound. It can migrate out of, for example, a polymer matrix of the encapsulant 130 more easily than, for example, benzophenone or benzil. Therefore, it may be advantageous to use a voltage stabilizing additive 140 that includes an aromatic carbonyl or benzil-type compound having a larger alkoxy chain.

[0054] According to an example, the compound included in the voltage stabilizing additive 140 includes a modifier such as a selected functional group that increases the compatibility of the compound with, for example, a polymer matrix of the encapsulant 130. In particular, the voltage stabilizing additive 140 may be configured to be covalently bonded to, for example, a polymer matrix of the encapsulant 130. For example, the voltage stabilizing additive 140 may include a substance such as benzophenone, which is disposed at the end of a silicone oligomer chain.

[0055] refer to Figure 4 , describing the possible partial discharge prevention effect of the voltage stabilizing additive 140.

[0056] For example, free electrons 400 within insulator 200 (e.g., caused by background radiation described further above) may have a relatively high energy E1, which may be sufficient to cause damage to insulator 200. However, insulator 200 includes voltage stabilizing additive 140, which, without loss of generality, may include benzophenone. Upon collision with a molecule of voltage stabilizing additive 140, free electrons 400 may cause ionization of the molecule. Thus, a stable radical cation 410 is created, and two electrons 420 having a relatively low energy E2 are released. Since voltage stabilizing additive 140 ionizes at a relatively lower energy level than insulator 200, electrons 420 are prevented from having an energy level sufficient to cause damage to insulator 200.

[0057] Figure 5 Detailed views of sections of a power semiconductor package are shown, which may be similar or identical to power semiconductor package 100. According to an example, Figure 5 It can be shown Figure 1 Section A in .

[0058] Figure 5 The detailed view of FIG. 5 shows an example of a substrate 110 including an upper conductive layer 510, an insulating layer 520, and a lower conductive layer 530. The upper conductive layer 510 includes two conductive tracks 511 separated by a trench 540. The trench may be filled with an encapsulant 130 including a voltage stabilizing additive 140.

[0059] At sharp edges of conductors, such as at edge 512 of conductive track 511, the electric field strength may be particularly high, thereby promoting partial discharges in adjacent insulators such as encapsulant 130. In addition, individual conductors such as conductive track 511 may be arranged close together in a power semiconductor package, and partial discharges may easily be the cause of electrical shorts between such conductors. Therefore, protecting the insulators near edge 512 with voltage stabilizing additive 140 may be particularly important.

[0060] Figure 6 A power semiconductor package 600 is shown, which may be similar or identical to the power semiconductor package 100 except for the differences described below.

[0061] The power semiconductor package 600 includes a plurality of power semiconductor chips 120 arranged on a substrate 110 and encapsulated by an encapsulant 130. The power semiconductor package 600 may further include a (hard) plastic frame 610 forming a cavity, wherein the encapsulant 130, the power semiconductor chips 120 and the substrate 110 are arranged in the cavity. The power semiconductor package 600 may include one or more power terminals 620 and / or one or more control terminals 630, which may be exposed at the upper main side of the power semiconductor package 600. The power terminals 620 may be coupled to the power semiconductor chips 120, and the control terminals 630 may be configured to transmit control signals to the power semiconductor chips 120.

[0062] According to an example, the power semiconductor package 600 may further include a control circuit 640, for example, arranged on a printed circuit board. The control circuit 640 may, for example, be arranged in a cavity formed by the plastic frame 610. The control circuit 640 may, for example, be configured to control the power semiconductor chip 120, and it may be coupled to the control terminal 630.

[0063] According to an example, the power semiconductor package 600 may further include a base plate 650, wherein the substrate 110 is arranged on the base plate 650. The base plate 650 may, for example, be arranged at a lower main side of the power semiconductor package 600.

[0064] As described with reference to the power semiconductor package 100, the encapsulant 130 of the power semiconductor package 600 may include the voltage stabilizing additive 140. Additionally or alternatively, other components may include the voltage stabilizing additive 140 (wherein the voltage stabilizing additive 140 of different components of the power semiconductor package 600 may include the same substance or different substances, e.g., benzophenone in one component and benzil in another component).

[0065] According to an example, the power semiconductor package 600 may include silicone potting gel and / or molding compound and / or high hardness potting material and / or passivating organic coating and / or thermoplastic housing material and / or frame glue material, wherein one or more of these components may include voltage stabilizing additive 140 .

[0066] The molding compound can be based on epoxy, or acrylate, or silicone, or polyurethane, for example. The high hardness potting material can be based on epoxy, or acrylate, or silicone, or polyurethane, for example, and it can include filling material. The passivation organic coating can be arranged on the chip edge and / or in the substrate groove, for example, and it can be based on polyimide, or polyamide-imide, or acrylate. The thermoplastic housing material can be based on PBT, or PPA, or PA, or PPS, or PPSO, for example. The frame gluing material can be configured to glue the plastic frame 610 to other parts of the power semiconductor package 600, for example, and it can be based on silicone, or epoxy, or acrylate, or methacrylate, or polyurethane, for example.

[0067] Figure 7 A flow chart of a method 700 for manufacturing a power semiconductor package is shown. The method 700 may be used, for example, to manufacture the power semiconductor packages 100 and 600.

[0068] Method 700 includes: an action of providing a substrate at 701; an action of arranging a power semiconductor chip on the substrate at 702; and an action of encapsulating the power semiconductor chip with an encapsulant at 703, wherein the encapsulant includes a voltage stabilizing additive configured to minimize or eliminate local discharge within the encapsulant.

[0069] According to an example of method 700, the encapsulant includes a polymer, wherein the voltage stabilizing additive is covalently bound to a polymer matrix of the polymer. According to another example of method 700, the voltage stabilizing additive is added to the encapsulant before encapsulating the power semiconductor chip with the encapsulant. In addition, the voltage stabilizing additive can be added to the encapsulant in powder form, or the voltage stabilizing additive can be added to the encapsulant dissolved in a solvent.

[0070] Another aspect of the present disclosure relates to use of a voltage stabilizing additive in a power semiconductor package, wherein the voltage stabilizing additive is configured to minimize or eliminate partial discharge within an encapsulant or any other suitable electrically insulating component of the power semiconductor package.

[0071] Example

[0072] Below, a power semiconductor package and a method for manufacturing the power semiconductor package are further explained using specific examples.

[0073] Example 1 is a power semiconductor package, comprising: a substrate, a power semiconductor chip arranged on the substrate, and an encapsulant encapsulating the power semiconductor chip, wherein the encapsulant includes a voltage stabilizing additive configured to minimize or eliminate local discharge within the encapsulant.

[0074] Example 2 is a power semiconductor package according to Example 1, wherein the encapsulant includes a polymer.

[0075] Example 3 is a power semiconductor package according to Example 2, wherein the polymer is one or more of silicone, polyimide, epoxy, acrylate, and polyurethane.

[0076] Example 4 is a power semiconductor package according to one of the aforementioned examples, wherein the voltage stabilizing additive includes one or more of thioxanthone, benzil, benzophenone, acetophenone, nitrated aromatic structure, halogenated aromatic, fullerene, SiO2 particles, polycyclic aromatic, phenylenediamine, methylated phenothiazine and malononitrile.

[0077] Example 5 is a power semiconductor package according to one of Examples 2 to 4, wherein the voltage stabilizing additive is covalently bonded into the polymer matrix of the polymer.

[0078] Example 6 is a power semiconductor package according to one of the aforementioned examples, further comprising: a plastic frame forming a cavity, wherein the encapsulant is arranged in the cavity, and wherein the plastic frame includes a voltage stabilizing additive, and the voltage stabilizing additive is configured to minimize or eliminate local discharge within the plastic frame.

[0079] Example 7 is a power semiconductor package according to Example 6, wherein the plastic frame includes a voltage stabilizing additive different from the encapsulant.

[0080] Example 8 is a power semiconductor package according to one of the preceding examples, wherein the content of the voltage stabilizing additive in the encapsulant is in a range of 0.1 wt % to 10 wt %.

[0081] Example 9 is a power semiconductor package according to one of the aforementioned examples, the encapsulation comprising a passivating organic coating, the passivating organic coating being arranged at the edge of the power semiconductor chip and / or at the edge and / or at the groove of the substrate, wherein the passivating organic coating comprises a voltage stabilizing additive.

[0082] Example 10 is a power semiconductor package according to Example 9, wherein the passivating organic coating has a different material composition than the rest of the encapsulation.

[0083] Example 11 is a method for manufacturing a power semiconductor package, the method comprising: providing a substrate, arranging a power semiconductor chip on the substrate, and encapsulating the power semiconductor chip with an encapsulant, wherein the encapsulant includes a voltage-stabilizing additive configured to minimize or eliminate local discharge within the encapsulant.

[0084] Example 12 is a method according to Example 11, wherein the encapsulant comprises a polymer, and wherein the voltage stabilizing additive is covalently bound to a polymer matrix of the polymer.

[0085] Example 13 is a method according to Example 11 or Example 12, wherein the voltage-stabilizing additive includes one or more of thioxanthone, benzil, benzophenone, acetophenone, nitrated aromatic structure, halogenated aromatic, fullerene, SiO2 particles, polycyclic aromatic, phenylenediamine, methylated phenothiazine and malononitrile.

[0086] Example 14 is a method according to one of Examples 11 to 13, further comprising: adding a voltage stabilizing additive to the encapsulant before encapsulating the power semiconductor chip, wherein the voltage stabilizing additive is added to the encapsulant in powder form, or wherein the voltage stabilizing additive is added to the encapsulant dissolved in a solvent.

[0087] Example 15 is use of a voltage stabilizing additive in a power semiconductor package, the voltage stabilizing additive being configured to minimize or eliminate partial discharge within an encapsulant of the power semiconductor package.

[0088] Example 16 is an apparatus comprising means for performing a method according to one of Examples 11 to 14.

[0089] Although the present disclosure has been shown and described with respect to one or more embodiments, changes and / or modifications may be made to the illustrated examples without departing from the spirit and scope of the appended claims. In particular, with respect to the various functions performed by the above-mentioned components or structures (assemblies, devices, circuits, systems, etc.), unless otherwise indicated, the terms used to describe these components (including references to "modules") are intended to correspond to any component or structure (e.g., functionally equivalent) that performs the specified functions of the components, even if structurally not equivalent to the disclosed structures that perform the functions in the exemplary embodiments shown herein of the present disclosure.

Claims

1. A power semiconductor package, comprising: Substrate, a power semiconductor chip arranged on the substrate, and an encapsulant for encapsulating the power semiconductor chip, wherein the encapsulant comprises a polymer, wherein the encapsulant includes a voltage stabilizing additive configured to minimize or eliminate partial discharge within the encapsulant, and wherein the voltage stabilizing additive is covalently bonded into a polymer matrix of the polymer.

2. The power semiconductor package according to claim 1, wherein: The polymer is one or more of silicone, polyimide, epoxy, acrylate and polyurethane.

3. The power semiconductor package according to claim 1, wherein: The voltage-stabilizing additive includes one or more of thioxanthone, benzil, benzophenone, acetophenone, nitrated aromatic structure, halogenated aromatic, fullerene, SiO2 particles, polycyclic aromatic, phenylenediamine, methylated phenothiazine and malononitrile.

4. The power semiconductor package according to one of claims 1 to 2, further comprising: A plastic frame forms a cavity, wherein the encapsulant is disposed in the cavity, and wherein the plastic frame includes the voltage stabilizing additive, the voltage stabilizing additive being configured to minimize or eliminate partial discharge within the plastic frame.

5. The power semiconductor package according to claim 4, wherein: The plastic frame includes a voltage stabilizing additive different from the encapsulant.

6. The power semiconductor package according to one of claims 1 to 2, wherein: The content of the voltage-stabilizing additive in the encapsulant is in the range of 0.1 wt % to 10 wt %.

7. The power semiconductor package according to one of claims 1 to 2, wherein: The encapsulation comprises a passivating organic coating, which is arranged at the edge of the power semiconductor chip and / or at the edge and / or at the groove of the substrate, Wherein, the passivation organic coating includes the voltage-stabilizing additive.

8. The power semiconductor package according to claim 7, wherein: The passivating organic coating has a different material composition than the remainder of the encapsulation.

9. A method for manufacturing a power semiconductor package, the method comprising: providing a substrate, Arranging a power semiconductor chip on the substrate, and encapsulating the power semiconductor chip with an encapsulant, wherein the encapsulant includes a voltage stabilizing additive configured to minimize or eliminate partial discharge within the encapsulant, wherein the encapsulant comprises a polymer, and wherein the voltage stabilizing additive is covalently bound into a polymer matrix of the polymer.

10. The method according to claim 9, wherein: The voltage-stabilizing additive includes one or more of thioxanthone, benzil, benzophenone, acetophenone, nitrated aromatic structure, halogenated aromatic, fullerene, SiO2 particles, polycyclic aromatic, phenylenediamine, methylated phenothiazine and malononitrile.

11. The method according to one of claims 9 to 10, further comprising: Before encapsulating the power semiconductor chip, adding the voltage stabilizing additive to the encapsulant, wherein the voltage-stabilizing additive is added to the encapsulating agent in the form of a powder, or wherein the voltage-stabilizing additive is added to the encapsulating agent dissolved in a solvent.

12. Use of a voltage stabilizing additive in a power semiconductor package, the voltage stabilizing additive being configured to minimize or eliminate partial discharge within an encapsulant of the power semiconductor package, in, The encapsulant comprises a polymer, and wherein the voltage stabilizing additive is covalently bound into a polymer matrix of the polymer.

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