Gate driving device and gate driving method, power semiconductor module and power conversion device

By precharging the semiconductor device before the drive branch is disconnected in the half-bridge circuit, the negative-side gate surge voltage problem of the SiC-MOSFET is solved, achieving reliability protection for the switching element.

CN113497546BActive Publication Date: 2025-09-30HITACHI POWER SEMICON DEVICE LTD
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Patent Information

Application Number
CN202110186742.8
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Priority Date
2020-03-18
Filing Date
2021-02-18
Publication Date
2025-09-30
Estimated Expiration
2041-02-18

AI Technical Summary

Technical Problem

In a half-bridge circuit, the negative-side gate surge voltage of a SiC-MOSFET can easily exceed the rated voltage, leading to failure or characteristic degradation of the switching element. This risk increases particularly during high-speed switching.

Method used

Before the drive branch starts to disconnect, the gate drive device charges the main terminal and gate terminal of the semiconductor device to a voltage value that is greater than the negative voltage of the gate negative power supply in the positive direction and smaller than the gate threshold voltage to suppress the negative side gate surge voltage.

Benefits of technology

The negative-side gate surge voltage is effectively suppressed, false triggering and characteristic degradation of the switching element are prevented, and the reliability of the switching element is improved.

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Abstract

The present invention provides a gate drive device and gate drive method, a power semiconductor module, and a power conversion device capable of suppressing negative-side gate surge voltage. The gate drive device drives a semiconductor device constituting a branch in the power conversion device. Before the drive branch begins to disconnect, the voltage (VgsH) between the main terminal of one semiconductor device and the gate terminal of the semiconductor device in the paired branch is charged to a voltage value that is positively greater (+α) than the negative voltage of the gate negative power supply (-Vgsn1) and less than the gate threshold voltage (Vgs(th)1) of the semiconductor device.
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