Adapter plate, forming method thereof, packaging method and packaging structure
By etching the base of the adapter plate to form interconnection zone and capacitor zone trenches, and forming capacitors in the capacitor zone, integrating the process flow of capacitors and adapter plates, the signal delay and power consumption problems caused by the long distance between the capacitor and the chip are solved, and more efficient process integration and performance improvement are achieved.
Patent Information
- Application Number
- CN202010571641.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2020-06-22
- Publication Date
- 2025-08-19
- Estimated Expiration
- 2040-06-22
AI Technical Summary
In the prior art, the distance between the capacitor and the chip in the package structure of the silicon interposer layer is relatively long, resulting in increased signal delay and power consumption, and the process of forming capacitors is complicated, which increases the process flow and cost.
Etching is performed on the front of the substrate of the adapter plate to form trenches of the interconnection zone and the capacitor region, and forming capacitors in the capacitor region, integrating the process flow of the capacitor and the adapter plate, eliminating the additional step of forming capacitors, and thinning the back of the substrate to expose the through-hole interconnection structure by forming a conductive via and through-hole interconnection structure in the substrate.
By integrating the process flow of capacitors and adapter boards, the process cost and production cycle are reduced, the functional diversity and performance of adapter boards are improved, the distance between the capacitor and the chip is shortened, and the signal transmission rate is improved.