Display device

By using an inverted element structure and auxiliary layer design, the problem of uneven current caused by the degradation of the threshold voltage of the light-emitting element in NMOS transistor-driven display devices is solved, thereby improving luminous efficiency and circuit performance.

CN114068630BActive Publication Date: 2026-07-24SAMSUNG DISPLAY CO LTD
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
SAMSUNG DISPLAY CO LTD
Filing Date
2021-06-11
Publication Date
2026-07-24

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Abstract

The present application relates to a display device. The display device includes a base layer including a first emission area and a second emission area; a first electrode and a second electrode; a first organic layer in the first emission area; and a second organic layer in the second emission area. The first organic layer includes a first electron transport layer; a first auxiliary layer on the first electron transport layer; a first emission layer on the first auxiliary layer; a second auxiliary layer on the first emission layer; and a first hole transport layer on the second auxiliary layer. The second organic layer includes a second electron transport layer; a third auxiliary layer on the second electron transport layer; a second emission layer on the third auxiliary layer; a fourth auxiliary layer on the second emission layer; and a second hole transport layer on the fourth auxiliary layer.
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Description

[0001] Cross-references to related applications

[0002] This application claims priority and benefit to Korean Patent Application No. 10-2020-0098787, filed on August 6, 2020, with the Korean Intellectual Property Office, the entire contents of which are incorporated herein by reference. Technical Field

[0003] This disclosure relates to a display device, and more specifically, to a display device having an inverted element structure with improved efficiency. Background Technology

[0004] Various types of display devices have been developed and are under development for multimedia devices such as televisions, mobile phones, tablet computers, navigation systems, and game consoles. Self-emissive display elements are used in these devices. These elements emit light using luminescent materials containing organic compounds.

[0005] Display devices are equipped with light-emitting elements and thin-film transistors (TFTs) that drive the light-emitting elements. TFTs can be PMOS transistors or NMOS transistors, which are based on charge carriers or doped with impurities. Because PMOS transistors use holes as charge carriers, while NMOS transistors use electrons, NMOS transistors have a faster mobility than PMOS transistors, and therefore are advantageous for high-speed driving.

[0006] In light-emitting elements (LEDs), the threshold voltage changes as current flows for an extended period. In NMOS transistors, because the organic light-emitting element (OLED) is located on the source side of the thin-film transistor (TFT), the voltage on the source side of the TFT changes when the threshold voltage of the OLED deteriorates. Therefore, even when the same data voltage is applied to the gate of the TFT, the voltage between the gate and source changes, resulting in uneven current flow within the OLED. It is necessary and desirable to use an inverted element structure to achieve a circuit where the degradation of the LED does not affect the performance of the NMOS driver circuit. Summary of the Invention

[0007] This disclosure provides a display device having an inverted element structure that can be applied to a circuit layer including NMOS transistors.

[0008] This disclosure also provides a light-emitting element and a display device including the light-emitting element, wherein an auxiliary layer is disposed adjacent to the emitting layer in the inverted element structure, thereby improving the luminous efficiency.

[0009] Embodiments of this disclosure provide a display device, which may include: a base layer including a first emitting region and a second emitting region; a first electrode disposed on the base layer; a second electrode disposed on the first electrode and facing the first electrode; a first organic layer disposed between the first electrode and the second electrode and disposed in the first emitting region; and a second organic layer disposed between the first electrode and the second electrode and disposed in the second emitting region. The first organic layer may include: a first electron transport layer disposed on the first electrode; a first auxiliary layer disposed on the first electron transport layer; a first emitting layer disposed on the first auxiliary layer and emitting first light; a second auxiliary layer disposed on the first emitting layer; and a first hole transport layer disposed on the second auxiliary layer. The second organic layer may include: a second electron transport layer disposed on the first electrode; a third auxiliary layer disposed on the second electron transport layer; a second emitting layer disposed on the third auxiliary layer and emitting second light having a wavelength different from the wavelength of the first light; a fourth auxiliary layer disposed on the second emitting layer; and a second hole transport layer disposed on the fourth auxiliary layer.

[0010] In an embodiment, the thickness of the first organic layer can be in the range of about 250 nm to about 290 nm, and the thickness of the second organic layer can be in the range of about 210 nm to about 250 nm.

[0011] In this implementation, the thickness of the first auxiliary layer and the thickness of the third auxiliary layer can be different from each other.

[0012] In this implementation, the thickness of the second auxiliary layer and the thickness of the fourth auxiliary layer can be different from each other.

[0013] In this embodiment, the first auxiliary layer and the third auxiliary layer may include electron transport materials, and the second auxiliary layer and the fourth auxiliary layer may include hole transport materials.

[0014] In an implementation, the first electrode may be a reflective electrode, the second electrode may be a semi-transmissive / semi-reflective electrode or a transmissive electrode, and the first light and the second light may be emitted in a direction from the first electrode to the second electrode.

[0015] In an embodiment, the display device may further include a circuit layer disposed on the base layer and including transistors electrically connected to the first electrode.

[0016] In this implementation, the transistor may be an NMOS transistor.

[0017] In an implementation, the wavelength of the first light can be in the range of about 625 nm to about 675 nm, and the wavelength of the second light can be in the range of about 500 nm to about 570 nm.

[0018] In one embodiment, the first organic layer may include a first electron injection layer disposed between the first electrode and the first electron transport layer, and the second organic layer may include a second electron injection layer disposed between the first electrode and the second electron transport layer.

[0019] In one embodiment, the first organic layer may include a first hole injection layer disposed between the second electrode and the first hole transport layer, and the second organic layer may include a second hole injection layer disposed between the second electrode and the second hole transport layer.

[0020] In an embodiment, the display device may further include a third organic layer disposed between the first electrode and the second electrode and disposed in a third emission region on the base layer. The third organic layer may include: a third electron transport layer disposed on the first electrode; a third emission layer disposed on the third electron transport layer and emitting third light; and a third hole transport layer disposed on the third emission layer, and the thickness of the third organic layer may be in the range of about 160 nm to about 200 nm.

[0021] In an implementation, the wavelength of the third light can be in the range of about 410 nm to about 480 nm.

[0022] In an embodiment, the display device may further include a capping layer disposed on the second electrode, wherein the capping layer may have a refractive index of about 1.6 or greater.

[0023] In this embodiment, the first electron transport layer and the second electron transport layer can be integrated with each other, and the first hole transport layer and the second hole transport layer can be integrated with each other.

[0024] In an embodiment, the display device may further include a pixel defining film disposed on a base layer. Openings may be defined in the pixel defining film corresponding to the first and second emission regions. At least a portion of each of the first electron transport layer, the second electron transport layer, the first hole transport layer, and the second hole transport layer may be disposed on the pixel defining film.

[0025] In one embodiment, the first opening corresponding to the first emission region and the second opening corresponding to the second emission region can be defined in a pixel defining film. The first auxiliary layer, the first emission layer and the second auxiliary layer can be disposed in the first opening, and the third auxiliary layer, the second emission layer and the fourth auxiliary layer can be disposed in the second opening.

[0026] In an embodiment, the display device may include: a base layer including a first emitting region and a second emitting region; a circuit layer disposed on the base layer and including a plurality of transistors; a first electrode disposed on the circuit layer; an electron injection layer disposed on the first electrode; an electron transport layer disposed on the electron injection layer; a first emitting layer disposed on the electron transport layer, overlapping the first emitting region, and emitting first light; a second emitting layer disposed on the electron transport layer, overlapping the second emitting region, and emitting second light having an emission wavelength different from the emission wavelength of the first light; a hole transport layer disposed on the first emitting layer and the second emitting layer; a hole injection layer disposed on the hole transport layer; a second electrode disposed on the hole injection layer; a first auxiliary layer disposed between the electron transport layer and the first emitting layer; a second auxiliary layer disposed between the hole transport layer and the first emitting layer; a third auxiliary layer disposed between the electron transport layer and the second emitting layer; and a fourth auxiliary layer disposed between the hole transport layer and the second emitting layer.

[0027] In an implementation, the first electrode may be a reflective electrode, the second electrode may be a semi-transmissive / semi-reflective electrode or a transmissive electrode, and the first light and the second light may be emitted in a direction from the first electrode to the second electrode.

[0028] In one embodiment, at least one of the plurality of transistors may be an NMOS transistor, and the first electrode may be electrically connected to the NMOS transistor. Attached Figure Description

[0029] The accompanying drawings are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification. The drawings illustrate embodiments of the present disclosure and, together with the description, serve to explain the principles of the invention. In the drawings:

[0030] Figure 1 This is a plan view of the display device according to the embodiment;

[0031] Figure 2 This is a cross-sectional view of a display device according to an embodiment;

[0032] Figure 3 This is a cross-sectional view of a display device according to an embodiment;

[0033] Figures 4 to 13 This is a schematic diagram of a light-emitting element according to an embodiment; and

[0034] Figure 14 This is a comparison graph showing the efficiency characteristics of the light-emitting elements in the comparative and example examples. Detailed Implementation

[0035] The implementation can be modified in many alternative forms. Embodiments are disclosed in the specification with reference to the accompanying drawings. However, it should be understood that this disclosure is not intended to limit this disclosure to the specific forms disclosed, but rather to cover all modifications, equivalents, and substitutions falling within the spirit and scope of the invention.

[0036] In this specification, when a component (or area, layer, portion, etc.) is referred to as being "on," "connected to," or "attached to" another component, it means that the component can be directly connected to or directly attached to the other component, or a third component can be disposed between them. Furthermore, when a component is referred to as being "in contact" or "contacted" with another component, the component can be in "electrical contact" or "physical contact" with the other component; or in "indirect contact" or "direct contact" with the other component.

[0037] In the specification and claims, for purposes of meaning and interpretation, the phrase “at least one of…” is intended to include the meaning of “at least one selected from the group of…”. For example, “at least one of A and B” can be understood to mean “A, B, or A and B”.

[0038] In the specification and claims, for purposes of meaning and interpretation, the term "and / or" is intended to include any combination of the terms "and" and "or". For example, "A and / or B" can be understood to mean "A, B, or A and B". The terms "and" and "or" can be used in a combined or separate sense and can be understood as equivalent to "and / or".

[0039] The same reference numerals denote the same elements. Furthermore, in the accompanying drawings, the thickness, scale, and dimensions of the elements are exaggerated in order to effectively depict the technical content.

[0040] It should be understood that although the terms “first,” “second,” etc., may be used herein to describe various elements, these elements should not be limited by these terms. These terms are used only to distinguish one element from another. For example, without departing from the scope of the invention, a first element may be referred to as a second element, and similarly, a second element may be referred to as a first element. Singular terms may include plural forms unless the context clearly indicates otherwise.

[0041] Furthermore, terms such as “below,” “lower,” “above,” and “upper” are used to describe the relationships of the configurations shown in the accompanying drawings. These terms are used as relative concepts and are described with reference to the directions shown in the accompanying drawings.

[0042] It should be understood that the terms “comprising” or “having” are intended to specify the presence of features, integrals, steps, operations, elements, components or combinations thereof stated in this disclosure, but do not exclude the presence or addition of one or more other features, integrals, steps, operations, elements, components or combinations thereof.

[0043] In the following description, a display device according to an embodiment will be described with reference to the accompanying drawings.

[0044] Figure 1 This is a schematic plan view of a display device DD according to an embodiment. Figure 2 yes Figure 1 The image shows a cross-sectional view of the display device DD.

[0045] like Figure 1 As shown, the display device DD can display an image via the display surface DP-IS. The display surface DP-IS may be parallel to the plane defined by the first direction DR1 and the second direction DR2. The display surface DP-IS may include a display area DA and a non-display area NDA. Pixels PX are disposed in the display area DA. The non-display area NDA is defined along the edge of the display surface DP-IS. The non-display area NDA is adjacent to the display area DA. The non-display area NDA may surround the display area DA.

[0046] The normal direction of the display surface DP-IS (i.e., the thickness direction of the display device DD) corresponds to the third direction DR3. The front (or upper) and rear (or lower) surfaces of each of the layers or cells described below are separated by the third direction DR3. The front and rear surfaces may be opposite each other on the third direction DR3. The first direction DR1, the second direction DR2, and the third direction DR3 may be opposite directions and may be defined differently. In this embodiment, a display device DD with a flat display surface DP-IS is shown, but the embodiment is not limited thereto. The display device DD may include a curved display surface or a three-dimensional display surface. A three-dimensional display surface may include display areas facing different directions.

[0047] Figure 2 It shows along Figure 1 The schematic cross-section of the display device DD, taken by line I-I', is shown. The display device DD of the embodiment includes light-emitting elements ED-1, ED-2, and ED-3. At least one of the light-emitting elements ED-1, ED-2, and ED-3 may include auxiliary layers PL1, PL2, PL3, and PL4. Figure 2 In the example, the first light-emitting element ED-1 includes a first auxiliary layer PL1 and a second auxiliary layer PL2, and the second light-emitting element ED-2 includes a third auxiliary layer PL3 and a fourth auxiliary layer PL4. Although Figure 2The third light-emitting element ED-3 is shown to not include an auxiliary layer, but the third light-emitting element ED-3 may also include an auxiliary layer.

[0048] According to an embodiment, the display panel DP of the display device DD may include a base layer BS, a circuit layer DP-CL disposed on the base layer BS, and a display element layer DP-ED disposed on the circuit layer DP-CL. The base layer BS can provide a base surface on which the display element layer DP-ED is disposed. The base layer BS may be a glass substrate, a metal substrate, a plastic substrate, etc. However, the embodiment is not limited to this.

[0049] In this implementation, the circuit layer DP-CL may be disposed on the base layer BS. The circuit layer DP-CL may include transistors (not shown). Each transistor (not shown) may include a control electrode, an input electrode, and an output electrode. For example, the circuit layer DP-CL may include a switching transistor and a driving transistor to drive the light-emitting elements ED-1, ED-2, and ED-3 of the display element layer DP-ED.

[0050] The display element layer DP-ED of the embodiment may include a pixel defining film PDL, light-emitting elements ED-1, ED-2 and ED-3 separated by the pixel defining film PDL, and an encapsulation layer TFE disposed on the light-emitting elements ED-1, ED-2 and ED-3.

[0051] Each of the light-emitting elements ED-1, ED-2, and ED-3 may include a first electrode EL1, a second electrode EL2 facing the first electrode EL1, and an emitting layer EML disposed between the first electrode EL1 and the second electrode EL2. An electron transport region ETR is disposed between the first electrode EL1 and the emitting layer EML. A hole transport region HTR is disposed between the second electrode EL2 and the emitting layer EML. In an embodiment, the light-emitting elements ED-1, ED-2, and ED-3 may emit light in a direction from the first electrode EL1 to the second electrode EL2. The light-emitting elements ED-1, ED-2, and ED-3 of the embodiment may have an inverted element structure along the direction of light emission, wherein the electron transport region ETR is disposed below the emitting layer EML, and the hole transport region HTR is disposed above the emitting layer EML.

[0052] Light-emitting elements ED-1 and ED-2 include auxiliary layers PL1, PL2, PL3, and PL4. The first auxiliary layer PL1 is disposed between the first electron transport region ETR1 and the first emitter layer EML-R of the first light-emitting element ED-1. The second auxiliary layer PL2 is disposed between the first hole transport region HTR1 and the first emitter layer EML-R of the first light-emitting element ED-1. The third auxiliary layer PL3 is disposed between the second electron transport region ETR2 and the second emitter layer EML-G of the second light-emitting element ED-2. The fourth auxiliary layer PL4 is disposed between the second hole transport region HTR2 and the second emitter layer EML-G of the second light-emitting element ED-2.

[0053] Figure 2 The thicknesses of the first auxiliary layer PL1, the second auxiliary layer PL2, the third auxiliary layer PL3, and the fourth auxiliary layer PL4 are shown to be similar, but the implementation is not limited to this. For example, the thickness of at least one of the auxiliary layers PL1, PL2, PL3, and PL4 may differ from the thicknesses of the other auxiliary layers, or the thicknesses of the auxiliary layers PL1, PL2, PL3, and PL4 may differ from each other depending on the positions of the first emitter layer EML-R and the second emitter layer EML-G. The thicknesses of the first auxiliary layer PL1, the second auxiliary layer PL2, the third auxiliary layer PL3, and the fourth auxiliary layer PL4 may be the thicknesses when viewed in a plane defined by the third-party direction DR3 or when measured on the third-party direction DR3.

[0054] Figure 2An embodiment is illustrated in which the emitting layers EML-R, EML-G, and EML-B of light-emitting elements ED-1, ED-2, and ED-3 are disposed in openings OH1, OH2, and OH3 defined by a pixel-defining film PDL, and the first electron transport region ETR1, the second electron transport region ETR2, the third electron transport region ETR3, the first hole transport region HTR1, the second hole transport region HTR2, the third hole transport region HTR3, and the second electrode EL2 are configured as a common layer in all light-emitting elements ED-1, ED-2, and ED-3. For example, at least a portion of each of the first electron transport region ETR1 of the first light-emitting element ED-1, the second electron transport region ETR2 of the second light-emitting element ED-2, and the third electron transport region ETR3 of the third light-emitting element ED-3 can be disposed on the pixel-defining film PDL, and each of the first electron transport region ETR1, the second electron transport region ETR2, and the third electron transport region ETR3 can be connected to each other on the pixel-defining film PDL to be integrated with each other. Furthermore, at least a portion of each of the first hole transport region HTR1 of the first light-emitting element ED-1, the second hole transport region HTR2 of the second light-emitting element ED-2, and the third hole transport region HTR3 of the third light-emitting element ED-3 can be disposed on the pixel defining film PDL, and the first hole transport region HTR1, the second hole transport region HTR2, and the third hole transport region HTR3 can each be connected to each other on the pixel defining film PDL to form an integral unit.

[0055] However, the implementation method is not limited to this, and is related to Figure 2 The features shown differ, and the electron transport region (ETR) and hole transport region (HTR) can be formed by patterning within openings OH1, OH2, and OH3 defined in the pixel-defining film (PDL). For example, the first electron transport region (ETR1), the second electron transport region (ETR2), and the third electron transport region (ETR3) of light-emitting elements ED-1, ED-2, and ED-3, the emitting layers EML-R, EML-G, and EML-B, and the first hole transport region (HTR1), the second hole transport region (HTR2), and the third hole transport region (HTR3) are patterned by an inkjet printing method to be formed within each of the first opening OH1, the second opening OH2, and the third opening OH3.

[0056] In this embodiment, for the first light-emitting element ED-1, the first auxiliary layer PL1, the first emitting layer EML-R, and the second auxiliary layer PL2 can be disposed in the first opening OH1. For the second light-emitting element ED-2, the third auxiliary layer PL3, the second emitting layer EML-G, and the fourth auxiliary layer PL4 can be disposed in the second opening OH2. For the third light-emitting element ED-3, the third emitting layer EML-B can be disposed in the third opening OH3. If an auxiliary layer adjacent to the third emitting layer EML-B is provided for the third light-emitting element ED-3, then the auxiliary layer of the third light-emitting element ED-3 can also be disposed in the third opening OH3.

[0057] The encapsulation layer TFE can cover the light-emitting elements ED-1, ED-2, and ED-3. The encapsulation layer TFE can seal the display element layer DP-ED. The encapsulation layer TFE can be a thin-film encapsulation layer. The encapsulation layer TFE can be a single layer or a stack of multiple layers. The encapsulation layer TFE can include at least one insulating layer. According to embodiments, the encapsulation layer TFE can include at least one inorganic film (hereinafter referred to as the encapsulation inorganic film). According to embodiments, the encapsulation layer TFE can also include at least one organic film (hereinafter referred to as the encapsulation organic film) and at least one encapsulation inorganic film.

[0058] An inorganic encapsulation film protects the display element layer (DP-ED) from moisture and / or oxygen, while an organic encapsulation film protects the DP-ED from impurities such as dust particles. The inorganic encapsulation film may include silicon nitride, silicon oxynitride, silicon oxide, titanium dioxide, aluminum oxide, etc., but is not specifically limited to these. The organic encapsulation film may include acrylic compounds, epoxy compounds, etc. The organic encapsulation film may include photopolymerizable organic materials, but is not specifically limited to these.

[0059] The encapsulation layer TFE can be disposed on the second electrode EL2, and can be configured to fill the openings OH1, OH2 and OH3.

[0060] Reference Figure 1 and Figure 2 The display device DD may include a non-emitting region NPXA and emitting regions PXA-R, PXA-G, and PXA-B. Each of the emitting regions PXA-R, PXA-G, and PXA-B may be an area that emits light generated from each of the light-emitting elements ED-1, ED-2, and ED-3. The multiple emitting regions PXA-R, PXA-G, and PXA-B may be spaced apart from each other in a plane.

[0061] Each of the light-emitting regions PXA-R, PXA-G, and PXA-B can be a region defined by a pixel-defining film PDL. The non-light-emitting region NPXA can be the region between adjacent light-emitting regions PXA-R, PXA-G, and PXA-B, and can correspond to the pixel-defining film PDL. In this specification, each of the light-emitting regions PXA-R, PXA-G, and PXA-B can correspond to a pixel PX. The pixel-defining film PDL can separate light-emitting elements ED-1, ED-2, and ED-3. The multiple emitting layers EML-R, EML-G, and EML-B of light-emitting elements ED-1, ED-2, and ED-3 can be disposed in openings OH1, OH2, and OH3 defined by the pixel-defining film PDL to separate them from each other.

[0062] Based on the color of the light emitted from the light-emitting elements ED-1, ED-2, and ED-3, the emitting regions PXA-R, PXA-G, and PXA-B can be grouped. Figure 1 and Figure 2 In the display device DD of the embodiment shown, three light-emitting regions PXA-R, PXA-G, and PXA-B are shown, emitting red, green, and blue light respectively. For example, the display device DD of the embodiment may include red light-emitting region PXA-R, green light-emitting region PXA-G, and blue light-emitting region PXA-B that are distinct from each other.

[0063] In the display device DD according to the embodiment, light-emitting elements ED-1, ED-2, and ED-3 can emit light of different wavelength bands. For example, in the embodiment, the display device DD may include a first light-emitting element ED-1 that emits red light, a second light-emitting element ED-2 that emits green light, and a third light-emitting element ED-3 that emits blue light. For example, the red emitting region PXA-R, the green emitting region PXA-G, and the blue emitting region PXA-B of the display device DD can correspond to the first light-emitting element ED-1, the second light-emitting element ED-2, and the third light-emitting element ED-3, respectively.

[0064] According to the embodiment, the multiple light-emitting regions PXA-R, PXA-G, and PXA-B in the display device DD can be arranged in a stripe pattern. (Refer to...) Figure 1 The red emitting region PXA-R, the green emitting region PXA-G, and the blue emitting region PXA-B can each be arranged along the second direction DR2. The red emitting region PXA-R, the green emitting region PXA-G, and the blue emitting region PXA-B can be arranged alternately along the first direction DR1.

[0065] Figure 1 and Figure 2It is shown that all luminescent regions PXA-R, PXA-G, and PXA-B have similar areas, but the implementation is not limited to this. For example, the luminescent regions PXA-R, PXA-G, and PXA-B may have different areas depending on the wavelength range of the emitted light. The areas of the luminescent regions PXA-R, PXA-G, and PXA-B can be represented as the areas when viewed in a plane defined by the first direction DR1 and the second direction DR2.

[0066] The arrangement of the luminescent regions PXA-R, PXA-G, and PXA-B is not limited to... Figure 1 The features shown can be configured such that the arrangement order of the red emitting areas PXA-R, green emitting areas PXA-G, and blue emitting areas PXA-B can be varied according to the required display quality in the display device DD. For example, the arrangement of the emitting areas PXA-R, PXA-G, and PXA-B can be... Arrangement pattern or diamond arrangement pattern.

[0067] The display device DD of the embodiment may include a base substrate BL disposed on the display panel DP. However, the embodiment is not limited to this.

[0068] The base substrate BL can be a glass substrate, a metal substrate, a plastic substrate, etc. The base substrate BL can be a component that provides a base surface on which a polarizing layer POL is disposed.

[0069] The display device DD of the embodiment may further include a polarizing layer POL. The polarizing layer POL can block external light incident on the display device DD. The polarizing layer POL can block a portion of the external light. The polarizing layer POL can reduce reflected light generated in the display panel DP caused by external light. For example, the polarizing layer POL can be used to block reflected light that enters the display panel DP from the outside of the display panel DP and then leaves again.

[0070] Figure 2 The diagram shows a polarizing layer POL disposed on and exposed on a base substrate BL, but the implementation is not limited to this. For example, the polarizing layer POL may be disposed below the base substrate BL.

[0071] Figure 2 The illustration shows a display device DD including a polarizing layer POL, but embodiments are not limited to this, and the polarizing layer POL may be omitted. Although not shown, in embodiments, the display device DD may not include the polarizing layer POL and may include a color filter layer. The color filter layer may include a color filter portion corresponding to each of the red emitting regions PXA-R, the green emitting regions PXA-G, and the blue emitting regions PXA-B. The color filter layer may include a light-shielding portion overlapping the non-emitting region NPXA.

[0072] Figure 3 This is a schematic cross-sectional view of a display device DD according to an embodiment. Figure 3 It shows along Figure 1 A schematic cross-sectional view of the portion cut off by line II-II'.

[0073] Reference Figure 3 The circuit layer DP-CL of the display device DD may include a buffer layer BFL, a first gate insulating layer GI1, a second gate insulating layer GI2, an interlayer insulating layer ILD, an upper insulating layer VIA1, a patterned semiconductor pattern ACP, a patterned first conductive layer CLP1, a patterned second conductive layer CLP2, and a patterned third conductive layer CLP3. Here, the first conductive layer CLP1 may include a first gate metal pattern, the second conductive layer CLP2 may include a second gate metal pattern, and the third conductive layer CLP3 may include a first data metal pattern.

[0074] In one embodiment, each of the first gate insulating layer GI1, the second gate insulating layer GI2, and the interlayer insulating layer ILD includes an organic film and / or an inorganic film. In another embodiment, each of the first gate insulating layer GI1, the second gate insulating layer GI2, and the interlayer insulating layer ILD may include an inorganic film. The inorganic film may include a silicon nitride layer and a silicon oxide layer. In another embodiment, each of the first conductive layer CLP1 and the second conductive layer CLP2 may include molybdenum (Mo), but the embodiment is not limited thereto.

[0075] In some embodiments, the third conductive layer CLP3 may include at least one of aluminum (Al) and titanium (Ti), but the embodiments are not limited thereto. In some embodiments, the third conductive layer CLP3 may have a structure in which titanium, aluminum and titanium are stacked (e.g., sequentially stacked).

[0076] A buffer layer BFL can be disposed on the base layer BS. The buffer layer BFL may include a first buffer layer and a second buffer layer. The second buffer layer may be disposed on the first buffer layer. The buffer layer BFL can prevent impurities present in the base layer BS from being introduced into the pixel PX. For example, the buffer layer BFL can prevent impurities from diffusing into the semiconductor pattern ACP of the transistors T1 and T2 constituting the pixel PX.

[0077] Impurities can be introduced from the outside or generated during the thermal decomposition of the base layer (BS). Impurities can be gases or sodium emitted from the base layer (BS). The buffer layer (BFL) prevents moisture from being introduced into the pixel (PX) from the outside.

[0078] In this implementation, the semiconductor pattern ACP can be disposed on the buffer layer BFL.

[0079] The semiconductor pattern ACP can form each of transistors T1 and T2. The semiconductor pattern ACP can include polycrystalline silicon, amorphous silicon, or metal-oxide-semiconductor. Figure 3 The semiconductor pattern ACP constituting the source S1, active region C1 and drain D1 of the first transistor T1 and the semiconductor pattern ACP constituting the source S2, active region C2 and drain D2 of the second transistor T2 are shown.

[0080] A first gate insulating layer GI1 is disposed on the buffer layer BFL and may cover the semiconductor pattern ACP. A first conductive layer CLP1 may be disposed on the first gate insulating layer GI1. The gate G1 of the first transistor T1 and the gate G2 of the second transistor T2 are shown in the first conductive layer CLP1. Although not shown, in an embodiment, the first conductive layer CLP1 may include either of the two electrodes of the capacitor constituting the pixel PX.

[0081] A second gate insulating layer GI2 is disposed on the first gate insulating layer GI1 and may cover the first conductive layer CLP1. The second conductive layer CLP2 may be disposed on the second gate insulating layer GI2. In an embodiment, the second conductive layer CLP2 may be the other of the two electrodes of the capacitor constituting the pixel PX. The upper electrode UE is shown as the second conductive layer CLP2. An opening may be defined in the upper electrode UE.

[0082] An interlayer insulating layer (ILD) is disposed on the second gate insulating layer (GI2) and may cover the second conductive layer (CLP2). The first connection electrode (CNE-D1) of the third conductive layer (CLP3) may be connected to the source (S2) of the second transistor (T2). An upper insulating layer (VIA1) is disposed on the interlayer insulating layer (ILD) and may cover the third conductive layer (CLP3).

[0083] like Figure 3 As shown, the display element layer DP-ED may include a third light-emitting element ED-3 and a pixel-defining film PDL. The third light-emitting element ED-3 may include a first electrode EL1, a third emitting layer EML-B, and a second electrode EL2. Figure 3 In this paper, only the first electrode EL1, the third emitting layer EML-B, and the second electrode EL2, which are some components of the third light-emitting element ED-3, are shown, and the hole transport region and the electron transport region are omitted.

[0084] The first electrode EL1 may be disposed on the upper insulating layer VIA1. The first electrode EL1 may be electrically connected to at least any one of transistors T1 to T2 via a contact hole. For example, the first electrode EL1 may be connected to the first connection electrode CNE-D1 via a contact hole to be electrically connected to the second transistor T2. In an embodiment, at least one of transistors T1 to T2 may be an NMOS transistor. In an embodiment, the transistor electrically connected to the first electrode EL1 may be an NMOS transistor. For example, the second transistor T2 may be an NMOS transistor.

[0085] A pixel-defining film (PDL) can be disposed on the upper insulating layer (VIA1) and can expose at least a portion of the first electrode (EL1). A third emitter layer (EML-B) can be disposed on the first electrode (EL1). A second electrode (EL2) can be disposed on the third emitter layer (EML-B).

[0086] When the third light-emitting element ED-3 is an organic light-emitting diode (OLED), the third emitting layer EML-B may include organic materials. The encapsulation layer TFE may encapsulate the third light-emitting element ED-3 to protect it from external oxygen and / or moisture. The encapsulation layer TFE may be a layer in which organic and inorganic films are mixed.

[0087] In the following text, Figures 4 to 13 This is a schematic cross-sectional view showing light-emitting elements ED-1, ED-2, and ED-3 according to an embodiment. Referring below... Figures 4 to 13 Describes light-emitting elements according to various embodiments.

[0088] Reference Figure 4 According to an embodiment, the first light-emitting element ED-1 includes a first electrode EL1, a second electrode EL2 facing the first electrode EL1, a first emission layer EML-R disposed between the first electrode EL1 and the second electrode EL2, a first electron transport region ETR1 disposed between the first electrode EL1 and the first emission layer EML-R, and a first hole transport region HTR1 disposed between the first emission layer EML-R and the second electrode EL2. A first auxiliary layer PL1 is disposed between the first electron transport region ETR1 and the first emission layer EML-R. A second auxiliary layer PL2 is disposed between the first hole transport region HTR1 and the first emission layer EML-R. The first auxiliary layer PL1 and the second auxiliary layer PL2 are configured to contact the first emission layer EML-R.

[0089] and Figure 4 compared to, Figure 5A schematic cross-sectional view of a first light-emitting element ED-1 according to an embodiment is shown, wherein the first electron transport region ETR1 includes a first electron injection layer EIL1 and a first electron transport layer ETL1, and the first hole transport region HTR1 includes a first hole injection layer HIL1 and a first hole transport layer HTL1. Figure 5 compared to, Figure 6 A schematic cross-sectional view of a first light-emitting element ED-1, including a capping layer CPL disposed on a second electrode EL2, is shown. The embodiments are not limited thereto. For example, the first electron transport region ETR1 may also include a hole blocking layer (not shown) as a sub-organic layer, and the first hole transport region HTR1 may also include an electron blocking layer (not shown) as a sub-organic layer.

[0090] Reference Figure 7 According to an embodiment, the second light-emitting element ED-2 includes a first electrode EL1, a second electrode EL2 facing the first electrode EL1, a second emitting layer EML-G disposed between the first electrode EL1 and the second electrode EL2, a second electron transport region ETR2 disposed between the first electrode EL1 and the second emitting layer EML-G, and a second hole transport region HTR2 disposed between the second emitting layer EML-G and the second electrode EL2. A third auxiliary layer PL3 is disposed between the second emitting layer EML-G and the second electron transport region ETR2. A fourth auxiliary layer PL4 is disposed between the second emitting layer EML-G and the second hole transport region HTR2. The third auxiliary layer PL3 and the fourth auxiliary layer PL4 are configured to contact the second emitting layer EML-G.

[0091] and Figure 7 compared to, Figure 8 A schematic cross-sectional view of the second light-emitting element ED-2 according to an embodiment is shown, wherein the second electron transport region ETR2 includes a second electron injection layer EIL2 and a second electron transport layer ETL2, and the second hole transport region HTR2 includes a second hole injection layer HIL2 and a second hole transport layer HTL2. Figure 8 compared to, Figure 9 A schematic cross-sectional view of a second light-emitting element ED-2, including a capping layer CPL disposed on the second electrode EL2, is shown. The embodiments are not limited thereto. For example, the second electron transport region ETR2 may also include a hole blocking layer (not shown) as a sub-organic layer, and the second hole transport region HTR2 may also include an electron blocking layer (not shown) as a sub-organic layer.

[0092] Reference Figure 10According to the embodiment, the third light-emitting element ED-3 includes a first electrode EL1, a second electrode EL2 facing the first electrode EL1, a third emission layer EML-B disposed between the first electrode EL1 and the second electrode EL2, a third electron transport region ETR3 disposed between the first electrode EL1 and the third emission layer EML-B, and a third hole transport region HTR3 disposed between the third emission layer EML-B and the second electrode EL2.

[0093] Reference Figure 11 The third light-emitting element ED-3 in this embodiment may further include a fifth auxiliary layer PL5 and a sixth auxiliary layer PL6. The fifth auxiliary layer PL5 may be disposed between the third emitting layer EML-B and the third electron transport region ETR3, and the sixth auxiliary layer PL6 may be disposed between the third emitting layer EML-B and the third hole transport region HTR3. The fifth auxiliary layer PL5 and the sixth auxiliary layer PL6 are configured to contact the third emitting layer EML-B.

[0094] and Figure 11 compared to, Figure 12 A schematic cross-sectional view of the third light-emitting element ED-3 according to an embodiment is shown, wherein the third electron transport region ETR3 includes a third electron injection layer EIL3 and a third electron transport layer ETL3, and the third hole transport region HTR3 includes a third hole injection layer HIL3 and a third hole transport layer HTL3. Furthermore, with... Figure 12 compared to, Figure 13 A schematic cross-sectional view of a third light-emitting element ED-3, including a capping layer CPL disposed on the second electrode EL2, is shown. The embodiments are not limited thereto. For example, the third electron transport region ETR3 may also include a hole blocking layer (not shown) as a sub-organic layer, and the third hole transport region HTR3 may also include an electron blocking layer (not shown) as a sub-organic layer.

[0095] In an implementation, each of the first auxiliary layer PL1, the second auxiliary layer PL2, the third auxiliary layer PL3, the fourth auxiliary layer PL4, the fifth auxiliary layer PL5, and the sixth auxiliary layer PL6 may independently have a thickness of about 10 nm to about 30 nm.

[0096] The first auxiliary layer PL1, the third auxiliary layer PL3, and the fifth auxiliary layer PL5 may comprise the same or different materials. The second auxiliary layer PL2, the fourth auxiliary layer PL4, and the sixth auxiliary layer PL6 may comprise the same or different materials. The first auxiliary layer PL1, the third auxiliary layer PL3, and the fifth auxiliary layer PL5 may have the same or different thicknesses. The second auxiliary layer PL2, the fourth auxiliary layer PL4, and the sixth auxiliary layer PL6 may have the same or different thicknesses. The material and thickness of each of the first auxiliary layer PL1 and the second auxiliary layer PL2 may vary depending on the material included in the first emitter layer EML-R. The material and thickness of each of the third auxiliary layer PL3 and the fourth auxiliary layer PL4 may vary depending on the material included in the second emitter layer EML-G. The material and thickness of each of the fifth auxiliary layer PL5 and the sixth auxiliary layer PL6 may vary depending on the material included in the third emitter layer EML-B.

[0097] Each of the first auxiliary layer PL1, the third auxiliary layer PL3, and the fifth auxiliary layer PL5 may independently include an electron transport material, and each of the second auxiliary layer PL2, the fourth auxiliary layer PL4, and the sixth auxiliary layer PL6 may independently include a hole transport material.

[0098] In the light-emitting elements ED-1, ED-2, and ED-3 according to embodiments, the first electrode EL1 is conductive. The first electrode EL1 may be formed of a metallic material, a metal alloy, or a conductive compound. The first electrode EL1 may be an anode or a cathode. However, the embodiments are not limited thereto. The first electrode EL1 may be a pixel electrode.

[0099] In the light-emitting elements ED-1, ED-2, and ED-3 according to embodiments, the first electrode EL1 may be a reflective electrode. For example, the first electrode EL1 may include Ag, Mg, Cu, Al, Pt, Pd, Au, Ni, Nd, Ir, Cr, Li, Ca, LiF, Mo, Ti, W, or compounds or mixtures thereof (e.g., a mixture of Ag and Mg) having high reflectivity. The first electrode EL1 may have a multilayer structure, including a reflective film formed from the above-described materials and a transparent conductive film formed from indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium tin zinc oxide (ITZO), etc. For example, the first electrode EL1 may have a two-layer structure of ITO / Ag or a three-layer structure of ITO / Ag / ITO, but the embodiments are not limited thereto. For example, the first electrode EL1 may include the above-described metallic materials, a combination of at least two of the above-described metallic materials, oxides of the above-described metallic materials, etc. The thickness of the first electrode EL1 may be from approximately... to approximately For example, the thickness of the first electrode EL1 can be from approximately to approximately

[0100] Electron transport regions ETR1, ETR2, and ETR3 are disposed on the first electrode EL1. Electron transport regions ETR1, ETR2, and ETR3 may have a single layer formed of a single material, a single layer formed of different materials, or a multilayer structure (which has layers formed of different materials).

[0101] For example, electron transport regions ETR1, ETR2, and ETR3 can have single-layer electron injection layers EIL1, EIL2, and EIL3 or electron transport layers ETL1, ETL2, and ETL3, and can have a single-layer structure formed of an electron injection material or an electron transport material. The first electron transport region ETR1 can have a single-layer structure formed of different materials. The first electron transport region ETR1 can have a structure in which the first electron injection layer EIL1 and the first electron transport layer ETL1 are stacked on top of each other, or it can have a structure in which the first electron injection layer EIL1, the first electron transport layer ETL1, and the first hole blocking layer (not shown) are stacked on top of each other. The second electron transport region ETR2 can have a structure in which the second electron injection layer EIL2 and the second electron transport layer ETL2 are stacked on top of each other, or it can have a structure in which the second electron injection layer EIL2, the second electron transport layer ETL2, and the second hole blocking layer (not shown) are stacked on top of each other. The third electron transport region ETR3 may have a structure in which the third electron injection layer EIL3 and the third electron transport layer ETL3 are stacked on top of each other, or it may have a structure in which the third electron injection layer EIL3, the third electron transport layer ETL3 and the third hole blocking layer (not shown) are stacked on top of each other. However, the implementation is not limited to this.

[0102] Electronic transmission zones ETR1, ETR2, and ETR3 may have, for example, approximately to approximately The thickness.

[0103] Electron transport regions ETR1, ETR2, and ETR3 can be formed using various methods, such as vacuum deposition, spin coating, casting, Langmuir-Blodgett (LB) method, inkjet printing, laser printing, and laser-induced thermal imaging (LITI) method.

[0104] Electron transport regions ETR1, ETR2, and ETR3 may include anthracene-based compounds. However, embodiments are not limited thereto, and electron transport regions ETR1, ETR2, and ETR3 may include, for example, tris(8-hydroxyquinoline)aluminum (Alq3), 1,3,5-tris[(3-pyridyl)-benzene-3-yl]benzene, 2,4,6-tris(3'-(pyridin-3-yl)biphenyl-3-yl)-1,3,5-triazine, 2-(4-(N-phenylbenzimidazol-1-yl)phenyl)-9,10-dinaphthylanthracene, 1,3,5-tris(1-phenyl-1H-benzimidazol-2-yl)benzene (TPBi), 2,9-dimethyl-4,7-diphenyl-1,10-phenanthroline (BCP), and 4,7-diphenyl-1,10-phenanthroline (Bphe). n), 3-(4-biphenyl)-4-phenyl-5-tert-butylphenyl-1,2,4-triazole (TAZ), 4-(naphth-1-yl)-3,5-diphenyl-4H-1,2,4-triazole (NTAZ), 2-(4-biphenyl)-5-(4-tert-butylphenyl)-1,3,4-oxadiazole (tBu-PBD), bis(2-methyl-8-quinoline-N1,O8)-(1,1'-biphenyl-4-oline)aluminum (BAlq), bis(benzoquinoline-10-oline)beryllium (Bebq2), 9,10-bis(naphth-2-yl)anthracene (ADN), 1,3-bis[3,5-bis(pyridin-3-yl)phenyl]benzene (BmPyPhB) and mixtures thereof.

[0105] Electron transport regions ETR1, ETR2, and ETR3 may include metal halides such as LiF, NaCl, CsF, RbCl, RbI, CuI, and KI, lanthanides such as Yb, and co-deposited materials of metal halides and lanthanides. For example, electron transport regions ETR1, ETR2, and ETR3 may include KI:Yb, RbI:Yb, etc., as co-deposited materials. Electron transport regions ETR1, ETR2, and ETR3 may be formed using metal oxides such as Li2O and BaO or lithium 8-hydroxyquinoline (Liq), but the embodiments are not limited thereto. Electron transport regions ETR1, ETR2, and ETR3 may also be formed from a mixture of electron transport materials and insulating organometallic salts. Organometallic salts may be materials having a band gap of about 4 eV or higher. Specifically, organometallic salts may include, for example, metal acetates, metal benzoates, metal acetoacetates, metal acetylacetonates, or metal stearates.

[0106] In addition to the materials described above, the electron transport regions ETR1, ETR2 and ETR3 may also include at least one of 2,9-dimethyl-4,7-diphenyl-1,10-phenanthroline (BCP) and 4,7-diphenyl-1,10-phenanthroline (Bphen), but the embodiments are not limited thereto.

[0107] The electron transport regions ETR1, ETR2, and ETR3 may include the aforementioned compounds of the electron transport regions in at least one of the electron injection layers EIL1, EIL2, and EIL3, the electron transport layers ETL1, ETL2, and ETL3, and the hole blocking layer (not shown).

[0108] In the case where electronic transmission regions ETR1, ETR2, and ETR3 include electronic transmission layers ETL1, ETL2, and ETL3, the electronic transmission layers ETL1, ETL2, and ETL3 can have approximately to approximately (For example, about to approximately The thickness of the electron transport layers ETL1, ETL2, and ETL3 is within the aforementioned range. Satisfactory electron transport properties can be obtained without significantly increasing the driving voltage. In the case where the electron transport regions ETR1, ETR2, and ETR3 include electron injection layers EIL1, EIL2, and EIL3, the electron injection layers EIL1, EIL2, and EIL3 can have approximately... to approximately (For example, about to approximately The thickness of the electron injection layers EIL1, EIL2, and EIL3 is within the range described above. Satisfactory electron injection properties can be obtained without significantly increasing the driving voltage.

[0109] Emitter layers EML-R, EML-G, and EML-B are disposed on electron transport regions ETR1, ETR2, and ETR3. In the first light-emitting element ED-1, a first auxiliary layer PL1 is disposed between the first electron transport region ETR1 and the first emitter layer EML-R. In the second light-emitting element ED-2, a third auxiliary layer PL3 is disposed between the second electron transport region ETR2 and the second emitter layer EML-G. In the third light-emitting element ED-3, a fifth auxiliary layer PL5 may be disposed between the third electron transport region ETR3 and the third emitter layer EML-B.

[0110] The emitter layers EML-R, EML-G, and EML-B can have, for example, approximately to approximately (For example, about to approximately The thickness of the emitter layers EML-R, EML-G, and EML-B can be a single layer formed of a single material, a single layer formed of different materials, or a multi-layer structure (which has layers formed of different materials).

[0111] In the light-emitting elements ED-1, ED-2, and ED-3 of the embodiments, the emitting layers EML-R, EML-G, and EML-B may include anthracene derivatives, pyrene derivatives, fluoranthene derivatives, etc. Derivatives, dehydrobenzoxanthracene derivatives, or triphenylene derivatives. The emitter layers EML-R, EML-G, and EML-B may include anthracene derivatives or pyrene derivatives.

[0112] The emitter layers EML-R, EML-G, and EML-B may also include conventional materials. For example, the emitter layer EML may include at least one of bis[2-(diphenylphosphino)phenyl]ether oxide (DPEPO), 4,4'-bis(carbazole-9-yl)biphenyl (CBP), 1,3-bis(carbazole-9-yl)benzene (mCP), 2,8-bis(diphenylphosphino)dibenzo[b,d]furan (PPF), 4,4',4”-tris(carbazole-9-yl)triphenylamine (TCTA), and 1,3,5-tris(1-phenyl-1H-benzo[d]imidazol-2-yl)benzene (TPBi) as the host material. However, the embodiments are not limited to this; for example, the emitter layer EML may include at least one of the following: Tris(8-hydroxyquinoline)aluminum (Alq3), poly(N-vinylcarbazole) (PVK), 9,10-bis(naphthyl-2-yl)anthracene (ADN), 3-tert-butyl-9,10-bis(naphthyl-2-yl)anthracene (TBADN), stilbeneyl arylene (DSA), 4,4'-bis(9-carbazolyl)-2,2'-dimethyl-biphenyl (CDBP), 2-methyl-9,10-bis(naphthyl-2-yl)anthracene (MADN), hexaphenylcyclotriphosphazene (CP1), 1,4-bis(triphenylsilyl)benzene (UGH2), hexaphenylcyclotrisiloxane (DPSiO3), and octaphenylcyclotetrasiloxane (DPSiO4) were used as main materials.

[0113] In embodiments, the emitter layers EML-R, EML-G, and EML-B may comprise styrene derivatives (e.g., 1,4-bis[2-(3-N-ethylcarbazolyl)vinyl]benzene (BCzVB), 4-(di-p-tolylamino)-4'-[(di-p-tolylamino)styrene]stilbene (DPAVB), and N-(4-((E)-2-(6-((E)-4-(diphenylamino)styrene)naphthyl-2-yl)). Vinyl)phenyl)-N-phenylbenzylamine (N-BDAVBi), 4,4'-bis[2-(4-(N,N-diphenylamino)phenyl)vinyl]biphenyl (DPAVBi), dinaphthalene and its derivatives (e.g., 2,5,8,11-tetra-tert-butyl dinaphthalene (TBP)), dinaphthalene and its derivatives (e.g., 1,1'-dinaphthalene, 1,4-dinaphthalene, 1,4-bis(N,N-diphenylamino)dinaphthalene), etc.

[0114] The emitting layers EML-R, EML-G, and EML-B may include phosphorescent dopant materials, such as metal complexes of iridium (Ir), platinum (Pt), osmium (Os), gold (Au), titanium (Ti), zirconium (Zr), hafnium (Hf), europium (Eu), terbium (Tb), or thulium (Tm) as phosphorescent dopant. Specifically, iridium(III) bis(4,6-difluorophenylpyridyl-N,C2')pyridinecarboxylate (FIrpic), iridium(III) bis(2,4-difluorophenylpyridyl)tetra(1-pyrazolyl)borate (Fir6), or octaethylporphyrin platinum (PtOEP) can be used as phosphorescent dopant. However, the implementation is not limited to this.

[0115] According to the embodiment, the first light-emitting element ED-1 may include a first emitting layer EML-R, the second light-emitting element ED-2 may include a second emitting layer EML-G, and the third light-emitting element ED-3 may include a third emitting layer EML-B. In this embodiment, the first emitting layer EML-R is disposed between the first auxiliary layer PL1 and the second auxiliary layer PL2, and the second emitting layer EML-G is disposed between the third auxiliary layer PL3 and the fourth auxiliary layer PL4. The third emitting layer EML-B is disposed between the third electron transport region ETR3 and the third hole transport region HTR3. If auxiliary layers PL5 and PL6 are provided for the third light-emitting element ED-3, then the third emitting layer EML-B of the third light-emitting element ED-3 may be disposed between the fifth auxiliary layer PL5 and the sixth auxiliary layer PL6.

[0116] The first emitting layer EML-R emits first light. The second emitting layer EML-G emits second light. The third emitting layer EML-B emits third light. In the light-emitting elements ED-1, ED-2, and ED-3 according to embodiments, the wavelength ranges of the first to third light can be different from each other. For example, the first light can be red light having a wavelength range of about 625 nm to about 675 nm. For example, the second light can be green light having a wavelength range of about 500 nm to about 570 nm. For example, the third light can be blue light having a wavelength range of about 410 nm to about 480 nm.

[0117] In the light-emitting elements ED-1, ED-2, and ED-3 of the embodiments, hole transport regions HTR1, HTR2, and HTR3 are respectively disposed on the emitting layers EML-R, EML-G, and EML-B. In the first light-emitting element ED-1, a second auxiliary layer PL2 is disposed between the first hole transport region HTR1 and the first emitting layer EML-R. In the second light-emitting element ED-2, a fourth auxiliary layer PL4 is disposed between the second hole transport region HTR2 and the second emitting layer EML-G. If auxiliary layers PL5 and PL6 are provided for the third light-emitting element ED-3, then a sixth auxiliary layer PL6 can be disposed between the third hole transport region HTR3 and the third emitting layer EML-B.

[0118] Hole transport regions HTR1, HTR2, and HTR3 may include at least one of the following: hole injection layers HIL1, HIL2, and HIL3; hole transport layers HTL1, HTL2, and HTL3; a buffer layer or emission assist layer (not shown); and an electron blocking layer (not shown). Hole transport regions HTR1, HTR2, and HTR3 may have, for example, approximately to approximately The thickness.

[0119] Hole transport regions HTR1, HTR2 and HTR3 may have a single layer formed of a single material, a single layer formed of different materials or a multi-layer structure (which has layers formed of different materials).

[0120] For example, hole transport regions HTR1, HTR2, and HTR3 can have single-layer hole injection layers HIL1, HIL2, and HIL3 or hole transport layers HTL1, HTL2, and HTL3, and can have a single-layer structure formed of a hole injection material or a hole transport material. Hole transport regions HTR1, HTR2, and HTR3 can have a single-layer structure formed of different materials. The first hole transport region HTR1 can have a structure in which the first hole transport layer HTL1 and the first hole injection layer HIL1 are stacked on top of each other, or it can have a structure in which the first electron blocking layer (not shown), the first hole transport layer HTL1, and the first hole injection layer HIL1 are stacked on top of each other. The second hole transport region HTR2 can have a structure in which the second hole transport layer HTL2 and the second hole injection layer HIL2 are stacked on top of each other, or it can have a structure in which the second electron blocking layer (not shown), the second hole transport layer HTL2, and the second hole injection layer HIL2 are stacked on top of each other. The third hole transport region HTR3 may have a structure in which the third hole transport layer HTL3 and the third hole injection layer HIL3 are stacked on top of each other, or it may have a structure in which the third electron blocking layer (not shown), the third hole transport layer HTL3, and the third hole injection layer HIL3 are stacked on top of each other. However, the implementation is not limited to this.

[0121] Hole transport regions HTR1, HTR2, and HTR3 can be formed using various methods, such as vacuum deposition, spin coating, tape casting, Langmuir-Blodgett (LB) method, inkjet printing, laser printing, and laser-induced thermal imaging (LITI).

[0122] Hole transport regions HTR1, HTR2, and HTR3 may include, for example, phthalocyanine compounds such as copper phthalocyanine, N1,N1'-([1,1'-biphenyl]-4,4'-diyl)bis(N1-phenyl-N4,N4-di-m-tolyl-1,4-diamine) (DNTPD), 4,4',4”-[tris(3-methylphenyl)phenylamino]triphenylamine (m-MTDATA), 4,4',4”-tris(N,N-diphenylamino)triphenylamine (TDATA), 4,4',4”-tri{N-(2-naphthyl)-N-phenylamino}-triphenylamine (2-TNATA), poly(3,4-ethylenedioxythio) Poly(4-styrene sulfonate) (PEDOT / PSS), polyaniline / dodecylbenzenesulfonic acid (PANI / DBSA), polyaniline / camphor sulfonic acid (PANI / CSA), polyaniline / poly(4-styrene sulfonate) (PANI / PSS), N,N'-di(naphthyl-1-yl)-N,N'-diphenylbenzidine (NPB), triphenylamine-containing polyether ketone (TPAPEK), 4-isopropyl-4'-methyldiphenyliodonium [tetra(pentafluorophenyl)borate], bispyrazino[2,3-f:2',3'-h]quinoxaline-2,3,6,7,10,11-hexacarboxynitrile (HAT-CN), etc.

[0123] Hole transport regions HTR1, HTR2, and HTR3 may include, for example, carbazole derivatives such as N-phenylcarbazole and polyvinylcarbazole, fluorene derivatives, N,N'-bis(3-methylphenyl)-N,N'-diphenyl-[1,1'-biphenyl]-4,4'-diamine (TPD), triphenylamine derivatives such as 4,4',4"-tris(N-carbazolyl)triphenylamine (TCTA), 4,4'-cyclohexylenebis[N,N-bis(4-methylphenyl)aniline] (TAPC), 4,4'-bis[N,N'-(3-tolyl)amino]-3,3'-dimethylbiphenyl (HMTPD), 1,3-bis(N-carbazolyl)benzene (mCP), etc.

[0124] In addition, the hole transport regions HTR1, HTR2 and HTR3 may include 9-(4-tert-butylphenyl)-3,6-bis(triphenylsilyl)-9H-carbazole (CzSi), 9-phenyl-9H-3,9'-bicarbazole (CCP), 1,3-bis(N-carbazolyl)benzene (mCP), 1,3-bis(1,8-dimethyl-9H-carbazol-9yl)benzene (mDCP), etc.

[0125] Hole transport regions HTR1, HTR2, and HTR3 may include the aforementioned compounds of the hole transport regions in at least one of hole injection layers HIL1, HIL2, and HIL3, hole transport layers HTL1, HTL2, and HTL3, and an electron blocking layer (not shown).

[0126] Hole transport regions HTR1, HTR2, and HTR3 can have approximately to approximately (For example, about to approximately The thickness of the hole injection layers HIL1, HIL2, and HIL3 in the hole transport regions HTR1, HTR2, and HTR3 can be, for example, approximately [missing information]. to approximately The thickness. In the case where hole transport regions HTR1, HTR2, and HTR3 include hole transport layers HTL1, HTL2, and HTL3, the hole transport layers HTL1, HTL2, and HTL3 can have approximately... to approximately The thickness. For example, in the case where the hole transport regions HTR1, HTR2, and HTR3 include an electron blocking layer (not shown), the electron blocking layer (not shown) may have a thickness of approximately to approximately The thickness of the hole transport regions HTR1, HTR2 and HTR3, the hole injection layers HIL1, HIL2 and HIL3, the hole transport layers HTL1, HTL2 and HTL3, and the electron blocking layer (not shown) meets the above range, thus achieving satisfactory hole transport properties without significantly increasing the driving voltage.

[0127] In addition to the materials described above, the hole transport regions HTR1, HTR2, and HTR3 may also include charge-generating materials to increase conductivity. The charge-generating materials may be uniformly or non-uniformly dispersed in the hole transport regions HTR1, HTR2, and HTR3. The charge-generating materials may be, for example, p-dopers. P-dopers may include at least one of metal halide compounds, quinone derivatives, metal oxides, and cyano-containing compounds, but the embodiments are not limited thereto. For example, p-dopers may include quinone derivatives such as tetracyanoquinone dimethylane (TCNQ) and 2,3,5,6-tetrafluoro-7,7',8,8'-tetracyanoquinone dimethylane (F4-TCNQ), metal oxides such as tungsten oxide and molybdenum oxide, etc., but the embodiments are not limited thereto.

[0128] As described above, in addition to the hole transport layers HTL1, HTL2, and HTL3 and the hole injection layers HIL1, HIL2, and HIL3, the hole transport regions HTR1, HTR2, and HTR3 may also include at least one of a buffer layer (not shown) and an electron blocking layer (not shown). The buffer layer (not shown) can compensate for the resonant distance according to the wavelength of light emitted from the emission layer EML, and thus can increase the luminous efficiency. The buffer layer (not shown) may include the material contained in the hole transport regions HTR1, HTR2, and HTR3. The electron blocking layer (not shown) is a layer used to prevent electrons from being injected from the electron transport regions ETR1, ETR2, and ETR3 into the hole transport regions HTR1, HTR2, and HTR3.

[0129] The second electrode EL2 is disposed on the hole transport regions HTR1, HTR2, and HTR3. The second electrode EL2 can be a common electrode. The second electrode EL2 can be a cathode or an anode, but the implementation is not limited thereto. For example, if the first electrode EL1 is an anode, the second electrode EL2 can be a cathode, and if the first electrode EL1 is a cathode, the second electrode EL2 can be an anode.

[0130] The second electrode EL2 can be a semi-transmissive / semi-reflective electrode or a transmissive electrode. If the second electrode EL2 is a transmissive electrode, it can be formed from materials such as ITO, IZO, ZnO, or ITZO.

[0131] When the second electrode EL2 is a semi-transmissive and semi-reflective electrode, the second electrode EL2 may include Ag, Mg, Cu, Al, Pt, Pd, Au, Ni, Nd, Ir, Cr, Li, Ca, LiF, Mo, Ti, Yb, W, or compounds or mixtures thereof (e.g., AgMg, AgYb, or MgAg). The second electrode EL2 may have a multilayer structure, including a reflective film or a semi-transmissive and semi-reflective film formed from the above-mentioned materials, and a transparent conductive film formed from ITO, IZO, ZnO, ITZO, etc. For example, the second electrode EL2 may include the above-mentioned metallic materials, a combination of at least two of the above-mentioned metallic materials, oxides of the above-mentioned metallic materials, etc.

[0132] Although not shown, the second electrode EL2 can be connected to the auxiliary electrode. If the second electrode EL2 is connected to the auxiliary electrode, the resistance of the second electrode EL2 can be reduced.

[0133] The light-emitting elements ED-1, ED-2, and ED-3 according to the embodiments include auxiliary layers PL1, PL2, PL3, PL4, PL5, and PL6. In the embodiments, the first auxiliary layer PL1 is disposed between the first electron transport region ETR1 and the first emitter layer EML-R, and the second auxiliary layer PL2 is disposed between the first hole transport region HTR1 and the first emitter layer EML-R. The third auxiliary layer PL3 is disposed between the second electron transport region ETR2 and the second emitter layer EML-G, and the fourth auxiliary layer PL4 is disposed between the second hole transport region HTR2 and the second emitter layer EML-G. The fifth auxiliary layer PL5 is disposed between the third electron transport region ETR3 and the third emitter layer EML-B, and the sixth auxiliary layer PL6 is disposed between the third hole transport region HTR3 and the third emitter layer EML-B.

[0134] The first auxiliary layer PL1, the third auxiliary layer PL3, and the fifth auxiliary layer PL5 can each independently include electron transport material, and the second auxiliary layer PL2, the fourth auxiliary layer PL4, and the sixth auxiliary layer PL6 can each independently include hole transport material.

[0135] According to the embodiment, light-emitting elements ED-1, ED-2, and ED-3 may have an inverted element structure, wherein the electron transport region (ETR) is disposed below the emitter layer (EML), and the hole transport region (HTR) is disposed above the emitter layer (EML), and auxiliary layers PL1 to PL6 may be disposed adjacent to the emitter layer (EML) in at least some of the light-emitting elements ED-1, ED-2, and ED-3. Therefore, the light-emitting position in the organic layer is optimized, and thus the light-emitting characteristics of the light-emitting elements can be improved.

[0136] For example, the first light-emitting element ED-1 includes a first auxiliary layer PL1 and a second auxiliary layer PL2 respectively disposed adjacent to the upper and lower surfaces of the first emitting layer EML-R; the second light-emitting element ED-2 includes a third auxiliary layer PL3 and a fourth auxiliary layer PL4 respectively disposed adjacent to the upper and lower surfaces of the second emitting layer EML-G; and the third light-emitting element ED-3 includes a fifth auxiliary layer PL5 and a sixth auxiliary layer PL6 respectively disposed adjacent to the upper and lower surfaces of the third emitting layer EML-B. Therefore, inverted elements are introduced to implement a degradation prevention circuit, and thus, inverted elements can be applied to display devices employing NMOS transistors. Furthermore, since the light-emitting positions in the organic layers are optimized, a light-emitting characteristic level similar to that of a forward-emitting element can be achieved. Therefore, high-speed driving and improved luminous efficiency of the display device can be realized.

[0137] The capping layer CPL can be disposed on the second electrode EL2 of the light-emitting elements ED-1, ED-2 and ED-3 in the embodiments. The capping layer CPL can include multiple layers or a single layer.

[0138] In this embodiment, the capping layer CPL can be an organic layer or an inorganic layer. For example, when the capping layer CPL includes an inorganic material, the inorganic material may include alkali metal compounds such as LiF, or materials such as MgF2, SiON, and SiN. x SiO y Alkaline earth metal compounds, etc.

[0139] For example, when the capping layer CPL comprises an organic material, the organic material may include α-NPD, NPB, TPD, m-MTDATA, Alq3, CuPc, N4,N4,N4',N4'-tetra(biphenyl-4-yl)biphenyl-4,4'-diamine (TPD15), 4,4',4”-tris(carbazole-9-yl)triphenylamine (TCTA), epoxy resin, or acrylate such as methacrylate. However, the embodiments are not limited thereto, and the capping layer CPL may include at least one of the following compounds P1 to P5:

[0140]

[0141] The refractive index of the capping layer CPL can be about 1.6 or greater. For example, the capping layer CPL can have a refractive index of about 1.6 or greater for light with wavelengths from about 550 nm to about 660 nm.

[0142] The light-emitting elements ED-1, ED-2, and ED-3 according to the embodiments have an inverted element structure. When a voltage is applied to each of the first electrode EL1 and the second electrode EL2, electrons injected from the first electrode EL1 move to the emitter layer EML through the electron transport region ETR. Holes injected from the second electrode EL2 move to the emitter layer EML through the hole transport region HTR. Electrons and holes recombine in the emitter layer EML to generate excitons, and light is emitted when the excitons return from the excited state to the ground state. In the embodiments, each of the first light emitted from the first emitter layer EML-R, the second light emitted from the second emitter layer EML-G, and the third light emitted from the third emitter layer EML-B can have substantially different wavelengths.

[0143] Light-emitting elements ED-1, ED-2, and ED-3 may have organic layers OL1, OL2, and OL3. Each of the organic layers OL1, OL2, and OL3 may include emitting layers EML-R, EML-G, and EML-B, an electron transport region ETR, and a hole transport region HTR, and may also include auxiliary layers PL1 to PL6. The thickness of the first organic layer OL1 may be the same as the nth resonant distance at which the first light generated by the first emitting layer EML-R is reflected at the reflective interface (i.e., the first electrode EL1) at nth resonance. According to an embodiment, n is an integer equal to or greater than 2. For example, n may be 2. The thickness of the second organic layer OL2 may be the same as the nth resonant distance at which the second light generated by the second emitting layer EML-G is reflected at the reflective interface at nth resonance. The thickness of the third organic layer OL3 may be the same as the nth resonant distance at which the third light generated by the third emitting layer EML-B is reflected at the reflective interface at nth resonance.

[0144] Organic layers OL1, OL2, and OL3 can be defined within a distance from the upper surface of the first electrode EL1 to the lower surface of the second electrode EL2. The thickness of the first organic layer OL1 can range from about 250 nm to about 290 nm. The thickness of the second organic layer OL2 can range from about 210 nm to about 250 nm. The thickness of the third organic layer OL3 can range from about 160 nm to about 200 nm. In the light-emitting element of the embodiment, the thickness of the organic layer is adjusted in accordance with the wavelength of the light generated in the emitting layer of each light-emitting element, such that the light reflected at the first electrode interface can resonate n times, thereby improving the light efficiency of the display device including the light-emitting element. For example, at least some of the light-emitting elements may include an auxiliary layer disposed adjacent to the light-emitting layer, so that the thickness of the organic layer can be easily adjusted to make the reflected light resonate n times, thereby improving the light efficiency of the display device.

[0145] Figure 14This is a graph showing the luminous efficiency of the comparative examples and the examples. The examples show the evaluation results of the light-emitting element according to the embodiments, and Comparative Examples 1 and 2 show the evaluation results of light-emitting elements having a different layer structure than the examples. Except for the different layer structures of the light-emitting elements, the composition of other functional layers of the light-emitting elements in the comparative examples and the examples is the same. The comparative examples and the examples correspond to light-emitting elements that emit red light with a center wavelength of about 625 nm to about 675 nm.

[0146] Unlike light-emitting elements with an inverted structure, Comparative Example 1 includes a first electrode, a hole transport region, an emission layer, an electron transport region, and a second electrode stacked in sequence. The graph of Comparative Example 1 corresponds to the luminous efficiency of a forward-emitting element. Comparative Example 2 has an inverted structure and includes (or only includes) an auxiliary layer between the hole transport region and the emission layer.

[0147] The example has an inverted structure and includes a first electrode, an electron transport region, an emitter layer, a hole transport region, and a second electrode stacked in sequence, and also includes a first auxiliary layer between the electron transport region and the emitter layer and a second auxiliary layer between the hole transport region and the emitter layer.

[0148] exist Figure 14 In the diagram, the horizontal axis represents the color coordinate value corresponding to the "y" value of the color coordinate of the light emitted from the light-emitting element. Figure 14 The graph shows the luminous efficiency based on the color coordinates of the emitted light. (Refer to...) Figure 14 The results show that, in the range of color coordinate values ​​from about 0.68 to about 0.69, the efficiency of the example light-emitting element is almost the same as that of Comparative Example 1, and higher than that of Comparative Example 2.

[0149] The example light-emitting element includes two auxiliary layers to optimize the light-emitting position in the inverted structure and has a high light extraction effect, thus enabling it to have excellent light-emitting characteristics.

[0150] The light-emitting element included in the display device according to the embodiment has an inverted element structure, wherein an electron transport region is disposed below the emission layer and a hole transport region is disposed above the emission layer, and the light-emitting element includes an auxiliary layer disposed adjacent to the emission layer. Therefore, the light-emitting position in the organic layer is optimized, and thus the light-emitting characteristics of the light-emitting element can be improved.

[0151] Although this disclosure has been described with reference to embodiments, it should be understood that the invention is not limited to the embodiments, but can be modified and altered by those skilled in the art without departing from the spirit and scope of the invention.

[0152] Therefore, the scope of the present invention is not intended to be limited to the content set forth in the detailed description herein, but is intended to be defined by the appended claims.

Claims

1. A display device, including: The base layer includes a first launch area and a second launch area; The first electrode is disposed on the base layer; The second electrode is disposed on the first electrode and faces the first electrode; A first organic layer is disposed between the first electrode and the second electrode and is disposed in the first emission region; as well as A second organic layer is disposed between the first electrode and the second electrode and within the second emission region, wherein... The first organic layer includes: A first electron transport layer is disposed on the first electrode; A first auxiliary layer is disposed on the first electronic transport layer; A first emission layer is disposed on the first auxiliary layer and emits first light; A second auxiliary layer is disposed on the first emission layer; and The first hole transport layer is disposed on the second auxiliary layer, and The second organic layer includes: A second electron transport layer is disposed on the first electrode; The third auxiliary layer is disposed on the second electron transport layer; A second emitting layer is disposed on the third auxiliary layer and emits second light having a wavelength different from that of the first light; A fourth auxiliary layer is disposed on the second emission layer; and The second hole transport layer is disposed on the fourth auxiliary layer; The thickness of the first organic layer is in the range of 250 nm to 290 nm, and The thickness of the second organic layer is in the range of 210 nm to 250 nm; The thickness of the first auxiliary layer and the thickness of the third auxiliary layer are different from each other; The thicknesses of the second auxiliary layer and the fourth auxiliary layer are different from each other.

2. The display device according to claim 1, wherein, The first electrode is a reflective electrode. The second electrode is a semi-transmissive / semi-reflective electrode or a transmissive electrode, and The first light and the second light are emitted in a direction from the first electrode to the second electrode.

3. The display device according to claim 1, further comprising a circuit layer disposed on the base layer and including a transistor electrically connected to the first electrode.

4. The display device according to claim 3, wherein, The transistor is an NMOS transistor.

5. The display device according to claim 1, wherein, The wavelength of the first light is in the range of 625 nm to 675 nm, and The wavelength of the second light is in the range of 500 nm to 570 nm.

6. The display device according to claim 1, further comprising a third organic layer disposed between the first electrode and the second electrode and disposed on the base layer in a third emission region, wherein, The third organic layer includes: A third electron transport layer is disposed on the first electrode; A third emission layer is disposed on the third electron transport layer and emits third light; and A third hole transport layer is disposed on the third transmission layer, and The thickness of the third organic layer is in the range of 160 nm to 200 nm.

7. A display device, including: The base layer includes a first launch area and a second launch area; A circuit layer, disposed on the base layer and comprising a plurality of transistors; The first electrode is disposed on the circuit layer; An electron injection layer is disposed on the first electrode; An electron transport layer is disposed on the electron injection layer; A first emitting layer is disposed on the electron transport layer, overlaps with the first emitting region, and emits first light; A second emission layer is disposed on the electron transport layer, overlaps with the second emission region, and emits second light having an emission wavelength different from that of the first light; A hole transport layer is disposed on the first emission layer and the second emission layer; A hole injection layer is disposed on the hole transport layer; The second electrode is disposed on the hole injection layer; A first auxiliary layer is disposed between the electron transport layer and the first emission layer; A second auxiliary layer is disposed between the hole transport layer and the first emission layer; A third auxiliary layer is disposed between the electron transport layer and the second emission layer; as well as A fourth auxiliary layer is disposed between the hole transport layer and the second emission layer; The distance between the upper surface of the first electrode and the lower surface of the second electrode is in the range of 250 nm to 290 nm in the first emission region, and the distance between the upper surface of the first electrode and the lower surface of the second electrode is in the range of 210 nm to 250 nm in the second emission region. The thickness of the first auxiliary layer and the thickness of the third auxiliary layer are different from each other; The thicknesses of the second auxiliary layer and the fourth auxiliary layer are different from each other.